CN109427706B - 用于pfc应用的封装的快速反向二极管组件 - Google Patents

用于pfc应用的封装的快速反向二极管组件 Download PDF

Info

Publication number
CN109427706B
CN109427706B CN201811018793.4A CN201811018793A CN109427706B CN 109427706 B CN109427706 B CN 109427706B CN 201811018793 A CN201811018793 A CN 201811018793A CN 109427706 B CN109427706 B CN 109427706B
Authority
CN
China
Prior art keywords
die
reverse
package terminal
type
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811018793.4A
Other languages
English (en)
Other versions
CN109427706A (zh
Inventor
石庆旭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IXYS LLC
Original Assignee
IXYS LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IXYS LLC filed Critical IXYS LLC
Publication of CN109427706A publication Critical patent/CN109427706A/zh
Application granted granted Critical
Publication of CN109427706B publication Critical patent/CN109427706B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/4952—Additional leads the additional leads being a bump or a wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0925—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising an N-well only in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66136—PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7404—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
    • H01L29/7412—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode
    • H01L29/7416—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode the device being an antiparallel diode, e.g. RCT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856—Source regions
    • H01L29/086—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8611—Planar PN junction diodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Rectifiers (AREA)

Abstract

新的四端子封装的半导体器件在400伏的直流输出PFC升压转换器电路中是特别有用的。在封装的主体内，安装NFET管芯和快速反向二极管管芯，使得NFET的底侧漏极电极经由管芯附接片电耦接到反向二极管的底侧P型阳极区域。第一端子T1被耦接到管芯附接片。第二端子T2被耦接到NFET管芯的栅极。第三端子T3被耦接到NFET管芯的源极。第四端子T4被耦接到快速反向二极管管芯的顶侧阴极电极。由于反向二极管管芯的新的P+型电荷载流子提取区域，该封装器件在PFC升压转换器电路应用中是快速的且具有低的反向漏电流。

Description

用于PFC应用的封装的快速反向二极管组件
技术领域
所描述的实施例涉及反向二极管器件和相关方法。
背景技术
大多数具有高反向击穿电压能力的市售功率二极管同样具有N-型底侧阴极。罕见的例外是所谓的“反向二极管”或“反转二极管”，其可从IXYS Corporation(位于California内Milpitas的Buckeye Drive 1590号)商购获得。这些不寻常的二极管具有P型隔离结构，包括底侧P型阳极区域以及P型外围侧壁扩散区域。与其他类型的二极管相比，这些不寻常的二极管具有一些优越的特性。例如，它们可以具有高的反向击穿电压，同时表现出优异的动态鲁棒性。寻求将这种反向二极管架构扩展到新的应用领域的方式。
发明内容
一种新的四端子封装的半导体器件具有第一封装端子T1、第二封装端子T2、第三封装端子T3、第四封装端子T4和封装主体。封装主体内部是管芯附接片、N-沟道场效应晶体管(NFET)管芯和新的快速恢复反向二极管器件管芯。NFET管芯和快速恢复反向二极管管芯安装到封装主体内的管芯附接片，使得NFET管芯的底侧漏极电极经由管芯附接片电耦接到反向二极管管芯的底侧P型阳极区域。NFET管芯、快速恢复反向二极管管芯和管芯附接片通常用一定量的注塑密封剂包覆成型。第一封装端子T1耦接到管芯附接片或者管芯附接片的一部分。第二封装端子T2耦接到NFET管芯的顶侧栅极电极。第三封装端子T3耦接到NFET管芯的顶侧源极电极。第四封装端子T4耦接到反向二极管管芯的顶侧阴极电极。
快速恢复反向二极管管芯是“反向二极管”，这是因为它的阳极位于管芯的底侧上且是P型区域，并且这是因为它具有P型隔离结构。P型隔离结构将管芯的中心有源区与四个管芯侧边缘以及管芯的底部半导体表面隔离并分开。快速恢复反向二极管管芯还具有以下所有特性：1)在10安培的大电流正向导通条件下的小于1.5伏的小正向压降(Vf)，2)当反向二极管管芯从大电流正向电流条件向-100伏的反向电压条件切换时的小于5安培的峰值反向恢复电流(Irr)，3)至少550伏的反向击穿电压(Vbr)承受能力，以及4)在450伏的静态反向阻断条件下的小于100微安的反向漏电流(Ilk)。NFET管芯是平面N-沟道功率MOSFET，其击穿电压(BVDSS)为至少600伏。当用于400伏直流输出电压PFC(功率因数校正)升压转换器电路时，所述新的封装的半导体器件是特别有利和方便的。
在下面的详细描述中描述了进一步的细节和实施例和方法。发明内容并非旨在定义本发明。本发明由权利要求限定。
附图说明
附图示出了本发明的实施例，在附图中，相同的数字表示相同的组件。
图1是根据一个新的方面的封装的半导体器件的透视图。
图2是示出图1的封装的半导体器件内部的电路的图，且还示出了图1的封装的半导体器件如何用于PFC AC至DC升压转换器电路。
图3是图1的封装的半导体器件内的NFET管芯的横截面侧视图。
图4是阐述图3的NFET管芯的各个部分的浓度、掺杂剂类型、组成材料、厚度和深度的表。
图5是图1的封装的半导体器件内的反向二极管管芯的横截面侧视图。
图6是图5的反向二极管器件管芯的P+型电荷载流子提取区域的俯视图。
图7是阐述图5的反向二极管器件管芯的各个部分的浓度、掺杂剂类型、组成材料、厚度和深度的表。
图8阐述图5的反向二极管器件管芯的操作特性的表。
图9是图5的反向二极管器件管芯在正向偏置情况下的横截面侧视图。
图10以放大的方式示出了图9的一部分。
图11是示出当图5的反向二极管器件管芯上的电压极性从正向导通条件快速切换到反向阻断条件时该二极管器件管芯的操作的横截面侧视图。
图12以放大的方式示出了图11的反向二极管器件管芯的一部分。
图13是示出时间Tzz的波形图。
具体实施方式
现将详细参考背景示例和本发明的一些实施例，其示例在附图中示出。在以下描述和权利要求中，当第一对象被称为被设置在第二对象“上方”或“上”时，应理解第一对象可以直接在第二对象上，或者中间对象可以存在于第一对象和第二对象之间。类似地，诸如“顶部”、“顶侧”、“上方”、“向上”、“下方”、“向下”、“垂直”、“横向”、“一侧”、“在...下”，“背侧”、“底部”和“底侧”在本文中用于描述所描述的结构的不同部分之间的相对取向，并且应理解，所描述的整体结构实际上可以以任何方式在三维空间中取向。当在说明书中将处理描述为在晶片的底部上执行时，例如当掺杂剂被称为向上扩散时，应理解晶片实际上可以在这些处理步骤期间上下颠倒，并且可以以普通方式从顶部进行处理。在下面的描述中，P型硅通常可以简称为P型硅，或者更具体地称为P++型硅、P+型硅、P型硅或P-型硅。P++，P+，P和P-指示符旨在以粗略的一般意义指定掺杂剂浓度的相对范围。例如，描述为P+型硅的硅与描述为P型硅的硅之间的浓度范围可以有交叠。P+型硅范围底部的掺杂剂浓度可以低于P型硅范围顶部的掺杂剂浓度。该专利文献中也采用相同的方式来描述N型硅(在有时更具体地指N+型硅、N型硅或N-型硅的方面)。
图1是根据一个新的方面的封装的半导体器件的透视图。封装的半导体器件1包括封装主体部2、第一封装端子T1 3、第二封装端子T2 4、第三封装端子T3 5和第四封装端子T4 6。主体部2包括管芯附接片7、N-沟道场效应晶体管(NFET)管芯8、快速恢复反向二极管管芯9、接合线10-16和一定量的注塑密封剂17。一定量的注塑塑料封装剂17包覆并密封NFET管芯8和快速恢复反向二极管管芯9、接合线10-16以及管芯附接片7。在该示例中、第一封装端子T1实际上是管芯附接片7的延伸。第一封装端子T1和管芯附接片7是相同的单片冲压铜片的部分。这些端子的金属是引线框架的金属，并且如在常规半导体器件注塑封装工艺中执行的那样，执行使用密封剂(例如，通过注塑聚合树脂)的包覆成型或注塑成型。
图2是示出封装的半导体器件1内的电路的图。图2还示出了封装的半导体器件1如何在400伏输出电压PFC AC至DC升压转换器18中使用。NFET管芯8具有顶侧栅极电极和接合焊盘19、顶侧源极电极和接合焊盘20、以及底侧漏极电极和接合焊盘21。快速恢复反向二极管管芯9具有顶侧阴极电极和接合焊盘22以及底侧阳极电极和接合焊盘23。NFET管芯8的顶侧栅极电极19通过接合线10耦接到封装端子T2。NFET管芯8的顶侧源极电极20通过接合线11-13耦接到封装端子T3。反向二极管管芯9的顶侧阴极电极22通过接合线14-16耦接到第四端子T4。重要的是，NFET管芯8的底侧漏极电极21和反向二极管管芯9的底侧阳极端子23二者都安装在管芯附接片7上，使得管芯附接片7将NFET管芯8的底侧漏极电极21电耦接到反向二极管管芯9的底侧阳极端子23。NFET管芯8和反向二极管管芯9可以例如直接焊接到管芯附接片7。
图2的PFC AC至DC升压转换器18包括两个输入端子24和25以及两个输出端子26和27。升压转换器18从AC电源28到输入端子24和25上接收240伏的AC RMS正弦输入电源电压。升压转换器18将400伏的DC电压输出到输出端子26和27上。升压转换器18包括全桥整流器，其包括四个二极管29-32、电感器33、封装的半导体器件1、控制电路34和输出电容器35，它们全部互连，如图2所示。新的封装的半导体器件1的存在促进了升压转换器18的制造。
NFET管芯8是N-沟道平面型功率场效应晶体管，其击穿电压(BVDSS)为至少600伏。反向二极管管芯9是所谓的“反向二极管”，这是因为它的阳极位于管芯的底侧上且是P型区域，并且这是因为它具有P型隔离结构。这种P型隔离结构将管芯的中心有源区与四个管芯侧边缘以及管芯的底部表面隔离并分开。反向二极管管芯9还具有以下所有特性：1)在10安培的大电流正向导通条件下的小于1.5伏的小正向压降(Vf)，2)当反向二极管管芯从大电流正向电流条件向-100伏的反向电压条件切换时的小于5安培的峰值反向恢复电流(Irr)，3)至少550伏的反向击穿电压(Vbr)承受能力，以及4)在450伏的静态反向阻断条件下的小于100微安的反向漏电流(Ilk)。在一个示例中，反向二极管管芯9实现了这些性能特性，而无需将额外的复合中心引入到管芯的硅材料中，例如通过电子辐射，或通过包含重金属原子，或通过氢或氦离子注入，或者通过包括所谓的“寿命抑制因素”。
图3是NFET管芯9的横截面侧视图。N-型漂移区域36设置在N++型硅衬底层和区域37上。器件的P主体包括P型体区部分38以及更重掺杂的P+型体区39。附图标记40标识N+型源极区域41。附图标记42表示N型JFET区域。附图标记43表示N+型多晶硅栅极。栅极通过栅极氧化物45与顶部半导体表面44分开。更多的氧化物46设置在栅极上方。底侧漏极电极21设置在底部半导体表面47上。顶侧源极电极20设置在氧化物46上方。顶侧栅极金属电极19不存在于图示的特定横截面中，因此未示出。
图4是阐述NFET管芯9的各个部分的浓度、掺杂剂类型、组成材料、厚度和深度的表。
图5是反向二极管管芯9的横截面侧视图。管芯1具有矩形顶表面、矩形底表面和四个外围侧边缘。侧边缘中的两个侧边缘48和49在图5的横截面侧视图中示出。更具体地，底侧P-型硅区域50从管芯的平坦底部半导体表面51向上延伸，并且还横向向外延伸到管芯的所有四个外围侧边缘。N-型硅区域52设置在底侧P-型硅区域50上和其上方，如图5所示。N-型硅区域52(也称为N-漂移区域)与底侧P-型硅区域50具有相同的体晶片材料。N-型硅区域52是反向二极管管芯的阴极，这是因为二极管的主要PN结是底侧P-型硅区域50的顶部与N-型硅区域52的底部之间的结。N型耗尽停止区域53从顶部半导体表面54向下延伸到N-型硅区域52中。如图所示，N+型接触区域从顶部半导体表面54向下延伸到N型耗尽停止区域53中。在图5中所示的特定横截面中存在三个N+型接触区域55-57。还存在环形的N+型耗尽停止区域58。如图所示，新的P+型电荷载流子提取区域59从顶部半导体表面54向下延伸到N型耗尽停止区域53中。
图6是P+型电荷载流子提取区域59、N+型接触区域55-57、环形N+型耗尽停止区域58和N型耗尽停止区域53的俯视图。图6的俯视图是在管芯的顶部半导体表面上方向下看去截取的。图5的横截面视图是沿图6的剖面线A-A'截取的。从图6的俯视图可以看出，九个N+型接触区域以行和列的二维阵列设置。九个N+型接触区域中的每一个被P+型电荷载流子提取区域59的P+型硅横向围绕。环形N+型耗尽停止区域58围绕P+型电荷载流子提取区域59的外周延伸。九个N+型接触区域的深度、环形N+型耗尽停止区域的深度和P+型电荷载流子提取区域的深度是类似的。在该实例中，这些深度在约0.4微米至约0.6微米的范围内。N型耗尽停止区域53的深度约为1.6微米，其中该距离是从N-型区域52的顶部到P+型电荷载流子提取区域59的底部测量的。N型耗尽停止区域53比P+型电荷载流子提取区域59厚得多，使得在器件的期望最大反向阻断电压下，主要耗尽区(来自区域50和区域52之间的PN结)不会向上延伸以致到达在P+型电荷载流子提取区域59的底部和N型耗尽停止区域53的N型硅之间的PN结处的耗尽区域。如图所示，P+型浮置场环63从顶部半导体表面54向下延伸到N-型硅区域52中。P+型浮置场环63外围地环绕在管芯的中心有源区域周围，其中N型耗尽停止区域53位于所述中心区域处。
管芯还具有P型硅外围侧壁区域60，其从管芯的四个外围侧边缘横向向内延伸，使得其环绕在中心N-型硅区域52周围。P型硅外围侧壁区域60向下延伸并接合底侧P-型硅区域50并且还向上延伸到顶部半导体表面54。P型外围区域60和底侧P-型硅区域50的组合形成所谓的“P型隔离结构”(有时也称为“P型隔离区域”、或“P型分离扩散结构”、或“P型分离扩散区域”)。这种结构的P型硅从侧面外围以及从底部下面完全包围N-型硅区域52。在一个示例中，P型分离扩散结构是通过从顶部半导体表面54向下扩散铝以形成区域60，并通过用P型掺杂剂离子注入晶片的底部然后通过激光退火激活掺杂剂以形成区域50而制成的。
关于各种合适的不同P型分离扩散结构以及如何形成它们的附加信息，请参阅：1)Kelberlau等人于2005年8月30日提交的题为“Method For Fabricating Forward AndReverse Blocking Devices”的美国专利No.7,442,630；2)N.Zommer于1995年7月31日提交的题为“Method Of Making A Reverse Blocking IGBT”的美国专利No.5,698,454；3)J.Lutz等人的“Semiconductor Power Devices”，第146-147页，由Springer，Berlin和Heidelberg出版(2011)；4)题为“Diode Chip”的数据表，DWN17-18，由美国加州95035米尔皮塔斯的IXYS公司提供；5)Wisotzki等人于2005年11月20日提交的题为“TrenchSeparation Diffusion For High Voltage Device”的美国专利No.9,590,033；6)Mochizuki等人于1980年7月10日提交的题为“Method of Manufacturing SemiconductorDevice Having Aluminum Diffused Semiconductor Substrate”的美国专利No.4,351,677；7)Green于2000年8月16日提交的题为“Thyristors Having a Novel Arrangement ofConcentric Perimeter Zones”的美国专利No.6,507,050；8)Kelberlau等人于2002年3月13日提交的题为“Forward and Reverse Blocking Devices”的美国专利No.6,936,908；9)Neidig于2005年3月14日提交的题为“Power Semiconductor Component in the PlanarTechnique”的美国专利No.7,030,426；10)Veeramma等人于2003年8月27日提交的题为“Breakdown Voltage For Power Devices”的美国专利No.8,093,652；11)2004年题为“FRED，Rectifier Diode and Thyristor Chips in Planar Design”的描述，由IXYSSemiconductor GmbH，Edisonstrasse 15，D-68623，兰佩特海姆，德国提供；12)Wisotzki等人于2012年2月20日提交的题为“Power Device Manufacture On The Recessed Side OfA Thinned Wafer”的美国专利No.8,716,067；Veeramma于2006年5月11日提交的题为“Stable Diodes For Low And High Frequency Applications”的美国专利No.8,716,745。以下每篇文献的全部主题通过引用并入本文：1)美国专利No.7,442,630；2)美国专利No.5,698,454；3)美国专利No.9,590,033；4)美国专利No.4,351,677；5)美国专利No.6,507,050；6)美国专利No.6,936,908；7)美国专利No.7,030,426；8)美国专利No.8,093,652；9)美国专利No.8,716,067；10)美国专利No.8,716,745。
如图所示，氧化物层61直接设置在顶部半导体表面54上。该氧化物层61横向围绕顶部半导体表面的阴极接触部。如图所示，顶侧金属电极22直接设置在顶部半导体表面54的阴极接触部上。该顶侧金属电极22是反向二极管器件的阴极电极或阴极端子。底侧金属电极23直接设置在管芯的底部半导体表面51上。该底侧金属电极23跨越整个底部半导体表面51从管芯侧边缘48延伸到管芯侧边缘49。底侧金属电极23以及底侧P-型区域50比顶侧金属电极22宽得多。底侧金属电极23是反向二极管器件的阳极电极或阳极端子。顶侧钝化层62设置在氧化物层61上方，使得钝化层重叠并覆盖顶侧金属电极22的外围边缘。底部半导体表面51和顶部半导体表面54之间的所有硅区域是体硅晶片材料。没有外延硅材料。
图7是阐述反向二极管器件管芯9的各种部分的掺杂剂浓度、掺杂剂类型和尺寸的表。
图8是阐述图5的包括所述新的P+型电荷载流子提取区域59的反向二极管器件管芯9的操作特性的表。表中的数据是使用名为Synopsys Sentaurus工作台(SynopsysSentaurus Workbench)(SWB)的设备模拟器获得的。首先使用2-D Sentaurus结构编辑器(Sentaurus Structure Editor)(SDE)来定义图5-图7的反向二极管的结构。然后使用工作台工具套件的器件模拟器(Sdevice)部分来模拟定义的结构。
图9是示出反向二极管器件管芯9在正向偏置情况下的操作的横截面图。图10以放大的方式示出了图9的管芯的一部分。在正向偏置条件下，电流从底部上的阳极电极23向上流过器件，并从顶部上的阴极电极22流出。在此期间，区域52和区域53中存在高浓度的电荷载流子。这包括高浓度的电子和高浓度的空穴。当二极管两端的电压极性快速反转到反向阻断条件时，在二极管能够开始阻断电流之前，必须以某种方式消除这些区域52和53中的大量电子和空穴。这些电荷载流子中的一部分可以由于电子和空穴复合而被消除，而其他电荷载流子可以通过以反向恢复电流Irr的形式流出二极管管芯的电荷载流子来消除。为了减小该反向恢复电流的峰值幅度，在反向二极管器件管芯9中，减小在正向偏置条件期间在区域52和53中的电荷载流子的浓度。在正向偏置条件下，耗尽区域64存在于P+型电荷载流子提取区域59和N型耗尽停止区域53之间的边界处。图10示出该耗尽区域64。耗尽区域64在耗尽区域上设置电场65。该电场65的方向由箭头65表示。由于这种局部的电荷提取电场，恰好靠近耗尽区域64或在耗尽区域64的边界处的空穴沿箭头65的方向扫过耗尽区域64。图10中的箭头67示出了一个这样的代表性空穴68的路径。当二极管以其正向导通模式操作时，空穴的提取是连续的。通过局部的电荷提取电场64连续提取空穴减少了在正向偏置条件下的二极管器件的区域52和53中的空穴浓度(与不存在P+型电荷载流子提取区域的情况下将呈现出的空穴浓度相比)。另外，邻域中提取的空穴相邻的对应电子倾向于被排出。在区域53和区域52中保持电荷中性，因此电子从器件的底部排出。图10中的箭头69示出了一个这样的代表性电子70的路径。当二极管以其正向导通模式操作时，这种电子的流动也是连续的。电子的流动减少了在正向偏置条件下的器件的区域53和52中的电子浓度(与不存在P+型电荷载流子提取区域的情况下将呈现出的电子浓度相比)。由于在区域53和区域52中的空穴和电子数量的附带减少，当二极管从正向导通状态快速切换到反向电压状态时，要从二极管去除的电荷载流子更少。
图11是示出当反向二极管器件9从正向偏置条件向反向偏置条件转换时该二极管器件的操作的横截面图。图12以放大的方式示出了图11的反向二极管器件管芯的一部分。在底侧P-型硅区域50和N-型硅区域52之间的PN结处存在耗尽区域71。当二极管器件两端的电位反转时，耗尽区域71扩展。它向下扩展，但由于N-型硅区域的浓度较低，它向上扩展得更远。该耗尽区域71设置电场72。来自扩展耗尽区域71的空穴向下移动穿过底侧P-型硅区域50去往阳极电极23。图11中的箭头73表示这些空穴中的一个代表性空穴的路径。来自扩展耗尽区域71的电子向上移动穿过N-型硅区域52。图12中的箭头74表示这些电子中的一个代表性电子的路径。图12示出了这些逸出电子在去往阴极电极22的途中如何向上穿过N+型接触区域的。一旦由于扩展耗尽区域71引起的电荷载流子已从二极管器件中去除，并且一旦区域52和区域53中的过量电荷载流子(由于正向偏置条件下的高浓度电荷载流子而存在)已从在二极管器件中去除，则反向恢复电流Irr的幅度开始减小。然后二极管器件开始在这里所称的“静态反向阻断模式”操作中操作。在长期静态条件下由于二极管器件上的反向极性而流动的反向电流量(称为反向漏电流(Ilk))是小的。
制造快速恢复二极管的一种常规方法是减少在存在这种电荷载流子的二极管区域中存在的电荷载流子的寿命。可以通过将所谓的“复合中心”引入二极管的中心漂移区域中的硅中来实现载流子寿命的减少。通常通过经由离子注入在硅中形成缺陷和/或通过将离子或原子沉积到硅晶格中来引入这些复合中心。这种复合中心在从正向偏置条件切换到反向偏置条件的短时间内通常是有益的，这是因为此时二极管中存在的一些电子和空穴可以复合。如果这些电子和空穴复合，则不需要以反向恢复电流的形式从二极管中去除它们。因此，由于复合中心引起的电子和空穴的复合用于减小不想要的反向恢复电流的幅度。然而，在该切换时间过去之后，二极管开始以其静态反向阻断模式操作，这些复合中心和硅晶格中的缺陷是不期望的并且可能导致二极管漏电。因此，与没有添加复合中心和硅缺陷情况下的反向漏电流相比，反向漏电流增加。然而，在本反向二极管器件管芯9中，二极管器件使用P+型电荷载流子提取区域59来降低电荷载流子浓度。因此，不需要注入或损坏N-型硅区域52的硅，以便产生寿命抑制因素复合中心。有利地，没有特别添加的复合中心或用于捕获在N-型硅区域52的硅中存放的原子的“寿命抑制”离子或电荷载流子。因此，反向二极管管芯9展示出良好的反向恢复特性以及低的反向漏电流。
图13是示出在反向二极管器件管芯9的切换事件期间的二极管电流波形75的波形。最初，10安培的正向电流传导通过二极管器件管芯。在该正向导通时间期间，在二极管两端存在正向压降(Vf)。然后快速切换二极管器件管芯两端的电压极性，使得二极管器件管芯9阻断电流流动。时间Tzz在此定义为从通过二极管的反向恢复电流Irr首次降到负电流(当从正向导通条件变换到反向阻断条件时)直到它再次上升并达到零电流之前的时间。反向恢复电流的峰值(Irr(峰值))出现在这两个过零的时间之间。如图13所示，时间Tzz是在该反向换向事件期间反向电流的过零之间的时间间隔。
在反向二极管器件管芯9中没有外延硅。由于在器件的边缘终止区域中不存在任何外延硅与氧化物/钝化界面，因此可以改善器件的长期动态耐用性。为了制造这种结构，在N型晶片上执行顶侧处理。在顶侧钝化步骤之后，通过背侧研磨对晶片进行减薄。将P型掺杂剂注入到晶片的底部减薄侧，并且通过激光退火激活P型掺杂剂。在底部金属化之后，切割晶片。因此，在器件中没有外延硅。在另一示例中，反向二极管器件管芯具有外延硅。起始材料是P型晶片。在晶片上生长N-型外延硅。在顶侧处理和顶侧钝化之后，通过背侧研磨对晶片进行减薄。在底部金属化之后，切割晶片。图1的封装的半导体器件1的反向二极管器件管芯9可以是任何构造，只要它包括所述新的P+型电荷载流子提取区域59。
通过使用晶片减薄，所得的图5的反向二极管器件管芯9的N-型区域52的厚度可以减小到28微米，其中该距离从底侧P-型区域50的顶部到N型耗尽停止区域53的底部而测量到的。N型耗尽停止区域53的厚度为1.6微米，其中该距离是从N-型区域52的顶部到P+型电荷载流子提取区域59的底部而测量到的。P+型电荷载流子提取区域59的厚度为0.4微米，其中该距离从N型耗尽停止区域53的顶部到顶部半导体表面54而测量到的。在底侧P-型区域50为3微米厚的情况下，减薄的晶片的总厚度为33微米，其中该距离是从底部半导体表面51到顶部半导体表面54而测量到的。对于图2的功率因数校正(PFC)升压转换器应用，仅需要适度的反向击穿电压承受能力。反向二极管器件管芯的较薄N-型区域(区域53的底部和区域50的顶部之间)允许二极管器件管芯9具有低的正向电压降Vf(在正向导通期间，在大电流级别下)以及小的峰值反向恢复电流Irr二者。在图2的PFC升压转换器应用的情况下，二极管管芯9必须承受约400伏的反向电压。器件的电压额定值是其实际击穿电压的70％，因此适当额定值的二极管器件管芯必须具有约550伏的击穿电压。此外，制造性还需要10％的余量。因此，图2的电路中的反向二极管器件管芯9被制成为具有约550伏的反向击穿额定值和600伏的目标反向击穿电压。对于这种反向二极管器件管芯，二极管制造期间的晶片从其背侧被充分减薄，使得N-型区域52的最终厚度约为28微米。以这种方式，新的P+型电荷载流子提取区域53的优点应用于图2的PFC升压转换器应用。在PFC升压转换器应用的高温情况下，通过反向二极管管芯9的反向漏电流增加。尽管如此，新的反向二极管器件管芯9仍然具有期望的低反向漏电流，同时对于二极管管芯受到的切换条件保持其“快速”性质(低Irr(峰值))。
关于可以如何制作快速恢复反向二极管芯片9的附加信息和细节，请参阅：2017年8月31日Kyoung Wook Seok提交的题为“Charge Carrier Extraction Inverse Diode”的美国专利申请No.15/693,392(其全部主题通过引用并入本文中)。
尽管上面出于指导目的描述了某些特定实施例，但是本专利文件的教导具有普遍适用性，并且不限于上述具体实施例。尽管上面阐述了其中NFET管芯和反向二极管管芯被安装到管芯附接片的示例，但是NFET管芯和反向二极管管芯可以被安装到另一类型的基板。在衬底是管芯附接片的情况下，第一封装端子可以是管芯附接片的延伸。管芯附接片和第一封装端子可以是同一片冲压金属的部分，例如，金属引线框的部分。在另一示例中，衬底是分离的结构，并且第一封装端子电耦接到所述分离结构(例如，通过接合线)。第一封装端子也可以接合到所述分离结构。封装主体可以包括如上所述的注塑塑料，但是它也可以包括另一类型的密封结构和材料。在一些示例中，衬底的一部分或表面未被密封剂覆盖，使得该部分或表面可以更好地散热。即使衬底未完全被密封剂包住，密封剂仍然将NFET和反向二极管密封在衬底上。因此，在不脱离如权利要求中所阐述的本发明的范围的情况下，可以实践所描述的实施例的各种特征的各种修改、变型和组合。

Claims (18)

1.一种封装的半导体器件，包括：
第一封装端子；
管芯附接片，其中所述管芯附接片被耦接到所述第一封装端子；
N沟道场效应晶体管NFET管芯，其中所述NFET管芯具有顶侧栅极电极、顶侧源极电极和底侧漏极电极，其中所述底侧漏极电极安装到所述管芯附接片；
反向二极管管芯，其中所述反向二极管管芯包括：
底侧P型硅区域，从所述反向二极管管芯的底部半导体表面向上延伸，并且还横向向外延伸到所述反向二极管管芯的外围侧边缘；
N-型硅区域，设置在所述底侧P型硅区域上方；
N型耗尽停止区域，从顶部半导体表面向下延伸并延伸到N-型硅区域中；
P+型电荷载流子提取区域，从顶部半导体表面向下延伸并延伸到N型耗尽停止区域中；
N+型接触区域，从顶部半导体表面向下延伸并延伸到N型耗尽停止区域中；
P型硅外围侧壁区域，从顶部半导体表面向下延伸到N-型硅区域中，其中P型硅外围侧壁区域接合底侧P型硅区域，从而形成P型隔离结构，其中P型硅外围侧壁区域还横向环绕N-型硅区域并将N-型硅区域与反向二极管管芯的外围侧边缘分开；
顶侧阴极电极，设置在N+型接触区域上和P+型电荷载流子提取区域上；以及
底侧阳极电极，设置在反向二极管管芯的底部半导体表面上，其中所述底侧阳极电极安装到所述管芯附接片；
第二封装端子，所述第二封装端子被耦接到NFET管芯的顶侧栅极电极；
第三封装端子，所述第三封装端子被耦接到NFET管芯的顶侧源极电极；
第四封装端子，所述第四封装端子被耦接到反向二极管管芯的顶侧阴极电极；以及
一定量的密封剂，所述一定量的密封剂将NFET管芯和反向二极管管芯封装在第一封装端子的管芯附接片部分和管芯附接片上，
其中所述反向二极管管芯在450伏的静态反向阻断条件下具有小于100微安的反向漏电流(Ilk)。
2.根据权利要求1所述的封装的半导体器件，其中所述第一封装端子是所述管芯附接片的延伸，其中所述第一封装端子和所述管芯附接片是单片冲压金属的两个部分。
3.根据权利要求1所述的封装的半导体器件，其中所述第一封装端子接合到所述管芯附接片。
4.根据权利要求1所述的封装的半导体器件，其中所述第一封装端子经由接合线被耦接到所述管芯附接片。
5.根据权利要求1所述的封装的半导体器件，其中所述封装的半导体器件具有四个且不超过四个的封装端子。
6.根据权利要求1所述的封装的半导体器件，其中所述反向二极管管芯符合以下各项：1)在10安培的大电流正向导通条件下的小于1.5伏的小正向压降(Vf)，2)当反向二极管管芯从大电流正向电流导通条件向100伏的反向电压条件切换时的小于5安培的峰值反向恢复电流(Irr)，3)至少550伏的反向击穿电压(Vbr)承受能力，以及4)在450伏的静态反向阻断条件下的小于100微安的反向漏电流(Ilk)。
7.根据权利要求1所述的封装的半导体器件，其中所述NFET管芯的击穿电压(BVDSS)为至少550伏。
8.一种封装的半导体器件，包括：
第一封装端子；
管芯附接片，其中所述管芯附接片被耦接到所述第一封装端子；
N沟道场效应晶体管NFET管芯，其中所述NFET管芯具有顶侧栅极电极、顶侧源极电极和底侧漏极电极，其中所述底侧漏极电极安装到管芯附接片；
反向二极管管芯，其中所述反向二极管管芯具有顶侧阴极电极、底侧P型硅区域和底侧阳极电极，其中所述底侧阳极电极安装到管芯附接片，其中所述管芯附接片将NFET的底侧漏极电极电耦接到反向二极管管芯的底侧阳极电极；
第二封装端子，所述第二封装端子被耦接到NFET管芯的顶侧栅极电极；
第三封装端子，所述第三封装端子被耦接到NFET管芯的顶侧源极电极；
第四封装端子，所述第四封装端子被耦接到反向二极管管芯的顶侧阴极电极；以及
一定量的密封剂，所述一定量的密封剂将NFET管芯和反向二极管管芯封装在第一封装端子的管芯附接片部分和管芯附接片上，
其中所述反向二极管管芯在450伏的静态反向阻断条件下具有小于100微安的反向漏电流(Ilk)。
9.根据权利要求8所述的封装的半导体器件，其中所述第一封装端子是所述管芯附接片的延伸，其中所述第一封装端子和所述管芯附接片是单片冲压金属的两个部分。
10.根据权利要求8所述的封装的半导体器件，其中所述第一封装端子接合到所述管芯附接片。
11.根据权利要求8所述的封装的半导体器件，其中所述第一封装端子经由接合线被耦接到所述管芯附接片。
12.根据权利要求8所述的封装的半导体器件，其中所述反向二极管管芯具有顶部半导体表面，所述反向二极管管芯还包括：
N型耗尽停止区域，所述N型耗尽停止区域从顶部半导体表面向下延伸并延伸到N-型硅区域中；
P+型电荷载流子提取区域，所述P+型电荷载流子提取区域从顶部半导体表面向下延伸并延伸到N型耗尽停止区域中；以及
N+型接触区域，所述N+型接触区域从顶部半导体表面向下延伸并延伸到N型耗尽停止区域中，其中所述顶侧阴极电极被耦接到P+型电荷载流子提取区域和N+型接触区域二者。
13.根据权利要求8所述的封装的半导体器件，其中所述反向二极管管芯符合以下各项：1)在10安培的大电流正向导通条件下的小于1.5伏的小正向压降(Vf)，2)当反向二极管管芯从大电流正向电流导通条件向100伏的反向电压条件切换时的小于5安培的峰值反向恢复电流(Irr)，3)至少550伏的反向击穿电压(Vbr)承受能力，以及4)在450伏的静态反向阻断条件下的小于100微安的反向漏电流(Ilk)。
14.根据权利要求8所述的封装的半导体器件，其中所述封装的半导体器件具有四个且不超过四个的封装端子。
15.一种封装的半导体器件，包括：
第一封装端子；
具有导电表面的衬底，其中所述导电表面被耦接到所述第一封装端子；
N沟道场效应晶体管NFET管芯，其中所述NFET管芯具有顶侧栅极电极、顶侧源极电极和底侧漏极电极，其中所述底侧漏极电极安装到所述衬底；
用于在正向电压条件下传导电流和在反向电压条件下阻断电流流动的装置，其中所述装置具有顶侧金属电极和底侧金属电极，其中所述底侧金属电极安装到所述衬底，其中所述装置用于：1)在10安培的正向导通条件下以小于1.5伏的正向压降传导正向电流，2)从正向导通条件切换到100伏的反向电压条件，而不传导超过5安培的反向恢复电流，3)承受至少550伏的反向电压而不遭受反向击穿，以及4)承受450伏的静态反向阻断条件而不传导超过100微安的反向漏电流；
第二封装端子，所述第二封装端子被耦接到NFET管芯的顶侧栅极电极；
第三封装端子，所述第三封装端子被耦接到NFET管芯的顶侧源极电极；
第四封装端子，所述第四封装端子被耦接到所述装置的顶侧金属电极；以及
一定量的密封剂，所述一定量的密封剂将NFET管芯和所述装置密封在衬底上。
16.根据权利要求15所述的封装的半导体器件，其中所述第一封装端子是所述衬底的延伸，其中所述第一封装端子和所述衬底是单片冲压金属的两个部分。
17.根据权利要求15所述的封装的半导体器件，其中所述第一封装端子接合到所述衬底。
18.根据权利要求15所述的封装的半导体器件，其中所述第一封装端子经由接合线被耦接到所述衬底。
CN201811018793.4A 2017-08-31 2018-08-31 用于pfc应用的封装的快速反向二极管组件 Active CN109427706B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/693,416 US10319669B2 (en) 2017-08-31 2017-08-31 Packaged fast inverse diode component for PFC applications
US15/693,416 2017-08-31

Publications (2)

Publication Number Publication Date
CN109427706A CN109427706A (zh) 2019-03-05
CN109427706B true CN109427706B (zh) 2023-07-25

Family

ID=63490226

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811018793.4A Active CN109427706B (zh) 2017-08-31 2018-08-31 用于pfc应用的封装的快速反向二极管组件

Country Status (6)

Country Link
US (1) US10319669B2 (zh)
EP (1) EP3451387B1 (zh)
JP (1) JP6774990B2 (zh)
KR (1) KR102512166B1 (zh)
CN (1) CN109427706B (zh)
TW (1) TWI662624B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016051973A1 (ja) * 2014-10-03 2016-04-07 富士電機株式会社 半導体装置および半導体装置の製造方法
KR20200106378A (ko) 2019-03-04 2020-09-14 주식회사 엘지화학 스웰링 흡수 및 열 차단 기능을 갖는 패드 복합체를 구비하는 배터리 모듈, 이를 포함하는 배터리 팩 및 자동차
US11579645B2 (en) * 2019-06-21 2023-02-14 Wolfspeed, Inc. Device design for short-circuitry protection circuitry within transistors
KR102635228B1 (ko) * 2021-12-28 2024-02-13 파워큐브세미 (주) 절연 거리가 확보된 박막형 패키지

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142347A (en) * 1989-11-28 1992-08-25 Siemens Aktiengesellschaft Power semiconductor component with emitter shorts
JPH1093113A (ja) * 1996-09-19 1998-04-10 Hitachi Ltd ダイオード
US6433370B1 (en) * 2000-02-10 2002-08-13 Vram Technologies, Llc Method and apparatus for cylindrical semiconductor diodes
JP2014011213A (ja) * 2012-06-28 2014-01-20 Hitachi Ltd ダイオードおよびそれを用いた電力変換装置
CN109326654A (zh) * 2017-07-31 2019-02-12 艾赛斯有限责任公司 快速恢复反向二极管

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5824007B2 (ja) 1979-07-16 1983-05-18 株式会社日立製作所 半導体装置の製造方法
DE3832732A1 (de) 1988-09-27 1990-03-29 Asea Brown Boveri Leistungshalbleiterdiode
DE3832731A1 (de) 1988-09-27 1990-03-29 Asea Brown Boveri Leistungshalbleiterdiode
DE3832748A1 (de) 1988-09-27 1990-03-29 Asea Brown Boveri Leistungshalbleiterdiode
US5698454A (en) 1995-07-31 1997-12-16 Ixys Corporation Method of making a reverse blocking IGBT
GB9919764D0 (en) 1999-08-21 1999-10-27 Koninkl Philips Electronics Nv Thyristors and their manufacture
US6936908B2 (en) 2001-05-03 2005-08-30 Ixys Corporation Forward and reverse blocking devices
JP2004047955A (ja) * 2002-05-22 2004-02-12 Matsushita Electric Ind Co Ltd 半導体装置
US8093652B2 (en) 2002-08-28 2012-01-10 Ixys Corporation Breakdown voltage for power devices
US6975023B2 (en) 2002-09-04 2005-12-13 International Rectifier Corporation Co-packaged control circuit, transistor and inverted diode
DE102004012884B4 (de) 2004-03-16 2011-07-21 IXYS Semiconductor GmbH, 68623 Leistungs-Halbleiterbauelement in Planartechnik
EP1722423B1 (en) 2005-05-12 2016-07-06 Ixys Corporation Stable diodes for low and high frequency applications
US8098499B2 (en) 2008-04-30 2012-01-17 Infineon Technologies Ag Circuit arrangement having two semiconductor switching elements and one freewheeling element
US8816497B2 (en) * 2010-01-08 2014-08-26 Transphorm Inc. Electronic devices and components for high efficiency power circuits
JP5484138B2 (ja) * 2010-03-12 2014-05-07 ルネサスエレクトロニクス株式会社 電子回路装置
US8716067B2 (en) 2012-02-20 2014-05-06 Ixys Corporation Power device manufacture on the recessed side of a thinned wafer
JP5959255B2 (ja) * 2012-03-22 2016-08-02 エスアイアイ・セミコンダクタ株式会社 半導体装置
US9391159B2 (en) * 2012-04-03 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Triple well isolated diode and method of making
JP2013235890A (ja) 2012-05-07 2013-11-21 Denso Corp 半導体装置
US20140021934A1 (en) * 2012-07-17 2014-01-23 Transphorm, Inc. Devices and components for power conversion circuits
US9935206B2 (en) * 2013-05-10 2018-04-03 Ixys Corporation Packaged overvoltage protection circuit for triggering thyristors
JP6496992B2 (ja) 2014-07-22 2019-04-10 富士電機株式会社 半導体装置
US9590033B1 (en) 2015-11-20 2017-03-07 Ixys Corporation Trench separation diffusion for high voltage device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142347A (en) * 1989-11-28 1992-08-25 Siemens Aktiengesellschaft Power semiconductor component with emitter shorts
JPH1093113A (ja) * 1996-09-19 1998-04-10 Hitachi Ltd ダイオード
US6433370B1 (en) * 2000-02-10 2002-08-13 Vram Technologies, Llc Method and apparatus for cylindrical semiconductor diodes
JP2014011213A (ja) * 2012-06-28 2014-01-20 Hitachi Ltd ダイオードおよびそれを用いた電力変換装置
CN109326654A (zh) * 2017-07-31 2019-02-12 艾赛斯有限责任公司 快速恢复反向二极管

Also Published As

Publication number Publication date
JP6774990B2 (ja) 2020-10-28
KR102512166B1 (ko) 2023-03-21
JP2019075548A (ja) 2019-05-16
US10319669B2 (en) 2019-06-11
EP3451387A1 (en) 2019-03-06
TW201921511A (zh) 2019-06-01
CN109427706A (zh) 2019-03-05
US20190067174A1 (en) 2019-02-28
TWI662624B (zh) 2019-06-11
KR20190024840A (ko) 2019-03-08
EP3451387B1 (en) 2022-02-09

Similar Documents

Publication Publication Date Title
CN109427706B (zh) 用于pfc应用的封装的快速反向二极管组件
CN107887382B (zh) 半导体器件和用于形成半导体器件的方法
US9246410B2 (en) Integrated power semiconductor component, production method and chopper circuit comprising integrated semiconductor component
JP7241053B2 (ja) 電荷キャリア取出インバースダイオード
US11367780B2 (en) Semiconductor device having integrated diodes
US20150061003A1 (en) Power Semiconductor Package
US11184001B2 (en) Power switching devices with high dV/dt capability and methods of making such devices
US9847387B2 (en) Field effect semiconductor component and method for producing it
US9887261B2 (en) Charge compensation device and manufacturing therefor
US10714635B2 (en) Fast recovery inverse diode
US10411126B2 (en) Semiconductor device having a first through contact structure in ohmic contact with the gate electrode
US9941256B1 (en) Inverse diode stack
CN107579109B (zh) 半导体器件及其制造方法
JP7512009B2 (ja) ファストリカバリインバースダイオード

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant