CN109412565A - A kind of multiple signals selection control circuit - Google Patents
A kind of multiple signals selection control circuit Download PDFInfo
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- CN109412565A CN109412565A CN201710711638.XA CN201710711638A CN109412565A CN 109412565 A CN109412565 A CN 109412565A CN 201710711638 A CN201710711638 A CN 201710711638A CN 109412565 A CN109412565 A CN 109412565A
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- switching tube
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
Abstract
The present invention relates to signal detection technique fields, disclose a kind of multiple signals selection control circuit, module is followed including input, output follows the gating control module of module and preset quantity, the control signal input that input follows the control signal output of module to gate control module with first is connect, the control signal output for gating control module is connect with the control signal input of rear primary gating control module, input follows the clock signal output terminal of module to connect respectively with the clock signal input terminal of each gating control module, input follows the reset signal output end of module to connect respectively with the reset signal input terminal of each gating control module, the output end of each gating control module follows the input terminal of module to connect altogether with output.The present invention realizes signal and enters the function of singly going out more, and parallel multichannel input signal gradually selects to export, and structure is simple, at low cost.
Description
Technical field
The present invention relates to signal detection technique fields more particularly to a kind of multiple signals to select control circuit.
Background technique
Currently, signal detection apparatus, when detecting to multiple signals, each signal is required to corresponding signal all the way
Detection circuit causes the circuit in signal detection apparatus complicated, and number of devices is more, and occupied space is big, at high cost.
Summary of the invention
The embodiment of the invention provides a kind of multiple signals to select control circuit, it is intended to it is multiple to solve circuit in the prior art
Miscellaneous, number of devices is more, and occupied space is big, problem at high cost.
A kind of multiple signals provided in an embodiment of the present invention select control circuit, including input that module, output is followed to follow
The gating control module of module and preset quantity.
It is respectively multichannel that input, which follows control signal input, clock signal input terminal and the reset signal input terminal of module,
Control signal input, clock signal input terminal and the reset signal input terminal of signal behavior control circuit, input follow module
Control signal output with first gate control module control signal input connect, gate control module control believe
Number output end connect with the control signal input of rear primary gating control module, inputs the clock signal output terminal for following module
It is connect respectively with the clock signal input terminal of each gating control module, input follows the reset signal output end of module to distinguish
It is connect with the reset signal input terminal of each gating control module, the source signal input terminal for gating control module is multiple signals
The source signal input terminal of control circuit is selected, the output end of each gating control module follows the input terminal of module with output
It connects altogether, output follows the output end of module for the output end of multiple signals selection control circuit.
Input follows control signal, clock signal and the reset signal outside module reception and is sent to gating control mould
Block gates the source signal input terminal access source signal of control module, and gating control module is according to control signal, clock signal and answers
The output of position signal control source signal.
In one embodiment, gating control module includes trigger unit and switch control unit.
The input terminal of trigger unit is the control signal input for gating control module, and the clock end of trigger unit is gating
The clock signal input terminal of control module, the reset terminal of trigger unit are the reset signal input terminal for gating control module, triggering
The output end of unit and the controlled end of switch control unit connect the control signal output to form gating control module, switch control altogether
The input terminal of unit processed is the source signal input terminal for gating control module, and the output end of switch control unit is gating control module
Output end.
In one embodiment, trigger unit includes the first analog switch subelement, the first latch subelement, the second simulation
Switch subelement, the second latch subelement and logical conversion subelement.
The first input end of first analog switch subelement is the input terminal of trigger unit, the input of logical conversion subelement
End be trigger unit clock end, the second input terminal and third input terminal of the first analog switch subelement respectively with logical conversion
The first output end and second output terminal of subelement connect one to one, the first lock of output termination of the first analog switch subelement
Deposit the input terminal of subelement, first latches the first input end of output the second analog switch subelement of termination of subelement, and second
The second input terminal and third input terminal of analog switch subelement respectively with the second output terminal of logical conversion subelement and first
Output end connects one to one, and the 4th input terminal of the second analog switch subelement is the reset terminal of trigger unit, the second simulation
The output termination second for switching subelement latches the input terminal of subelement, and the second output end for latching subelement is trigger unit
Output end.
In one embodiment, the first analog switch subelement includes first switch tube, second switch, third switching tube
With the 4th switching tube.
The grid of the grid of first switch tube and the 4th switching tube connects to form the first defeated of the first analog switch subelement altogether
Enter end, the grid of second switch is the second input terminal of the first analog switch subelement, and the grid of third switching tube is first
The drain electrode of the third input terminal of analog switch subelement, the source electrode and third switching tube of second switch connects to form the first simulation altogether
Switching the output end of subelement, the trap potential of the drain electrode of first switch tube, trap potential and second switch connects direct current altogether, and first
The source electrode of switching tube connects the drain electrode of second switch, and the source electrode of third switching tube connects the drain electrode of the 4th switching tube, the 4th switching tube
Source electrode, trap potential and third switching tube trap potential be connected to ground altogether.
In one embodiment, the first latch subelement includes the first NOT gate and the second NOT gate.
The input terminal of the output end of first NOT gate and the second NOT gate connects the input terminal to form the first latch subelement altogether, and first
The output end of the input terminal of NOT gate and the second NOT gate connects the output end to form the first latch subelement altogether.
In one embodiment, the second analog switch subelement includes the 5th switching tube, the 6th switching tube, the 7th switch
Pipe, the 8th switching tube and the 9th switching tube.
The grid of 5th switching tube and the grid of the 8th switching tube connect to form the first defeated of the second analog switch subelement altogether
Enter end, the grid of the 6th switching tube is the second input terminal of the second analog switch subelement, and the grid of the 7th switching tube is second
The third input terminal of analog switch subelement, the grid of the 9th switching tube are the 4th input terminal of the second analog switch subelement,
Source electrode, the drain electrode of the 7th switching tube and the source electrode of the 9th switching tube of 6th switching tube connect to form the second analog switch subelement altogether
Output end, the trap potential of the drain electrode of the 5th switching tube, trap potential and the 6th switching tube connects direct current, the leakage of the 9th switching tube altogether
Pole and trap potential connect direct current altogether, and the source electrode of the 5th switching tube connects the drain electrode of the 6th switching tube, and the source electrode of the 7th switching tube connects
The trap potential of the drain electrode of eight switching tubes, the source electrode of the 8th switching tube, trap potential and the 7th switching tube is connected to ground altogether.
In one embodiment, the second latch subelement includes third NOT gate and the 4th NOT gate.
The input terminal of the output end of third NOT gate and the 4th NOT gate connects the input terminal to form the second latch subelement, third altogether
The output end of the input terminal of NOT gate and the 4th NOT gate connects the output end to form the second latch subelement altogether.
In one embodiment, logical conversion subelement includes the 5th NOT gate and the 6th NOT gate.
The input terminal of 5th NOT gate is the input terminal of logical conversion subelement, the output end of the 5th NOT gate and the 6th NOT gate
Input terminal connects the first output end to form logical conversion subelement altogether, and the output end of the 6th NOT gate is the of logical conversion subelement
Two output ends.
In one embodiment, it includes the first follower, the second follower and third follower that input, which follows module,.
The input terminal of first follower is the control signal input that input follows module, and the output end of the first follower is
Input follows the control signal output of module, and the input terminal of the second follower is the clock signal input that input follows module
End, the output end of the second follower are the clock signal output terminal that input follows module, and the input terminal of third follower is input
The reset signal input terminal of module is followed, the output end of third follower is the reset signal output end that input follows module.
In one embodiment, it includes the 4th follower that output, which follows module,.
The input terminal and output end of 4th follower are respectively to export the input terminal and output end that follow module.
Existing beneficial effect is the embodiment of the present invention compared with prior art: the control signal of module is followed by inputting
Output end with first gate control module control signal input connect, gate control module control signal output and
The once control signal input connection of gating control module afterwards, input follow the clock signal output terminal of module respectively with it is each
The clock signal input terminal connection of a gating control module, input follow the reset signal output end of module to select respectively with each
The reset signal input terminal connection of logical control module, the output end of each gating control module follow the defeated of module with output
Enter end to connect altogether.The embodiment of the present invention realizes signal and enters the function of singly going out more, and parallel multichannel input signal gradually selects to export,
Structure is simple, at low cost.
Detailed description of the invention
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to needed in the embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ability
For the those of ordinary skill of domain, without any creative labor, it can also be obtained according to these attached drawings others
Attached drawing.
Fig. 1 is the structural schematic diagram that the multiple signals that one embodiment of the present of invention provides select control circuit；
Fig. 2 is the circuit of the multiple signals selection control circuit in a concrete application scene provided in an embodiment of the present invention
Structural schematic diagram；
The electrical block diagram of trigger unit in Fig. 2 that Fig. 3 provides for one embodiment of the present of invention；
Fig. 4 is the signal timing diagram that one embodiment of the present of invention provides.
Specific embodiment
In order to make the invention's purpose, features and advantages of the invention more obvious and easy to understand, below in conjunction with the present invention
Attached drawing in embodiment, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that disclosed below
Embodiment be only a part of the embodiment of the present invention, and not all embodiment.Based on the embodiments of the present invention, this field
Those of ordinary skill's all other embodiment obtained without making creative work, belongs to protection of the present invention
Range.
Description and claims of this specification and term " first " in above-mentioned attached drawing, " second " and " third " etc. are
For distinguishing different objects, not for description particular order.
Realization of the invention is described in detail below in conjunction with specific attached drawing:
Fig. 1 shows a kind of structure of multiple signals selection control circuit provided by one embodiment of the invention, in order to just
In explanation, only parts related to embodiments of the present invention are shown, and details are as follows:
As shown in Figure 1, a kind of multiple signals selection control circuit provided by the embodiment of the present invention, including input follow mould
Block 100, output follow the gating control module 300 of module 200 and preset quantity.
Input follows control signal input, clock signal input terminal and the reset signal input terminal of module 100 to be respectively
Multiple signals select control signal input, clock signal input terminal and reset signal input terminal, the input of control circuit to follow
The control signal input that the control signal output of module 100 gates control module 300 with first is connect, gating control mould
The control signal output of block 300 is connect with the control signal input of rear primary gating control module 300, and input follows module
100 clock signal output terminal is connect with the clock signal input terminal of each gating control module 300 respectively, and input follows mould
The reset signal output end of block 100 is connect with the reset signal input terminal of each gating control module 300 respectively, gating control
The source signal input terminal of module 300 is the source signal input terminal that multiple signals select control circuit, each gating control module
300 output end follows the input terminal of module 200 to connect altogether with output, and it is multiple signals that output, which follows the output end of module 200,
Select the output end of control circuit.
Input follows module 100 to receive external control signal Din, clock signal clk and reset signal RST and is sent to
Control module 300 is gated, the source signal input terminal of gating control module 300 accesses source signal, gates control module 300 according to control
The output of signal Din, clock signal clk and reset signal RST control source signal processed.
In the present embodiment, input follows control signal input, clock signal input terminal and the reset signal of module 100
Input terminal is respectively connected to control signal Din, clock signal clk and reset signal RST, the source of first gating control module 300
Signal input part the first source signal of access I1, the source signal input terminal of second gating control module 300 access the second source signal
I2, and so on, the source signal input terminal of n-th of gating control module 300 accesses the n-th source signal In, and output follows module 200
Output end output drive signal OUT.
In one embodiment, gating control module 300 is according to control signal Din, clock signal clk and reset signal
RST controls the conducting and disconnection of its source signal input terminal and output end.
When the source signal input terminal and output end that have a gating control module 300 are connected, others gating control mould
The source signal input terminal and output end of block 300 disconnect.For example, m-th of gating source signal input terminal of control module 300 and defeated
Outlet conducting, then the driving signal OUT that output follows module 200 to export are the source m that m-th of gating control module 300 inputs
Signal Im.
In the present embodiment, under the control of control signal Din, clock signal clk and reset signal RST, preset quantity
Gating control module 300 successively gates the corresponding source signal of output, and parallel multiple source signals may be implemented and gradually output, simultaneously
One of source signal can only be exported.
As shown in Fig. 2, selecting control circuit below with multiple signals includes that 8 gating control modules 300 are specific for one
Application scenarios are illustrated, it should be noted that it can also include that any number of gating is controlled that multiple signals, which select control circuit,
Molding block 300.
As shown in Fig. 2, in one embodiment of the invention, the gating control module 300 in Fig. 1 includes trigger unit
310 and switch control unit 320.
The input terminal of trigger unit 310 be gate control module 300 control signal input, trigger unit 310 when
Zhong Duanwei gates the clock signal input terminal of control module 300, and the reset terminal of trigger unit 310 is gating control module 300
Reset signal input terminal, the output end of trigger unit 310 and the controlled end of switch control unit 320 connect to form gating control mould altogether
The control signal output of block 300, the input terminal of switch control unit 320 are the source signal input terminal for gating control module 300,
The output end of switch control unit 320 is the output end for gating control module 300.
In the present embodiment, input terminal I, clock end CK and the reset terminal R of trigger unit 310 pass through input respectively and follow module
The output end O of 100 incoming control signal Din, clock signal clk and reset signal RST, trigger unit 310 export switch control
Controlled end s of the signal to switch control unit 320, the input terminal i access source signal of switch control unit 320, first triggering
The output end O output first switch of unit 310 controls the controlled end s of signal S1 to first switch control unit 320, and first
The input terminal i of switch control unit 320 accesses the first source signal I1, and so on, the output end O of n-th of trigger unit 310 is defeated
The controlled end s of n-th switch control signal Sn to n-th switch control unit 320 out, the input of n-th of switch control unit 320
I is held to access the n-th source signal In.
In one embodiment, referring to fig. 2, switch control unit 320 include controlled switch, the first end of controlled switch,
Second end and controlled end are respectively the input terminal i, output end o and controlled end s of switch control unit 320.
In one embodiment, referring to fig. 2, input follow module 100 include the first follower U1, the second follower U2 and
Third follower U3.
The input terminal of first follower U1 is the control signal input that input follows module 100, the first follower U1's
Output end is the control signal output that input follows module 100, and the input terminal of the second follower U2 is that input follows module 100
Clock signal input terminal, the output end of the second follower U2 is that input follows the clock signal output terminal of module 100, third with
Input terminal with device U3 is that input follows the reset signal input terminal of module 100, the output end of third follower U3 be input with
With the reset signal output end of module 100.
In the present embodiment, the input of input terminal the incoming control signal Din, the second follower U2 of the first follower U1 are terminated
Enter clock signal clk, the input terminal of third follower U3 accesses reset signal RST.Follower is used to enhance the driving energy of output
Power.
In one embodiment, referring to fig. 2, it includes the 4th follower U4 that output, which follows module 200,.
The input terminal and output end of 4th follower U4 is respectively to export the input terminal and output end that follow module 200.
In the present embodiment, the output end output drive signal OUT of the 4th follower U4.
As shown in figure 3, in one embodiment of the invention, the trigger unit 310 in Fig. 2 includes the first analog switch
Unit 311, first latches subelement 312, the second analog switch subelement 313, second latches subelement 314 and logical conversion
Unit 315.
The first input end of first analog switch subelement 311 is the input terminal of trigger unit 310, logical conversion subelement
315 input terminal is the clock end of trigger unit 310, the second input terminal and the third input of the first analog switch subelement 311
End connects one to one with the first output end and second output terminal of logical conversion subelement 315 respectively, the first analog switch
The output termination first of unit 311 latches the input terminal of subelement 312, and the first output for latching subelement 312 terminates the second mould
The first input end of quasi- switch subelement 313, the second input terminal and third the input terminal difference of the second analog switch subelement 313
It connects one to one with the second output terminal of logical conversion subelement 315 and the first output end, the second analog switch subelement 313
The 4th input terminal be trigger unit 310 reset terminal, it is single that the output termination second of the second analog switch subelement 313 latches son
The input terminal of member 314, the second output end for latching subelement 314 is the output end of trigger unit 310.
In one embodiment, referring to Fig. 3, the first analog switch subelement 311 includes first switch tube Q1, second switch
Pipe Q2, third switching tube Q3 and the 4th switching tube Q4.
The grid of the grid of first switch tube Q1 and the 4th switching tube Q4 connect to form the first analog switch subelement 311 altogether
First input end, the grid of second switch Q2 are the second input terminal of the first analog switch subelement 311, third switching tube Q3
Grid be the first analog switch subelement 311 third input terminal, the source electrode of second switch Q2 and third switching tube Q3's
Drain electrode connects the output end to form the first analog switch subelement 311, drain electrode, trap potential and the second switch of first switch tube Q1 altogether
The trap potential of pipe Q2 connects direct current altogether, and the source electrode of first switch tube Q1 connects the drain electrode of second switch Q2, third switching tube Q3's
Source electrode connects the drain electrode of the 4th switching tube Q4, and the trap potential of the source electrode of the 4th switching tube Q4, trap potential and third switching tube Q3 connects altogether
Yu Di.
In one embodiment, participating in Fig. 3, first switch tube Q1 and second switch Q2 is P-channel metal-oxide-semiconductor (metal
Oxide semiconductor, metal oxide semiconductor transistor), third switching tube Q3 and the 4th switching tube Q4 are N ditch
Road metal-oxide-semiconductor.
In one embodiment, referring to Fig. 3, first, which latches subelement 312, includes the first NOT gate Inv1 and the second NOT gate
Inv2。
The input terminal of the output end of first NOT gate Inv1 and the second NOT gate Inv2 connect to form the first latch subelement 312 altogether
The output end of input terminal, the input terminal of the first NOT gate Inv1 and the second NOT gate Inv2 connect to form the first latch subelement 312 altogether
Output end.
In one embodiment, referring to Fig. 3, the second analog switch subelement 313 includes the 5th switching tube Q5, the 6th switch
Pipe Q6, the 7th switching tube Q7, the 8th switching tube Q8 and the 9th switching tube Q9.
The grid of 5th switching tube Q5 and the grid of the 8th switching tube Q8 connect to form the second analog switch subelement 313 altogether
First input end, the grid of the 6th switching tube Q6 are the second input terminal of the second analog switch subelement 313, the 7th switching tube Q7
Grid be the second analog switch subelement 313 third input terminal, the grid of the 9th switching tube Q9 is the second analog switch
4th input terminal of unit 313, source electrode, the drain electrode of the 7th switching tube Q7 and the source electrode of the 9th switching tube Q9 of the 6th switching tube Q6
The output end to form the second analog switch subelement 313, drain electrode, trap potential and the 6th switching tube Q6 of the 5th switching tube Q5 are met altogether
Trap potential connect direct current altogether, the drain electrode of the 9th switching tube Q9 and trap potential connect direct current altogether, and the source electrode of the 5th switching tube Q5 connects
The drain electrode of 6th switching tube Q6, the source electrode of the 7th switching tube Q7 connect the drain electrode of the 8th switching tube Q8, the source electrode of the 8th switching tube Q8,
The trap potential of trap potential and the 7th switching tube Q7 are connected to ground altogether.
In one embodiment, Fig. 3 is participated in, the 5th switching tube Q5, the 6th switching tube Q6 and the 9th switching tube Q9 are P ditch
Road metal-oxide-semiconductor, the 7th switching tube Q7 and the 8th switching tube Q8 are N-channel MOS pipe.
In one embodiment, referring to Fig. 3, second, which latches subelement 314, includes third NOT gate Inv3 and the 4th NOT gate
Inv4。
The output end of third NOT gate Inv3 and the input terminal of the 4th NOT gate Inv4 connect to form the second latch subelement 314 altogether
Input terminal, the input terminal of third NOT gate Inv3 and the output end of the 4th NOT gate Inv4 connect to form the second latch subelement 314 altogether
Output end.
In one embodiment, referring to Fig. 3, logical conversion subelement 315 includes the 5th NOT gate Inv5 and the 6th NOT gate
Inv6。
The input terminal of 5th NOT gate Inv5 is the input terminal of logical conversion subelement 315, the output end of the 5th NOT gate Inv5
Connect the first output end to form logical conversion subelement 315 altogether with the input terminal of the 6th NOT gate Inv6, the 6th NOT gate Inv6's is defeated
Outlet is the second output terminal of logical conversion subelement 315.
As shown in figure 4, being illustrated in concrete application scene shown in Fig. 2 to the timing of each signal.
One, reset mode
In reset signal RST=0, since the work of trigger unit 310 is resetting state, so first switch control signal S1~
8th switch control signal S8 output is 0, i.e., the first source signal I8 of source signal I1~the 8th is not selected.Believe resetting
When number RST=1, trigger unit 310 works in normal mode.
Two, normal mode
1, reset signal RST reset after, within the 1st clock cycle of clock signal clk, control signal Din by
Low level is switched to high level, and continues a clock cycle, timing as shown in Figure 4, and gradually selection starts for control.At the 1st
The high level half period of clock cycle is connect the high level signal acquisition for controlling signal Din by first trigger unit 310
It receives, and in the low level half period of the 1st clock cycle, the high level signal of acquisition is latched and exports 1, first switch control
Signal S1 is to become high level；In 7 trigger units 310 that first trigger unit 310 connects below, due to the letter of input terminal
Number it is 0, is latched in the 1st clock cycle low level and export 0, i.e., in the 1st clock cycle, second switch controls signal S2
~the eight switch control signal S8 is 0.Driving signal OUT is in the first source of selection output of later half period of the 1st clock cycle
Signal I1.
2, in the 2nd clock cycle of normal work, controlling signal Din becomes 0, in the high level of the 2nd clock cycle
Half period, first trigger unit 310 input control signal Din become 0, behind the second to the 8th trigger unit 310 successively
Receive the latch output of previous trigger unit 310.In the later half period of the 2nd clock cycle, first trigger unit 310 will
Collected low level control signal Din latches output, so first switch, which controls signal S1, becomes 0 from 1, second triggering
The second switch control signal S2 that unit 310 exports becomes 1 from 0.The third switch control signal switch control signal of S3~the 8th
S8 output is constant, keeps 0.The high level signal of signal Din is controlled in this way in the 2nd clock cycle, by first trigger unit
310 Output transfers are exported to second trigger unit 310.Within the 2nd clock cycle, driving signal OUT is selected in first half cycle
Select the first source signal of output I1, the second source signal I2 of later half period selection output.
Analogize according to above-mentioned principle.
3, the later half low-level period of the 3rd clock cycle, control signal Din high level signal are transferred to third triggering
Unit 310, and 1 is exported in later half period third switch control signal S3, remaining S1, S2 and S4~S8 output 0.
Within the 3rd clock cycle, driving signal OUT selects the second source signal I2 of output, later half period in first half cycle
Selection output third source signal I3.
4, the later half low-level period of the 4th clock cycle, control signal Din high level signal are transferred to the 4th triggering
Unit 310, and 1 is exported in later half the 4th switch control signal S4 of period, remaining S1~S3 and S5~S8 export 0.
Within the 4th clock cycle, driving signal OUT selects output third source signal I3, later half period in first half cycle
The 4th source signal I4 of selection output.
5, the later half low-level period of the 5th clock cycle, control signal Din high level signal are transferred to the 5th triggering
Unit 310, and 1 is exported in later half the 5th switch control signal S5 of period, remaining S1~S4 and S6~S8 export 0.
Within the 5th clock cycle, driving signal OUT selects the 4th source signal I4 of output, later half period in first half cycle
The 5th source signal I5 of selection output.
6, the later half low-level period of the 6th clock cycle, control signal Din high level signal are transferred to the 6th triggering
Unit 310, and 1 is exported in later half the 6th switch control signal S6 of period, remaining S1~S5 and S7, S8 export 0.
Within the 6th clock cycle, driving signal OUT selects the 5th source signal I5 of output, later half period in first half cycle
The 6th source signal I6 of selection output.
7, the later half low-level period of the 7th clock cycle, control signal Din high level signal are transferred to the 7th triggering
Unit 310, and 1 is exported in later half the 7th switch control signal S7 of period, remaining S1~S6 and S8 export 0.
Within the 7th clock cycle, driving signal OUT selects the 6th source signal I6 of output, later half period in first half cycle
The 7th source signal I7 of selection output.
8, the later half low-level period of the 8th clock cycle, control signal Din high level signal are transferred to the 8th triggering
Unit 310, and 1 is exported in later half the 8th switch control signal S8 of period, remaining S1~S7 output 0.
Within the 8th clock cycle, driving signal OUT selects the 7th source signal I7 of output, later half period in first half cycle
The 8th source signal I8 of selection output.
9, the later half low-level period of the 9th clock cycle, controlling signal Din from 0 becomes 1, and continues a clock week
Phase, control signal Din high level signal inputs first trigger unit 310, and controls signal S1 in later half period first switch
Output 1, remaining S2~S8 output 0.
Within the 9th clock cycle, driving signal OUT selects the 8th source signal I8 of output, later half period in first half cycle
The first source signal I1 of selection output.
Three, it can realize that the period is the circulation in 8 clock signal clk periods according to sequence described above.
The embodiment of the present invention can work as control by the number of the quantity adjustment signal gating of increase and decrease gating control module 300
When the quantity of molding block 300 is k, the duty ratio for controlling signal Din, which is set as 1/k, be can be realized per gradually gating all the way.
It should be noted that description of the invention port identical with numbering in the drawing or pin are to be connected to.
The above, the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although referring to before
Stating embodiment, invention is explained in detail, those skilled in the art should understand that: it still can be to preceding
Technical solution documented by each embodiment is stated to modify or equivalent replacement of some of the technical features；And these
It modifies or replaces, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (10)
1. a kind of multiple signals select control circuit, which is characterized in that follow module, output to follow module and preset including input
The gating control module of quantity；
Described input follows control signal input, clock signal input terminal and the reset signal input terminal of module respectively described
Multiple signals select control signal input, clock signal input terminal and the reset signal input terminal of control circuit, the input
The control signal output of module and the control signal input of first gating control module is followed to connect, the gating
The control signal output of control module is connect with the control signal input of the rear primary gating control module, the input
The clock signal output terminal of module is followed to connect respectively with the clock signal input terminal for gating control module described in each, it is described
Input follows the reset signal output end of module to connect respectively with the reset signal input terminal for gating control module described in each,
The source signal input terminal of the gating control module is the source signal input terminal that the multiple signals select control circuit, each
The output end of the gating control module follows the input terminal of module to connect altogether with the output, and the output follows the defeated of module
Outlet is the output end that the multiple signals select control circuit；
The input follows control signal, clock signal and the reset signal outside module reception and is sent to the gating control
The source signal input terminal of module, the gating control module accesses source signal, and the gating control module is believed according to the control
Number, the clock signal and the reset signal control the output of the source signal.
2. multiple signals as described in claim 1 select control circuit, which is characterized in that the gating control module includes touching
Bill member and switch control unit；
The input terminal of the trigger unit is the control signal input of the gating control module, the clock of the trigger unit
End is the clock signal input terminal of the gating control module, and the reset terminal of the trigger unit is the gating control module
The controlled end of reset signal input terminal, the output end of the trigger unit and the switch control unit connects to form the gating altogether
The control signal output of control module, the input terminal of the switch control unit are that the source signal of the gating control module is defeated
Enter end, the output end of the switch control unit is the output end of the gating control module.
3. multiple signals as claimed in claim 2 select control circuit, which is characterized in that the trigger unit includes the first mould
Quasi- switch subelement, the first latch subelement, the second analog switch subelement, the second latch subelement and logical conversion are single
Member；
The first input end of the first analog switch subelement is the input terminal of the trigger unit, and logical conversion is single
The input terminal of member is the clock end of the trigger unit, the second input terminal and the third input of the first analog switch subelement
End connects one to one with the first output end of the logical conversion subelement and second output terminal respectively, and first simulation is opened
The output termination described first of climax unit latches the input terminal of subelement, and described first latches described in the output termination of subelement
The first input end of second analog switch subelement, the second input terminal and third input terminal of the second analog switch subelement
It connects one to one respectively with the second output terminal of the logical conversion subelement and the first output end, second analog switch
4th input terminal of subelement be the trigger unit reset terminal, the second analog switch subelement output termination described in
Second latches the input terminal of subelement, and the described second output end for latching subelement is the output end of the trigger unit.
4. multiple signals as claimed in claim 3 select control circuit, which is characterized in that the first analog switch subelement
Including first switch tube, second switch, third switching tube and the 4th switching tube；
The grid of the grid of the first switch tube and the 4th switching tube connects to form the first analog switch subelement altogether
First input end, the grid of the second switch is the second input terminal of the first analog switch subelement, described the
The grid of three switching tubes is the third input terminal of the first analog switch subelement, the source electrode of the second switch and described
The drain electrode of third switching tube connects the output end to form the first analog switch subelement altogether, the drain electrode of the first switch tube,
Trap potential and the trap potential of the second switch connect direct current altogether, and the source electrode of the first switch tube connects the second switch
Drain electrode, the source electrode of the third switching tube connects the drain electrode of the 4th switching tube, source electrode, the trap potential of the 4th switching tube
It is connected to ground altogether with the trap potential of the third switching tube.
5. multiple signals as claimed in claim 3 select control circuit, which is characterized in that described first, which latches subelement, includes
First NOT gate and the second NOT gate；
The input terminal of the output end of first NOT gate and second NOT gate connects to form the defeated of the first latch subelement altogether
Enter to hold, the output end of the input terminal of first NOT gate and second NOT gate connects to form the defeated of the first latch subelement altogether
Outlet.
6. multiple signals as claimed in claim 3 select control circuit, which is characterized in that the second analog switch subelement
Including the 5th switching tube, the 6th switching tube, the 7th switching tube, the 8th switching tube and the 9th switching tube；
The grid of 5th switching tube and the grid of the 8th switching tube connect to form the second analog switch subelement altogether
First input end, the grid of the 6th switching tube is the second input terminal of the second analog switch subelement, described the
The grid of seven switching tubes is the third input terminal of the second analog switch subelement, and the grid of the 9th switching tube is described
4th input terminal of the second analog switch subelement, the drain electrode of the source electrode, the 7th switching tube of the 6th switching tube and institute
The source electrode for stating the 9th switching tube connects the output end to form the second analog switch subelement, the leakage of the 5th switching tube altogether
The trap potential of pole, trap potential and the 6th switching tube connects direct current altogether, and the drain electrode of the 9th switching tube and trap potential connect altogether
Direct current, the source electrode of the 5th switching tube connect the drain electrode of the 6th switching tube, and the source electrode of the 7th switching tube connects described
The trap potential of the drain electrode of 8th switching tube, the source electrode of the 8th switching tube, trap potential and the 7th switching tube is connected to ground altogether.
7. multiple signals as claimed in claim 3 select control circuit, which is characterized in that described second, which latches subelement, includes
Third NOT gate and the 4th NOT gate；
The input terminal of the output end of the third NOT gate and the 4th NOT gate connects to form the defeated of the second latch subelement altogether
Enter to hold, the output end of the input terminal of the third NOT gate and the 4th NOT gate connects to form the defeated of the second latch subelement altogether
Outlet.
8. multiple signals as claimed in claim 3 select control circuit, which is characterized in that the logical conversion subelement includes
5th NOT gate and the 6th NOT gate；
The input terminal of 5th NOT gate is the input terminal of the logical conversion subelement, the output end of the 5th NOT gate and institute
The input terminal for stating the 6th NOT gate connects the first output end to form the logical conversion subelement, the output end of the 6th NOT gate altogether
For the second output terminal of the logical conversion subelement.
9. multiple signals as described in claim 1 select control circuit, which is characterized in that it includes that the input, which follows module,
One follower, the second follower and third follower；
The input terminal of first follower is the control signal input for inputting and following module, first follower
Output end is the control signal output for inputting and following module, and the input terminal of second follower is that the input follows
The clock signal input terminal of module, the output end of second follower are that the input follows the clock signal of module to export
End, the input terminal of the third follower are the reset signal input terminal for inputting and following module, the third follower
Output end is the reset signal output end for inputting and following module.
10. multiple signals as described in claim 1 select control circuit, which is characterized in that the output follows the module to include
4th follower；
The input terminal and output end of 4th follower are respectively the input terminal and output end for exporting and following module.
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| CN201710711638.XA CN109412565B (en) | 2017-08-18 | 2017-08-18 | Multi-channel signal selection control circuit |
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| CN201710711638.XA CN109412565B (en) | 2017-08-18 | 2017-08-18 | Multi-channel signal selection control circuit |
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| CN109412565B (en) | 2022-07-15 |
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