CN109360852A - 一种降低芯片减薄碎片率的硅片倒角结构及方法 - Google Patents

一种降低芯片减薄碎片率的硅片倒角结构及方法 Download PDF

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CN109360852A
CN109360852A CN201810919488.6A CN201810919488A CN109360852A CN 109360852 A CN109360852 A CN 109360852A CN 201810919488 A CN201810919488 A CN 201810919488A CN 109360852 A CN109360852 A CN 109360852A
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Prior art keywords
thinned
chamfering
thinning
thickness
wafer
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薛维平
关世瑛
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02021—Edge treatment, chamfering

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

很多用于小体积封装的半导体芯片，需要减薄到一定厚度，才能放入封装体内，当厚度低于150微米的时候，碎片率会大幅度提升，对减薄设备、工艺等提出更高要求，常规减薄方法使用的硅片，其倒角为椭圆倒角或者圆形倒角，这种倒角的硅片在减薄的过程中，容易造成硅片边缘较薄，进而崩边，硅片一旦崩边，在接下来的工艺中极其容易造成整片破碎，本发明改善硅片减薄过程，利用圆角矩形倒角的硅片制造芯片，减薄过程中，硅片边缘始终和金刚砂轮垂直，采用此方法，同等设备工艺条件下，减薄厚度150微米时可以降低碎片率50%以上，当减薄至100微米时，更是可以降低碎片率70%以上。

Description

一种降低芯片减薄碎片率的硅片倒角结构及方法
技术领域
本发明属于一种硅片倒角结构及方法，此发明适用于降低芯片减薄碎片率。
背景技术
很多用于小体积封装的半导体芯片，需要减薄到一定厚度，才能放入封装体内，当厚度低于150微米的时候，碎片率会大幅度提升，对减薄设备、工艺等提出更高要求，常规减薄方法使用的硅片，其倒角为椭圆倒角或者圆形倒角，这种倒角的硅片在减薄的过程中，容易造成硅片边缘较薄，进而崩边，硅片一旦崩边，在接下来的工艺中极其容易造成整片破碎，本发明改善硅片减薄过程，利用圆角矩形倒角的硅片制造芯片，减薄过程中，硅片边缘始终和金刚砂轮垂直，采用此方法，同等设备工艺条件下，减薄厚度150微米时可以降低碎片率50%以上，当减薄至100微米时，更是可以降低碎片率70%以上。
发明内容
1、一种降低芯片减薄碎片率的硅片倒角结构，其结构包括：矩形结构101和圆角结构102，圆角半径长度103小于1/2减薄厚度105，减薄厚度105小于150微米。
2、一种降低芯片减薄碎片率的方法，其方法包括：
A、硅片制备，拉单晶、切片、倒角、抛光，倒角边缘为圆角矩形，圆角半径根据最终减薄厚度确定；
B、芯片制备，通过光刻、注入、扩散、溅射等工艺实现芯片功能；
C、减薄、封装、测试，减薄时，硅片边缘始终和减薄金刚砂轮成90度直角，降低减薄碎片率，且减薄完成后，硅片边缘厚度大，降低后续工艺碎片风险。
附图说明
图1是此硅片倒角结构的截面图；
图2是圆形倒角结构硅片的界面图。
编号说明：
101：硅片矩形结构；
102：圆角结构；
103：圆角半径；
104：减薄的位置；
105：减薄的厚度，厚度小于150微米，此结构的优点尤为突出；
201：圆形倒角硅片减薄后硅片边缘位置，有锐角结构，容易崩边。
具体实施方式
1．硅片制备，拉单晶、切片、倒角、抛光，倒角边缘为圆角矩形，圆角半径根据最终减薄厚度确定。
2．芯片制备，通过光刻、注入、扩散、溅射等工艺实现芯片功能。
3．减薄、封装、测试，减薄时，硅片边缘始终和金刚砂轮成90度直角，降低减薄碎片率，且减薄完成后，硅片边缘厚度大，降低后续工艺碎片风险，普通圆形倒角硅片，减薄到后面是锐角边缘，容易崩边、碎片。
通过上述实施例阐述了本发明，同时也可以采用其它实施例实现本发明。本发明不局限于上述具体实施例，因此本发明有所附权利要求范围限定。

Claims (2)

1.一种降低芯片减薄碎片率的硅片倒角结构，其结构包括：矩形结构101和圆角结构102，圆角半径长度103小于1/2减薄厚度105，减薄厚度105小于150微米。
2.一种降低芯片减薄碎片率的方法，其方法包括：
A、硅片制备，拉单晶、切片、倒角、抛光，倒角边缘为圆角矩形，圆角半径根据最终减薄厚度确定；
B、芯片制备，通过光刻、注入、扩散、溅射等工艺实现芯片功能；
C、减薄、封装、测试，减薄时，硅片边缘始终和减薄金刚砂轮成90度直角，降低减薄碎片率，且减薄完成后，硅片边缘厚度大，降低后续工艺碎片风险。
CN201810919488.6A 2018-08-14 2018-08-14 一种降低芯片减薄碎片率的硅片倒角结构及方法 Pending CN109360852A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113471069A (zh) * 2021-05-10 2021-10-01 中国电子科技集团公司第十一研究所 红外探测器、混成芯片及其背减薄划痕处理方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004111799A (ja) * 2002-09-20 2004-04-08 Canon Inc 半導体チップの製造方法
JP2005032804A (ja) * 2003-07-08 2005-02-03 Hitachi Cable Ltd 半導体ウェハの加工方法
JP2006332281A (ja) * 2005-05-25 2006-12-07 Komatsu Electronic Metals Co Ltd 半導体ウェーハの製造方法および両面研削方法並びに半導体ウェーハの両面研削装置
JP2007266043A (ja) * 2006-03-27 2007-10-11 Hitachi Cable Ltd 化合物半導体ウェハ
CN101226904A (zh) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 具有不对称边缘轮廓的硅片及其制造方法
CN202247006U (zh) * 2011-09-06 2012-05-30 太仓协鑫光伏科技有限公司 太阳能级单晶硅片

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004111799A (ja) * 2002-09-20 2004-04-08 Canon Inc 半導体チップの製造方法
JP2005032804A (ja) * 2003-07-08 2005-02-03 Hitachi Cable Ltd 半導体ウェハの加工方法
JP2006332281A (ja) * 2005-05-25 2006-12-07 Komatsu Electronic Metals Co Ltd 半導体ウェーハの製造方法および両面研削方法並びに半導体ウェーハの両面研削装置
JP2007266043A (ja) * 2006-03-27 2007-10-11 Hitachi Cable Ltd 化合物半導体ウェハ
CN101226904A (zh) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 具有不对称边缘轮廓的硅片及其制造方法
CN202247006U (zh) * 2011-09-06 2012-05-30 太仓协鑫光伏科技有限公司 太阳能级单晶硅片

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113471069A (zh) * 2021-05-10 2021-10-01 中国电子科技集团公司第十一研究所 红外探测器、混成芯片及其背减薄划痕处理方法

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Application publication date: 20190219