CN109308997A - Silicon chip groove slotting method - Google Patents

Silicon chip groove slotting method Download PDF

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Publication number
CN109308997A
CN109308997A CN201710615645.XA CN201710615645A CN109308997A CN 109308997 A CN109308997 A CN 109308997A CN 201710615645 A CN201710615645 A CN 201710615645A CN 109308997 A CN109308997 A CN 109308997A
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CN
China
Prior art keywords
cleaning
silicon wafer
protective layer
acid
grooving method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710615645.XA
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Chinese (zh)
Inventor
王晓捧
王彦君
孙晨光
徐长坡
陈澄
武卫
梁效峰
王宏宇
杨玉聪
史丽萍
徐艳超
陈亚彬
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Tianjin Huanxin Technology & Development Co ltd
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Tianjin Huanxin Technology & Development Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Tianjin Huanxin Technology & Development Co ltd filed Critical Tianjin Huanxin Technology & Development Co ltd
Priority to CN201710615645.XA priority Critical patent/CN109308997A/en
Publication of CN109308997A publication Critical patent/CN109308997A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

A silicon chip groove slotting method comprises the following steps: printing a protective layer, laser grooving, corroding, removing the surface protective layer, cleaning and drying. Compared with the prior art, the method has the advantages that the groove manufacturing mode of firstly carrying out laser grooving and then carrying out groove corrosion is adopted, so that the falling of the protective layer on the surface of the silicon wafer caused by long corrosion time can be prevented, the groove manufacturing time is greatly shortened, the adhesion between the protective layer and the surface of the silicon wafer is ensured, and the bad phenomenon of the falling of the protective layer is avoided.

Description

A kind of silicon wafer groove grooving method
Technical field
The application belongs to GPP production technical field, specifically, being related to a kind of silicon wafer groove grooving method.
Background technique
GPP is the abbreviation of Glassivation passivation parts, is the general designation of glassivation class device.The production Product are exactly to fire one layer of glass to the tube core P/N junction surrounding of quasi- segmentation on the basis of existing product ordinary silicon rectified diffusion piece Glass, glass and monocrystalline silicon have good binding characteristic, and P/N knot is made to obtain optimal protection, from the invasion of external environment, improve The stability of device, reliability are splendid.Also therefore GPP in electronic field using more and more extensive.Corresponding GPP produces work Skill, increasingly by the concern in industry, how more effectively, more rapidly, the production GPP of higher quality become a project.Mesh Preceding common groove manufacturing method is carries out trench etching to silicon wafer with acid, but the speed of corrosion and unhappy, when needing to corrode Trench depth it is deeper when, then need to corrode for a long time, silicon wafer long-time soaking easily leads to silicon chip surface in corrosive liquid Sag of protecting coating causes to corrode bad.
Summary of the invention
In view of this, the technical problem to be solved by the application is to provide a kind of silicon wafer groove grooving method, Neng Gouneng Enough shorten the etching time of original process, it is ensured that the adhesiveness of protective layer and product surface avoids the bad phenomenon of sag of protecting coating.
In order to solve the above-mentioned technical problem, this application discloses a kind of silicon wafer groove grooving methods, and use following technology Scheme is realized.
A kind of silicon wafer groove grooving method, step include:
Printing protective layer: the protective layer of the silicon chip surface printing respective graphical of fluting is treated;
Laser slotting: the silicon wafer for being painted with protective layer is sent to laser head, is scanned with laser to silicon chip surface, to silicon The exposed part that piece is not coated with matcoveredn carries out calcination, to reach fluting purpose;
Corrosion: the groove on silicon wafer after laser slotting is subjected to further corrosion fluting, corrodes and spreads junction depth out;
Cleaning: the residual nitration mixture in silicon chip surface and slot is removed;
Remove sealer: the protective layer on removal silicon wafer.
Further, the groove depth of the laser slotting is 20~50um.
Further, the corrosion includes acid corrosion and acid cleaning, and the acid corrosion further corrodes fluting, corrodes and expand out Dissipating bind is deep;Remaining corrosive liquid when the acid cleaning is for washing acid corrosion.
Further, the acid cleaning includes two-stage pure water overflow launder.
Further, removal sealer includes removal protective layer and alkali cleaning, and the removal is protective layer used in removal It is printed on the protective layer of silicon chip surface, remaining lye when the alkali cleaning is for cleaning the removal protective layer.
Further, the alkali cleaning includes that two-stage is cleaned, and respectively hot pure water is impregnated and pure water overflow cleaning.
Further, cleaned after the removal sealer, it is described cleaning for remove silicon chip surface metal from Son and organic solvent;The cleaning includes soda acid cleaning and two-stage ultrasonic cleaning.
Further, the soda acid cleaning includes acid solution cleaning and caustic dip, and the acid solution cleaning and the lye are clear It is cleaned by pure water overflow after washing.
Further, the scavenging period of the two-stage ultrasonic cleaning is 5min~20min.
Further, the silicon wafer groove grooving method further includes drying: the silicon wafer that groove fluting finishes is done It is dry, remove moisture removal;The drying is specially that product is put into hot N2Interior drying.
Compared with prior art, the application can be obtained including following technical effect: using first laser slotting, groove is rotten again The groove production method of erosion, can greatly shorten the time of trench etching, prevent from causing silicon chip surface to be protected because of etching time length Layer falls off, it is ensured that the adhesiveness of protective layer and silicon chip surface avoids the bad phenomenon of sag of protecting coating.
Certainly, any product for implementing the application must be not necessarily required to reach all the above technical effect simultaneously.
Specific embodiment
Presently filed embodiment is described in detail below in conjunction with embodiment, whereby to the application how application technology hand Section solves technical problem and reaches the realization process of technical effect to fully understand and implement.
A kind of silicon wafer groove grooving method, step include feeding, fragment, laser slotting, rewinding, burn into cleaning, removal table Face protective layer, cleaning, drying, the several steps of blanking.
Under normal conditions, during the production of semiconductor products such as GPP, the figure before groove fluting by production product is first Protective layer is printed to silicon chip surface.Non-slotted part is protected in laser slotting and corrosion.
S1: feeding.Whole basket products are reached outside laser equipment by transmission track.
S2: fragment.Every flake products in basket are sequentially transmitted under laser head by conveyer belt.
S3: laser slotting.Laser is scanned in silicon chip surface, and the exposed locations for not printing protective layer to silicon wafer carry out calcination, Achieve the purpose that fluting.Laser slotting can reduce the depth of subsequent corrosion, can avoid leading to silicon wafer because of etching time length in this way Sealer falls off, and can also shorten the time of groove fluting, it is ensured that the adhesiveness of protective layer and product surface avoids protective layer The bad phenomenon to fall off.
Preferably, laser slotting depth is 20um~50um;Laser frequency is 0.1MHz-1MHz;Laser head tranmitting frequency For laser head tranmitting frequency (60~80) KHz;Laser head power is 15W~25W.
S4: rewinding.Product is sequentially transmitted in basket after laser slotting, and the manipulator in corrosion equipment will be pierced under basket Place.
S5: corrosion.Corroded using nitration mixture, it is therefore an objective to corrode and spread junction depth out.
The step of corrosion includes acid corrosion and acid cleaning.
Acid corrosion: being reached the silicon wafer basket for holding silicon wafer above etching tank by manipulator, after corroding slot cover and opening, machine During product is placed into etching tank nitration mixture by tool hand, corrosion slot cover is closed, and is corroded;After etching time arrives, manipulator will be produced Product take out, and are sent to sour washing station.
Acid cleaning includes several grades of pure water overflow cleanings, preferably three-level.Product is successively put into three-level pure water by manipulator It is rinsed in overflow launder, the purpose of sour washing station is done in order to which the nitration mixture that silicon chip surface after trench etching is carried rinses Only.
S6: cleaning.Remove the residual nitration mixture in silicon chip surface and slot.
S7: removal silicon chip surface protective layer.The method of removal protective layer is alkali removal, and step includes removal protective layer and alkali Cleaning.
Removal protective layer: product is reached above alkali slot by manipulator, product is put into alkali slot after slot cover opening, slot Lid is closed;After the removal time arrives, product is taken out by manipulator.The preferred two-stage alkali removal of protective layer is removed, i.e., successively passes through two The operation of secondary removal protective layer.Silicon wafer is sent to alkali washing station after the completion of protective layer removal.
Alkali cleaning includes that two-stage pure water cleans, and the first order is hot pure water immersion, and the second level is pure water overflow cleaning.Two-stage is clear Washing purpose is to clean the alkali of remaining when removing protective layer.
S8: cleaning includes soda acid cleaning, two-stage ultrasonic cleaning.
Soda acid cleaning include acid solution cleaning and caustic dip, acid solution cleaning purpose be wash silicon chip surface metal from Son, the purpose of caustic dip are the organic solvents for washing silicon chip surface.There is the cleaning of level-one pure water after acid, alkali cleaning, with first Step washes acid, alkaline cleaner.Preferred cleaning sequence are as follows: caustic dip, pure water cleaning, acid solution cleaning, pure water cleaning.
Two-stage ultrasonic cleaning is specially that product is put into two-stage overflow groove to carry out spilling water, every grade of spilling water (5~20) min, The soda acid cleaning agent and impurity, miscellaneous liquid on further cleaning silicon chip surface.
S9: drying.Product is put into hot N2Interior drying.N2Preferably 80~100 degrees Celsius of temperature, drying the time preferably (10~ 30)min。
S10: blanking.Product is spread out of into groove fluting apparatus device.
The beneficial effects of the present invention are: former process trench etching is entirely using corrosive liquid corrosion of silicon, and the application is adopted With first laser slotting, then trench etching, it can prevent from leading to silicon chip surface sag of protecting coating because of pickling etching time length, contract significantly The time of short trench etching, it is ensured that the adhesiveness of protective layer and silicon chip surface avoids the bad phenomenon of sag of protecting coating.
Above to a kind of silicon wafer groove grooving method provided by the embodiment of the present application, it is described in detail.The above reality The explanation for applying example is merely used to help understand the structure and its core concept of the application;Meanwhile for the general technology of this field Personnel, according to the thought of the application, there will be changes in the specific implementation manner and application range, in conclusion this theory Bright book content should not be construed as the limitation to the application.
As used some vocabulary to censure specific components in the specification and claims.Those skilled in the art answer It is understood that different manufacturers may call the same component with different nouns.Present specification and claims are not In such a way that the difference of title is as component is distinguished, but with the difference of component functionally as the criterion of differentiation.? The "comprising" of specification and claim mentioned in is an open language in the whole text, therefore should be construed to " include but do not limit In "." substantially " refer within the acceptable error range, those skilled in the art can within a certain error range solve described in Technical problem basically reaches the technical effect.Specification subsequent descriptions are to implement the better embodiment of the application, so described Description is not intended to limit the scope of the present application still for the purpose of the rule for illustrating the application.The protection scope of the application As defined by the appended claims.
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability Include, so that commodity or system including a series of elements not only include those elements, but also including not clear The other element listed, or further include for this commodity or the intrinsic element of system.In the feelings not limited more Under condition, the element that is limited by sentence "including a ...", it is not excluded that in the commodity or system for including the element also There are other identical elements.
Above description shows and describes several preferred embodiments of the present application, but as previously described, it should be understood that the application Be not limited to forms disclosed herein, should not be regarded as an exclusion of other examples, and can be used for various other combinations, Modification and environment, and by the technology of above-mentioned introduction or related fields or can know in the application contemplated scope described herein Knowledge is modified.And changes and modifications made by those skilled in the art do not depart from spirit and scope, then all Ying Ben In the protection scope for applying for appended claims.

Claims (10)

1. a kind of silicon wafer groove grooving method, step include:
Printing protective layer: protective layer is printed by the silicon chip surface that predetermined pattern treats fluting;
Laser slotting: the silicon wafer for printing protective layer is sent to laser head, is scanned with laser to silicon chip surface, to silicon wafer The exposed part for not printing protective layer carries out calcination, to reach fluting purpose;
Corrosion: the groove on silicon wafer after laser slotting is subjected to further corrosion fluting, corrodes and spreads junction depth out;
Remove sealer: the protective layer on removal silicon wafer.
2. silicon wafer groove grooving method according to claim 1, it is characterised in that: the groove depth of the laser slotting is 20um~50um.
3. silicon wafer groove grooving method according to claim 1 or claim 2, it is characterised in that: the corrosion includes acid corrosion and acid Cleaning, the acid corrosion further corrode fluting, corrode and spread junction depth out;It is remaining when the acid cleaning is for washing acid corrosion Corrosive liquid.
4. silicon wafer groove grooving method according to claim 3, it is characterised in that: the acid cleaning includes the overflow of two-stage pure water Slot.
5. according to claim 1,2,4 any silicon wafer groove grooving method, it is characterised in that: removing sealer includes Protective layer and alkali cleaning, the protective layer used protective layer that silicon chip surface is printed in removal of removal are removed, the alkali cleaning is used Remaining lye when cleaning the removal protective layer.
6. silicon wafer groove grooving method according to claim 5, it is characterised in that: the alkali cleaning includes that two-stage is cleaned, point It Wei not hot pure water immersion and pure water overflow cleaning.
7. according to claim 1,2,6 any silicon wafer groove grooving method, it is characterised in that: the removal sealer After cleaned, it is described cleaning be remove silicon chip surface metal ion and organic solvent;Preferably, the cleaning includes acid Alkali cleaning and two-stage ultrasonic cleaning.
8. silicon wafer groove grooving method according to claim 7, it is characterised in that: soda acid cleaning include acid solution cleaning and Caustic dip, by pure water overflow cleaning after the acid solution cleaning and the caustic dip.
9. silicon wafer groove grooving method according to claim 7, it is characterised in that: the scavenging period of the two-stage ultrasonic cleaning For 5min~20min.
10. according to claim 1,2,4,6,8,9 any silicon wafer groove grooving method, it is characterised in that: further include drying: The silicon wafer that groove fluting finishes is dried, moisture removal is removed;Preferably, the drying is specially that product is put into hot N2Inside blow It is dry.
CN201710615645.XA 2017-07-26 2017-07-26 Silicon chip groove slotting method Pending CN109308997A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111370301A (en) * 2020-03-19 2020-07-03 常州星海电子股份有限公司 Production process of super-high-power light resistance glass chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258077A (en) * 1991-09-13 1993-11-02 Solec International, Inc. High efficiency silicon solar cells and method of fabrication
CN104505407A (en) * 2014-11-21 2015-04-08 广东爱康太阳能科技有限公司 Laser grooving gate-buried electrode solar cell and method for preparing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258077A (en) * 1991-09-13 1993-11-02 Solec International, Inc. High efficiency silicon solar cells and method of fabrication
CN104505407A (en) * 2014-11-21 2015-04-08 广东爱康太阳能科技有限公司 Laser grooving gate-buried electrode solar cell and method for preparing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111370301A (en) * 2020-03-19 2020-07-03 常州星海电子股份有限公司 Production process of super-high-power light resistance glass chip
CN111370301B (en) * 2020-03-19 2023-11-21 常州星海电子股份有限公司 Production process of ultra-high power photoresist glass chip

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Application publication date: 20190205

RJ01 Rejection of invention patent application after publication