CN109300396B

CN109300396B - Display panel, display screen assembly and electronic device

Info

Publication number: CN109300396B
Application number: CN201811238560.5A
Authority: CN
Inventors: 张磊
Original assignee: Oppo Chongqing Intelligent Technology Co Ltd
Current assignee: Oppo Chongqing Intelligent Technology Co Ltd
Priority date: 2018-10-23
Filing date: 2018-10-23
Publication date: 2021-06-01
Anticipated expiration: 2038-10-23
Also published as: CN109300396A

Abstract

The invention discloses a display panel, comprising: the pixel unit comprises three sub-pixels, namely a first sub-pixel, a second sub-pixel and a third sub-pixel, wherein two data lines are arranged in each row of pixel unit and comprise a first data line and a second data line, and the first sub-pixel and the second sub-pixel in each pixel unit are respectively connected to one data line and connected with the same scanning line; the third sub-pixel in each column of pixel units is connected to the first data line or the second data line and is connected with another adjacent scanning line which is different from the connection of the first sub-pixel and the second sub-pixel. The structure multiplexes a part of data lines, reduces the number of the data lines, also reduces the number of the data lines distributed in the non-display area, and realizes a smaller frame so as to make the non-display area narrower. The application also provides a display screen assembly and an electronic device.

Description

Display panel, display screen assembly and electronic device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel, a display screen assembly, and an electronic device.

Background

The display panel of the electronic device such as a mobile phone, a tablet computer and the like is provided with data lines, the data lines are partially distributed in the non-display area, and the number of the data lines is consistent with the number of the columns of the sub-pixels because the number of the data lines is constant. Therefore, the number of data distributed in the non-display area is constant, and under the condition that the number of the data lines is constant and the line spacing is minimum, the height of the data lines in the non-display area is constant, that is, the height of the non-display area of the lower frame in the display panel is constant, so that the data lines cannot be further compressed and made narrower.

Disclosure of Invention

The application provides a display panel, a display screen assembly and an electronic device, aiming at the technical problem that the height of a non-display area of the display panel cannot be further compressed to be narrower.

The technical scheme adopted by the application is as follows: provided is a display panel, including: the pixel unit comprises three sub-pixels which are respectively a first sub-pixel, a second sub-pixel and a third sub-pixel, wherein two data lines are arranged in each row of pixel unit and comprise a first data line and a second data line, and the first sub-pixel and the second sub-pixel in each pixel unit are respectively connected to one data line and connected with the same scanning line; the third sub-pixel in each column of pixel units is connected to the first data line or the second data line and is connected with another adjacent scanning line different from the connection of the first sub-pixel and the second sub-pixel.

The application also provides a display screen assembly comprising the display panel.

The application also provides an electronic device comprising the display screen assembly.

According to the display panel, the display screen assembly and the electronic device, each pixel unit comprises three sub-pixels which are respectively a first sub-pixel, a second sub-pixel and a third sub-pixel, wherein two data lines are arranged in each row of pixel units and comprise a first data line and a second data line, and the first sub-pixel and the second sub-pixel in each pixel unit are respectively connected to one data line and connected to the same scanning line; the third sub-pixel in each column of pixel units is connected to the first data line or the second data line and is connected with another adjacent scanning line different from the connection of the second pixel unit and the second pixel unit. The structure makes the charging of each row of pixel units be carried out twice, and a part of data lines are multiplexed, so that the number of the data lines is reduced, the number of the data lines distributed in a non-display area is also reduced, the space is reduced, a smaller frame is realized, the non-display area is narrower, the lower frame of the display panel can be narrower, and the larger screen occupation ratio is realized.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a partial structure of a display panel according to an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a display screen assembly according to an embodiment of the present application;

FIG. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

FIG. 4 is a schematic view of a portion of a display panel according to the first embodiment with improved structure;

FIG. 5 is a simplified diagram of a portion of a display panel according to another embodiment before the structure is improved;

FIG. 6 is a simplified diagram of a portion of a display panel according to another embodiment of the present application;

FIG. 7 is a simplified diagram of a portion of a display panel according to yet another embodiment of the present application;

FIG. 8 is a simplified diagram of a portion of a display panel according to yet another embodiment of the present application;

FIG. 9 is a simplified diagram of a portion of a display panel according to an embodiment of the present application;

FIG. 10 is a simplified diagram of a portion of a display panel according to another embodiment of the present application;

fig. 11 is a schematic cross-sectional view of the display panel shown in fig. 10.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

The present application provides a display panel 100 having a narrower lower frame, a display panel assembly 200 including the display panel 100, and an electronic device 300 including the display panel assembly 200.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a display panel according to the present application. Fig. 2 is a schematic structural diagram of an embodiment of a display panel assembly of the present application, and fig. 3 is a schematic structural diagram of an electronic device of the present application. Specifically, the electronic device 300 may be any of various types of computer system devices (only one form of which is shown in fig. 3 by way of example) that are mobile or portable and that perform wireless communications. Specifically, the electronic apparatus 300 may be a mobile phone or a smart phone (e.g., an iPhone (TM) based phone), a Portable game device (e.g., Nintendo DS (TM), PlayStation Portable (TM), game Advance (TM), iPhone (TM)), a laptop computer, a PDA, a Portable internet device, a music player, and a data storage device, other handheld devices, and a headset, etc., and the electronic apparatus 300 may also be other wearable devices that require charging (e.g., a Head Mounted Device (HMD) such as an electronic bracelet, an electronic necklace, an electronic device, or a smart watch).

The electronic apparatus 300 may also be any of a number of electronic devices including, but not limited to, cellular phones, smart phones, other wireless communication devices, personal digital assistants, audio players, other media players, music recorders, video recorders, cameras, other media recorders, radios, medical devices, vehicle transportation equipment, calculators, programmable remote controllers, pagers, laptop computers, desktop computers, printers, netbook computers, Personal Digital Assistants (PDAs), Portable Multimedia Players (PMPs), moving Picture experts group (MPEG-1 or MPEG-2) Audio layer 3(MP3) players, portable medical devices, and digital cameras and combinations thereof, among other devices having a display screen.

In some cases, electronic device 300 may perform a variety of functions (e.g., playing music, displaying video, storing pictures, and receiving and sending telephone calls). If desired, the electronic apparatus 300 may be a device such as a cellular telephone, media player, other handheld device, wrist watch device, pendant device, earpiece device, or other compact portable device having a display screen.

The display panel 100 includes a display region 10, a non-display region 20, a plurality of data lines 30, a plurality of scan lines 40, a plurality of rows and columns of pixel units 50 connected to the scan lines 30 and the data lines 40, and a chip 60 disposed in the non-display region 20.

In order to better explain the improvement point of the present application, the following description is made of the general structure of the improved front display panel 100 a. Fig. 4 is a schematic partial structure view of the front display panel 100a with improved structure. The display panel 100a before structure improvement comprises a display area 10a and a non-display area 20a, a plurality of data lines 30a, a plurality of scanning lines 40a, a plurality of rows and columns of pixel units 50a connected with the scanning lines 40a and the data lines 30a, and a chip 60a arranged in the non-display area 20 a. Specifically, each pixel unit 50a includes three sub-pixels, namely a first sub-pixel 52a, a second sub-pixel 54a and a third sub-pixel 56a, all sub-pixels in the same row are connected to the same scan line 40a, and all sub-pixels in the same column are connected to the same data line 30 a. With the structure before modification, the number of data lines 30a in the display panel 100a is the same as the number of columns of sub-pixels. It can be understood that the data line 30a is located at a portion where the display area 10a is connected to the non-display area 20a and extends toward the non-display area 20a to form a fan-out trace 22a connected to the chip 60 a. In the case that the number of the data lines 30a is constant and the line spacing is minimized, the height of the data line 60a in the non-display area 20a is constant, that is, the height of the lower frame non-display area 20 in the display panel 100a is constant, and the lower frame non-display area cannot be further compressed to be narrower.

Based on the problem that the lower frame cannot be further compressed, another scheme is adopted before the structure is improved. Fig. 5 is a schematic structural view of a display panel 100b in another embodiment before structural improvement. The difference between the structure-improved front display panel 100b and the structure-improved front display panel 100a in the previous embodiment is that each two columns of sub-pixels are connected to the same data line 30b, then all odd columns of sub-pixels in the same row are connected to the same scan line 40b, and the sub-pixels in each row are charged twice. With the above structure, the number of data lines 30b is reduced by half compared to the structure of the previous embodiment, while the number of scan lines 40b is twice as many as the number of scan lines in the previous embodiment.

This structure can greatly reduce the number of data lines 30b, and thus the number of data lines 30b in the non-display area 20b, and thus the lower frame can be made narrower, but the number of connected sub-pixels of each data line 30b is twice as many as the number of sub-pixels connected by one data line 30a in the previous scheme. It can be understood that when the scan line 30b and the data line 30b are connected to the sub-pixel, a parasitic capacitance is generated due to the existence of the circuit, and the parasitic capacitance is not beneficial to charging the sub-pixel, and the more the sub-pixel is connected to the scan line 40b and the data line 30b, the more the parasitic capacitance is. This scheme causes the parasitic capacitance of each data line 30b to increase very much, which brings a great risk to charging. The technical scheme of the application is explained in the following with the accompanying drawings.

With reference to fig. 1, in order to further reduce the area required by the portion of the non-display area 20, where the data lines 30 are distributed in the non-display area 20, the total number of the data lines 30 in the whole display panel 100 is reduced, and then the number of the fan-out traces distributed on the non-display area 20 by the data lines 30 is smaller, so that the fan-out traces can be arranged more obliquely, and then the chips 60 connected with the fan-out traces are arranged closer to the display area 10, and further the lower frame of the display panel 100 is made narrower. Meanwhile, the structure of the display panel 100 adopted by the scheme is moderate in the number of sub-pixels connected with each data line 30, but excessive parasitic capacitance is generated. The structure of the display panel 100 is further described below with reference to the drawings.

Referring to fig. 1, a display panel 100 according to an embodiment of the present invention includes a plurality of scan lines 40-1 to 40-M, a scan driver 70 connected to the scan lines 40-1 to 40-M, a plurality of data lines 30-1 to 30-M crossing the scan lines 40-1 to 40-M, a data driver 80 connected to the data lines 30-1 to 30-M, and a plurality of data lines formed on the scan lines 40-1 to 40-M, wherein the data driver 80 is a part of a chip 60. The scan driver 70 sequentially generates scan signals on the scan lines 40-1 to 40-M, and the data driver 80 generates corresponding data signals on the data lines 30-1 to 30-M.

Referring to fig. 1 and 6, in the display panel 100, each pixel unit 50 includes three sub-pixels, namely a first sub-pixel 52, a second sub-pixel 54 and a third sub-pixel 56, two data lines 30 are disposed in each column of pixel units, including a first data line and a second data line, specifically, the first data line is an odd data line, 30-1, 30-3, etc. in fig. 6, the second data line is an even data line, 30-2, 30-4, etc. in fig. 6, the first sub-pixel 52 and the second sub-pixel 54 in each pixel unit 50 are respectively connected to one of the data lines 30, and are connected to the same scan line 40, for example, all the first sub-pixels 52 and the second sub-pixels 54 in the first row of pixel units 50 are connected to the scan line 40-1. The third sub-pixel 56 in each column of pixel cells 50 is connected to either the first data line or the second data line and to another scan line 40 in an adjacent row different from the connection of the first sub-pixel 52 and the second sub-pixel 54, e.g., all third sub-pixels 56 of the first row are connected to scan line 40-2.

With reference to fig. 1, each of the sub-pixels 52, 54, 56 includes a switch tube 522 and a pixel electrode 524, in which the switch tube 522 includes a control terminal, a first connection terminal and a second connection terminal (not labeled) respectively connected to at least one of the scan lines 40-1 to 40-M, at least one of the data lines 30-1 to 30-M and the pixel electrode 524, and the switch tube 522 is turned on by a scan signal applied by the scan driver 70 to at least one of the connected data lines 40-1 to 40-M, so as to charge the pixel electrode 524 by a data signal applied by the data driver 80 to at least one of the connected data lines 30-1 to 30-M, thereby charging the sub-pixel.

Specifically, the first sub-pixel 52, the second sub-pixel 54, and the third sub-pixel 56 include three sub-pixels of a red pixel, a green pixel, and a blue pixel. Alternatively, the first sub-pixel 52 and the second sub-pixel 54 connected to the same scan line 40 in each pixel unit 50 may be any two of three sub-pixels of a red pixel, a green pixel, and a blue pixel. In particular, the first subpixel 52 and the second subpixel 54 may be immediately adjacent, such as the first and second, or the second and third, from left to right as viewed in FIG. 1 (only the first case is shown in FIG. 1); a third sub-pixel 56 connected to another adjacent scan line 40 different from the connection of the first sub-pixel 52 and the second sub-pixel 54 is, for example, the third or first from left to right as viewed in fig. 1 (fig. 1 only shows the first case).

As shown in fig. 6, in another embodiment, the first sub-pixel 52 and the second sub-pixel 54 may also be the first and the third from left to right as shown in fig. 6, and the corresponding second is the third sub-pixel 56 connected to another adjacent scan line 40 different from the connection of the first sub-pixel 52 and the second sub-pixel 54. It is understood that, in different pixel units in the same row, the positional relationship of the first sub-pixel, the second sub-pixel and the third sub-pixel may be the same or different. For example, in the same row of pixel units, the first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively distributed from left to right in one of the pixel units, and the distribution manner of the plurality of sub-pixels of other pixel units in the same row may be the same, or other distributions are not limited.

Further, optionally, in an embodiment, two data lines disposed in each column of pixel units 50 are respectively sandwiched between adjacent sub-pixels, as shown in fig. 1 and fig. 6. In other embodiments, at least one of the two data lines disposed in each column of pixel units 50 is located beside only one of the sub-pixels.

In this application, in an embodiment, two scanning lines 40 are disposed between every two rows of pixel units 50, each row of pixel units 50 is connected to two scanning lines 40, and the first row of pixel units 50 and the second row of pixel units 50 do not share a scanning line 40. Specifically, as explained below by taking fig. 6 as an example, in the first row of pixel units 50, the first sub-pixels 52 and the second sub-pixels 54 of all the pixel units 50 are connected to the scan line 40-1, and the third sub-pixels 56 of all the pixel units 50 in the first row are connected to the scan line 40-2. In the second row of pixel cells 50, the first sub-pixels 52 and the second sub-pixels 54 of all the pixel cells 50 are connected to the scan line 40-3, and the third sub-pixels 56 in all the pixel cells 50 of the second row are connected to the scan line 40-4.

That is, of the plurality of scan lines 40, odd scan lines 40-1, 40-3, 40-5.. 40-M-1 (assuming M is an even number) connect the first sub-pixel 52 and the second sub-pixel 54, and even scan lines 40-2, 40-4, 40-6.. 40-N (assuming N is an even number) connect the third sub-pixel 56, as shown in fig. 6. In another embodiment, odd scan lines 40-1, 40-3, 40-5.. 40-M-1 connect the third subpixel 56, and even scan lines 40-2, 40-4, 40-6.. 40-N connect the first subpixel 52 and the second subpixel 54, as shown in FIG. 7.

In another embodiment, to further reduce the number of scan lines 40, one scan line 40 is disposed between every two rows of pixel units 50, wherein all third sub-pixels 56 of one row and all first sub-pixels 52 and second sub-pixels 56 of an adjacent row are connected to one scan line 40 between two rows of pixel units 50. As shown in fig. 8, all of the third sub-pixels 56 of the first row and all of the first and second sub-pixels 51 and 52 of the second row are connected to the scan line 40-2 between the first and second rows of pixel units 50. All third sub-pixels 56 of the second row and all first sub-pixels 52 and second sub-pixels 54 of the third row are connected to the scan line 40-3 between the second and third rows of pixel cells.

It can be understood that, in this embodiment, since three sub-pixels are connected to two data lines, one data line 30 provides voltages to two sub-pixels at the same time, and the voltages are the same, so that the display panel 100 of this embodiment is only suitable for monochrome display products, such as some letter reminding cards.

The specific display panel 100 includes a display area 10 and a non-display area 20, a pixel unit 50 is disposed in the display area 10, a data line 30 has a portion extending to the non-display area 20 to form a fan-out trace 32, and a chip of the display panel 100 located in the non-display area 20 is connected to the fan-out trace 32. Specifically, the chip 60 is connected to the circuit board, so that the chip 40 can exchange or transmit information with the circuit board 60, that is, the pixel signal of the circuit board is transmitted to the data driver 80 on the chip 60, the data driver 80 converts the pixel signal into a corresponding voltage to charge the corresponding sub-pixel, and the corresponding sub-pixel presents a corresponding pixel value, so as to control the display content and the display effect of the display area 10.

This application makes the charging of every line of pixel unit 50 go on twice through above scheme, multiplex a part of data line 30, the quantity of data line 30 compares the scheme quantity greatly reduced of the first embodiment before improving, just also reduced the data line 30 and extended the quantity of the fan-out line 32 that forms at non-display area 20, thereby reduced and needed to be used for distributing the space that the fan-out was walked line 32, realize littleer frame and then make non-display area 20 do more narrowly, that is to say the lower frame of display panel 100 can be done more narrowly, realize that bigger screen accounts for than.

In one embodiment, referring to fig. 9, in order to further compress the space of the non-display area 20 for distributing the fan-out traces 32, so that the non-display area 20 is made narrower, the fan-out traces 32 closest to the center line a of the display area 10 and the non-display area 20 among the plurality of fan-out traces 32 are straight lines, and a part of the fan-out traces 32 includes an inclined portion 322 disposed at an angle with respect to the center line a, wherein the angle between the inclined portion 322 and the center line a is greater than or equal to a preset angle. It can be understood that the number of the fan-out traces 32 is greatly reduced in the present application, and therefore the fan-out traces 32 on both sides can be distributed more obliquely, so that the connection position of the fan-out traces 32 and the chip 60 is closer to the display area 10, and a narrower lower frame is realized.

Optionally, referring to fig. 10 and 11 simultaneously, in another embodiment, the fan-out trace 32 is made as two parts arranged in different layers. In particular, the same fan-out trace 32 includes a first portion 324 and a second portion 326. The first portion 324 and the data line 30 are located in the same layer of the display region 10, the second portion 326 is bent from the first portion 324 and extends toward the display region 10, and the second portion 326 and the first portion 324 are arranged in different layers. The end of the second portion 326 is used for being connected with the chip 60, and the structure is adopted, so that the connecting position of the chip 60 is arranged closer to the display area 10, and the height h of the non-display area 20 for distributing the fan-out wiring 32 is reduced, so that the non-display area 20 is narrower, and a narrower frame is realized.

It is to be understood that in one embodiment, the first portion 324 and the second portion 326 of the same fan-out trace 32 are electrically connected except for the intersection, and the insulating layer 90 is disposed on the remaining portions of the first portion 324 and the second portion 326 of the same fan-out trace 32, as shown in fig. 11, to prevent the first portion 324 and the second portion 326 of the same fan-out trace 32 from being short-circuited and failing to work normally. In other embodiments, the first portion 324 and the second portion 326 of the same fan-out trace 32 may be electrically connected except for the intersection, a gap 90a (not shown) larger than a predetermined value is formed between the first portion 324 and the second portion 326 of the same fan-out trace 32, and the first portion 324 and the second portion 326 of the same fan-out trace 32 are prevented from being short-circuited by the gap 90 a.

The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims

1. A display panel is characterized by comprising a plurality of data lines, a plurality of scanning lines and a plurality of rows and a plurality of columns of pixel units, wherein each pixel unit comprises three sub-pixels which are respectively a first sub-pixel, a second sub-pixel and a third sub-pixel, two data lines are arranged in each column of pixel units and comprise a first data line and a second data line, and the first sub-pixel and the second sub-pixel in each pixel unit are respectively connected to one data line and connected with the same scanning line; the third sub-pixel in each pixel unit is connected to the first data line or the second data line and is connected with another adjacent scanning line which is different from the connection of the first sub-pixel and the second sub-pixel;

in each pixel unit, the scanning lines connected with the first sub-pixel and the third sub-pixel and the scanning lines connected with the second sub-pixel are respectively positioned at two sides of the first sub-pixel, the second sub-pixel and the third sub-pixel;

the two data lines arranged in each column of pixel units are respectively clamped between two adjacent sub-pixels in each pixel unit; or at least one of the two data lines arranged in each column of the pixel units is positioned beside one of the sub-pixels;

and one scanning line is arranged between every two rows of the pixel units, and all the third sub-pixels in one row of the pixel units and all the first sub-pixels and all the second sub-pixels in the other row of the pixel units in every two rows are connected to one scanning line between every two rows of the pixel units.

2. The display panel of claim 1, wherein the display panel comprises a display area and a non-display area, the pixel units are disposed in the display area, the data lines have portions extending to the non-display area to form fan-out traces, and the display panel further comprises a chip connected to the fan-out traces.

3. The display panel of claim 2, wherein the fan-out traces of the plurality of fan-out traces that are closest to the center line of the display area and the non-display area are straight lines, and a portion of the fan-out traces include an inclined portion disposed at an angle to the center line, wherein the angle between the inclined portion and the center line is greater than or equal to a predetermined angle.

4. The display panel of claim 2, wherein each of the fan-out traces includes a first portion and a second portion bent from the first portion and extending toward the display area and disposed in a different layer from the first portion, ends of the first portion of the fan-out traces are connected to the display area, and ends of the second portion are connected to the chips so that the chips are closer to the display area and the non-display area is narrower.

5. The display panel of claim 4, wherein the first portion and the second portion of the same fan-out trace are electrically connected except for the intersection portion, and an insulating layer is disposed on the remaining portion.

6. The display panel according to claim 1, wherein the sub-pixel comprises a switching tube and a pixel electrode, wherein the switching tube comprises a control terminal, a first connection terminal and a second connection terminal respectively connected to the scan line, the data line and the pixel electrode, and the switching tube is turned on by the scan signal, so as to charge the pixel electrode by the data signal applied to the data line by the data driver.

7. A display screen assembly comprising the display panel of any one of claims 1-6.

8. An electronic device comprising the display screen assembly of claim 7.