CN115083300B - Display panel and display device - Google Patents
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- CN115083300B CN115083300B CN202210767345.4A CN202210767345A CN115083300B CN 115083300 B CN115083300 B CN 115083300B CN 202210767345 A CN202210767345 A CN 202210767345A CN 115083300 B CN115083300 B CN 115083300B
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- 239000000758 substrate Substances 0.000 claims description 17
- 230000009286 beneficial effect Effects 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
- G09F9/335—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes being organic light emitting diodes [OLED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The invention discloses a display panel and a display device, which relate to the technical field of display, wherein the display panel comprises: the display device comprises a display area and a non-display area at least partially surrounding the display area, wherein the display area comprises a display edge, the non-display area comprises an upper frame and a lower frame which are oppositely arranged along the column direction, and the display panel comprises a first display edge close to the upper frame and a second display edge close to the lower frame; along the column direction, the first display edge and the second display edge are at least partially misaligned; the display area comprises a plurality of data lines which are arranged along the row direction and extend along the column direction; the display panel also comprises a multiplexer and a driving chip, wherein the input end of the multiplexer is electrically connected with the driving chip, and the output end of the multiplexer is electrically connected with the data line in the display area; at least part of the multiplexer is located at the upper rim. The invention sets partial multiplexers of the special-shaped display panel on the upper frame to realize the narrow frames of the left frame and the right frame.
Description
Technical Field
The present invention relates to the field of display technologies, and more particularly, to a display panel and a display device.
Background
With the rapid development of display panels, the display panels are increasingly applied to various technical fields. For example, the display panel may be used on an in-vehicle display device. The existing vehicle-mounted display device is generally integrated with functions such as navigation, video playing and function control. The display panel in the in-vehicle display apparatus may employ a liquid crystal display panel, an organic light emitting display panel, a Micro light emitting device (Micro-LED) display panel, or the like, in which each pixel of the organic light emitting display panel and the Micro light emitting device emits light individually, and the liquid crystal display panel requires a backlight module to provide backlight.
However, in general, the vehicle display panel is shaped like a parallelogram or trapezoid, and the upper edge and the lower edge of the display area are not completely aligned, in which case, in the prior art, the multiplexer is usually disposed in the left frame or the right frame, and the wiring of the multiplexer connected to the driving chip is also routed from the left frame or the right frame, so that the left frame or the right frame cannot be compressed, and a narrow frame cannot be realized.
Accordingly, it is desirable to provide a display panel and a display device capable of realizing a narrow bezel.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device for realizing a narrow bezel.
In one aspect, the present invention discloses a display panel comprising: a display region and a non-display region at least partially surrounding the display region, the display region including a display edge, the non-display region including an upper bezel and a lower bezel disposed opposite in a column direction, the display panel including a first display edge adjacent to the upper bezel and a second display edge adjacent to the lower bezel;
along the column direction, the first display edge is at least partially misaligned with the second display edge;
the display area comprises a plurality of data lines which are distributed along the row direction and extend along the column direction;
the display panel also comprises a multiplexer and a driving chip, wherein the input end of the multiplexer is electrically connected with the driving chip, and the output end of the multiplexer is electrically connected with the data line in the display area;
at least a portion of the multiplexer is located at the upper rim.
On the other hand, the invention also discloses a display device which comprises the display panel.
Compared with the prior art, the display panel and the display device provided by the invention have the advantages that at least the following effects are realized:
the display panel is a special-shaped display panel and comprises a first display edge close to an upper frame and a second display edge close to a lower frame; in the column direction, the first display edge and the second display edge are at least partially misaligned, and the display area comprises a plurality of data lines which are distributed in the row direction and extend in the column direction; the display panel also comprises a multiplexer and a driving chip, wherein the input end of the multiplexer is electrically connected with the driving chip, and the output end of the multiplexer is electrically connected with the data line in the display area; at least part of the multiplexer is located at the upper rim. In the related art, the first display edge and the second display edge are at least partially misaligned, for the special-shaped display area corresponding to the second display edge protruding from the first display edge, the data line for driving the pixels is connected with the driving chip through the multiplexers arranged in the left frame and the right frame, the multiplexers are arranged along the left frame and the right frame, the data line connected with the multiplexers can extend along the column direction, and the multiplexers arranged in the left frame and the right frame are also required to be wound when connected with the driving chip, and the winding is also arranged in the left frame and the right frame, so that the left frame and the right frame cannot be compressed, and therefore a narrow frame cannot be realized.
Of course, it is not necessary for any one product embodying the invention to achieve all of the technical effects described above at the same time.
Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic plan view of a display panel according to the present invention;
FIG. 2 is a schematic plan view of another display panel according to the present invention;
FIG. 3 is a schematic plan view of another display panel according to the present invention;
FIG. 4 is a cross-sectional view taken along the direction A-A' in FIG. 1;
FIG. 5 is a further cross-sectional view taken along line A-A' in FIG. 1;
FIG. 6 is a cross-sectional view taken along the direction B-B' in FIG. 3;
FIG. 7 is a schematic plan view of another display panel according to the present invention;
FIG. 8 is a schematic plan view of another display panel according to the present invention;
FIG. 9 is an enlarged partial view of region M of FIG. 8;
fig. 10 is a schematic plan view of a display panel according to still another embodiment of the present invention;
FIG. 11 is a schematic plan view of another display panel according to the present invention;
fig. 12 is a schematic plan view of a display device according to an embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
In view of the problem that the display panel cannot compress the left frame and the right frame in the related art, the present invention provides a display panel and a display device, which are used for improving the problem that the special-shaped display panel cannot compress the left frame and the right frame and cannot realize a narrow frame, and specific embodiments of the display panel and the display device will be described in detail below.
Referring to fig. 1 and 2, fig. 1 is a schematic plan view of a display panel according to the present invention, fig. 2 is a schematic plan view of another display panel according to the present invention, and in fig. 1 and 2, a display panel 100 includes a display area AA and a non-display area BB at least partially surrounding the display area AA, the display area AA includes a display edge, the non-display area BB includes an upper frame BB1 and a lower frame BB2 disposed opposite to each other along a column direction Y, and the display panel 100 includes a first display edge BY1 adjacent to the upper frame BB1 and a second display edge BY2 adjacent to the lower frame BB 2; in the column direction Y, the first display edge BY1 and the second display edge BY2 are at least partially misaligned; the display area AA includes a plurality of data lines 111 arranged in a row direction X and extending in a column direction Y; the display panel 100 further includes a multiplexer DE and a driving chip IC, an input terminal of the multiplexer DE is electrically connected to the driving chip IC, and an output terminal of the multiplexer DE is electrically connected to the data line 111 in the display area AA; at least part of the multiplexer DE is located in the upper frame BB1.
Specifically, the display panel 100 in the present invention may be a liquid crystal display panel 100, or may be an organic self-luminous display panel 100, which is not specifically limited herein, and fig. 1 and 2 only schematically illustrate a case where the non-display area BB completely surrounds the display area AA, but of course, the non-display area BB may also partially surround the display area AA, such as a water drop screen, and the like, which is not specifically limited herein. It will be appreciated that the display area AA further includes a plurality of pixels arranged in an array, the pixels not being shown. The non-display area BB comprises an upper frame BB1 and a lower frame BB2 which are oppositely arranged in the column direction Y, the non-display area BB comprises a left frame BB3 and a right frame BB4 which are oppositely arranged in the row direction X, and a driving chip IC is arranged in the lower frame BB 2. The number of the data lines 111 in fig. 1 is only schematically illustrated, and is not limiting to the actual product, the data lines 111 transmit data signals to the pixels, the driving chip IC provides data voltages to the data lines 111, the data lines 111 are in one-to-one correspondence with the pads on the driving chip IC, and since the number of the data lines 111 is large, a multiplexer DE is generally used to reduce the number of the pads on the driving chip IC, and fig. 1 and 2 only illustrate that the multiplexer DE has 1:2 as an example, i.e. the multiplexer DE has two output ends with one input end, the input ends of the multiplexer DE are electrically connected with the pads of the driving chip IC, and the output ends of the multiplexer DE are electrically connected with the data lines 111 in one-to-one correspondence.
It will be appreciated that, along the column direction Y, the first display edge BY1 and the second display edge BY2 are at least partially misaligned, and in fig. 1, a side of the first display edge BY1, which is close to the left frame BB3, protrudes from the second display edge BY2, and a side of the second display edge BY2, which is close to the right frame BB4, protrudes from the first display edge BY1, and the display area AA is in a shape similar to a parallelogram, that is, the area of the display area AA, which is close to the left frame BB3 and the right frame BB4, forms a special-shaped display area AA1. Fig. 2 shows that a side of the first display edge BY1 near the right frame BB4 protrudes from the second display edge BY2, and a side of the second display edge BY2 near the left frame BB3 protrudes from the first display edge BY1. In fig. 1 and 2, the display area AA has a shape similar to a parallelogram, and the area of the display area AA near the left frame BB3 and the right frame BB4 forms a special-shaped display area AA1.
For the special-shaped display area AA1, in the related art, the multiplexer DE for driving the pixels in the special-shaped display area AA1 is usually disposed on the left frame BB3 or the right frame BB4, but this disposition widens the width of the left frame BB3 or the right frame BB4, so that the narrow frame cannot be realized for the left frame and the right frame, or all the multiplexers DE may be disposed on the lower frame, but since the display panel is the special-shaped display panel, the multiplexer DE for driving the special-shaped display area is also disposed on the lower frame, and similarly, the width of the lower frame in the row direction is increased. The multiplexer DE for driving the special-shaped display area AA1 originally arranged along the left frame and the right frame is arranged on the upper frame and used for driving pixels in the special-shaped display area, so that the occupied space of the multiplexer for driving the special-shaped display area AA1 in the left frame BB3, the right frame BB4 or the lower frame BB2 is reduced, and therefore the left frame and the right frame or the lower frame BB2 can be compressed, and a narrow frame is realized.
By comparison, the left and right frames in the special-shaped display panel in the related art need at least 3mm, wherein the multiplexer occupies about 1.5mm. By adopting the technical scheme of the invention, the left and right frames can be compressed by about 50% to achieve the real extremely narrow frame of 1.5mm.
In some alternative embodiments, with continued reference to fig. 1, 2 and 3, fig. 3 is a schematic plan view of another display panel according to the present invention.
The multiplexer DE includes a first multiplexer DE1, and the first multiplexer DE1 is located on the upper frame BB1; the display panel 100 further includes a first trace 211, one end of the first trace 211 is electrically connected to the input end of the first multiplexer DE1, and the other end is electrically connected to the driving chip IC; the non-display area BB further includes a left frame BB3 and a right frame BB4 disposed opposite to each other along the row direction X, and at least a portion of the first trace 211 is located on the left frame BB3 or the right frame BB4; alternatively, at least a portion of the first trace 211 is located in the display area AA.
In fig. 1, the first multiplexer DE1 is located at the upper frame BB1; the display panel 100 further includes a first trace 211, one end of the first trace 211 is electrically connected to the input end of the first multiplexer DE1, and the other end is electrically connected to the driving chip IC; the non-display area BB further comprises a left frame BB3 and a right frame BB4 which are oppositely arranged along the row direction X, at least part of the first wires 211 are positioned on the left frame BB3, all the optional first wires 211 are positioned on the left frame BB3, and part of the first wires 211 can also be positioned on the left frame BB3; in fig. 2, the first multiplexer DE1 is located in the upper frame BB1; the display panel 100 further includes a first trace 211, one end of the first trace 211 is electrically connected to the input end of the first multiplexer DE1, and the other end is electrically connected to the driving chip IC; the non-display area BB further includes a left frame BB3 and a right frame BB4 that are disposed opposite to each other along the row direction X, at least a portion of the first traces 211 are located on the right frame BB4, and optionally all of the first traces 211 are located on the right frame BB4, or a portion of the first traces 211 may be located on the right frame BB4. It can be appreciated that, according to the practical situation, the first routing 211 may be disposed on the left frame BB3 or the right frame BB4, and according to the principle of less routing, for the parallelogram display area AA, if the side of the first display edge BY1 near the left frame BB3 protrudes the second display edge BY2, then the first multiplexer DE1 may be disposed on the side of the upper frame BB1 near the left frame BB3, so as to reduce the routing length of the first routing 211; if the side of the first display edge BY1 near the right frame BB4 protrudes from the second display edge BY2, the first multiplexer DE1 may be disposed on the side of the upper frame BB1 near the right frame BB4, so as to reduce the wiring length of the first wiring 211.
Referring to fig. 3, in fig. 3, the first multiplexer DE1 is located on the upper frame BB1, the display panel 100 further includes a first trace 211, one end of the first trace 211 is electrically connected to an input end of the first multiplexer DE1, and the other end is electrically connected to the driving chip IC; the non-display area BB further includes a left frame BB3 and a right frame BB4 that are disposed opposite to each other along the row direction X, and at least a portion of the first trace 211 is located in the display area AA, so that the first multiplexer DE1 and the first trace 211 do not need to be disposed in the left frame BB3 or the right frame BB4, and can further compress the left frame BB3 or the right frame BB4, which is more beneficial to implementing a narrow frame.
In some alternative embodiments, with continued reference to fig. 1 and 2, the first trace 211 is located on the left frame BB3, and the first trace 211 extends along the first direction Z1 and is the same as the extending direction of the left frame BB3; or, the first trace 211 is located on the right frame BB4, and the first trace 211 extends along the second direction Z2, and the extending direction is the same as the extending direction of the right frame BB4; the first direction Z1 and the row direction X have a first included angle which is larger than 0 degrees, the first direction Z1 and the column direction Y have a second included angle which is larger than 0 degrees; the second direction Z2 has a third angle with the row direction X, the third angle is larger than 0 °, the second direction Z2 has a fourth angle with the column direction Y, and the fourth angle is larger than 0 °.
In fig. 1, the first trace 211 is located in the left frame BB3, the first trace 211 extends along the first direction Z1, and is identical to the extending direction of the left frame BB3, the first direction Z1 has a first included angle with the row direction X, the first included angle is greater than 0 °, the first direction Z1 has a second included angle with the column direction Y, and the second included angle is greater than 0 °, because the first trace 211 is disposed in the left frame BB3, the length of the first trace 211 is shortest when the extending directions of the first trace 211 and the left frame BB3 are identical, and the occupied space is smaller, which is beneficial to compressing the left frame BB3 and realizing a narrow frame.
In fig. 2, the first trace 211 is located in the right frame BB4, the first trace 211 extends along the second direction Z2, and the extending direction is the same as the extending direction of the right frame BB4, the second direction Z2 has a third included angle with the row direction X, the third included angle is greater than 0 °, the second direction Z2 has a fourth included angle with the column direction Y, and the fourth included angle is greater than 0 °, because the first trace 211 is disposed in the right frame BB4, the length of the first trace 211 is the shortest when the extending directions of the first trace 211 and the right frame BB4 are the same, and the occupied space is smaller, which is beneficial to compressing the right frame BB4 and realizing a narrow frame.
In some alternative embodiments, with continued reference to FIG. 1 and with reference to FIGS. 4 and 5, FIG. 4 is a cross-sectional view taken along A-A 'in FIG. 1 and FIG. 5 is a further cross-sectional view taken along A-A' in FIG. 1. The display panel 100 further includes a second trace 311 located on the upper frame BB1 and extending along the row direction X, where one end of the second trace 311 is electrically connected to the input end of the first multiplexer DE1, and the other end is electrically connected to the first trace 211; the display panel 100 includes a substrate 20, a first metal layer M1 located at one side of the substrate 20, and a second metal layer M2 located at one side of the first metal layer M1 away from the substrate 20; the first wiring 211 is in the same layer as the second metal layer M2, and the second wiring 311 is in the same layer as the first metal layer M1; or the first wiring 211 is in the same layer as the second metal layer M2, part of the second wiring 311 is in the same layer as the first metal layer M1, and part of the second wiring 311 is in the same layer as the second metal layer M2.
In fig. 4 and 5, the display panel 100 is taken as an example of the liquid crystal display panel 100, and the display panel 100 may be an OLED display panel 100, which is not shown. The display panel 100 in fig. 4 and 5 includes a color film substrate 1 and an array substrate 2, and liquid crystal molecules 3 interposed between the color film substrate 1 and the array substrate 2, the array substrate 2 includes a substrate 20, a first metal layer M1 located at one side of the substrate 20, a second metal layer M2 located at one side of the first metal layer M1 away from the substrate 20, a pixel electrode 23 located at one side of the driving circuit away from the substrate 20, an insulating layer located at one side of the pixel electrode 23 away from the substrate 20, and a common electrode 24 located at one side of the insulating layer away from the substrate 20, where the common electrode 24 may be provided in whole layer, and an electric field formed by a voltage difference between the pixel electrode 23 and the common electrode 24 controls the liquid crystal molecules 3 to deflect for display. The driving circuit includes a transistor T having a gate electrode 21, a source electrode, a drain electrode 22, and an active layer, the gate electrode 21 being located on the first metal layer M1, the source electrode and the drain electrode 22 being located on the second metal layer M2, the drain electrode 22 of the transistor T being electrically connected to the pixel electrode 23. Only one transistor T is schematically shown in fig. 4 and 5, it being understood that each pixel corresponds to at least one transistor T.
In fig. 1, the first multiplexer DE1 is located in the upper frame BB1, the upper frame BB1 further has a second trace 311, one end of the second trace 311 is electrically connected to the input terminal of the first multiplexer DE1, the other end is electrically connected to the first trace 211, and the first trace 211 is located in the left frame BB3.
In fig. 4, the first trace 211 is in the same layer as the second metal layer M2, the second trace 311 is in the same layer as the first metal layer M1, it can be understood that a shift register (not shown in the drawing) is further required to be disposed in the left frame BB3 and the right frame BB4, and the trace connected to the pixel in the display area AA by the shift register is generally disposed in the first metal layer M1, so that the first trace 211 may be disposed in the second metal layer M2 at this time to avoid a short circuit, and optionally, when the first trace 211 and other traces in the left frame BB3 are disposed in the second metal layer M2, the traces may be connected by a bridge manner to prevent a short circuit.
In fig. 5, the first trace 211 is in the same layer as the second metal layer M2, a portion of the second trace 311 is in the same layer as the first metal layer M1, and a portion of the second trace 311 is in the same layer as the second metal layer M2. It can be understood that a shift register (not shown) is further required to be disposed in the left frame BB3 and the right frame BB4, and the wirings for connecting the shift register with the pixels in the display area AA are typically disposed in the first metal layer M1, so that the first wirings 211 may be disposed in the second metal layer M2 at this time to avoid a short circuit, and optionally, the first wirings 211 and other wirings in the left frame BB3 may be connected by a bridge manner when both the first wirings 211 and the other wirings in the left frame BB3 are disposed in the second metal layer M2. In this embodiment, the second wires 311 are disposed on the first metal layer M1 and the second metal layer M2, which can reduce the occupied space of the second wires 311, reduce the width of the upper frame BB1, and facilitate the realization of a narrow frame.
In some alternative embodiments, with continued reference to fig. 3, the first trace 211 is located in the display area AA;
the display device further comprises a second wire 311 which is positioned on the upper frame BB1 and extends along the row direction X, one end of the second wire 311 is electrically connected with the input end of the first multiplexer DE1, and the other end of the second wire 311 is electrically connected with the first wire 211.
In fig. 3, the first multiplexer DE1 is located in the upper frame BB1, and the display panel 100 further includes a first trace 211, where one end of the first trace 211 is electrically connected to an input terminal of the first multiplexer DE1, and the other end is electrically connected to the driving chip IC; the first trace 211 is located in the display area AA, so that the first multiplexer DE1 and the first trace 211 do not need to be disposed in the left frame BB3 or the right frame BB4, and compression of the left frame BB3 or the right frame BB4 can be further achieved, which is more beneficial to realizing a narrow frame.
Optionally, referring to fig. 6, fig. 6 is a cross-sectional view taken along the direction B-B' in fig. 3, in which the first trace 211 is in the same layer as the second metal layer M2 in fig. 6, a portion of the second trace 311 is in the same layer as the first metal layer M1, and a portion of the second trace 311 is in the same layer as the second metal layer M2. It is understood that, in general, the data line 111 is also located in the second metal layer M2, so that different patterns are filled in the data line 111 and the first line 211 in order to distinguish the first line 211 from the data line 111. A part of the second wires 311 are arranged on the first metal layer M1, and a part of the second wires 311 are arranged on the second metal layer M2, so that the second wires 311 are distributed on different metal layers to avoid short circuit; and the second wiring 311 is arranged on the first metal layer M1 and the second metal layer M2, so that the occupied space of the second wiring 311 can be reduced, the width of the upper frame BB1 is reduced, and the narrow frame is realized.
In some alternative embodiments, referring to fig. 7, fig. 7 is a schematic plan view of still another display panel provided in the present invention, where the display area AA includes a special-shaped display area AA1 adjacent to the left frame BB3 or the right frame BB4, and an intermediate display area AA2 adjacent to the special-shaped display area AA 1; the number of pixels in the column direction Y in the special-shaped display area AA1 is smaller than the number of pixels in the column direction Y in the intermediate display area AA2; the first trace 211 is located in the middle display area AA2.
Specifically, referring to fig. 7, a side of the first display edge BY1 near the left frame BB3 protrudes from the second display edge BY2, a side of the second display edge BY2 near the right frame BB4 protrudes from the first display edge BY1, the area of the display area AA near the left frame BB3 and the right frame BB4 forms a special-shaped display area AA1, and in the column direction Y, the number of pixels connected to the data line 111 in the special-shaped display area AA1 is smaller than the number of pixels connected to the data line 111 in the middle display area AA2, which are not shown in fig. 7. In this embodiment, the first multiplexer DE1 is disposed in the upper frame BB1, and the first trace 211 connecting the first multiplexer DE1 and the driving chip IC is disposed in the middle display area AA2, so that the first trace 211 does not need to be wound from the left frame BB3 or the right frame BB4, which is beneficial to implementing a narrow frame for the left frame BB3.
In some alternative embodiments, with continued reference to fig. 7, the number of columns of pixels in the shaped display area AA1 is a, and the ratio of the number of inputs to the number of outputs of each first multiplexer DE1 in the row direction X is 1: the n, a/n first traces 211 are located in the middle display area AA2, where n is a positive integer greater than 1.
It will be appreciated that the ratio of the number of inputs to the number of outputs of each first multiplexer DE1 is 1: n, that is, the ratio is n, in fig. 7, the ratio of the number of input ends to the number of output ends is only schematically illustrated as 1:2, but may also be 1:4 or 1:6, which is not limited herein, and the number of pixel columns in the special-shaped display area AA1 is a, so that a data lines 111 are required, and according to the ratio of the first multiplexers DE1, that is, a/n first multiplexers DE1 are required, the corresponding first routing lines 211, that is, a/n first routing lines 211 are located in the middle display area AA2, so that the first routing lines 211 do not need to be wound from the left frame BB3 or the right frame BB4, which is beneficial to realizing a narrow frame for the left frame BB3.
In some alternative embodiments, with continued reference to fig. 7, the first traces 211 are located between adjacent data lines 111, and the spacing between any two adjacent first traces 211 is equal.
In fig. 7, the first wires 211 are located between adjacent data lines 111, the distances between any two first wires 211 are equal, the first wires 211 and the data lines 111 can be manufactured in the same process, and the distances between any two first wires 211 are equal, so that the manufacturing process can be simplified.
Alternatively, the pixel columns of the middle display area AA2 may be equally divided into a/n groups, and the first wirings 211 are disposed at adjacent positions of every two groups, so that the manufacturing process can be simplified.
In some alternative embodiments, referring to fig. 8 and 9, fig. 8 is a schematic plan view of a display panel according to another embodiment of the present invention, fig. 9 is a partial enlarged view of an area M in fig. 8, and adjacent first traces 211 in fig. 8 form a first trace group 411, where the first trace group 411 is located between adjacent data lines 111.
Fig. 8 and 9 schematically show that two adjacent first wirings 211 form a first wiring 211, and the number of first wirings 211 forming the first wiring group 411 is not particularly limited herein. Of course, the number of the first wires 211 in the first wire group 411 cannot be too large, the first wire group 411 is located between the adjacent data wires 111, the adjacent pixel spacing in the row direction X is determined, the first wire group 411 is disposed between the adjacent data wires 111, and the first wires 211 themselves have a certain line width, so that the width of the first wire group 411 cannot be larger than the spacing between two pixels without affecting the pixel opening, i.e., the number of the first wires 211 in the first wire group 411 is too large, otherwise, the pixel opening is affected. The number of first traces 211 in the optional first trace group 411 is 2, 3, or 4.
The adjacent first wires 211 form a first wire group 411, and the first wire group 411 is located between the adjacent data wires 111, so that the first wires 211 can be manufactured simultaneously in the process of manufacturing the data wires 111, and the manufacturing process is simplified.
In some alternative embodiments, referring to fig. 10, fig. 10 is a schematic plan view of another display panel provided by the present invention, in fig. 10, a pitch of adjacent first routing groups 411 is Z, z=b×d/k, a number of first routing lines 211 in each first routing group 411 is (a/n)/k, where b is a number of pixel columns in the middle display area AA2, d is a pitch of two adjacent columns of pixel columns, and k is a number of first routing groups 411.
Optionally, a plurality of adjacent first wires 211 form a first wire group 411, where the number of the first wire groups 411 is k, and at this time, the first wire groups 411 are evenly distributed in the middle display area AA2, and the distance z=b×d/k between the adjacent first wire groups 411 can make the wires in the middle display area AA2 more uniform, so that the manufacturing process can also be simplified. Meanwhile, the number of the first wirings 211 in each first wiring group 411 can be calculated to be (a/n)/k, which facilitates wiring.
In some alternative embodiments, with continued reference to fig. 1, 2, 3, 7, 8, 10 and 11, fig. 11 is a schematic plan view of another display panel provided in the present invention, and the display area AA is a parallelogram or trapezoid, where the first display edge BY1 is parallel to the second display edge BY 2.
The display area AA in fig. 1, 2, 3, 7, 8, and 10 is a parallelogram, and the display area AA in fig. 11 is a trapezoid.
It should be noted that, when the display area AA is trapezoidal, if the length of the first display edge BY1 is greater than that of the second display edge BY2, the present invention is applicable to the present invention, that is, one side of the first display edge BY1, which is close to the left frame BB3, protrudes from the second display edge BY2, while one side of the first display edge BY1, which is close to the right frame BB4, protrudes from the second display edge BY2, the display area AA is in a shape similar to the trapezoid, that is, the area of the display area AA, which is close to the left frame BB3 and the right frame BB4, forms the special-shaped display area AA1, so that the multiplexers DE may be disposed at the positions of the upper frame BB1, which are close to the left frame BB3, and the upper frame BB1, which are close to the right frame BB4, and, optionally, the connection mode of the corresponding multiplexers DE and the driving chip IC is applicable to any embodiment described above, which is omitted herein.
In the invention, the part of multiplexer DE is arranged in the upper frame BB1, and is suitable for the display panel 100 with the parallelogram display area AA or suitable for the display panel 100 with the trapezoid display area AA, so that the occupied space of the left frame BB3 or the right frame BB4 can be reduced, and the narrow frames of the left frame BB3 and the right frame BB4 are realized.
In some alternative embodiments, please refer to fig. 12, fig. 12 is a schematic plan view of a display device according to an embodiment of the present invention, and a display device 1000 according to the present embodiment includes a display panel 100 according to the above embodiment of the present invention. The embodiment of fig. 12 is only an example of a mobile phone, and the display device 1000 is described, but it is to be understood that the display device 1000 provided in the embodiment of the present invention may be any other display device 1000 having a display function, such as a computer, a television, a vehicle-mounted display device, etc., which is not particularly limited in the present invention. The display device 1000 provided in the embodiment of the present invention has the beneficial effects of the display panel 100 provided in the embodiment of the present invention, and the specific description of the display panel 100 in the above embodiments may be referred to in the embodiments, and the description of the embodiment is omitted herein.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:
the display panel is a special-shaped display panel and comprises a first display edge close to an upper frame and a second display edge close to a lower frame; in the column direction, the first display edge and the second display edge are at least partially misaligned, and the display area comprises a plurality of data lines which are distributed in the row direction and extend in the column direction; the display panel also comprises a multiplexer and a driving chip, wherein the input end of the multiplexer is electrically connected with the driving chip, and the output end of the multiplexer is electrically connected with the data line in the display area; at least part of the multiplexer is located at the upper rim. In the related art, the first display edge and the second display edge are at least partially misaligned, for the special-shaped display area corresponding to the second display edge protruding from the first display edge, the data line for driving the pixels is connected with the driving chip through the multiplexers arranged in the left frame and the right frame, the multiplexers are arranged along the left frame and the right frame, the data line connected with the multiplexers can extend along the column direction, and the multiplexers arranged in the left frame and the right frame are also required to be wound when connected with the driving chip, and the winding is also arranged in the left frame and the right frame, so that the left frame and the right frame cannot be compressed, and therefore a narrow frame cannot be realized.
While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (12)
1. A display panel, comprising: a display region and a non-display region at least partially surrounding the display region, the display region including a display edge, the non-display region including an upper bezel and a lower bezel disposed opposite in a column direction, the display panel including a first display edge adjacent to the upper bezel and a second display edge adjacent to the lower bezel;
along the column direction, the first display edge is at least partially misaligned with the second display edge;
the display area comprises a plurality of data lines which are distributed along the row direction and extend along the column direction;
the display panel also comprises a multiplexer and a driving chip, wherein the input end of the multiplexer is electrically connected with the driving chip, and the output end of the multiplexer is electrically connected with the data line in the display area;
at least part of the multiplexer is positioned on the upper frame;
the multiplexer comprises a first multiplexer, and the first multiplexer is positioned on the upper frame;
the display panel further comprises a first wiring, one end of the first wiring is electrically connected with the input end of the first multiplexer, and the other end of the first wiring is electrically connected with the driving chip;
the non-display area further comprises a left frame and a right frame which are oppositely arranged along the row direction, and the display area comprises a special-shaped display area close to the left frame or the right frame and a middle display area adjacent to the special-shaped display area; the first wiring is located in the middle display area.
2. The display panel of claim 1, wherein at least a portion of the first trace is located on the left bezel or the right bezel;
or at least part of the first wirings are positioned in the display area.
3. The display panel of claim 2, wherein the first trace is located at the left frame, and the first trace extends along a first direction and is in the same direction as the left frame;
or, the first wire is located at the right frame, the first wire extends along the second direction, and the extending direction is the same as the extending direction of the right frame;
the first direction and the row direction have a first included angle which is larger than 0 degrees, the first direction and the column direction have a second included angle which is larger than 0 degrees; the second direction has a third included angle with the row direction, the third included angle is larger than 0 degrees, the second direction has a fourth included angle with the column direction, and the fourth included angle is larger than 0 degrees.
4. The display panel according to claim 3, further comprising a second trace located on the upper frame and extending in a row direction, wherein one end of the second trace is electrically connected to an input terminal of the first multiplexer, and the other end of the second trace is electrically connected to the first trace;
the display panel comprises a substrate base plate, a first metal layer positioned at one side of the substrate base plate, and a second metal layer positioned at one side of the first metal layer far away from the substrate base plate;
the first wire is in the same layer as the second metal layer, and the second wire is in the same layer as the first metal layer;
or the first wire and the second metal layer are in the same layer, part of the second wire and the first metal layer are in the same layer, and part of the second wire and the second metal layer are in the same layer.
5. The display panel of claim 2, wherein the display panel comprises,
the first multiplexer is characterized by further comprising a second wire which is positioned on the upper frame and extends along the row direction, one end of the second wire is electrically connected with the input end of the first multiplexer, and the other end of the second wire is electrically connected with the first wire.
6. The display panel of claim 5, wherein the display panel comprises,
the number of pixels in the column direction in the special-shaped display area is smaller than the number of pixels in the column direction in the intermediate display area.
7. The display panel of claim 6, wherein the number of columns of pixels in the shaped display area is a, and the ratio of the number of input ends to the number of output ends of each of the first multiplexers in the row direction is 1: and n, a/n first wirings are positioned in the middle display area, and n is a positive integer greater than 1.
8. The display panel according to claim 7, wherein the first wirings are located between adjacent data lines, and a pitch between any two adjacent first wirings is equal.
9. The display panel of claim 8, wherein adjacent ones of the first traces form a first set of traces, the first set of traces being located between the adjacent data lines.
10. The display panel of claim 9, wherein a pitch between adjacent first wire groups is Z, z=b×d/k, a number of the first wires in each first wire group is (a/n)/k, where b is a number of pixel columns in the intermediate display area, d is a pitch between adjacent two columns of pixel columns, and k is a number of the first wire groups.
11. The display panel of claim 1, wherein the display area is parallelogram or trapezoid, wherein the first display edge is parallel to the second display edge.
12. A display device comprising the display panel according to any one of claims 1 to 11.
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