CN113341602A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN113341602A CN113341602A CN202110587995.6A CN202110587995A CN113341602A CN 113341602 A CN113341602 A CN 113341602A CN 202110587995 A CN202110587995 A CN 202110587995A CN 113341602 A CN113341602 A CN 113341602A
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- 239000000758 substrate Substances 0.000 title claims abstract description 107
- 230000008054 signal transmission Effects 0.000 claims description 9
- 239000004973 liquid crystal related substance Substances 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 6
- 238000005286 illumination Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 abstract description 4
- 238000000034 method Methods 0.000 description 14
- 239000010408 film Substances 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008094 contradictory effect Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention belongs to the technical field of display panels, and discloses an array substrate, a display panel and a display device, wherein the array substrate comprises an effective display area and a non-display area arranged around the effective display area; the non-display area comprises a chip bonding area and an array substrate row driving circuit; the chip bonding area is arranged in parallel along one side of the effective display area; the array substrate row driving circuit is arranged in parallel along one side, away from the effective display area, of the chip joint area. According to the invention, by arranging the array substrate, the data lines extending from the chip joint area can be directly connected to the effective display area without passing through the array substrate row driving circuit, and the gate lines extending from the array substrate row driving circuit can also be arranged in a detour way relative to the chip joint area, so that the cross overlapping area of metal lines is reduced, the signal load is reduced, the stability of the display panel can be effectively improved, and the power consumption is reduced.
Description
Technical Field
The invention relates to the technical field of display panels, in particular to an array substrate, a display panel and a display device.
Background
At present, a narrow frame is a development direction of a TFT-LCD (Thin Film Transistor-Liquid Crystal Display) Display panel.
In a common narrow frame technology, a Gate Driver on Array (GOA) technology is adopted to reduce the size of a GOA unit as much as possible, so as to achieve the purpose of a narrow frame. In order to further reduce the frame, the Bonding areas of the GOA and the Bonding chip are arranged on the same side, the GOA unit is the inner side of the panel relative to the Bonding Area, Gate signal output of the GOA needs to pass through an AA (Active Area, effective display) Area, and a Data line extending from the Bonding Area passes through the GOA Area, so that the crossing Area of two layers of metal lines is increased seriously, the load of a panel signal is caused, and further the power consumption of the panel is high and the stability is poor.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide an array substrate, a display panel and a display device, and aims to solve the technical problems of high power consumption and poor stability of a narrow-frame display panel in the prior art.
In order to achieve the above object, the present invention provides an array substrate, which includes an effective display area and a non-display area surrounding the effective display area; the non-display area comprises a chip bonding area and an array substrate row driving circuit;
the chip bonding areas are arranged in parallel along one side of the effective display area;
the array substrate row driving circuit is arranged in parallel along one side, away from the effective display area, of the chip joint area.
Optionally, the non-display area further includes a plurality of multiplexers, the multiplexers are disposed on two opposite sides of the active display area, and one side where the chip bonding area is disposed is perpendicular to two sides where the multiplexers are disposed;
the array substrate row driving circuit comprises a plurality of array substrate row driving units, and the array substrate row driving units are connected with the multiplexer through non-display area gate lines;
the multiplexer is used for receiving the output signals of the array substrate row driving units, converting the output signals into a plurality of sub-output signals and outputting the sub-output signals to the display area gate lines in the effective display area.
Optionally, the display area gate lines are parallel to one side of the effective display area adjacent to the chip bonding area, and the display area gate lines are spaced from each other by a preset length;
the non-display area gate lines are arranged to avoid the chip bonding area, and the non-display area gate lines are arranged along two opposite sides of the effective display area.
Optionally, the controlled end of the chip bonding area is connected to the control end of the array substrate row driving circuit;
and the array substrate row driving circuit outputs driving control signals to the chip bonding area.
Optionally, the array substrate row driving units are connected with each other and perform signal transmission.
Optionally, the chip bonding region includes a plurality of chips, and the chips are connected to each other and perform signal transmission.
Optionally, each chip is connected to the active display area through a data line, and the data line is perpendicular to the gate line of the display area.
Optionally, the multiplexer is a thin film transistor switch.
In addition, to achieve the above object, the present invention also provides a display panel including: the color film substrate and the array substrate are arranged oppositely, and liquid crystal is filled between the color film substrate and the array substrate.
Further, to achieve the above object, the present invention also proposes a display device including: the backlight unit and the display panel are as described above;
the backlight unit is used for carrying out backlight illumination on the display panel. .
The array substrate comprises an effective display area and a non-display area arranged around the effective display area; the non-display area comprises a chip bonding area and an array substrate row driving circuit; the chip bonding area is arranged in parallel along one side of the effective display area; the array substrate row driving circuit is arranged in parallel along one side, away from the effective display area, of the chip joint area. According to the invention, by arranging the array substrate, the data lines extending from the chip joint area can be connected to the effective display area without passing through the array substrate row driving circuit, and the gate lines extending from the array substrate row driving circuit can also be arranged in a winding way relative to the chip joint area, so that the cross overlapping area of metal lines is reduced, the signal load is reduced, the stability of the display panel can be effectively improved, and the power consumption is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic top view of an array substrate according to an embodiment of the invention;
fig. 2 is a schematic top view of an array substrate according to another embodiment of the invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | Non-display |
111～11N | Array substrate |
| 2 | |
121～12N | Chip and method for manufacturing the same |
| 11 | Array substrate |
14 | Non-display |
| 12 | |
21 | Display |
| 13 | Multiplexer |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should be considered to be absent and not within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic view of a first structure of an array substrate according to a first embodiment of the invention; the embodiment of the invention provides an array substrate, which comprises an effective display area 2 and a non-display area 1 arranged around the effective display area 2; the non-display area 1 comprises a chip bonding area 12 and an array substrate row driving circuit 11; wherein,
the Chip Bonding regions 12(Integrated Circuit Chip Bonding, IC Bonding, Chip Bonding regions) are arranged in parallel along one side of the Active Area 2(Active Area);
referring to fig. 1, the chip bonding region 12 is adjacent to the active display region 2 and is disposed along a horizontal direction of the active display region 2. Data (Date) lines and Gate (Gate) lines in the effective display area 2 are perpendicular to each other, and data lines extending from the chip bonding area 12 are arranged in the perpendicular direction and can be directly connected to the effective display area 2 without crossing the array substrate row driving circuit 11 area.
The array substrate row driving circuit 11 is arranged in parallel along one side of the chip bonding area 12 away from the effective display area 2.
Referring to fig. 1, the array substrate row driving circuit 11 and the effective display area 2 are respectively located at two sides of the chip bonding area 12, and are arranged along a horizontal direction of the effective display area 2. The distance between the array substrate row driving circuit 11 and the chip bonding area 12 can be set according to actual wiring requirements. The gate lines extending from the array substrate row driving circuit 11 may bypass the die bonding area 12 and extend along both sides of the array substrate, and the gate lines may be finally connected to one ends of the gate lines at both opposite sides of the active display area 2, respectively.
It should be understood that, in the prior art, the array substrate row driving circuit is usually disposed on two opposite sides of the effective display area, so that a plurality of parallel gate lines extending from the array substrate row driving circuit can directly pass through the effective display area, the chip bonding area and the array substrate row driving circuit are disposed on the same side of the effective display area, and the chip bonding area is disposed on one side of the array substrate row driving circuit away from the effective display area, in such a manner that a data line extending from the chip bonding area needs to pass through the array substrate row driving circuit if the data line is to be connected to the effective display area, thereby forming a crossing area of the gate lines and the data line in the array substrate row driving circuit area, and increasing a load of a signal.
It is easy to understand that, in the embodiment, the data line extending from the chip bonding area 12 does not pass through the array substrate row driving circuit 11 area, and the gate line extending from the array substrate row driving circuit 11 is disposed by detouring relative to the chip bonding area 12, and therefore does not pass through the chip bonding area 12, so that there is no crossing area between the data line and the gate line in the non-display area 1, which effectively reduces the signal load and can improve the stability of the display panel. Meanwhile, since the array substrate row driving circuit 11 and the chip bonding region 12 are disposed on the same side, the area of the other side of the display panel can be reduced.
Further, the non-display area 1 further includes a plurality of multiplexers 13, the multiplexers 13 are disposed on two opposite sides of the active display area 2, and one side where the chip bonding area 12 is disposed is perpendicular to two sides where the multiplexers 13 are disposed;
referring to fig. 2, the multiplexers 13 are disposed adjacent to both sides of the effective display area 2 and in a vertical direction.
The array substrate row driving circuit 11 comprises a plurality of array substrate row driving units, and the array substrate row driving units are connected with the multiplexer 13 through non-display area gate lines 14;
it should be noted that although the patterns of the array substrate row driving circuit 11 and the die bonding area 12 in fig. 2 are different from the patterns of the array substrate row driving circuit 11 and the die bonding area 12 in fig. 1, the array substrate row driving circuit 11 and the die bonding area 12 in fig. 2 are the same as those in fig. 1, and the patterns of the above-mentioned devices in fig. 2 are changed to highlight the internal devices of the array substrate row driving circuit 11 and the die bonding area 12.
It should be noted that, referring to fig. 2, the array substrate row driving units 111 to 11N are not specifically set in the embodiment, and may be set according to actual requirements in specific implementation. The output signal of the array substrate row driving unit can control each pixel in the effective display area 2 to display.
The multiplexer 13 is configured to receive an output signal of the row driving unit of the array substrate, convert the output signal into a plurality of sub-output signals, and output each sub-output signal to the display area gate line 21 in the effective display area 2.
It is easy to understand that the multiplexer 13 can multiplex a single signal output by the row driving unit of the array substrate into a plurality of signals, so as to achieve the purpose of reducing the number of the non-display area gate lines 14, that is, by the multiplexing function of the multiplexer 13, the output signal of one non-display area gate line 14 can be converted into a plurality of output signals, and only a few non-display area gate lines 14 are needed to output the plurality of output signals, which is beneficial to the narrowing of the frame of the display panel.
Further, the display area gate lines 21 are parallel to one side of the effective display area 2 adjacent to the chip bonding area 12, the display area gate lines 21 are spaced apart from each other by a predetermined length, the non-display area gate lines 14 are spaced from the chip bonding area 12, and the non-display area gate lines 14 are disposed along two opposite sides of the effective display area 2. The preset length is set according to the actual requirement of the array substrate, and this embodiment does not limit this.
It is easily understood that, referring to fig. 2, the non-display area gate lines 14 in fig. 2 are disposed around the chip bonding area 12, and the crossing area of the gate lines and the data lines is effectively avoided.
Further, the controlled end of the chip bonding area 12 is connected to the control end of the array substrate row driving circuit 11;
the array substrate row driving circuit 11 outputs a driving control signal to the chip bonding region 12.
It should be understood that, since the array substrate row driving circuit 11 is disposed close to the die bonding area 12, signal transmission between the array substrate row driving circuit 11 and the die bonding area 12 is also facilitated.
Furthermore, the array substrate row driving units are connected with each other and perform signal transmission.
It should be understood that, besides the signal output control, there is also a connection relationship between the array substrate row driving units inside the array substrate row driving circuit 11 (not shown in fig. 2, but does not affect the explanation of the embodiment), and signal transmission can be performed between the array substrate row driving units.
Further, the chip bonding region 12 includes a plurality of chips, and the chips are connected to each other and perform signal transmission.
It should be understood that, referring to fig. 2, the chips 121 to 12N, the specific number of the chips is not set in this embodiment, and the specific implementation may be set according to actual requirements. The chips have a connection relationship (not shown in fig. 2, but does not affect the explanation of the embodiment), and signal transmission can be performed between the chips.
Further, each chip is connected to the effective display area 2 through a data line, and the data line is perpendicular to the display area gate line 21.
It is easy to understand that the data lines are connected to the pixels in the effective display area 2, and if the gate lines connected to the pixels receive corresponding control signals, the data signals output by the chips can be written into the pixels through the data lines, so as to control the transmittance of different liquid crystals, so that the display panel can display corresponding images.
Further, the multiplexer 13 is a thin film transistor switch.
Preferably, the multiplexer 13 is a Thin Film Transistor switch (Thin Film Transistor), and the type of the multiplexer 13 may be selected according to actual requirements in a specific implementation, which is not limited in this embodiment.
This embodiment is through setting up above-mentioned array substrate for the data line that extends by the chip joint area can not pass through array substrate row drive circuit lug connection to effective display area, and the gate line that array substrate row drive circuit extends also need not to pass through the chip joint area, has reduced the metal wire cross overlapping area, has reduced signal load, can effectively promote display panel's stability and reduce the power consumption.
In addition, the embodiment of the invention also provides a display panel, which comprises a color film substrate and the array substrate.
The color film substrate and the array substrate are arranged oppositely, liquid crystal is filled between the color film substrate and the array substrate, and the color film substrate and the frame of the array substrate are sealed through frame glue.
Since the display panel adopts all the technical solutions of all the embodiments, at least all the advantages brought by the technical solutions of the embodiments are achieved, and no further description is given here
In addition, an embodiment of the present invention further provides a display device, where the display device includes: the backlight unit and the display panel are as described above;
the backlight unit is used for carrying out backlight illumination on the display panel.
It is easy to understand that the display device can be any product or component with a display function, such as a liquid crystal display, electronic paper, a computer, a television, a notebook computer, a digital photo frame, a navigator, and the like.
Since the display device adopts all the technical solutions of all the embodiments, at least all the beneficial effects brought by the technical solutions of the embodiments are achieved, and no further description is given here.
It should be understood that the above is only an example, and the technical solution of the present invention is not limited in any way, and in a specific application, a person skilled in the art may set the technical solution as needed, and the present invention is not limited thereto.
It should be noted that the above-described work flows are only exemplary, and do not limit the scope of the present invention, and in practical applications, a person skilled in the art may select some or all of them to achieve the purpose of the solution of the embodiment according to actual needs, and the present invention is not limited herein.
In addition, the technical details that are not described in detail in this embodiment may refer to the display panel provided in any embodiment of the present invention, and are not described herein again.
Further, it is to be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Further, it is to be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. An array substrate comprises an effective display area and a non-display area arranged around the effective display area; the non-display area comprises a chip bonding area and an array substrate row driving circuit;
the chip bonding areas are arranged in parallel along one side of the effective display area;
the array substrate row driving circuit is arranged in parallel along one side, away from the effective display area, of the chip joint area.
2. The array substrate of claim 1, wherein the non-display area further comprises a plurality of multiplexers, wherein multiplexers are disposed on opposite sides of the active display area, and wherein a side on which the chip bonding area is disposed is perpendicular to both sides on which the multiplexers are disposed;
the array substrate row driving circuit comprises a plurality of array substrate row driving units, and the array substrate row driving units are connected with the multiplexer through non-display area gate lines;
the multiplexer is used for receiving the output signals of the array substrate row driving units, converting the output signals into a plurality of sub-output signals and outputting the sub-output signals to the display area gate lines in the effective display area.
3. The array substrate of claim 2, wherein the display area gate lines are parallel to a side of the active display area adjacent to the die attach area, and the display area gate lines are spaced apart from each other by a predetermined length;
the non-display area gate lines are arranged to avoid the chip bonding area, and the non-display area gate lines are arranged along two opposite sides of the effective display area.
4. The array substrate of claim 3, wherein the controlled terminal of the die attach region is connected to the control terminal of the row driver circuit of the array substrate;
and the array substrate row driving circuit outputs driving control signals to the chip bonding area.
5. The array substrate of claim 4, wherein the row driving units of each array substrate are connected and perform signal transmission.
6. The array substrate of claim 4, wherein the die attach area comprises a plurality of dies, each die being connected to each other and performing signal transmission.
7. The array substrate of claim 6, wherein each chip is connected to the active display area by a data line, and the data line is perpendicular to the display area gate line.
8. The array substrate of claim 2, wherein the multiplexer is a thin film transistor switch.
9. A display panel, comprising: a color filter substrate and the array substrate according to any one of claims 1 to 8, wherein the color filter substrate is arranged opposite to the array substrate, and liquid crystal is filled between the color filter substrate and the array substrate.
10. A display device, characterized in that the display device comprises: a backlight unit and the display panel of claim 9;
the backlight unit is used for carrying out backlight illumination on the display panel.
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| CN202110587995.6A CN113341602B (en) | 2021-05-27 | 2021-05-27 | Array substrate, display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110587995.6A CN113341602B (en) | 2021-05-27 | 2021-05-27 | Array substrate, display panel and display device |
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| CN113341602A true CN113341602A (en) | 2021-09-03 |
| CN113341602B CN113341602B (en) | 2023-03-24 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114859590A (en) * | 2022-04-25 | 2022-08-05 | 北京京东方光电科技有限公司 | Display substrate and display device |
| CN115083300A (en) * | 2022-06-30 | 2022-09-20 | 厦门天马微电子有限公司 | Display panel and display device |
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| JP2007192968A (en) * | 2006-01-18 | 2007-08-02 | Epson Imaging Devices Corp | Liquid crystal display |
| CN101673015A (en) * | 2009-10-19 | 2010-03-17 | 友达光电股份有限公司 | Active-element array substrate and display panel |
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| CN115083300B (en) * | 2022-06-30 | 2023-11-24 | 厦门天马微电子有限公司 | Display panel and display device |
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| CN113341602B (en) | 2023-03-24 |
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