CN106292110A - A kind of array base palte, display floater, display device - Google Patents

A kind of array base palte, display floater, display device Download PDF

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Publication number
CN106292110A
CN106292110A CN201610849268.1A CN201610849268A CN106292110A CN 106292110 A CN106292110 A CN 106292110A CN 201610849268 A CN201610849268 A CN 201610849268A CN 106292110 A CN106292110 A CN 106292110A
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Prior art keywords
sub
pixel unit
pixel
unit group
polar curve
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高玉杰
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to CN201610849268.1A priority Critical patent/CN106292110A/en
Publication of CN106292110A publication Critical patent/CN106292110A/en
Priority to US15/744,214 priority patent/US10571768B2/en
Priority to PCT/CN2017/092778 priority patent/WO2018054137A1/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/52—RGB geometrical arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Abstract

The invention discloses a kind of array base palte, display floater, display device, in order to realize for sprite, each pixel charged state is consistent, prevents the generation of thin horizontal line.Array base palte includes pixel cell, data wire and the gate line that some arrays arrange, wherein: each pixel cell includes four sub-pixel unit；Each pixel cell is divided into the first sub-pixel unit group and the second sub-pixel unit group, and the first sub-pixel unit group includes that two adjacent sub-pixel unit, the second sub-pixel unit group include remaining two adjacent sub-pixel unit；First sub-pixel unit group and the second sub-pixel unit group are alternately arranged with on column direction in the row direction, in a column direction, arrange a data line between the first sub-pixel unit group and the second sub-pixel unit group；The data wire that two sub-pixel unit that the data wire of two sub-pixel unit connections that the first sub-pixel unit group includes and the second sub-pixel unit group include connect is different.

Description

A kind of array base palte, display floater, display device
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of array base palte, display floater, display device.
Background technology
Liquid crystal display panel of thin film transistor (Thin Film Transistor Liquid Crystal Display, TFT-LCD) being the most conventional flat faced display, display panels is little with its volume, low in energy consumption, radiationless, resolution is high Etc. advantage, it is widely used in modern digital Informationization Equipment.
The array base palte of prior art uses double grid (dual gate) design, dual gate design can reduce data wire Quantity, reduce the goods, materials and equipments cost of source electrode drive circuit, the dot structure design of dual gate design is as it is shown in figure 1, each picture Element unit includes redness (R), green (G), blue (B) and white (W) four sub-pixel unit, is connected with gate driver circuit Every grid (Gate) line is connected with the grid of TFT, every single data (Data) line being connected with source electrode drive circuit and the source of TFT Pole connects.When carrying out picture display, the same time, open the grid of a line TFT, be in one due to liquid crystal molecule for a long time The when of voltage bias, polarization phenomena can be produced, in order to solve this problem, use the side of polarity upset between frames Formula, it is achieved the display effect of pixel 2 upset (2dot-inversion) in display floater.
It is under Y two field picture that prior art realizes the core concept of pixel 2 upset mode in display floater, the most adjacent two Data polarity on root Data line is contrary；Polarity phase when the data on same Data line and Y two field picture under Y+1 two field picture Instead, and the data polarity on the most adjacent two Data lines is contrary, the polarity of the source drive signal of every Data line reception Alternate, and same Data line is contrary at the phase positive-negative polarity in the same time of adjacent two two field pictures, thus reach to prevent liquid Brilliant aging purpose, wherein Y is the integer more than or equal to 1.
In sum, prior art is when realizing 2dot-inversion, and the source drive that each data line receives is believed Number can the constantly change of height, height so that the power consumption of source electrode drive circuit rises, and temperature raises；Meanwhile, source drive signal The when of height change, having certain time delay, effective signal time can reduce, and the charging interval of such pixel shortens, and makes The problem of pixel undercharge, and then occur asking due to the inconsistent thin horizontal line caused of odd number even rows charged state Topic.
Summary of the invention
Embodiments provide a kind of array base palte, display floater, display device, in order to realize for monochrome Face, each pixel charged state is consistent, prevents the generation of thin horizontal line.
A kind of array base palte that the embodiment of the present invention provides, including pixel cell and the source drive of the arrangement of some arrays Some data wires that circuit connects and some gate lines of being connected with gate driver circuit, wherein, each described pixel cell Including four sub-pixel unit；
In each described pixel cell, four sub-pixel unit are divided into the first sub-pixel unit group and the second sub-pixel unit Group, described first sub-pixel unit group includes that two adjacent sub-pixel unit, described second sub-pixel unit group include residue Two adjacent sub-pixel unit；
Described first sub-pixel unit group and described second sub-pixel unit group are alternately arranged with on column direction in the row direction, In a column direction, between described first sub-pixel unit group and described second sub-pixel unit group, a data line is set；
Two sub-pixel unit that described first sub-pixel unit group includes connect same data wire, the described second sub-picture Two sub-pixel unit that element unit group includes connect same data wire, and two that described first sub-pixel unit group includes The data wire that two sub-pixel unit that the data wire that sub-pixel unit connects includes with described second sub-pixel unit group are connected Different；And
Two sub-pixel unit that described first sub-pixel unit group includes connect from different gate line respectively, and described the Two sub-pixel unit that two sub-pixel unit groups include connect from different gate lines respectively.
The array base palte provided by the embodiment of the present invention, due to this array base palte the first sub-pixel unit group and the second sub-picture Element unit group is alternately arranged with on column direction in the row direction, and two sub-pixel unit that the first sub-pixel unit group includes connect same One data line, two sub-pixel unit that the second sub-pixel unit group includes connect same data wire, and the first sub-pix Two sub-pixel unit that the data wire of two sub-pixel unit connections that unit group includes and the second sub-pixel unit group include The data wire connected is different.Therefore, when the embodiment of the present invention realizes 2dot-inversion, for same two field picture, adjacent two The opposite polarity of the source drive signal that data line receives, for adjacent two two field pictures, the source electrode that same data wire receives drives The polarity of dynamic signal is identical, compared with prior art, and the source drive that the every data lines in the specific embodiment of the invention receives The polarity of signal need not positive and negative change alternately, i.e. source drive signal stabilization, it is not necessary to just, the most constantly changes, Therefore, it is possible to realize for sprite, each pixel charged state is consistent, prevents the generation of thin horizontal line.
It is preferred that described gate line includes first grid polar curve and second gate line, described first grid polar curve and described second Gate line is arranged between adjacent rows sub-pixel unit；
Two sub-pixel unit in described first sub-pixel unit group connect with first grid polar curve and second gate line respectively Connecing, two sub-pixel unit in described second sub-pixel unit group are connected with first grid polar curve and second gate line respectively.
It is preferred that described gate line includes first grid polar curve and second gate line, described first grid polar curve and described second Gate line is positioned at the heteropleural of every a line sub-pixel unit；
Two sub-pixel unit in described first sub-pixel unit group connect with first grid polar curve and second gate line respectively Connecing, two sub-pixel unit in described second sub-pixel unit group are connected with first grid polar curve and second gate line respectively.
It is preferred that in adjacent two described first sub-pixel unit groups, one of them described first sub-pixel unit group Including first sub-pixel unit be connected with described first grid polar curve, including second sub-pixel unit and described second gate Polar curve connects；First sub-pixel unit that another described first sub-pixel unit group includes is with described second gate line even Connect, including second sub-pixel unit be connected with described first grid polar curve；
In two adjacent described second sub-pixel unit groups, one of them described second sub-pixel unit group include One sub-pixel unit is connected with described first grid polar curve, including second sub-pixel unit and described second gate line even Connect；First sub-pixel unit that another described second sub-pixel unit group includes is connected with described second gate line, including Second sub-pixel unit be connected with described first grid polar curve.
It is preferred that each described pixel cell includes red sub-pixel unit, green sub-pixels unit, blue subpixels list Unit and white sub-pixel unit；Or,
Each described pixel cell includes red sub-pixel unit, green sub-pixels unit, blue subpixels unit and Huang Color sub-pixel unit.
It is preferred that described first sub-pixel unit group includes red sub-pixel unit and green sub-pixels unit, described Two sub-pixel unit groups include blue subpixels unit and white sub-pixel unit；Or,
Described first sub-pixel unit group includes red sub-pixel unit and green sub-pixels unit, described second sub-pix Unit group includes blue subpixels unit and yellow sub-pixel unit.
It is preferred that described first sub-pixel unit group includes red sub-pixel unit and green sub-pixels unit, described Two sub-pixel unit groups include blue subpixels unit and white sub-pixel unit；
The number of the red sub-pixel unit connecting described first grid polar curve is red sub-be connected described second gate line The number of pixel cell is equal；
The number of the green sub-pixels unit connecting described first grid polar curve is green sub-be connected described second gate line The number of pixel cell is equal；
The number of the blue subpixels unit connecting described first grid polar curve is blue sub-be connected described second gate line The number of pixel cell is equal；
The number of the white sub-pixel unit connecting described first grid polar curve is sub-with the white being connected described second gate line The number of pixel cell is equal.
It is preferred that described first sub-pixel unit group is connected with odd column data wire, described second sub-pixel unit group with Even column data wire connects；Or,
Described first sub-pixel unit group is connected with even column data wire, described second sub-pixel unit group and odd number columns Connect according to line.
The embodiment of the present invention additionally provides a kind of display floater, and this display floater includes above-mentioned array base palte.
The embodiment of the present invention additionally provides a kind of display device, and this display device includes above-mentioned display floater.
Accompanying drawing explanation
Fig. 1 is the structural representation of prior art array base palte；
The structural representation of a kind of array base palte that Fig. 2 provides for the embodiment of the present invention；
The structural representation of the another kind of array base palte that Fig. 3 provides for the embodiment of the present invention.
Detailed description of the invention
Embodiments provide a kind of array base palte, display floater, display device, in order to realize for monochrome Face, each pixel charged state is consistent, prevents the generation of thin horizontal line.
In order to make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing the present invention made into One step ground describes in detail, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole enforcement Example.Based on the embodiment in the present invention, those of ordinary skill in the art are obtained under not making creative work premise All other embodiments, broadly fall into the scope of protection of the invention.
Array base palte that the specific embodiment of the invention provide is discussed in detail below in conjunction with the accompanying drawings.
As shown in Figures 2 and 3, the specific embodiment of the invention provides a kind of array base palte, including the arrangement of some arrays Some data wires 23 that pixel cell 20 is connected with source electrode drive circuit, such as: Data1, Data2, Data3, Data4, Data5, Data6 etc., and the some gate lines 24 being connected with gate driver circuit, such as: Gate1, Gate2, Gate3, Gate4, Gate5, Gate6, Gate7, Gate8 etc., wherein, each pixel cell 20 includes four sub-pixel unit；
In each pixel cell 20, four sub-pixel unit are divided into the first sub-pixel unit group 21 and the second sub-pixel unit Group 22, the first sub-pixel unit group 21 includes two adjacent sub-pixel unit, and the second sub-pixel unit group 22 includes remaining Two adjacent sub-pixel unit；
First sub-pixel unit group 21 and the second sub-pixel unit group 22 are alternately arranged with on column direction in the row direction, at row On direction, between the first sub-pixel unit group 21 and the second sub-pixel unit group 22, a data line 23 is set；
Two sub-pixel unit that first sub-pixel unit group 21 includes connect same data wire 23, the second sub-pix list Two sub-pixel unit that tuple 22 includes connect same data wire 23, and two Asias that the first sub-pixel unit group 21 includes The data wire that two sub-pixel unit that the data wire of pixel cell connection and the second sub-pixel unit group 22 include connect is different； And
Two sub-pixel unit that first sub-pixel unit group 21 includes connect from different gate lines 24 respectively, and second is sub- Two sub-pixel unit that pixel cell group 22 includes connect from different gate lines 24 respectively.
Specifically, each pixel cell 20 in the specific embodiment of the invention includes redness (R) sub-pixel unit, green (G) sub-pixel unit, blueness (B) sub-pixel unit and white (W) sub-pixel unit；Or, every in the specific embodiment of the invention One pixel cell 20 includes R sub-pixel unit, G sub-pixel unit, B sub-pixel unit and yellow (Y) sub-pixel unit.The present invention Specific embodiment only includes R sub-pixel unit, G sub-pixel unit, B sub-pixel unit and W sub-pix with each pixel cell 20 As a example by unit, as shown in Figures 2 and 3, the transmitance of RGBW product is higher, can reduce backlight cost.
When being embodied as, as shown in Figures 2 and 3, in the specific embodiment of the invention, the first sub-pixel unit group 21 includes that R is sub- Pixel cell and G sub-pixel unit, the second sub-pixel unit group 22 includes B sub-pixel unit and W sub-pixel unit；Or, this In bright specific embodiment, the first sub-pixel unit group 21 includes R sub-pixel unit and G sub-pixel unit, the second sub-pixel unit group 22 include B sub-pixel unit and Y sub-pixel unit.
When being embodied as, as shown in Figures 2 and 3, the specific embodiment of the invention the first sub-pixel unit group 21 and odd column Data wire connects, such as: the first sub-pixel unit group 21 of the specific embodiment of the invention and first row data wire Data1, the 3rd row Data wire Data3, the 5th column data line Data5 connect, and the second sub-pixel unit group 22 is connected with even column data wire, such as: this Second sub-pixel unit group 22 of invention specific embodiment and secondary series data wire Data2, the 4th column data line Data4, the 6th Column data line Data6 connects.Certainly, when specific design, the first sub-pixel unit group 21 in the specific embodiment of the invention is also Can be connected with even column data wire, the second sub-pixel unit group 22 is connected with odd column data wire.
When the specific embodiment of the invention realizes 2dot-inversion, for same two field picture, adjacent two data line 23 The opposite polarity of the source drive signal received, for adjacent two two field pictures, the source drive signal that same data wire 23 receives Polarity identical.Compared with prior art, the source drive signal that every Data line in the specific embodiment of the invention receives Polarity need not positive and negative change alternately, i.e. source drive signal stabilization, it is not necessary to just, the most constantly changes, therefore can The power consumption enough avoiding source electrode drive circuit rises, the problem that temperature raises；Further, since the source electrode in the specific embodiment of the invention Signal is driven to need not positive and negative change alternately, it is possible to realizing for sprite, each pixel charged state is consistent, prevents level The generation of fine rule.
In the specific embodiment of the invention two kind differences of the gate line of dual gate design are discussed in detail below in conjunction with the accompanying drawings Installation scenarios.
As in figure 2 it is shown, the gate line 24 in the specific embodiment of the invention includes first grid polar curve and second gate line, this Bright specific embodiment using the gate line of odd-numbered line as first grid polar curve, such as: Gate1, Gate3, Gate5, Gate7 etc. are first Gate line, using the gate line of even number line as second gate line, such as: Gate2, Gate4, Gate6, Gate8 etc. are second grid Line, first grid polar curve and second gate line are positioned at the heteropleural of every a line sub-pixel unit；Wherein: in the specific embodiment of the invention Two sub-pixel unit in first sub-pixel unit group 21 are connected with first grid polar curve and second gate line respectively, the second sub-picture Two sub-pixel unit in element unit group 22 are connected with first grid polar curve and second gate line respectively.
Specifically, in two the first sub-pixel unit groups 21 adjacent in the specific embodiment of the invention, one of them is first years old First sub-pixel unit that sub-pixel unit group 21 includes is connected with first grid polar curve, including second sub-pixel unit with Second gate line connects；First sub-pixel unit that another the first sub-pixel unit group 21 includes is with second gate line even Connect, including second sub-pixel unit be connected with first grid polar curve；As: in two the first sub-pixel unit that the first row is adjacent In group 21, it is positioned at the R sub-pixel unit that the first sub-pixel unit group 21 of first row includes and is connected with first grid polar curve Gate1, G Sub-pixel unit is connected with second gate line Gate2；It is positioned at the R sub-pix list that tertial first sub-pixel unit group 21 includes Unit is connected with second gate line Gate2, and G sub-pixel unit is connected with first grid polar curve Gate1, so, at the tool of array base palte During body wires design, it is possible to well ensure the resistance zero difference in the wiring of whole array base palte, will not produce due to cloth line length The array base palte abnormal problem that the inconsistent array base palte subregion power consumption caused of degree is relatively big and causes；
In two adjacent the second sub-pixel unit groups 22, include first of one of them second sub-pixel unit group 22 Sub-pixel unit is connected with first grid polar curve, including second sub-pixel unit be connected with second gate line；Another is second years old First sub-pixel unit that sub-pixel unit group 22 includes is connected with second gate line, including second sub-pixel unit with First grid polar curve connects；As: in two the second sub-pixel unit groups 22 that the first row is adjacent, it is positioned at the second sub-picture of secondary series The B sub-pixel unit that element unit group 22 includes is connected with first grid polar curve Gate1, W sub-pixel unit and second gate line Gate2 Connect；The B sub-pixel unit that includes of the second sub-pixel unit group 22 being positioned at the 4th row is connected with second gate line Gate2, W Asia Pixel cell is connected with first grid polar curve Gate1, so, when the concrete wires design of array base palte, it is possible to well ensure Whole array base palte wiring on resistance zero difference, and then can be good at ensure array base palte power consumption at wire location without Difference, promotes the performance of array base palte.
When being embodied as, as in figure 2 it is shown, in all R sub-pixel unit of the specific embodiment of the invention, be connected to the first grid The number of the R sub-pixel unit of polar curve is equal with the number of the R sub-pixel unit being connected to second gate line；All G sub-pixs In unit, be connected to first grid polar curve G sub-pixel unit number be connected to second gate line G sub-pixel unit Number is equal；In all B sub-pixel unit, be connected to first grid polar curve B sub-pixel unit number be connected to second grid The number of the B sub-pixel unit of line is equal；In all W sub-pixel unit, be connected to first grid polar curve W sub-pixel unit Number is equal with the number of the W sub-pixel unit being connected to second gate line.
As it is shown on figure 3, the gate line 24 in the specific embodiment of the invention includes first grid polar curve and second gate line, this Bright specific embodiment using the gate line of odd-numbered line as first grid polar curve, such as: Gate1, Gate3, Gate5, Gate7 etc. are first Gate line, using the gate line of even number line as second gate line, such as: Gate2, Gate4, Gate6, Gate8 etc. are second grid Line, first grid polar curve and second gate line are arranged between adjacent rows sub-pixel unit；Wherein: the specific embodiment of the invention In the first sub-pixel unit group 21 in two sub-pixel unit be connected with first grid polar curve and second gate line respectively, second Two sub-pixel unit in sub-pixel unit group 22 are connected with first grid polar curve and second gate line respectively.
The specific embodiment of the invention additionally provides a kind of display floater, and this display floater includes that the specific embodiment of the invention carries The above-mentioned array base palte of confession.
The specific embodiment of the invention additionally provides a kind of display device, and this display device includes that the specific embodiment of the invention carries The above-mentioned display floater of confession, this display device can be liquid crystal panel, liquid crystal display, LCD TV, Organic Light Emitting Diode The display dress such as (Organic Light Emitting Diode, OLED) panel, OLED display, OLED TV or Electronic Paper Put.
In sum, the specific embodiment of the invention provides a kind of array base palte, including the arrangement of some arrays pixel cell, The some data wires being connected with source electrode drive circuit and the some gate lines being connected with gate driver circuit, wherein, each picture Element unit includes four sub-pixel unit；In each pixel cell, four sub-pixel unit be divided into the first sub-pixel unit group and Second sub-pixel unit group, the first sub-pixel unit group includes two adjacent sub-pixel unit, the second sub-pixel unit group bag Include remaining two adjacent sub-pixel unit；First sub-pixel unit group and the second sub-pixel unit group in the row direction with row side The most alternately arranged, in a column direction, between the first sub-pixel unit group and the second sub-pixel unit group, a data line is set； Two sub-pixel unit that first sub-pixel unit group includes connect same data wires, the second sub-pixel unit group include two Individual sub-pixel unit connects same data wire, and the data that two sub-pixel unit including of the first sub-pixel unit group connect The data wire that two sub-pixel unit that line and the second sub-pixel unit group include connect is different；And the first sub-pixel unit group Including two sub-pixel unit connect from different gate line respectively, two sub-pix lists that the second sub-pixel unit group includes Unit connects from different gate lines respectively.When the specific embodiment of the invention realizes 2dot-inversion, for same two field picture, The opposite polarity of the source drive signal that adjacent two data line receive, for adjacent two two field pictures, same data wire receives The polarity of source drive signal is identical, compared with prior art, and the source that the every data lines in the specific embodiment of the invention receives Pole drives the polarity of signal to need not positive and negative change alternately, i.e. source drive signal stabilization, it is not necessary to just, the most constantly Change, therefore, it is possible to avoid the power consumption of source electrode drive circuit to rise, the problem that temperature raises；Further, since the present invention is specifically real Executing the source drive signal in example and need not positive and negative change alternately, therefore, it is possible to realize for sprite, each pixel is charged State consistency, prevents the generation of thin horizontal line.
Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof Within, then the present invention is also intended to comprise these change and modification.

Claims (10)

1. an array base palte, including some data wires of being connected with source electrode drive circuit of pixel cell of some arrays arrangement And the some gate lines being connected with gate driver circuit, it is characterised in that each described pixel cell includes four sub-pixs Unit；
In each described pixel cell, four sub-pixel unit are divided into the first sub-pixel unit group and the second sub-pixel unit group, Described first sub-pixel unit group includes that two adjacent sub-pixel unit, described second sub-pixel unit group include remaining two Individual adjacent sub-pixel unit；
Described first sub-pixel unit group and described second sub-pixel unit group are alternately arranged with on column direction in the row direction, at row On direction, between described first sub-pixel unit group and described second sub-pixel unit group, a data line is set；
Two sub-pixel unit that described first sub-pixel unit group includes connect same data wire, described second sub-pix list Two sub-pixel unit that tuple includes connect same data wire, and two sub-pictures that described first sub-pixel unit group includes The data wire that the data wire that element unit connects connects from two sub-pixel unit that described second sub-pixel unit group includes is different； And
Two sub-pixel unit that described first sub-pixel unit group includes connect from different gate lines respectively, and described second is sub- Two sub-pixel unit that pixel cell group includes connect from different gate lines respectively.
Array base palte the most according to claim 1, it is characterised in that described gate line includes first grid polar curve and second gate Polar curve, described first grid polar curve and described second gate line are arranged between adjacent rows sub-pixel unit；
Two sub-pixel unit in described first sub-pixel unit group are connected with first grid polar curve and second gate line respectively, institute Two sub-pixel unit stated in the second sub-pixel unit group are connected with first grid polar curve and second gate line respectively.
Array base palte the most according to claim 1, it is characterised in that described gate line includes first grid polar curve and second gate Polar curve, described first grid polar curve and described second gate line are positioned at the heteropleural of every a line sub-pixel unit；
Two sub-pixel unit in described first sub-pixel unit group are connected with first grid polar curve and second gate line respectively, institute Two sub-pixel unit stated in the second sub-pixel unit group are connected with first grid polar curve and second gate line respectively.
4. according to the array base palte described in Claims 2 or 3, it is characterised in that two adjacent described first sub-pixel unit In group, first sub-pixel unit that one of them described first sub-pixel unit group includes is connected with described first grid polar curve, Including second sub-pixel unit be connected with described second gate line；Another described first sub-pixel unit group include One sub-pixel unit is connected with described second gate line, including second sub-pixel unit and described first grid polar curve even Connect；
In two adjacent described second sub-pixel unit groups, include first of one of them described second sub-pixel unit group Sub-pixel unit is connected with described first grid polar curve, including second sub-pixel unit be connected with described second gate line；Separately First sub-pixel unit that one described second sub-pixel unit group includes is connected with described second gate line, including second Individual sub-pixel unit is connected with described first grid polar curve.
Array base palte the most according to claim 1, it is characterised in that each described pixel cell includes red sub-pixel list Unit, green sub-pixels unit, blue subpixels unit and white sub-pixel unit；Or,
Each described pixel cell includes that red sub-pixel unit, green sub-pixels unit, blue subpixels unit and yellow are sub- Pixel cell.
Array base palte the most according to claim 5, it is characterised in that described first sub-pixel unit group includes red sub-picture Element unit and green sub-pixels unit, described second sub-pixel unit group includes blue subpixels unit and white sub-pix list Unit；Or,
Described first sub-pixel unit group includes red sub-pixel unit and green sub-pixels unit, described second sub-pixel unit Group includes blue subpixels unit and yellow sub-pixel unit.
7. according to the array base palte described in Claims 2 or 3, it is characterised in that described first sub-pixel unit group includes redness Sub-pixel unit and green sub-pixels unit, described second sub-pixel unit group includes blue subpixels unit and white sub-pix Unit；
Connect the number of the red sub-pixel unit of described first grid polar curve and the red sub-pixel being connected described second gate line The number of unit is equal；
Connect the number of the green sub-pixels unit of described first grid polar curve and the green sub-pixels being connected described second gate line The number of unit is equal；
Connect the number of the blue subpixels unit of described first grid polar curve and the blue subpixels being connected described second gate line The number of unit is equal；
Connect the number of the white sub-pixel unit of described first grid polar curve and the white sub-pix being connected described second gate line The number of unit is equal.
Array base palte the most according to claim 1, it is characterised in that described first sub-pixel unit group and odd column data Line connects, and described second sub-pixel unit group is connected with even column data wire；Or,
Described first sub-pixel unit group is connected with even column data wire, described second sub-pixel unit group and odd column data wire Connect.
9. a display floater, it is characterised in that include the array base palte described in claim 1-8 any claim.
10. a display device, it is characterised in that include the display floater described in claim 9.
CN201610849268.1A 2016-09-23 2016-09-23 A kind of array base palte, display floater, display device Pending CN106292110A (en)

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