CN109270801B - Exposure method - Google Patents

Exposure method Download PDF

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Publication number
CN109270801B
CN109270801B CN201811147172.6A CN201811147172A CN109270801B CN 109270801 B CN109270801 B CN 109270801B CN 201811147172 A CN201811147172 A CN 201811147172A CN 109270801 B CN109270801 B CN 109270801B
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Prior art keywords
mark
chip
mask plate
projection
exposure method
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CN109270801A (en
Inventor
兰叶
顾小云
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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Publication of CN109270801A publication Critical patent/CN109270801A/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/70733—Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/70775—Position control, e.g. interferometers or encoders for determining the stage position
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/7084—Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682—Mask-wafer alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes

Abstract

The invention discloses an exposure method, and belongs to the technical field of semiconductors. The method comprises the following steps: providing a chip, wherein the chip is provided with a first mark, a second mark and photoresist to be exposed; placing the chip on a chuck, wherein the chuck is filled with liquid for adjusting temperature; arranging a mask plate and a chip oppositely, wherein the projection of the area corresponding to the first mark on the mask plate on the chip is superposed with the first mark; when the projection of the area corresponding to the second mark on the mask plate on the chip is positioned between the first mark and the second mark, reducing the temperature of the liquid filled in the chuck; when the second mark is positioned between the first mark and the projection of the area, corresponding to the second mark, on the mask on the chip, the temperature of the liquid filled in the chuck is increased; and exposing the photoresist through the mask when the projection of the area corresponding to the second mark on the mask on the chip is superposed with the second mark. The invention can improve the dislocation of the pattern.

Description

Exposure method
Technical Field
The invention relates to the technical field of semiconductors, in particular to an exposure method.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component that converts electrical energy into optical energy. LEDs appeared in 1962, and were only able to emit low-intensity red light in the early days, after which LEDs emitting other monochromatic light were developed. Since the development of gallium nitride (GaN) -based LEDs by japanese scientists in the 90 s of the 20 th century, the process technology of LEDs has been continuously advanced, the light-emitting brightness of LEDs has been continuously improved, and the application fields of LEDs have become wider and wider. The LED has the advantages of low voltage, low power consumption, small volume, light weight, long service life, high reliability and the like, and is rapidly and widely applied to the fields of traffic signal lamps, automobile interior and exterior lamps, urban landscape lighting, mobile phone backlight sources, outdoor full-color display screens and the like. Especially in the field of lighting, LEDs have found great application, playing a unique and irreplaceable role.
The chip is the core component of the LED. The existing manufacturing method of the LED chip comprises the following steps: sequentially growing an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate; a groove extending to the N-type semiconductor layer is formed in the P-type semiconductor layer; forming a current blocking layer on the P-type semiconductor layer, wherein the current blocking layer comprises an annular structure; forming a transparent conducting layer on the current blocking layer and the P-type semiconductor layer outside the annular structure; forming a P-type electrode on the transparent conductive layer and the P-type semiconductor layer in the annular structure, and forming an N-type electrode on the N-type semiconductor layer in the groove; and forming a passivation protective layer in the groove except the region where the N-type electrode is located and on the region except the region where the P-type electrode is located on the transparent conductive layer.
The formation of the groove, the current blocking layer, the transparent conducting layer, the electrode (including a P-type electrode and an N-type electrode) and the passivation protective layer all requires a photoresist with a certain pattern formed by adopting a photoetching process, and etching is carried out according to the pattern of the photoresist to obtain the groove, the current blocking layer, the transparent conducting layer, the electrode or the passivation protective layer in a specific area. Also the pattern formed behind needs to be aligned with the pattern formed in front: the pattern for forming the current blocking layer is positioned in the pattern for forming the groove, the pattern for forming the transparent conducting layer is positioned outside the pattern for forming the current blocking layer, the pattern for forming the P-type electrode is positioned in the pattern for forming the current group blocking layer, the pattern for forming the N-type electrode is positioned outside the pattern for forming the groove, and the pattern for forming the passivation protective layer is positioned outside the pattern for forming the electrode.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
the pattern of the photoetching process is obtained by exposing the photoresist through a mask plate by a light source and developing the exposed photoresist. The pattern of the mask is designed in advance according to the pattern of the chip at normal temperature. However, the temperature of the chip changes during the process of depositing the current blocking layer, the transparent conductive layer, the electrode and the passivation protective layer, and the change of the temperature causes the pattern of the chip to be deformed. The pattern of the mask plate is not matched with the pattern of the chip, and the pattern formed later needs to have dislocation with the pattern formed earlier. The formed grooves, the current blocking layer, the transparent conducting layer, the electrodes or the passivation protective layer have unsatisfactory effect, the luminous efficiency of the LED is low, and even the reliability problems of electric leakage and the like of the LED can be caused, thereby influencing the service life of the LED.
Disclosure of Invention
The embodiment of the invention provides an exposure method, which can solve the problem that a pattern formed at the back of a photoetching process needs to be dislocated with a pattern formed at the front in the prior art. The technical scheme is as follows:
the embodiment of the invention provides an exposure method, which comprises the following steps:
providing a chip, wherein a first mark, a second mark and photoresist to be exposed are arranged on the chip;
placing the chip on a chuck, wherein the chuck is filled with liquid for adjusting temperature;
arranging a mask plate and the chip oppositely, wherein a connecting line of a projection of a region corresponding to the first mark on the mask plate on the chip and a projection of a region corresponding to the second mark on the mask plate on the chip is positioned on the same straight line with the connecting line of the first mark and the second mark, and the projection of the region corresponding to the first mark on the chip on the mask plate is superposed with the first mark;
when the projection of the area corresponding to the second mark on the mask plate on the chip is positioned between the first mark and the second mark, reducing the temperature of liquid filled in the chuck;
when the second mark is positioned between the first mark and the projection of the area, corresponding to the second mark, on the mask plate on the chip, the temperature of liquid filled in the chuck is increased;
and when the projection of the area corresponding to the second mark on the mask plate on the chip is coincident with the second mark, exposing the photoresist through the mask plate.
Optionally, a connecting line of the first mark and the second mark is located on a center line of the chip, and distances between the first mark and the center of the chip and between the second mark and the center of the chip are equal.
Optionally, the reticle is disposed in a constant temperature environment.
Optionally, the material of the mask is fused quartz.
Optionally, a third mark and a fourth mark are further disposed on the chip, and a connection line of the third mark and the fourth mark is parallel to a connection line of the first mark and the second mark;
the exposing the photoresist through the mask plate comprises:
determining the displacement of the chip relative to the mask, so that the sum of the distance between the third mark and the projection of the area corresponding to the third mark on the mask on the chip and the distance between the fourth mark and the projection of the area corresponding to the fourth mark on the mask on the chip are minimized;
and exposing the photoresist by linear light parallel to a connecting line of the first mark and the second mark through the mask plate, wherein the mask plate moves along a linear direction perpendicular to the connecting line of the first mark and the second mark in the exposure process, the chip moves relative to the mask plate in the exposure process, and the displacement of the chip relative to the mask plate reaches determined displacement when the linear light irradiates the third mark and the fourth mark.
Optionally, in a process from the linear light striking the first mark and the second mark to the linear light striking the third mark and the fourth mark, a displacement of the chip relative to the reticle is linearly increased from 0 to a determined displacement.
Optionally, during the process that the linear light is emitted to the edge of the chip from the third mark and the fourth mark, the displacement of the chip corresponding to the mask plate is kept unchanged as a determined displacement.
Optionally, the number of the third marks and the number of the fourth marks are two, and connecting lines of the two third marks and the four fourth marks are respectively located on two sides of a connecting line of the first mark and the second mark.
Optionally, the displacement of the chip relative to the reticle is realized by driving of a stepping motor.
Optionally, the stepping motor drives the chip to move relative to the mask plate through a lever.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the size relation of the patterns on the chip and the mask is determined according to the relative positions of the first mark and the second mark on the chip and the projection of the area corresponding to the first mark and the second mark on the mask on the chip, and then the temperature of the chip is correspondingly adjusted according to the determined size relation, the sizes of the patterns on the chip and the mask are consistent by using the change of the temperature, the overall dislocation of the patterns on the chip and the mask can be adjusted, the dislocation between the patterns formed at the back and the patterns formed at the front is effectively improved, the device area under the same light-emitting area is saved, the cost is reduced, and the reliability of the LED is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a flow chart of an exposure method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a chip provided with a first mark and a second mark according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a chip provided with a third mark and a fourth mark according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an exposure apparatus provided by an embodiment of the present invention;
FIG. 5 is a diagram illustrating a variation of a displacement of a chip relative to a mask according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The embodiment of the invention provides an exposure method. Fig. 1 is a flowchart of an exposure method according to an embodiment of the present invention. Referring to fig. 1, the exposure method includes:
step 101: and providing a chip, wherein the chip is provided with a first mark, a second mark and photoresist to be exposed.
Alternatively, the connecting line of the first mark and the second mark may be located on the center line of the chip, and the distances between the first mark and the center of the chip and the second mark may be equal, so that the chip and the reticle can be substantially aligned by using the first mark and the second mark.
Fig. 2 is a schematic structural diagram of a chip provided with a first mark and a second mark according to an embodiment of the present invention. Where 10 denotes a chip, 11 denotes a first mark, and 12 denotes a second mark. Referring to fig. 2, the line connecting the first mark 11 and the second mark 12 is located on a middle line of the chip 10 parallel to the bottom side, and the first mark 11 and the second mark 12 are symmetrical with respect to the middle line of the chip 10 perpendicular to the bottom side, i.e., the first mark 11 and the second mark 12 are equidistant from the center of the chip 10.
Optionally, a third mark and a fourth mark may be further disposed on the chip, and a line connecting the third mark and the fourth mark is parallel to a line connecting the first mark and the second mark.
Fig. 3 is a schematic structural diagram of a chip provided with a third mark and a fourth mark according to an embodiment of the present invention. Where 10 denotes a chip, 13 denotes a third mark, and 14 denotes a fourth mark. Referring to fig. 3, the line connecting the third mark 13 and the fourth mark 14 is parallel to the middle line of the chip 10 parallel to the bottom side and is located on the side of the middle line of the chip 10 parallel to the bottom side away from the bottom side, and the third mark 13 and the fourth mark 14 are symmetrical with respect to the middle line of the chip 10 perpendicular to the bottom side, that is, the third mark 13 and the fourth mark 14 are equidistant from the center of the chip 10.
Step 102: the chip is placed on a chuck filled with a temperature regulating liquid.
Preferably, the temperature regulating liquid may be water. The specific heat capacity of water is high, and the method is economical and environment-friendly and is particularly suitable for temperature regulation.
Step 103: the mask plate and the chip are arranged oppositely, the connection line of the projection of the area corresponding to the first mark on the mask plate on the chip and the projection of the area corresponding to the second mark on the mask plate on the chip is positioned on the same straight line with the connection line of the first mark and the second mark, and the projection of the area corresponding to the first mark on the mask plate on the chip is superposed with the first mark.
Optionally, the mask can be arranged in a constant temperature environment, so that the pattern size of the mask is prevented from fluctuating in the product processing process, and the pattern size is fixed.
In practice, the reticle may be placed in a device filled with air to regulate the temperature. The temperature of the reticle is maintained constant, e.g., 23 c, by adjusting the air temperature in the apparatus.
Alternatively, fused silica may be used as the material of the reticle. The fused quartz has small thermal expansion coefficient, can prevent the size of the mask plate from being changed due to temperature change in the exposure process, has high light transmittance to ultraviolet rays, and is suitable for the ultraviolet rays used for exposure.
Step 104: and when the projection of the area corresponding to the second mark on the mask plate on the chip is positioned between the first mark and the second mark, reducing the temperature of the liquid filled in the chuck.
Step 105: and raising the temperature of the liquid filled in the chuck when the second mark is positioned between the first mark and the projection of the area, corresponding to the second mark, on the mask on the chip.
Step 106: and exposing the photoresist through the mask when the projection of the area corresponding to the second mark on the mask on the chip is superposed with the second mark.
According to the embodiment of the invention, the size relation of the patterns on the chip and the mask is determined according to the relative positions of the first mark and the second mark on the chip and the projection of the area corresponding to the first mark and the second mark on the mask on the chip, the temperature of the chip is correspondingly adjusted according to the determined size relation, the sizes of the patterns on the chip and the mask are consistent by using the change of the temperature, the overall dislocation of the patterns on the chip and the mask can be adjusted, the dislocation between the pattern formed at the back and the pattern formed at the front is effectively improved, and the reliability of the LED is improved.
In practical application, a pump lamp can be used for generating ultraviolet rays for exposure, and a spectrum emitted by ionization of high-pressure pump steam in the pump lamp comprises a plurality of peak points between 200nm and 400 nm. Further, europium activated yttrium vanadate (YVO4: Eu) phosphor may be coated on the inner wall of the pump lamp to improve the luminous efficacy.
Preferably, the light passing through the mask can be irradiated on the chip through the imaging system, so as to achieve a better exposure effect.
Fig. 4 is a schematic structural diagram of an exposure apparatus according to an embodiment of the present invention. Where 10 denotes a chip, 20 denotes a chuck, 30 denotes a reticle, 40 denotes a pump lamp, and 50 denotes an imaging system. Referring to fig. 4, a reticle 30, an imaging system 50, a chip 10, and a chuck 20 are sequentially disposed on an optical path of a pump lamp 40.
When the chip is further provided with a third mark and a fourth mark, this step 106 may include:
determining the displacement of the chip relative to the mask plate, and enabling the sum of the distance between the third mark and the projection of the area corresponding to the third mark on the mask plate on the chip and the distance between the fourth mark and the projection of the area corresponding to the fourth mark on the mask plate on the chip to be minimum;
and exposing the photoresist by linear light parallel to a connecting line of the first mark and the second mark through a mask plate, wherein the mask plate moves along a linear direction vertical to the connecting line of the first mark and the second mark in the exposure process, the chip moves relative to the mask plate in the exposure process, and the displacement of the chip relative to the mask plate reaches determined displacement when the linear light irradiates the third mark and the fourth mark.
According to the embodiment of the invention, the chip is divided into a plurality of areas to be respectively exposed, and the relative positions of the chip and the mask are adjusted in the exposure process, so that the patterns which are exposed by the chip and the mask are most matched during exposure, the local dislocation of the patterns of the chip and the mask can be adjusted, the dislocation between the pattern formed at the back and the pattern formed at the front is further improved, and the reliability of the LED is improved.
Preferably, the displacement of the chip relative to the reticle may be linearly increased from 0 to a determined displacement during the linear light from impinging on the first mark and the second mark to impinging on the third mark and the fourth mark.
Preferably, the displacement of the chip relative to the reticle during the linear light from the third mark and the fourth mark to the edge of the chip may be maintained constant at a certain displacement.
Fig. 5 is a schematic diagram illustrating a variation of a displacement of a chip relative to a mask according to an embodiment of the present invention. Referring to fig. 5, in the process of moving the exposure region from the center of the chip to the edge of the chip, the displacement of the chip relative to the mask is linearly increased from 0 to a certain displacement, and then the certain displacement is kept unchanged.
Alternatively, the displacement variation curve between the chip and the mask may be set in other ways, such as that the displacement of the chip relative to the mask is gradually increased from 0 to a certain displacement in the process of the linear light from the first mark and the second mark to the third mark and the fourth mark, that the displacement of the chip corresponding to the mask is increased at the same rate in the process of the linear light from the third mark and the fourth mark to the edge of the chip, and the like, and only the corresponding variation curve needs to be set in the control computer to meet various alignment requirements.
Preferably, the number of the third mark and the fourth mark may be two, and a connecting line of the two third marks and the connecting line of the fourth mark are respectively located at two sides of a connecting line of the first mark and the second mark. The alignment condition of one time is further adjusted on two sides of the center line of the chip parallel to the bottom edge, so that the adjustment times are reduced as far as possible under the condition of improving the alignment precision, and the realization is convenient.
In particular, the displacement of the chip relative to the reticle can be achieved by a stepper motor drive.
More specifically, the resolution of the stepper motor may be 0.05 μm, sufficient to meet the 1 μm accuracy required for current exposure alignment.
Further, the stepping motor can drive the chip to move relative to the mask plate through the lever so as to increase the precision of displacement adjustment. For example, the resolution of a stepper motor may be 0.05 μm, the lever ratio 5: 1, the accuracy of the displacement adjustment can be improved from 0.05 μm to 0.01 μm.
By adopting the invention, the appearance of the chip is tracked and observed, the result is that the alignment precision of each area of the whole wafer meets the preset requirement, and by counting various parameters of the flowing water, the yield of the chip in the embodiment can be improved by about 2.0%, other parameters are basically consistent, and the total design size of the LED chip layout can be reduced by about 3.0% under the condition of ensuring that the luminous effective area is not changed.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (9)

1. An exposure method, characterized in that the exposure method comprises:
providing a chip, wherein a first mark, a second mark and photoresist to be exposed are arranged on the chip; a third mark and a fourth mark are further arranged on the chip, and the connecting line of the third mark and the fourth mark is parallel to the connecting line of the first mark and the second mark;
placing the chip on a chuck, wherein the chuck is filled with liquid for adjusting temperature;
arranging a mask plate and the chip oppositely, wherein a connecting line of a projection of a region corresponding to the first mark on the mask plate on the chip and a projection of a region corresponding to the second mark on the mask plate on the chip is positioned on the same straight line with the connecting line of the first mark and the second mark, and the projection of the region corresponding to the first mark on the chip on the mask plate is superposed with the first mark;
when the projection of the area corresponding to the second mark on the mask plate on the chip is positioned between the first mark and the second mark, reducing the temperature of liquid filled in the chuck;
when the second mark is positioned between the first mark and the projection of the area, corresponding to the second mark, on the mask plate on the chip, the temperature of liquid filled in the chuck is increased;
when the projection of the area corresponding to the second mark on the mask plate on the chip is coincident with the second mark, determining the displacement of the chip relative to the mask plate, so that the sum of the distance between the third mark and the projection of the area corresponding to the third mark on the mask plate on the chip and the distance between the fourth mark and the projection of the area corresponding to the fourth mark on the mask plate on the chip is minimized; and exposing the photoresist by linear light parallel to a connecting line of the first mark and the second mark through the mask plate, wherein the mask plate moves along a linear direction perpendicular to the connecting line of the first mark and the second mark in the exposure process, the chip moves relative to the mask plate in the exposure process, and the displacement of the chip relative to the mask plate reaches determined displacement when the linear light irradiates the third mark and the fourth mark.
2. The exposure method according to claim 1, wherein a line connecting the first mark and the second mark is located on a center line of the chip, and distances between the first mark and the second mark and a center of the chip are equal.
3. The exposure method according to claim 1 or 2, wherein the reticle is set in a constant temperature environment.
4. The exposure method according to claim 1 or 2, wherein the mask is made of fused silica.
5. The exposure method according to claim 1 or 2, wherein a displacement of the chip with respect to the reticle is linearly increased from 0 to a certain displacement in a process from the linear light striking the first mark and the second mark to the linear light striking the third mark and the fourth mark.
6. The exposure method according to claim 1 or 2, wherein a displacement of the chip with respect to the reticle is kept constant at a certain displacement during the linear light from striking the third mark and the fourth mark to the edge of the chip.
7. The exposure method according to claim 1 or 2, wherein the number of the third marks and the fourth marks is two, and a connecting line of the two third marks and the fourth marks is located on both sides of a connecting line of the first mark and the second mark, respectively.
8. The exposure method according to claim 1 or 2, wherein the displacement of the chip with respect to the reticle is achieved by a stepping motor drive.
9. The exposure method according to claim 8, wherein the stepping motor drives the chip to move relative to the reticle by a lever.
CN201811147172.6A 2018-09-29 2018-09-29 Exposure method Active CN109270801B (en)

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CN109270801B true CN109270801B (en) 2020-11-27

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070002429A1 (en) * 2005-06-17 2007-01-04 Yokogawa Electric Corporation Optical channel monitor
CN101740432A (en) * 2008-11-27 2010-06-16 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
US9466538B1 (en) * 2015-11-25 2016-10-11 Globalfoundries Inc. Method to achieve ultra-high chip-to-chip alignment accuracy for wafer-to-wafer bonding process

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070002429A1 (en) * 2005-06-17 2007-01-04 Yokogawa Electric Corporation Optical channel monitor
CN101740432A (en) * 2008-11-27 2010-06-16 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
US9466538B1 (en) * 2015-11-25 2016-10-11 Globalfoundries Inc. Method to achieve ultra-high chip-to-chip alignment accuracy for wafer-to-wafer bonding process

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