CN109245770B - Signal sampling circuit - Google Patents
Signal sampling circuit Download PDFInfo
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- CN109245770B CN109245770B CN201811366163.6A CN201811366163A CN109245770B CN 109245770 B CN109245770 B CN 109245770B CN 201811366163 A CN201811366163 A CN 201811366163A CN 109245770 B CN109245770 B CN 109245770B
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- operational amplifier
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- 238000005070 sampling Methods 0.000 title claims abstract description 44
- 239000003990 capacitor Substances 0.000 claims abstract description 77
- 238000004146 energy storage Methods 0.000 claims abstract description 14
- 238000006243 chemical reaction Methods 0.000 claims abstract description 13
- 230000003321 amplification Effects 0.000 claims description 13
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 13
- 238000001914 filtration Methods 0.000 claims description 5
- 230000008859 change Effects 0.000 abstract description 4
- 230000011664 signaling Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 230000000087 stabilizing effect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
- H03M1/1265—Non-uniform sampling
- H03M1/127—Non-uniform sampling at intervals varying with the rate of change of the input signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
Abstract
The invention discloses a signal sampling circuit, which comprises a gain amplifying circuit, a filter circuit, a sampling holding circuit and an A/D conversion circuit, wherein the sampling holding circuit comprises a voltage comparator, a switching triode, an energy storage capacitor and an operational amplifier, the voltage comparator is used for comparing an input signal and a feedback signal and controlling the switching triode to be on or off, when the switching triode is conducted, the energy storage capacitor is charged, the operational amplifier is in a sampling state, when the switching triode is blocked, the energy storage capacitor is discharged, and the operational amplifier is in a holding state. The signal sampling circuit of the invention realizes the sampling and holding function by adopting the voltage comparison and the closed loop feedback mode, and the sampling and holding of the operational amplifier are controlled in real time through the switching triode, so that the sampling and holding can be changed in real time along with the change of the input signal, and the signal sampling circuit has high precision and good stability.
Description
Technical Field
Embodiments of the present invention relate to a signal sampling circuit, and more particularly, to an analog signal sampling circuit.
Background
Compared with an analog system, a digital system has higher precision and better stability, so that the analog system is very difficult to process in many cases during signal processing, but the digital system is very easy to process, so that an analog signal needs to be sampled and converted into a digital signal for digital signal processing. The signal sampling process is a process of converting a signal from an analog signal in a continuous time domain to a discrete signal in a discrete time domain, and is usually performed by combining sampling and quantization, wherein the analog signal is sampled by a sampler at certain time intervals to obtain a signal which is discrete in time, and then is also discretized in numerical value by an analog-to-digital converter (ADC), so as to obtain a digital signal which is discrete in both numerical value and time.
At present, a plurality of signal sampling circuits exist, wherein 'A/D conversion' is a necessary step in a signal sampling process, but a certain time is required for the A/D converter to complete one-time conversion, so that the accuracy of conversion can be ensured only by keeping the analog signal voltage at the input end of the A/D converter unchanged during the conversion period, and finally high sampling precision is realized. Therefore, from the improvement of the sample and hold, a high-precision signal sampling circuit is designed, and the feasibility is good.
Disclosure of Invention
The invention aims to provide a high-precision signal sampling circuit capable of converting sampling and holding time in real time along with the change of an input signal.
In order to achieve the aim of the invention, the invention adopts the following technical scheme: the signal sampling circuit comprises a gain amplifying circuit, a filter circuit, a sample hold circuit and an A/D conversion circuit, wherein the input end of the gain amplifying circuit inputs an input signal, and the output end of the gain amplifying circuit is connected with the filter circuit and is used for carrying out gain amplification on the input signal; the filter circuit is connected with the output end of the gain amplifying circuit and is used for filtering the ripple of the input signal after gain amplification; the sampling hold circuit is connected to the output end of the filter circuit and comprises a voltage comparator, a switching triode, an energy storage capacitor and an operational amplifier, wherein the in-phase end of the voltage comparator is connected to the output end of the filter circuit, the reverse end of the voltage comparator is connected to the reverse end of the operational amplifier, the output end of the voltage comparator is connected to the base electrode of the switching triode, the collector electrode of the switching triode is connected to the output end of the filter circuit, the emitter electrode of the switching triode is connected to the in-phase end of the operational amplifier, the in-phase end of the operational amplifier is also connected to the energy storage capacitor, and the reverse end of the voltage comparator is connected to the output end of the operational amplifier; the A/D conversion circuit is connected with the output end of the operational amplifier and is used for carrying out analog-to-digital conversion on the input signal.
In addition, the invention also provides the following auxiliary technical scheme:
the gain amplifying circuit comprises a first voltage follower, a signal amplifier and a second voltage follower which are sequentially connected, wherein the in-phase end of the first voltage follower is an input end of an input signal, the reverse end of the first voltage follower is connected with the output end of the first voltage follower, the output end of the first voltage follower is also connected with the input end of the signal amplifier, the output end of the signal amplifier is connected with the in-phase end of the second voltage follower, the reverse end of the second voltage follower is connected with the output end of the second voltage follower, and the output end of the second voltage follower is also connected with the filter circuit.
The gain amplifying circuit further comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7 and a capacitor C8; the capacitors C1 and C2 are connected in parallel with each other and are connected between the non-inverting terminal of the first voltage follower and the ground; the capacitors C3 and C4 are mutually connected in parallel and are connected to the positive power input end of the first signal amplifier; the capacitors C5 and C6 are mutually connected in parallel and are connected to the negative power input end of the first signal amplifier; capacitors C7 and C8 are connected in parallel with each other and between the output of the second voltage follower and ground.
The filter circuit comprises a resistor R1, a capacitor C9 and a capacitor C10, wherein one end of the resistor R1 is connected with the output end of the gain amplifying circuit, the other end of the resistor R1 is connected with the same-phase end of the voltage comparator, one end of the capacitor C9 is connected with the same-phase end of the voltage comparator, the other end of the capacitor C9 is grounded, and the capacitor C10 is connected with the capacitor C9 in parallel.
The sample hold circuit 3 further comprises a potentiometer RP1, a resistor R2 and a resistor R3, wherein the adjustable end of the potentiometer RP1 is connected with the reverse end of the voltage comparator, one fixed end is connected to the output end of the operational amplifier through the resistor R2, and the other fixed end is grounded through the resistor R3.
Compared with the prior art, the signal sampling circuit has the advantages that: the sampling and holding circuit comprises a voltage comparator, a switching triode, an energy storage capacitor and an operational amplifier, wherein the voltage comparator is used for comparing an input signal and a feedback signal and controlling the switching triode to be on or off, when the switching triode is conducted, the energy storage capacitor is charged, meanwhile, the operational amplifier is in a sampling state, when the switching triode is blocked, the energy storage capacitor is discharged, and the operational amplifier is in a holding state. The signal sampling circuit of the invention realizes the sampling and holding function by adopting the voltage comparison and the closed loop feedback mode, and the sampling and holding of the operational amplifier are controlled in real time through the switching triode, so that the sampling and holding can be changed in real time along with the change of the input signal, and the signal sampling circuit has high precision and good stability.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly introduce the drawings that are needed in the embodiments or related technical descriptions, and it is obvious that the drawings in the following description relate only to some embodiments of the present invention and are not limiting to the present invention.
Fig. 1 is a circuit diagram of a signal sampling circuit according to a preferred embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular and non-limiting detailed description of the invention will be rendered by reference to the appended drawings and appended detailed description.
Referring to fig. 1, the signal sampling circuit of the present embodiment includes a gain amplifying circuit, a filter circuit, a sample hold circuit, and an a/D conversion circuit.
The gain amplification circuit is used for carrying out isolation following and gain amplification on an input signal and comprises a first voltage follower U1, a signal amplifier U2, a second voltage follower U3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7 and a capacitor C8. The in-phase end of the first voltage follower U1 is an input end of an input signal, the input signal is input, the reverse end of the first voltage follower U1 is connected with the output end to form negative feedback, and the output end of the first voltage follower U1 is also connected with the input end of the signal amplifier U1. The capacitor C1 and the capacitor C2 are mutually connected in parallel and are connected between the non-inverting terminal of the first voltage follower U1 and the ground, and the two capacitors are used for performing primary filtering on an input signal and playing a role in stabilizing. The signal input terminal (VINP) of the signal amplifier U2 is connected to the output terminal of the first voltage follower U1, receives the input signal isolated from the subsequent input signal by the first voltage follower U1, and performs gain amplification on the input signal. A capacitor C3 and a capacitor C4 are connected to the positive power input end (+ 5 v) of the signal amplifier U2, and the capacitor C3 and the capacitor C4 are connected in parallel and are used for filtering positive input power clutter and preventing the positive input power clutter from affecting the amplification of an input signal; similarly, a capacitor C5 and a capacitor C6 are connected to the negative power input (-5 v) of the signal amplifier U2, and the capacitors C5 and C6 are connected in parallel to each other and are used for filtering the noise of the negative input power to prevent the noise from affecting the amplification of the input signal. The non-inverting terminal of the second voltage follower U2 is an input terminal of the amplified input signal and is connected with a signal output terminal (Vout) of the signal amplifier U2; the reverse end is connected with the output end, and the output end is connected with the filter circuit. The capacitors C7 and C8 are connected in parallel with each other and between the output terminal of the second voltage follower U2 and ground, for stabilizing the output signal of the second voltage follower U2.
The filter circuit comprises a resistor R1, a capacitor C9 and a capacitor C10, wherein one end of the resistor R1 is connected with the output end of the second voltage follower U2, the other end of the resistor R1 is connected with the same-phase end of the voltage comparator of the sample hold circuit 3, one end of the capacitor C9 is connected with the same-phase end of the voltage comparator of the sample hold circuit 3, the other end of the capacitor C9 is grounded, and the capacitor C10 is connected with the capacitor C9 in parallel. The resistor R1, the capacitor C9 and the capacitor C10 form an RC filter network, so that abnormal peak burrs at the input end of the sample hold circuit 3 are eliminated, and the input signal is more stable.
The sample-and-hold circuit comprises a voltage comparator U4, a switching triode Q1, an energy storage capacitor C11, an operational amplifier U5, a potentiometer RP1, a resistor R2 and a resistor R3. The non-inverting terminal of the voltage comparator U4 is connected with a resistor R1, and inputs an input signal filtered by the filter circuit 2; the reverse end of the voltage comparator U4 is connected with the adjustable end of the potentiometer RP1, one fixed end of the potentiometer RP1 is connected to the output end of the operational amplifier U5 through a resistor R2, and the other fixed end is grounded through a resistor R3; the output end of the voltage comparator U4 is connected with the base electrode of the switching triode Q1. The collector of the switching triode Q1 is connected with a resistor R1, an input signal filtered by the filter circuit 2 is input, and the emitter is connected with the non-inverting terminal of the operational amplifier U5. The same phase end of the operational amplifier U5 is also connected with the energy storage capacitor C11, and the reverse end is connected with the output end to form negative feedback.
When the voltage of the input signal rises, the voltage of the same-phase end of the voltage comparator U4 is larger than the feedback voltage of the opposite end, the output end outputs high level, the switching triode Q1 is conducted, the input signal is input into the operational amplifier U5 and U5 to sample the output signal, meanwhile, the input signal charges the energy storage capacitor C11, and the sampling and holding circuit is in a sampling state. When the input signal voltage drops, the voltage of the same-phase end of the voltage comparator U4 is smaller than the feedback voltage of the opposite end, the output end outputs a low level, the switching triode Q1 is blocked, the energy storage capacitor C11 discharges, and the sampling and holding circuit is in a holding state. Accurate sampling is realized by real-time feedback and real-time control of on-off of the switch.
In addition, the sampling hold circuit can change the comparison potential of the voltage comparator U4 by adjusting the potentiometer RP1, so that the phase of the feedback loop of the voltage comparator U4 is changed, the static working point of the circuit is zero, the circuit is not easy to oscillate, and the stability of the circuit is improved.
The a/D conversion circuit may adopt an existing AD7810 chip circuit U6, and its input end is connected to the output end of the operational amplifier U5, and converts the analog sampling signal into a digital signal, and then outputs the digital signal from the output end, so as to complete signal sampling.
It should be noted that the foregoing description of the preferred embodiments is merely illustrative of the technical concept and features of the present invention, and is not intended to limit the scope of the invention, as long as the scope of the invention is defined by the claims and their equivalents. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.
Claims (3)
1. A signal sampling circuit, characterized by: comprises a gain amplifying circuit, a filter circuit, a sample hold circuit and an A/D conversion circuit, wherein,
the gain amplification circuit is characterized in that an input signal is input from an input end of the gain amplification circuit, an output end of the gain amplification circuit is connected with the filter circuit and used for carrying out gain amplification on the input signal, the gain amplification circuit comprises a first voltage follower, a signal amplifier and a second voltage follower which are sequentially connected, an in-phase end of the first voltage follower is an input end of the input signal, a reverse end of the first voltage follower is connected with an output end of the first voltage follower, an output end of the first voltage follower is also connected with an input end of the first signal amplifier, an output end of the first signal amplifier is connected with an in-phase end of the second voltage follower, a reverse end of the second voltage follower is connected with an output end of the second voltage follower, and an output end of the second voltage follower is also connected with the filter circuit;
the filter circuit is connected to the output end of the gain amplifying circuit and is used for filtering the ripple of the input signal after gain amplification;
the sampling hold circuit is connected to the output end of the filter circuit and comprises a voltage comparator, a switching triode, an energy storage capacitor, an operational amplifier, a potentiometer RP1, a resistor R2 and a resistor R3, wherein the in-phase end of the voltage comparator is connected to the output end of the filter circuit, the reverse end of the voltage comparator is connected to the reverse end of the operational amplifier, the output end of the voltage comparator is connected to the base electrode of the switching triode, the collector electrode of the switching triode is connected to the output end of the filter circuit, the emitter electrode of the switching triode is connected to the in-phase end of the operational amplifier, the in-phase end of the operational amplifier is also connected to the energy storage capacitor, the reverse end of the operational amplifier is connected to the output end of the operational amplifier, one fixed end of the potentiometer RP1 is connected to the output end of the operational amplifier through the resistor R2, and the other fixed end of the potentiometer is grounded through the resistor R3;
the A/D conversion circuit is connected with the output end of the operational amplifier and is used for carrying out analog-to-digital conversion on the input signal.
2. The signal sampling circuit of claim 1, wherein: the gain amplifying circuit further comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7 and a capacitor C8; the capacitors C1 and C2 are connected in parallel with each other and are connected between the non-inverting terminal of the first voltage follower and the ground; the capacitors C3 and C4 are mutually connected in parallel and are connected to the positive power input end of the signal amplifier; the capacitors C5 and C6 are mutually connected in parallel and are connected to the negative power supply input end of the signal amplifier; capacitors C7 and C8 are connected in parallel with each other and between the output of the second voltage follower and ground.
3. The signal sampling circuit of claim 1, wherein: the filter circuit comprises a resistor R1, a capacitor C9 and a capacitor C10, wherein one end of the resistor R1 is connected with the output end of the gain amplifying circuit, the other end of the resistor R1 is connected with the same-phase end of the voltage comparator, one end of the capacitor C9 is connected with the same-phase end of the voltage comparator, the other end of the capacitor C9 is grounded, and the capacitor C10 is connected with the capacitor C9 in parallel.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811366163.6A CN109245770B (en) | 2018-11-16 | 2018-11-16 | Signal sampling circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811366163.6A CN109245770B (en) | 2018-11-16 | 2018-11-16 | Signal sampling circuit |
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| CN109245770A CN109245770A (en) | 2019-01-18 |
| CN109245770B true CN109245770B (en) | 2023-11-14 |
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| CN111313899A (en) * | 2019-12-17 | 2020-06-19 | 北京清网华科技股份有限公司 | Analog signal peak value monitoring and measuring device and measuring method thereof |
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