CN109216345B - Electrostatic discharge protection architecture, integrated circuit and protection method of core circuit thereof - Google Patents
Electrostatic discharge protection architecture, integrated circuit and protection method of core circuit thereof Download PDFInfo
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- CN109216345B CN109216345B CN201710549844.5A CN201710549844A CN109216345B CN 109216345 B CN109216345 B CN 109216345B CN 201710549844 A CN201710549844 A CN 201710549844A CN 109216345 B CN109216345 B CN 109216345B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
Abstract
An ESD protection architecture for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad includes a first conductive layer, a clamping element, a first electrical connection, and a second electrical connection. The first conductive layer is formed below the conductive gasket and comprises a first conductive part, an isolation part and a second conductive part. The insulating portion is surrounded by the first conductive portion and the second conductive portion. The first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.
Description
Technical Field
The present invention relates to electrostatic discharge protection (esd) and, more particularly, to an esd protection architecture for protecting a core circuit of an ic from an esd event by using a floor plan design (floor plan) of a conductive layer, and an associated ic and esd protection method.
Background
In order to prevent the core circuit (core circuit) of the integrated circuit from being damaged due to the electrostatic discharge current (ESD current), the integrated circuit employs a clamp circuit (clamp circuit) disposed therein to clamp the ESD current. However, once the esd current flows into the core circuit before flowing into the clamp circuit, the ic cannot prevent the core circuit from being damaged by the esd. Therefore, a novel esd protection mechanism is needed to improve the esd protection capability.
Disclosure of Invention
Accordingly, an objective of the present invention is to provide an esd protection architecture for protecting a core circuit of an integrated circuit from an esd event by using a floor plan (floorplan) design of a conductive layer, and an associated integrated circuit and esd protection method.
According to an embodiment of the present invention, an ESD protection architecture is disclosed. The ESD protection structure is used for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad. The ESD protection structure includes a first conductive layer, a clamping element, a first electrical connection portion and a second electrical connection portion. The first conductive layer is formed below the conductive pad, wherein the first conductive layer comprises a first conductive portion, an isolation portion and a second conductive portion, the isolation portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.
According to an embodiment of the present invention, an integrated circuit is disclosed. The integrated circuit includes a conductive pad, a core circuit, and an ESD protection structure. The ESD protection structure is coupled to the conductive pad and the core circuit for protecting the core circuit from an ESD event received by the conductive pad. The ESD protection structure includes a first conductive layer, a clamping element, a first electrical connection portion and a second electrical connection portion. The first conductive layer is formed below the conductive pad, wherein the first conductive layer comprises a first conductive portion, an isolation portion and a second conductive portion, the isolation portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.
According to one embodiment of the present invention, a method for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad is disclosed. The method comprises the following steps: providing a first conductive layer under the conductive pad, wherein the first conductive layer comprises a first conductive portion, an insulating portion and a second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion; coupling a first electrical connection between the first conductive portion of the first conductive layer and a clamping element, wherein the clamping element is configured to clamp the ESD event; and coupling a second electrical connection portion between the second conductive portion of the first conductive layer and the core circuit.
The ESD protection mechanism of the present invention can preferentially guide the ESD current to the clamping device through the design of the conductive path (e.g., the layout/layout of the conductive layer/metal layer), thereby preventing the ESD current from flowing into the core circuit. In addition, the ESD protection mechanism provided by the present invention has a higher current-carrying capability (which can avoid/reduce the electromigration effect) and a smaller parasitic capacitance.
Drawings
FIG. 1 is a functional block diagram of an integrated circuit according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an embodiment of a partial structure of the ESD protection architecture shown in FIG. 1.
FIG. 3 is a schematic diagram of one embodiment of a layout of the conductive layer shown in FIG. 2.
FIG. 4 is a schematic diagram of one embodiment of a layout of the conductive layer shown in FIG. 2.
FIG. 5 is a schematic diagram of one embodiment of a layout of the conductive layer shown in FIG. 2.
FIG. 6 is a schematic diagram of one embodiment of a layout of the conductive layer shown in FIG. 2.
FIG. 7 is a flowchart of one embodiment of a method for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad.
Description of reference numerals:
100 integrated circuit
102 conductive gasket
104 core circuit
110 ESD protection architecture
122. 124 clamping element
231-237, 431, 531, 631 conductive layer
241. 242, 243 electric connecting part
352. 452, 552, 652 first conductive portion
353. 453, 553, 653 isolation section
354. 454, 554, 654 a second conductive portion
710. 720, 730
A11, A12, A21, A22, A31, A32, A41, A42 conduction directions
VDD Power supply Voltage
GND grounding voltage
EESDElectrostatic discharge event
IESDElectrostatic discharge current
D1, D2 diode
Detailed Description
In the written description and in the claims, certain terms are used to refer to particular elements. Those skilled in the art having the common general knowledge of will appreciate that manufacturers may refer to a component by different names. In the present specification and the claims that follow, the difference in the name of the device is not used as the means for distinguishing between the devices, but the difference in the function of the device is used as the reference for distinguishing between the devices. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Moreover, the term "coupled" is intended to encompass any direct or indirect electrical connection. Accordingly, if a first apparatus is described as being electrically connected to a second apparatus, it is contemplated that the first apparatus may be connected to the second apparatus directly, or via other apparatuses or connecting segments.
FIG. 1 is a functional block diagram of an integrated circuit according to an embodiment of the present invention. The integrated circuit 100 may include, but is not limited to, a conductive pad 102, a core circuit 104, and an electrostatic discharge protection structure (esd protection structure) 110. The core circuit 104 is coupled between a power voltage VDD and a ground voltage GND, and can perform corresponding functions/operations (such as timing control or source driving) according to different control signals (not shown in fig. 1) received by the conductive pad 102. The esd protection structure 110 is coupled to the conductive pad 102 and the core circuit 104, and is used for protecting the core circuit 104 from an esd event E received by the conductive pad 102ESDThe injury of (1). In this embodiment, the ESD protection architecture 110 can include (but is not limited to) a clamping element 122 and a clamping element 124, wherein the clamping element 122 is coupled between the conductive pad 102 and the power voltage VDD to clamp the ESD event EESDThe clamping element 124 is coupled between the conductive pad 102 and the ground voltage GND for clamping the ESD event EESD. For example, and without limiting the scope of the present invention, clamp element 122 may be implemented by a diode D1, and/or clamp element 124 may be implemented by a diode D2.
To avoid responding to ESD events EESDAn electrostatic discharge current I is generatedESDThe ESD protection structure 110 can utilize a conductive path design without a clamping circuit (such as the clamping element 122/124) flowing into the core circuit 104(such as floorplan/layout (layout) design of conductive/metal layers) to control the ESD current IESDTo ensure the electrostatic discharge current IESDDoes not flow into the core circuitry 104 before flowing into the clamp circuitry. It is noted that, since the esd protection path and the related operation of the diode D1 (clamping element 122) shown in fig. 1 are similar/identical to the esd protection path and the related operation of the diode D2 (clamping element 124) shown in fig. 1, for the sake of brevity, the esd protection mechanism provided by the present invention is described below with reference to the esd protection path of the diode D1 shown in fig. 1. Further description is as follows.
Please refer to fig. 2 in conjunction with fig. 1. FIG. 2 is a diagram illustrating an embodiment of a partial structure of the ESD protection architecture 110 shown in FIG. 1. In this embodiment, the conductive pad 102 is coupled to the esd protection structure 110 through an electrical connection 241, wherein the electrical connection 241 can provide the esd current IESDThe conductive pad 102 conducts/leads to the ESD protection structure 110. In addition to the diode D1, the esd protection structure 110 may further include (but is not limited to) a plurality of conductive layers 231-237 (such as metal layers), an electrical connection 242, and an electrical connection 243, wherein the conductive layers 231-237 are formed under the conductive pad 102, and each of the conductive layers 231-237 is electrically connected between the conductive pad 102 and the diode D1. The conductive layer 231 is coupled to the diode D1 via the electrical connection 242 to provide a conductive path between the conductive pad 102 and the diode D1, and is coupled to the core circuit 104 via the electrical connection 243 to provide a conductive path between the conductive pad 102 and the core circuit 104.
By designing the conducting path, the ESD protection structure 110 can ensure the ESD current IESDAnd does not flow into the core circuitry 104 before flowing into the diode D1. Please refer to fig. 2 and fig. 3. Fig. 3 is a schematic diagram of an embodiment of a layout (floorplan layout) of the conductive layer 231 shown in fig. 2. In the embodiment shown in FIG. 3, the conductive layer 231 may include, but is not limited to, a first conductive portionA first conductive portion 352, an insulating portion 353 and a second conductive portion 354, wherein the insulating portion 353 is surrounded by the first conductive portion 352 and the second conductive portion 354, and the first conductive portion 352 is electrically connected between the conductive pad 102 and the second conductive portion 354. In addition, the electrical connection portion 242 is coupled between the first conductive portion 352 of the conductive layer 231 and the diode D1, and the electrical connection portion 243 is coupled between the second conductive portion 354 of the conductive layer 231 and the core circuit 104.
In the case where a current flows into the conductive layer 231 through the conductive pad 102, since the conductive layer 231 is electrically connected to the conductive pad 102 through the first conductive portion 352, the current may flow into the diode D1 or the core circuit 104 from the first conductive portion 352. For example, but the invention is not limited thereto, the current may flow into the diode D1 (corresponding to a first conduction path) through the first conductive portion 352 and the electrical connection 242 in sequence, or may flow into the core circuit 104 (corresponding to a second conduction path) through the first conductive portion 352, the second conductive portion 354 and the electrical connection 243 in sequence. It is noted that the isolation portion 353 can cause the current flowing in the conductive layer 231 to be conducted toward the electrical connection 242 (conducting direction a11), rather than directly toward the electrical connection 243 (conducting direction a 12). Since the electrical connection 242 is electrically connected to the diode D1, once the current flows through the first conductive portion 352 of the conductive layer 231, all (or almost all) of the current flows into the diode D1 through the electrical connection 242. In other words, the first conduction path is the main conduction path of the current.
Thus, when ESD event E occursESDWhen this occurs, the conductive layer 231 may receive the ESD current I from the conductive pad 102 using the first conductive portion 352ESDThe electrical connection portion 242 can conduct the ESD current IESD(all or almost all of the electrostatic discharge current IESD) Is conducted to the diode D1 to suppress the ESD current IESD. By designing the conductive path, the conductive layer 231 can preferentially transmit the ESD current IESDVia the first conductive part 352 and the electrical connection 242 are conducted to the diode D1 to prevent the ESD current IESDFlows directly into the core circuitry 104 rather than first flowing into diode D1. In other words, in the electrostatic discharge current IESDBefore flowing into the core circuit 104 through the first conductive portion 352, the second conductive portion 354 and the electrical connection portion 243, the electrical connection portion 242 may conduct all or almost all of the ESD current IESDLeading/conducting to diode D1. Thus, the ESD protection structure 110 can ensure all or almost all of the ESD current IESDFlows first into diode D1 instead of first into core circuitry 104.
In this embodiment, the isolation portion 353 can be implemented by an opening (e.g., an air gap opening) of the conductive layer 231. However, this is not intended as a limitation of the invention. For example: it is also feasible to implement isolation portion 353 from an electrically insulating material, such as a dielectric material. Another example is: the isolation portion 353 may also be an opening filled with an electrically insulating material. As long as the conductive layer 231 may include an isolated portion to prevent all (or almost all) of the received current from flowing directly into the electrical connection 243 (i.e., along the conduction direction a12) rather than into the electrical connection 242, design-related variations are within the scope of the present invention following the spirit of the present invention.
In addition, in the embodiment shown in fig. 2, the conductive layer 231 coupled to the core circuit 104 may be a top conductive layer (top conductive layer) formed above other conductive layers (i.e., the conductive layers 232-237), so that the conductive layer has a thicker thickness, a higher current capability (e.g., capable of preventing/reducing an electro-migration effect) and a smaller parasitic capacitance. Note that this is not intended as a limitation of the present invention. In a design variation, a conductive layer coupled to the core circuit 104 may also be one of the conductive layers 232-237 instead of the top conductive layer. In another design variation, a conductive layer coupled to the core circuit 104 may be a conductive layer with the largest thickness among the plurality of conductive layers 231-237.
The foregoing is by way of illustration only and is not intended as a limitation of the present invention. For example, the number of conductive layers formed between the conductive pad 102 and the diode D1 shown in fig. 2 is not intended to be a limitation of the present invention. In some embodiments, one or more conductive layers may be formed between a conductive pad (such as conductive pad 102 of FIG. 2) and a clamping element (such as diode D1 of FIG. 2). In addition, in some embodiments, the clamping element 122/124 shown in FIG. 1 can be implemented by other types of clamping circuits.
The floorplan layout shown in FIG. 3 is for illustration purposes only and is not intended to be a limitation of the present invention. Fig. 4-6 are schematic diagrams illustrating various embodiments of a floorplan layout for the conductive layer 231 shown in fig. 2. In the embodiment shown in fig. 4, the isolation portion 453 of the conductive layer 431 may enable a current (such as an esd current) flowing into the first conductive portion 452 to flow to/through the electrical connection 242 (conducting direction a21), and prevent the current from flowing to the electrical connection 243 (conducting direction a22) directly through the second conductive portion 454. In the embodiment shown in fig. 5, the isolation portion 553 of the conductive layer 531 may enable a current (such as an electrostatic discharge current) flowing into the first conductive portion 552 to flow to/through the electrical connection 242 (conducting direction a31), and prevent the current from flowing to the electrical connection 243 (conducting direction a32) directly through the second conductive portion 554. In the embodiment shown in fig. 6, the isolation portion 653 of the conductive layer 631 enables a current (such as an esd current) flowing into the first conductive portion 652 to flow to/through the electrical connection 242 (conducting direction a41), and prevents the current from flowing to the electrical connection 243 directly through the second conductive portion 654 (conducting direction a 42). As a person skilled in the art will understand after reading the related descriptions of fig. 1-3, it should be understood that the esd protection mechanisms shown in fig. 4-6 can preferentially guide/conduct the esd current to the clamping device, thereby preventing the esd current from directly flowing into the core circuit, and further description thereof is omitted here for brevity.
The ESD protection mechanism provided by the present invention can be summarized in FIG. 7. FIG. 7 is a flowchart of one embodiment of a method for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad. For convenience of description, the method shown in fig. 7 will be described below with reference to the esd protection structure 110 shown in fig. 2 and 3. Moreover, if the results are substantially the same, the steps do not have to be performed in the order shown in FIG. 7. For example, certain steps may be inserted therein. The method shown in fig. 7 can be briefly summarized as follows.
Step 710: the conductive layer 231 is provided under the conductive pad 102, wherein the conductive layer 231 may include a first conductive portion 352, an isolation portion 353, and a second conductive portion 354. The isolation portion 353 is surrounded by the first conductive portion 352 and the second conductive portion 354, and the first conductive portion 352 is electrically connected between the conductive pad 102 and the second conductive portion 354.
Step 720: the electrical connection 242 is coupled between the first conductive portion 352 of the conductive layer 231 and a clamping element (diode D1) for clamping the esd event.
Step 730: the electrical connection portion 243 is coupled between the second conductive portion 354 of the conductive layer 231 and the core circuit 104.
In one implementation, when the esd event occurs, the method may utilize the first conductive portion 352 of the conductive layer 231 to receive an esd current generated due to the esd event. In addition, before the esd current flows into the core circuit 104 through the second conductive portion 354 and the electrical connection portion 243 of the conductive layer 231, the method may utilize the electrical connection portion 242 to guide/conduct the esd current to the clamping element. Since the details of the operation of each step in the flow shown in fig. 7 can be understood by those skilled in the art after reading the related descriptions in fig. 1-6, further description is omitted here for brevity.
In summary, the ESD protection mechanism provided by the present invention can preferentially guide the ESD current to the clamping device through the design of the conductive path (e.g., the layout/layout of the conductive layer/metal layer), thereby preventing the ESD current from flowing into the core circuit directly. In addition, the ESD protection mechanism provided by the present invention has a higher current-carrying capability (which can avoid/reduce the electromigration effect) and a smaller parasitic capacitance.
Claims (18)
1. An ESD protection architecture for protecting a core circuit of an integrated circuit from an ESD event received by a conductive pad, the ESD protection architecture comprising:
a first conductive layer formed below the conductive pad, wherein the first conductive layer comprises a first conductive portion, an insulating portion and a second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion;
a clamping element for clamping the ESD event;
a first electrical connection portion coupled between the first conductive portion of the first conductive layer and the clamping element; and
a second electrical connection portion coupled between the second conductive portion of the first conductive layer and the core circuit.
2. The ESD protection architecture of claim 1, further comprising:
at least one second conductive layer formed below the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the first conductive layer is a top conductive layer formed over the at least one second conductive layer.
3. The ESD protection architecture of claim 1, further comprising:
at least one second conductive layer formed below the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer of the at least one second conductive layer.
4. The ESD protection architecture of claim 1, wherein when the ESD event occurs, the first conductive layer receives an ESD current generated by the ESD event using the first conductive portion; and the first electrical connection portion directs the ESD current to the clamping element before the ESD current flows into the core circuit through the second conductive portion and the second electrical connection portion.
5. The ESD protection structure of claim 1, wherein the isolation portion is an opening of the first conductive layer.
6. The ESD protection architecture of claim 1, wherein the clamping device comprises a diode.
7. An integrated circuit, comprising:
a conductive pad;
a core circuit; and
an ESD protection structure, coupled to the conductive pad and the core circuit, for protecting the core circuit from an ESD event received by the conductive pad, wherein the ESD protection structure comprises:
a first conductive layer formed below the conductive pad, wherein the first conductive layer comprises a first conductive portion, an insulating portion and a second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion;
a clamping element for clamping the ESD event; a first electrical connection portion coupled between the first conductive portion of the first conductive layer and the clamping element; and
a second electrical connection portion coupled between the second conductive portion of the first conductive layer and the core circuit.
8. The integrated circuit of claim 7, wherein the ESD protection architecture further comprises:
at least one second conductive layer formed below the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the first conductive layer is a top conductive layer formed over the at least one second conductive layer.
9. The integrated circuit of claim 7, wherein the ESD protection architecture further comprises:
at least one second conductive layer formed below the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer of the at least one second conductive layer.
10. The integrated circuit of claim 7, wherein when the esd event occurs, the first conductive layer receives an esd current generated by the esd event through the first conductive portion; and the first electrical connection portion directs the ESD current to the clamping element before the ESD current flows into the core circuit through the second conductive portion and the second electrical connection portion.
11. The integrated circuit of claim 7, wherein the isolation portion is an opening of the first conductive layer.
12. The integrated circuit of claim 7, wherein the clamping element comprises a diode.
13. A method for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad, comprising:
providing a first conductive layer under the conductive pad, wherein the first conductive layer comprises a first conductive portion, an insulating portion and a second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion;
coupling a first electrical connection between the first conductive portion of the first conductive layer and a clamping element, wherein the clamping element is configured to clamp the ESD event; and
a second electrical connection is coupled between the second conductive portion of the first conductive layer and the core circuit.
14. The method of claim 13, further comprising the steps of:
providing at least one second conductive layer under the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the first conductive layer is a top conductive layer formed over the at least one second conductive layer.
15. The method of claim 13, further comprising the steps of:
providing at least one second conductive layer under the conductive pad, wherein the at least one second conductive layer is electrically connected between the conductive pad and the clamping element;
wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer of the at least one second conductive layer.
16. The method of claim 13, further comprising the steps of:
when the electrostatic discharge event occurs, receiving an electrostatic discharge current generated by the electrostatic discharge event by using the first conductive part of the first conductive layer; and
the first electrical connection portion is used to conduct the ESD current to the clamping element before the ESD current flows into the core circuit through the second conductive portion and the second electrical connection portion.
17. The method of claim 13, wherein the isolated portion is an opening of the first conductive layer.
18. The method of claim 13, wherein the clamping element comprises a diode.
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| CN201710549844.5A CN109216345B (en) | 2017-07-07 | 2017-07-07 | Electrostatic discharge protection architecture, integrated circuit and protection method of core circuit thereof |
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| CN201710549844.5A CN109216345B (en) | 2017-07-07 | 2017-07-07 | Electrostatic discharge protection architecture, integrated circuit and protection method of core circuit thereof |
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| CN109216345A (en) | 2019-01-15 |
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