TWI666755B - Electrostatic discharge protection structure, integrated circuit, and method for protecting core circuit of integrated circuit from electrostatic discharge event received by conductive pad of the integrated circuit - Google Patents

Electrostatic discharge protection structure, integrated circuit, and method for protecting core circuit of integrated circuit from electrostatic discharge event received by conductive pad of the integrated circuit Download PDF

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TWI666755B
TWI666755B TW106122363A TW106122363A TWI666755B TW I666755 B TWI666755 B TW I666755B TW 106122363 A TW106122363 A TW 106122363A TW 106122363 A TW106122363 A TW 106122363A TW I666755 B TWI666755 B TW I666755B
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conductive
conductive layer
electrostatic discharge
pad
clamping element
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TW201907540A (en
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陳鴻毅
蔡青霖
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奇景光電股份有限公司
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Abstract

用來保護積體電路之核心電路免受導電墊片所接收之靜電放電事件的傷害的靜電放電防護架構,其包含第一導電層、箝制元件、第一電性連接部以第二電性連接部。該第一導電層形成於該導電墊片的下方,並包含第一導電部份、隔絕部份及第二導電部份。該隔絕部份由該第一導電部份與該第二導電部份所包圍。該第一導電部份電連接於該導電墊片與該第二導電部份之間。該箝制元件用以箝制該靜電放電事件。該第一電性連接部耦接於該第一導電層之該第一導電部份與該箝制元件之間。該第二電性連接部耦接於該第一導電層之該第二導電部份與該核心電路之間。An electrostatic discharge protection structure for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive gasket, which includes a first conductive layer, a clamping element, and a first electrical connection portion connected by a second electrical connection. unit. The first conductive layer is formed under the conductive pad and includes a first conductive portion, an isolation portion, and a second conductive portion. The isolation portion is surrounded by the first conductive portion and the second conductive portion. The first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.

Description

靜電放電防護架構、積體電路以及用來保護積體電路之核心電路免受導電墊片所接收之靜電放電事件的傷害的方法Electrostatic discharge protection structure, integrated circuit and method for protecting core circuit of integrated circuit from electrostatic discharge event received by conductive pad

本發明係關於靜電放電防護(electrostatic discharge protection,ESD protection),尤指一種利用導電層的布圖規劃設計(floor plan design)來保護積體電路之核心電路免受靜電放電事件的傷害的靜電放電防護架構,及其相關的積體電路與靜電放電防護方法。The invention relates to electrostatic discharge protection (ESD protection), in particular to an electrostatic discharge that uses a floor plan design of a conductive layer to protect the core circuit of an integrated circuit from an electrostatic discharge event. Protection architecture, and related integrated circuit and electrostatic discharge protection methods.

為了避免積體電路之核心電路(core circuit)因為靜電放電電流(ESD current)的緣故而損壞,積體電路會採用設置於其中的箝制電路(clamp circuit)來箝制靜電放電電流。然而,一旦靜電放電電流在流入該箝制電路以前先流入核心電路,積體電路並無法避免核心電路遭受靜電放電的傷害。因此,需要一種創新的靜電放電防護機制來提昇靜電放電防護的能力。In order to prevent the core circuit of the integrated circuit from being damaged due to electrostatic discharge current (ESD current), the integrated circuit will use a clamp circuit provided therein to clamp the electrostatic discharge current. However, once the electrostatic discharge current flows into the core circuit before flowing into the clamping circuit, the integrated circuit cannot prevent the core circuit from being damaged by the electrostatic discharge. Therefore, an innovative electrostatic discharge protection mechanism is needed to enhance the ability of electrostatic discharge protection.

有鑑於此,本發明的目的之一在於提供一種利用導電層的布圖規劃設計(floor plan design)來保護積體電路之核心電路免受靜電放電事件的傷害的靜電放電防護架構,及其相關的積體電路與靜電放電防護方法,來解決上述問題。In view of this, one object of the present invention is to provide an electrostatic discharge protection architecture that uses a floor plan design of a conductive layer to protect a core circuit of an integrated circuit from an electrostatic discharge event, and related Integrated circuit and electrostatic discharge protection method to solve the above problems.

依據本發明之一實施例,其揭示一種靜電放電防護架構。該靜電放電防護架構用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害。該靜電放電防護架構包含有一第一導電層、一箝制元件、一第一電性連接部以及一第二電性連接部。該第一導電層形成於該導電墊片的下方,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間。該箝制元件用以箝制該靜電放電事件。該第一電性連接部耦接於該第一導電層之該第一導電部份與該箝制元件之間。該第二電性連接部耦接於該第一導電層之該第二導電部份與該核心電路之間。According to an embodiment of the present invention, an electrostatic discharge protection architecture is disclosed. The electrostatic discharge protection structure is used to protect a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad. The electrostatic discharge protection structure includes a first conductive layer, a clamping element, a first electrical connection portion and a second electrical connection portion. The first conductive layer is formed under the conductive pad, wherein the first conductive layer includes a first conductive portion, an insulating portion, and a second conductive portion, and the insulating portion is formed by the first conductive portion. A portion is surrounded by the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.

依據本發明之一實施例,其揭示一種積體電路。該積體電路包含一導電墊片、一核心電路以及一靜電放電防護架構。該靜電放電防護架構耦接於該導電墊片與該核心電路,用以保護該核心電路免受該導電墊片所接收之一靜電放電事件的傷害。該靜電放電防護架構包含有一第一導電層、一箝制元件、一第一電性連接部以及一第二電性連接部。該第一導電層形成於該導電墊片的下方,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間。該箝制元件用以箝制該靜電放電事件。該第一電性連接部耦接於該第一導電層之該第一導電部份與該箝制元件之間。該第二電性連接部耦接於該第一導電層之該第二導電部份與該核心電路之間。According to an embodiment of the present invention, it discloses a integrated circuit. The integrated circuit includes a conductive pad, a core circuit and an electrostatic discharge protection structure. The electrostatic discharge protection structure is coupled to the conductive pad and the core circuit to protect the core circuit from being damaged by an electrostatic discharge event received by the conductive pad. The electrostatic discharge protection structure includes a first conductive layer, a clamping element, a first electrical connection portion and a second electrical connection portion. The first conductive layer is formed under the conductive pad, wherein the first conductive layer includes a first conductive portion, an insulating portion, and a second conductive portion, and the insulating portion is formed by the first conductive portion. A portion is surrounded by the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion. The clamping element is used for clamping the electrostatic discharge event. The first electrical connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element. The second electrical connection portion is coupled between the second conductive portion of the first conductive layer and the core circuit.

依據本發明之一實施例,其揭示一種用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害的方法。該方法包含下列步驟:於該導電墊片的下方提供一第一導電層,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間;將一第一電性連接部耦接於該第一導電層之該第一導電部份與一箝制元件之間,其中該箝制元件用於箝制該靜電放電事件;以及將一第二電性連接部耦接於該第一導電層之該第二導電部份與該核心電路之間。According to an embodiment of the present invention, a method for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad is disclosed. The method includes the following steps: providing a first conductive layer under the conductive pad, wherein the first conductive layer includes a first conductive portion, an insulating portion, and a second conductive portion, the insulating portion Is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion; a first electrical connection is made Part is coupled between the first conductive part of the first conductive layer and a clamping element, wherein the clamping element is used for clamping the electrostatic discharge event; and a second electrical connection part is coupled to the first Between the second conductive portion of the conductive layer and the core circuit.

本發明所提供之靜電放電防護機制可藉由導電路徑的設計(例如:導電層/金屬層的布圖規劃/佈局設計),優先將靜電放電電流導引至箝制元件,進而防止靜電放電電流直接流入核心電路。此外,本發明所提供之靜電放電防護機制可具有較高的電流承受能力(其可避免/減少電遷移效應)以及較小的寄生電容。The electrostatic discharge protection mechanism provided by the present invention can preferentially direct the electrostatic discharge current to the clamping component through the design of the conductive path (such as the layout planning / layout design of the conductive layer / metal layer), thereby preventing the electrostatic discharge current from directly Flow into the core circuit. In addition, the electrostatic discharge protection mechanism provided by the present invention can have a higher current carrying capacity (which can avoid / reduce the electromigration effect) and a smaller parasitic capacitance.

在說明書及後續的申請專利範圍當中使用了某些詞彙來指稱特定的元件。所屬領域中具有通常知識者應可理解,製造商可能會用不同的名詞來稱呼同樣的元件。本說明書及後續的申請專利範圍並不以名稱的差異來作為區別元件的方式,而是以元件在功能上的差異來作為區別的基準。在通篇說明書及後續的請求項當中所提及的「包含」係為一開放式的用語,故應解釋成「包含但不限定於」。此外,「耦接」一詞在此係包含任何直接及間接的電氣連接手段。因此,若文中描述一第一裝置電性連接於一第二裝置,則代表該第一裝置可直接連接於該第二裝置,或透過其他裝置或連接手段間接地連接至該第二裝置。The use of “certain vocabulary” in the specification and subsequent application areas refers to specific components. Those who belong to this field should be understandable, and manufacturers may use different terms to refer to the same components. The scope of this specification and subsequent applications does not use the difference in names as a means of distinguishing components, but the difference in function of components as a basis for distinction. The "containment" mentioned in the entire specification and subsequent claims is an open-ended term and should be interpreted as "including but not limited to". In addition, the term "coupling" includes any direct and indirect electrical connection means. Therefore, the description in the text that a first device is electrically connected to a second device means that the first device can be directly connected to the second device, or indirectly connected to the second device through other devices or connection means.

第1圖為本發明積體電路之一實施例的功能方塊示意圖。積體電路100可包含(但不限於)一導電墊片(conductive pad)102、一核心電路104以及一靜電放電防護架構(ESD protection structure)110。核心電路104耦接於一電源電壓VDD與一接地電壓GND之間,並可依據導電墊片102所接收之不同的控制訊號(未繪示於第1圖中)來執行相對應的功能/操作(諸如時序控制(timing control)或源極驅動(source driving))。靜電放電防護架構110耦接於導電墊片102與核心電路104,並可用來保護核心電路104免受導電墊片102所接收之一靜電放電事件EESD 的傷害。於此實施例中,靜電放電防護架構110可包含(但不限於)一箝制元件122以及一箝制元件124,其中箝制元件122耦接於導電墊片102與電源電壓VDD之間以箝制靜電放電事件EESD ,而箝制元件124則是耦接於導電墊片102與接地電壓GND之間以箝制靜電放電事件EESD 。舉例來說(但本發明不限於此),箝制元件122可由一二極體D1來實施,及/或箝制元件124可由一二極體D2來實施。FIG. 1 is a functional block diagram of an integrated circuit according to an embodiment of the present invention. The integrated circuit 100 may include, but is not limited to, a conductive pad 102, a core circuit 104, and an ESD protection structure 110. The core circuit 104 is coupled between a power voltage VDD and a ground voltage GND, and can perform corresponding functions / operations according to different control signals (not shown in FIG. 1) received by the conductive pad 102. (Such as timing control or source driving). The ESD protection structure 110 is coupled to the conductive pad 102 and the core circuit 104 and can be used to protect the core circuit 104 from being damaged by one of the electrostatic discharge events E ESD received by the conductive pad 102. In this embodiment, the ESD protection architecture 110 may include (but is not limited to) a clamping element 122 and a clamping element 124, wherein the clamping element 122 is coupled between the conductive pad 102 and the power supply voltage VDD to clamp the electrostatic discharge event. E ESD , and the clamping element 124 is coupled between the conductive pad 102 and the ground voltage GND to clamp the electrostatic discharge event E ESD . By way of example (but the invention is not limited thereto), the clamping element 122 may be implemented by a diode D1, and / or the clamping element 124 may be implemented by a diode D2.

為了避免因應靜電放電事件EESD 所產生之一靜電放電電流IESD 未經一箝制電路(諸如箝制元件122/124)就直接流入核心電路104,靜電放電防護架構110可利用傳導路徑/導通路徑(conductive path)的設計(諸如導電層/金屬層的布圖規劃/佈局(floorplan/layout)設計)來控制靜電放電電流IESD 的流向,確保靜電放電電流IESD 不會在流入該箝制電路之前先流入核心電路104。值得注意的是,由於第1圖所示之二極體D1(箝制元件122)所涉及的靜電放電防護路徑及其相關操作與第1圖所示之二極體D2(箝制元件124)所涉及的靜電放電防護路徑及其相關操作相似/相同,為了簡潔起見,以下係以第1圖所示之二極體D1所涉及的靜電放電防護路徑來說明本發明所提供之靜電放電防護機制。進一步的說明如下。In order to avoid an electrostatic discharge current I ESD generated in response to an electrostatic discharge event E ESD flowing directly into the core circuit 104 without a clamping circuit (such as clamping elements 122/124), the ESD protection architecture 110 may use a conduction path / conduction path ( conductive path) design (such as floorplan / layout design of conductive layer / metal layer) to control the direction of the electrostatic discharge current I ESD to ensure that the electrostatic discharge current I ESD does not flow into the clamping circuit. Flow into the core circuit 104. It is worth noting that because the electrostatic discharge protection path and related operations related to diode D1 (clamping element 122) shown in FIG. 1 are related to diode D2 (clamping element 124) shown in FIG. 1 The ESD protection path and its related operations are similar / same. For the sake of brevity, the following describes the ESD protection mechanism provided by the present invention with the ESD protection path related to the diode D1 shown in FIG. 1. Further explanation is as follows.

請連同第1圖來參閱第2圖。第2圖為第1圖所示之靜電放電防護架構110之一局部結構的一實施例的示意圖。於此實施例中,導電墊片102係經由一電性連接部241來耦接於靜電放電防護架構110,其中電性連接部241可將靜電放電電流IESD 由導電墊片102傳導/導引至靜電放電防護架構110。除了二極體D1,靜電放電防護架構110另可包含(但不限於)複數個導電層231~237(諸如複數個金屬層)、一電性連接部242以及一電性連接部243,其中複數個導電層231~237均形成於導電墊片102的下方,且複數個導電層231~237之中的每一導電層均電連接於導電墊片102與二極體D1之間。導電層231係經由電性連接部242來耦接至二極體D1以提供導電墊片102與二極體D1之間的傳導路徑,以及經由電性連接部243來耦接至核心電路104以提供導電墊片102與核心電路104之間的傳導路徑。Please refer to Figure 2 together with Figure 1. FIG. 2 is a schematic diagram of an embodiment of a partial structure of the ESD protection structure 110 shown in FIG. 1. In this embodiment, the conductive pad 102 is coupled to the ESD protection structure 110 via an electrical connection portion 241. The electrical connection portion 241 can conduct / guide the electrostatic discharge current I ESD from the conductive pad 102. To the electrostatic discharge protection structure 110. In addition to the diode D1, the ESD protection structure 110 may further include (but is not limited to) a plurality of conductive layers 231 to 237 (such as a plurality of metal layers), an electrical connection portion 242, and an electrical connection portion 243. Each of the conductive layers 231 to 237 is formed below the conductive pad 102, and each of the plurality of conductive layers 231 to 237 is electrically connected between the conductive pad 102 and the diode D1. The conductive layer 231 is coupled to the diode D1 through the electrical connection portion 242 to provide a conductive path between the conductive pad 102 and the diode D1, and is coupled to the core circuit 104 through the electrical connection portion 243 to A conductive path is provided between the conductive pad 102 and the core circuit 104.

藉由傳導路徑的設計,靜電放電防護架構110可確保靜電放電電流IESD 不會在流入二極體D1之前就先流入核心電路104。請一併參閱第2圖與第3圖。第3圖為第2圖所示之導電層231之一布圖規劃佈局(floorplan layout)的一實施例的示意圖。於第3圖所示之實施例中,導電層231可包含(但不限於)一第一導電部份(first conductive portion)352、一隔絕部份(insulating portion)353以及一第二導電部份354,其中隔絕部份353係由第一導電部份352與第二導電部份354所包圍,以及第一導電部份352係電連接於導電墊片102與第二導電部份354之間。此外,電性連接部242係耦接於導電層231之第一導電部份352與二極體D1之間,而電性連接部243則是耦接於導電層231之第二導電部份354與核心電路104之間。Through the design of the conduction path, the ESD protection structure 110 can ensure that the ESD current I ESD does not flow into the core circuit 104 before flowing into the diode D1. Please refer to Figure 2 and Figure 3 together. FIG. 3 is a schematic diagram of an embodiment of a floorplan layout of one of the conductive layers 231 shown in FIG. 2. In the embodiment shown in FIG. 3, the conductive layer 231 may include (but is not limited to) a first conductive portion 352, an insulating portion 353, and a second conductive portion 354, wherein the isolation portion 353 is surrounded by the first conductive portion 352 and the second conductive portion 354, and the first conductive portion 352 is electrically connected between the conductive pad 102 and the second conductive portion 354. In addition, the electrical connection portion 242 is coupled between the first conductive portion 352 of the conductive layer 231 and the diode D1, and the electrical connection portion 243 is coupled to the second conductive portion 354 of the conductive layer 231. And the core circuit 104.

在一電流經由導電墊片102流入導電層231的情形下,由於導電層231係經由第一導電部份352來與導電墊片102電連接,因此該電流可能會從第一導電部份352流入二極體D1或核心電路104。舉例來說(但本發明不限於此),該電流可依序經由第一導電部份352及電性連接部242而流入二極體D1(對應於一第一傳導路徑),或可依序經由第一導電部份352、第二導電部份354及電性連接部243而流入核心電路104(對應於一第二傳導路徑)。值得注意的是,隔絕部份353可致使流入導電層231之該電流朝著電性連接部242的方向(傳導方向A11)來傳導,而不是直接朝著電性連接部243的方向(傳導方向A12)來傳導。由於電性連接部242係電連接於二極體D1,因此,一旦該電流流經導電層231之第一導電部份352,該電流之全部(或幾乎全部)會經由電性連接部242而流入二極體D1。換言之,上述第一傳導路徑係為該電流的主要傳導路徑。In the case where a current flows into the conductive layer 231 through the conductive pad 102, since the conductive layer 231 is electrically connected to the conductive pad 102 through the first conductive portion 352, the current may flow in from the first conductive portion 352 Diode D1 or core circuit 104. For example (but the present invention is not limited to this), the current may flow into the diode D1 (corresponding to a first conductive path) sequentially through the first conductive portion 352 and the electrical connection portion 242, or may be sequentially The first conductive portion 352, the second conductive portion 354, and the electrical connection portion 243 flow into the core circuit 104 (corresponding to a second conductive path). It is worth noting that the insulating portion 353 can cause the current flowing into the conductive layer 231 to be conducted in the direction of the electrical connection portion 242 (conduction direction A11), rather than directly in the direction of the electrical connection portion 243 (conduction direction) A12) to conduct. Since the electrical connection portion 242 is electrically connected to the diode D1, once the current flows through the first conductive portion 352 of the conductive layer 231, all (or almost all) of the current will pass through the electrical connection portion 242. Flow into diode D1. In other words, the first conductive path is the main conductive path of the current.

因此,當靜電放電事件EESD 發生時,導電層231可利用第一導電部份352接收來自導電墊片102的靜電放電電流IESD ,而電性連接部242便可將靜電放電電流IESD (全部或幾乎全部的靜電放電電流IESD )導引/傳導至二極體D1以抑制靜電放電電流IESD 。藉由傳導路徑的設計,導電層231可優先將靜電放電電流IESD 經由第一導電部份352與電性連接部242導引/傳導至二極體D1,進而避免靜電放電電流IESD 直接流入核心電路104而不是先流入二極體D1。換言之,在靜電放電電流IESD 經由第一導電部份352、第二導電部份354與電性連接部243流入核心電路104之前,電性連接部242可將全部或幾乎全部的靜電放電電流IESD 導引/傳導至二極體D1。如此一來,靜電放電防護架構110可確保全部或幾乎全部的靜電放電電流IESD 先流入二極體D1而不是先流入核心電路104。Therefore, when the electrostatic discharge event E ESD occurs, the conductive layer 231 can receive the electrostatic discharge current I ESD from the conductive pad 102 by using the first conductive portion 352, and the electrical connection portion 242 can transfer the electrostatic discharge current I ESD ( All or almost all of the electrostatic discharge current I ESD ) is guided / conducted to the diode D1 to suppress the electrostatic discharge current I ESD . By designing the conductive paths, conductive layer 231 may preferentially I ESD ESD current through the first conductive portion 352 is electrically connected to the guide portion 242 and / or two conducting diode D1, thereby preventing the ESD current I ESD flows directly into The core circuit 104 flows into the diode D1 instead of first. In other words, before the electrostatic discharge current I ESD flows into the core circuit 104 through the first conductive portion 352, the second conductive portion 354, and the electrical connection portion 243, the electrical connection portion 242 can discharge all or almost all of the electrostatic discharge current I ESD is directed / conducted to diode D1. In this way, the ESD protection architecture 110 can ensure that all or almost all of the ESD current I ESD flows into the diode D1 first and not into the core circuit 104 first.

於此實施例中,隔絕部份353可由導電層231的一開口(opening)(諸如一空氣隙開口)來實施。然而,這並非用來作為本發明的限制。例如:採用一電性絕緣材料(electrically insulating material)(諸如一介電材質(dielectric material))來實作出隔絕部份353也是可行的。又例如:隔絕部份353也可是由電性絕緣材料所填滿的開口。只要導電層231可包含一隔絕部份以防止所接收之電流的全部(或幾乎全部)直接流入電性連接部243(亦即,沿著傳導方向A12)而不是流入電性連接部242,設計上相關的變化均遵循本發明的精神而落入本發明的範疇。In this embodiment, the isolation portion 353 may be implemented by an opening (such as an air gap opening) of the conductive layer 231. However, this is not intended as a limitation of the present invention. For example, it is also feasible to use an electrically insulating material (such as a dielectric material) to implement the insulating portion 353. For another example: the insulating portion 353 may also be an opening filled with an electrically insulating material. As long as the conductive layer 231 can include an insulating portion to prevent all (or almost all) of the received current from flowing directly into the electrical connection portion 243 (ie, along the conduction direction A12) instead of flowing into the electrical connection portion 242, design The above related changes all follow the spirit of the present invention and fall into the scope of the present invention.

此外,於第2圖所示之實施例中,耦接於核心電路104之導電層231可以是形成於其他導電層(亦即,複數個導電層232~237)之上方的一頂導電層(top conductive layer),因而可具有較厚的厚度、較高的電流承受能力(current capability)(可避免/減少電遷移效應(electromigration effect,EM effect))以及較小的寄生電容。請注意,這並非用來作為本發明的限制。於一設計變化中,耦接於核心電路104之一導電層也可以是複數個導電層232~237之其一而不是頂導電層。於另一設計變化中,耦接於核心電路104之一導電層可以是複數個導電層231~237之中具有最大的厚度的一導電層。In addition, in the embodiment shown in FIG. 2, the conductive layer 231 coupled to the core circuit 104 may be a top conductive layer (above other conductive layers (ie, a plurality of conductive layers 232 to 237)). top conductive layer), so it can have a thicker thickness, higher current capability (to avoid / reduce electromigration effect (EM effect)), and smaller parasitic capacitance. Please note that this is not intended as a limitation of the present invention. In a design change, a conductive layer coupled to the core circuit 104 may be one of the plurality of conductive layers 232 to 237 instead of the top conductive layer. In another design variation, a conductive layer coupled to the core circuit 104 may be a conductive layer having the largest thickness among the plurality of conductive layers 231 to 237.

以上所述係僅供說明之需,並非用來作為本發明的限制。舉例來說,第2圖所示之形成於導電墊片102與二極體D1之間的導電層的層數並非用來作為本發明的限制。於某些實施例中,可於一導電墊片(諸如第2圖所示之導電墊片102)與一箝制元件(諸如第2圖所示之二極體D1)之間形成一層或多層的導電層。此外,於某些實施例中,第1圖所示之箝制元件122/124也可由其他類型的箝制電路來實施。The above description is for illustrative purposes only and is not intended as a limitation of the present invention. For example, the number of layers of the conductive layer formed between the conductive pad 102 and the diode D1 shown in FIG. 2 is not used as a limitation of the present invention. In some embodiments, one or more layers may be formed between a conductive pad (such as conductive pad 102 shown in FIG. 2) and a clamping element (such as diode D1 shown in FIG. 2). Conductive layer. In addition, in some embodiments, the clamping elements 122/124 shown in FIG. 1 may be implemented by other types of clamping circuits.

第3圖所示之布圖規劃佈局係僅供說明之需,並非用來作為本發明的限制。第4圖~第6圖繪示了第2圖所示之導電層231之布圖規劃佈局的多個實施例的示意圖。於第4圖所示之實施例中,導電層431之隔絕部份453可致使流入第一導電部份452之一電流(諸如靜電放電電流)流向/流經電性連接部242(傳導方向A21),防止該電流直接經由第二導電部份454流向電性連接部243(傳導方向A22)。於第5圖所示之實施例中,導電層531之隔絕部份553可致使流入第一導電部份552之一電流(諸如靜電放電電流)流向/流經電性連接部242(傳導方向A31),防止該電流直接經由第二導電部份554流向電性連接部243(傳導方向A32)。於第6圖所示之實施例中,導電層631之隔絕部份653可致使流入第一導電部份652之一電流(諸如靜電放電電流)流向/流經電性連接部242(傳導方向A41),防止該電流直接經由第二導電部份654流向電性連接部243(傳導方向A42)。由於熟習技藝者經由閱讀第1圖~第3圖的相關說明之後,應可了解第4圖~第6圖所示之靜電放電防護機制可優先將靜電放電電流導引/傳導至箝制元件,進而避免靜電放電電流直接流入核心電路,是故進一步的說明在此便不再贅述。The layout plan layout shown in FIG. 3 is for illustrative purposes only and is not intended as a limitation of the present invention. FIG. 4 to FIG. 6 are schematic diagrams illustrating various embodiments of the layout planning and layout of the conductive layer 231 shown in FIG. 2. In the embodiment shown in FIG. 4, the insulating portion 453 of the conductive layer 431 may cause a current (such as an electrostatic discharge current) flowing into the first conductive portion 452 to flow through the electrical connection portion 242 (conduction direction A21). ) To prevent the current from flowing directly to the electrical connection portion 243 through the second conductive portion 454 (conduction direction A22). In the embodiment shown in FIG. 5, the insulating portion 553 of the conductive layer 531 can cause a current (such as an electrostatic discharge current) flowing into the first conductive portion 552 to flow / flow through the electrical connection portion 242 (conduction direction A31). ) To prevent the current from flowing directly to the electrical connection portion 243 through the second conductive portion 554 (conduction direction A32). In the embodiment shown in FIG. 6, the insulating portion 653 of the conductive layer 631 can cause a current (such as an electrostatic discharge current) flowing into the first conductive portion 652 to flow through the electrical connection portion 242 (conduction direction A41). ) To prevent the current from flowing directly to the electrical connection portion 243 (the conduction direction A42) through the second conductive portion 654. As a skilled artist, after reading the relevant descriptions in Figures 1 to 3, they should be able to understand that the electrostatic discharge protection mechanism shown in Figures 4 to 6 can preferentially guide / conduct the electrostatic discharge current to the clamping components, and then It is avoided that the electrostatic discharge current flows directly into the core circuit, so further explanation will not be repeated here.

本發明所提供之靜電放電防護機制可簡單歸納於第7圖。第7圖為本發明用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害的方法的一實施例的流程圖。為了方便說明,以下搭配第2圖與第3圖所示之靜電放電防護結構110來說明第7圖所示之方法。此外,假若所得到的結果實質上大致相同,則步驟不一定要依照第7圖所示之次序來執行之。舉例來說,可安插某些步驟於其中。第7圖所示之方法可簡單歸納如下。The electrostatic discharge protection mechanism provided by the present invention can be simply summarized in FIG. 7. FIG. 7 is a flowchart of an embodiment of a method for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad. For convenience of explanation, the method shown in FIG. 7 is described below with the electrostatic discharge protection structure 110 shown in FIG. 2 and FIG. 3. In addition, if the results obtained are substantially the same, the steps need not be performed in the order shown in FIG. 7. For example, certain steps can be inserted in it. The method shown in Figure 7 can be briefly summarized as follows.

步驟710:於導電墊片102的下方提供導電層231,其中導電層231可包含第一導電部份352、隔絕部份353以及第二導電部份354。隔絕部份353係由第一導電部份352與第二導電部份354所包圍,以及第一導電部份352係電連接於導電墊片102與第二導電部份354之間。Step 710: Provide a conductive layer 231 under the conductive pad 102. The conductive layer 231 may include a first conductive portion 352, an isolation portion 353, and a second conductive portion 354. The isolation portion 353 is surrounded by the first conductive portion 352 and the second conductive portion 354, and the first conductive portion 352 is electrically connected between the conductive pad 102 and the second conductive portion 354.

步驟720:將電性連接部242耦接於導電層231之第一導電部份352與一箝制元件(二極體D1)之間,其中該箝制元件用以箝制該靜電放電事件。Step 720: The electrical connection portion 242 is coupled between the first conductive portion 352 of the conductive layer 231 and a clamping element (diode D1), wherein the clamping element is used to clamp the electrostatic discharge event.

步驟730:將電性連接部243耦接於導電層231之第二導電部份354與核心電路104之間。Step 730: The electrical connection portion 243 is coupled between the second conductive portion 354 of the conductive layer 231 and the core circuit 104.

於一實作範例中,當該靜電放電事件發生時,該方法可利用導電層231之第一導電部份352接收因應該靜電放電事件所產生之一靜電放電電流。此外,在該靜電放電電流經由導電層231之第二導電部份354與電性連接部243流入核心電路104之前,該方法可利用電性連接部242將該靜電放電電流導引/傳導至該箝制元件。由於熟習技藝者經由閱讀第1圖~第6圖的相關說明之後,應可了解第7圖所示之流程中每一步驟的操作細節,故進一步的說明在此便不再贅述。In an implementation example, when the electrostatic discharge event occurs, the method can use the first conductive portion 352 of the conductive layer 231 to receive an electrostatic discharge current generated in response to the electrostatic discharge event. In addition, before the electrostatic discharge current flows into the core circuit 104 through the second conductive portion 354 of the conductive layer 231 and the electrical connection portion 243, the method can use the electrical connection portion 242 to guide / conduct the electrostatic discharge current to the core circuit 104. Clamping components. As the skilled artisan can understand the operation details of each step in the process shown in FIG. 7 after reading the relevant descriptions of FIG. 1 to FIG. 6, further description will not be repeated here.

綜上所述,本發明所提供之靜電放電防護機制可藉由導電路徑的設計(例如:導電層/金屬層的布圖規劃/佈局設計),優先將靜電放電電流導引至箝制元件,進而防止靜電放電電流直接流入核心電路。此外,本發明所提供之靜電放電防護機制可具有較高的電流承受能力(其可避免/減少電遷移效應)以及較小的寄生電容。 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。In summary, the electrostatic discharge protection mechanism provided by the present invention can preferentially guide the electrostatic discharge current to the clamping component through the design of the conductive path (for example, the layout planning / layout design of the conductive layer / metal layer). Prevent electrostatic discharge current from flowing directly into the core circuit. In addition, the electrostatic discharge protection mechanism provided by the present invention can have a higher current carrying capacity (which can avoid / reduce the electromigration effect) and a smaller parasitic capacitance. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of patent application of the present invention shall fall within the scope of the present invention.

100‧‧‧積體電路100‧‧‧Integrated Circuit

102‧‧‧導電墊片102‧‧‧Conductive gasket

104‧‧‧核心電路104‧‧‧Core Circuit

110‧‧‧靜電放電防護架構110‧‧‧ Electrostatic discharge protection architecture

122、124‧‧‧箝制元件122, 124‧‧‧ clamping elements

231~237、431、531、631‧‧‧導電層231 ~ 237, 431, 531, 631‧‧‧ conductive layer

241、242、243‧‧‧電性連接部241, 242, 243‧‧‧ Electrical connection

352、452、552、652‧‧‧第一導電部份352, 452, 552, 652‧‧‧ the first conductive part

353、453、553、653‧‧‧隔絕部份353, 453, 553, 653‧‧‧ isolated parts

354、454、554、654‧‧‧第二導電部份354, 454, 554, 654‧‧‧ The second conductive part

710、720、730‧‧‧步驟710, 720, 730‧‧‧ steps

A11、A12、A21、A22、A31、A32、A41、A42‧‧‧傳導方向A11, A12, A21, A22, A31, A32, A41, A42‧‧‧ Conduction direction

VDD‧‧‧電源電壓VDD‧‧‧ supply voltage

GND‧‧‧接地電壓GND‧‧‧ ground voltage

EESD‧‧‧靜電放電事件E ESD ‧‧‧ Electrostatic discharge event

IESD‧‧‧靜電放電電流I ESD ‧‧‧ Electrostatic discharge current

D1、D2‧‧‧二極體D1, D2‧‧‧ diodes

第1圖為本發明積體電路之一實施例的功能方塊示意圖。 第2圖為第1圖所示之靜電放電防護架構之一局部結構的一實施例的示意圖。 第3圖為第2圖所示之導電層之一布圖規劃佈局的一實施例的示意圖。 第4圖為第2圖所示之導電層之一布圖規劃佈局的一實施例的示意圖。 第5圖為第2圖所示之導電層之一布圖規劃佈局的一實施例的示意圖。 第6圖為第2圖所示之導電層之一布圖規劃佈局的一實施例的示意圖。 第7圖為本發明用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害的方法的一實施例的流程圖。FIG. 1 is a functional block diagram of an integrated circuit according to an embodiment of the present invention. FIG. 2 is a schematic diagram of an embodiment of a partial structure of the electrostatic discharge protection structure shown in FIG. 1. FIG. 3 is a schematic diagram of an embodiment of the layout planning and layout of one of the conductive layers shown in FIG. 2. FIG. 4 is a schematic diagram of an embodiment of the layout planning and layout of one of the conductive layers shown in FIG. 2. FIG. 5 is a schematic diagram of an embodiment of the layout planning and layout of one of the conductive layers shown in FIG. 2. FIG. 6 is a schematic diagram of an embodiment of the layout planning and layout of one of the conductive layers shown in FIG. 2. FIG. 7 is a flowchart of an embodiment of a method for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad.

Claims (18)

一種靜電放電防護架構,該靜電放電防護架構用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害,該靜電放電防護架構包含有:一第一導電層,形成於該導電墊片的下方,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間;一箝制元件,用以箝制該靜電放電事件;一第一電性連接部,耦接於該第一導電層之該第一導電部份與該箝制元件之間;以及一第二電性連接部,直接連接於該第一導電層之該第二導電部份與該核心電路之間。An electrostatic discharge protection structure is used to protect a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad. The electrostatic discharge protection structure includes: a first conductive Layer formed under the conductive pad, wherein the first conductive layer includes a first conductive portion, an insulating portion, and a second conductive portion, and the insulating portion is formed by the first conductive portion and Surrounded by the second conductive portion, and the first conductive portion is electrically connected between the conductive pad and the second conductive portion; a clamping element for clamping the electrostatic discharge event; a first electrical A conductive connection portion is coupled between the first conductive portion of the first conductive layer and the clamping element; and a second electrical connection portion is directly connected to the second conductive portion of the first conductive layer And the core circuit. 如申請專利範圍第1項所述之靜電放電防護架構,另包含:至少一第二導電層,形成於該導電墊片的下方,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層係為形成於該至少一第二導電層之上方的一頂導電層(top conductive layer)。The electrostatic discharge protection structure described in item 1 of the patent application scope further comprises: at least a second conductive layer formed under the conductive pad, wherein the at least one second conductive layer is electrically connected to the conductive pad And the clamping element; wherein the first conductive layer is a top conductive layer formed on the at least one second conductive layer. 如申請專利範圍第1項所述之靜電放電防護架構,另包含:至少一第二導電層,形成於該導電墊片的下方,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層的厚度大於該至少一第二導電層之中各個第二導電層的厚度。The electrostatic discharge protection structure described in item 1 of the patent application scope further comprises: at least a second conductive layer formed under the conductive pad, wherein the at least one second conductive layer is electrically connected to the conductive pad And the clamping element; wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer in the at least one second conductive layer. 如申請專利範圍第1項所述之靜電放電防護架構,其中當該靜電放電事件發生時,該第一導電層會利用該第一導電部份接收因應該靜電放電事件所產生之一靜電放電電流;以及在該靜電放電電流經由該第二導電部份與該第二電性連接部流入該核心電路之前,該第一電性連接部會將該靜電放電電流導引至該箝制元件。According to the electrostatic discharge protection structure described in item 1 of the scope of patent application, wherein when the electrostatic discharge event occurs, the first conductive layer uses the first conductive part to receive an electrostatic discharge current generated in response to the electrostatic discharge event ; And before the electrostatic discharge current flows into the core circuit through the second conductive portion and the second electrical connection portion, the first electrical connection portion guides the electrostatic discharge current to the clamping element. 如申請專利範圍第1項所述之靜電放電防護架構,其中該隔絕部份係為該第一導電層的一開口。The electrostatic discharge protection structure described in item 1 of the patent application scope, wherein the isolation portion is an opening of the first conductive layer. 如申請專利範圍第1項所述之靜電放電防護架構,其中該箝制元件包含一二極體。The electrostatic discharge protection structure according to item 1 of the patent application scope, wherein the clamping element includes a diode. 一種積體電路,包含:一導電墊片;一核心電路;以及一靜電放電防護架構,耦接於該導電墊片與該核心電路,用以保護該核心電路免受該導電墊片所接收之一靜電放電事件的傷害,其中該靜電放電防護架構包含有:一第一導電層,形成於該導電墊片的下方,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間;一箝制元件,用以箝制該靜電放電事件;一第一電性連接部,耦接於該第一導電層之該第一導電部份與該箝制元件之間;以及一第二電性連接部,直接連接於該第一導電層之該第二導電部份與該核心電路之間。An integrated circuit includes: a conductive pad; a core circuit; and an electrostatic discharge protection structure coupled to the conductive pad and the core circuit to protect the core circuit from being received by the conductive pad. Damage caused by an electrostatic discharge event, wherein the electrostatic discharge protection structure includes: a first conductive layer formed under the conductive pad, wherein the first conductive layer includes a first conductive portion, an isolation portion, and A second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion is electrically connected to the conductive pad and the second conductive portion A clamping element for clamping the electrostatic discharge event; a first electrical connection portion coupled between the first conductive portion of the first conductive layer and the clamping element; and a second The electrical connection portion is directly connected between the second conductive portion of the first conductive layer and the core circuit. 如申請專利範圍第7項所述之積體電路,其中該靜電放電防護架構另包含:至少一第二導電層,形成於該導電墊片的下方,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層係為形成於該至少一第二導電層之上方的一頂導電層。The integrated circuit according to item 7 of the scope of patent application, wherein the electrostatic discharge protection structure further comprises: at least a second conductive layer formed under the conductive pad, wherein the at least one second conductive layer is electrically connected Between the conductive pad and the clamping element; wherein the first conductive layer is a top conductive layer formed above the at least one second conductive layer. 如申請專利範圍第7項所述之積體電路,其中該靜電放電防護架構另包含:至少一第二導電層,形成於該導電墊片的下方,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層的厚度大於該至少一第二導電層之中各個第二導電層的厚度。The integrated circuit according to item 7 of the scope of patent application, wherein the electrostatic discharge protection structure further comprises: at least a second conductive layer formed under the conductive pad, wherein the at least one second conductive layer is electrically connected Between the conductive pad and the clamping element; wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer in the at least one second conductive layer. 如申請專利範圍第7項所述之積體電路,其中當該靜電放電事件發生時,該第一導電層會利用該第一導電部份接收因應該靜電放電事件所產生之一靜電放電電流;以及在該靜電放電電流經由該第二導電部份與該第二電性連接部流入該核心電路之前,該第一電性連接部會將該靜電放電電流導引至該箝制元件。According to the integrated circuit described in item 7 of the scope of patent application, when the electrostatic discharge event occurs, the first conductive layer uses the first conductive portion to receive an electrostatic discharge current generated in response to the electrostatic discharge event; And before the electrostatic discharge current flows into the core circuit through the second conductive portion and the second electrical connection portion, the first electrical connection portion will guide the electrostatic discharge current to the clamping element. 如申請專利範圍第7項所述之積體電路,其中該隔絕部份係為該第一導電層的一開口。According to the integrated circuit described in item 7 of the scope of patent application, the isolated portion is an opening of the first conductive layer. 如申請專利範圍第7項所述之積體電路,其中該箝制元件包含一二極體。The integrated circuit according to item 7 of the scope of patent application, wherein the clamping element includes a diode. 一種用來保護一積體電路之一核心電路免受一導電墊片所接收之一靜電放電事件的傷害的方法,包含下列步驟:於該導電墊片的下方提供一第一導電層,其中該第一導電層包含一第一導電部份、一隔絕部份以及一第二導電部份,該隔絕部份係由該第一導電部份與該第二導電部份所包圍,以及該第一導電部份係電連接於該導電墊片與該第二導電部份之間;將一第一電性連接部耦接於該第一導電層之該第一導電部份與一箝制元件之間,其中該箝制元件用於箝制該靜電放電事件;以及將一第二電性連接部直接連接於該第一導電層之該第二導電部份與該核心電路之間。A method for protecting a core circuit of an integrated circuit from an electrostatic discharge event received by a conductive pad includes the following steps: providing a first conductive layer under the conductive pad, wherein the The first conductive layer includes a first conductive portion, an insulating portion, and a second conductive portion, the insulating portion is surrounded by the first conductive portion and the second conductive portion, and the first conductive portion The conductive portion is electrically connected between the conductive pad and the second conductive portion; a first electrical connection portion is coupled between the first conductive portion of the first conductive layer and a clamping element Wherein the clamping element is used for clamping the electrostatic discharge event; and a second electrical connection portion is directly connected between the second conductive portion of the first conductive layer and the core circuit. 如申請專利範圍第13項所述之方法,另包含下列步驟:於該導電墊片的下方提供至少一第二導電層,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層係為形成於該至少一第二導電層之上方的一頂導電層。The method according to item 13 of the scope of patent application, further comprising the following steps: providing at least a second conductive layer under the conductive pad, wherein the at least one second conductive layer is electrically connected to the conductive pad and the conductive pad; The components are clamped; wherein the first conductive layer is a top conductive layer formed over the at least one second conductive layer. 如申請專利範圍第13項所述之方法,另包含下列步驟:於該導電墊片的下方提供至少一第二導電層,其中該至少一第二導電層係電連接於該導電墊片與該箝制元件之間;其中該第一導電層的厚度大於該至少一第二導電層之中各個第二導電層的厚度。The method according to item 13 of the scope of patent application, further comprising the following steps: providing at least a second conductive layer under the conductive pad, wherein the at least one second conductive layer is electrically connected to the conductive pad and the conductive pad; The components are clamped; wherein the thickness of the first conductive layer is greater than the thickness of each second conductive layer in the at least one second conductive layer. 如申請專利範圍第13項所述之方法,另包含下列步驟:當該靜電放電事件發生時,利用該第一導電層之該第一導電部份接收因應該靜電放電事件所產生之一靜電放電電流;以及在該靜電放電電流經由該第二導電部份與該第二電性連接部流入該核心電路之前,利用該第一電性連接部將該靜電放電電流導引至該箝制元件。The method according to item 13 of the scope of patent application, further comprising the following steps: when the electrostatic discharge event occurs, using the first conductive part of the first conductive layer to receive an electrostatic discharge generated in response to the electrostatic discharge event Current; and before the electrostatic discharge current flows into the core circuit through the second conductive portion and the second electrical connection portion, the electrostatic discharge current is guided to the clamping element by the first electrical connection portion. 如申請專利範圍第13項所述之方法,其中該隔絕部份係為該第一導電層的一開口。The method according to item 13 of the patent application, wherein the isolation portion is an opening of the first conductive layer. 如申請專利範圍第13項所述之方法,其中該箝制元件包含一二極體。The method of claim 13, wherein the clamping element comprises a diode.
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