CN109194391B - Error code detection system and detection method thereof - Google Patents
Error code detection system and detection method thereof Download PDFInfo
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- CN109194391B CN109194391B CN201810973924.8A CN201810973924A CN109194391B CN 109194391 B CN109194391 B CN 109194391B CN 201810973924 A CN201810973924 A CN 201810973924A CN 109194391 B CN109194391 B CN 109194391B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
- H04B10/075—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
- H04B10/079—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
- H04B10/0795—Performance monitoring; Measurement of transmission parameters
- H04B10/07953—Monitoring or measuring OSNR, BER or Q
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/40—Transceivers
Abstract
The invention relates to an error code detection system and a detection method thereof, comprising a user terminal, a control module, a detection module, a clock module and an optical module; the user terminal is used for sending an operation instruction to the detection module through the control module; the clock module is used for generating a first reference clock or an Nth reference clock; the detection module is used for starting system initialization according to the first reference clock, the system defaults to correspondingly start a first working mode, carries out a first error code test or an Nth error code test according to an operation instruction, and sends a corresponding pseudo-random code sequence to the optical module; the optical module is also used for receiving the operation result sent by the optical module and acquiring error code data; the optical module is used for receiving the pseudo-random code sequence and sending an operation result to the detection module after operation. The invention has the beneficial effects that: the hardware cost is low, the operation is simple, the error code detection efficiency is high, and the method can be used for the error code detection of optical communication products with various rates, thereby reducing the production cost.
Description
Technical Field
The invention relates to the technical field of optical communication, in particular to an error code detection system and a detection method thereof.
Background
In a communication system, equipment failure, propagation fading, intersymbol interference, adjacent channel interference and the like all make a receiving end in digital communication generate an unavoidable error code, possibly cause system performance deterioration and even communication interruption, and a result can be expressed in the form of the error code, wherein the error code is the ratio of the number of received error bits to the total number of transmitted bits. With the continuous development of communication technology, the transmission rate is higher and higher, the rate of error code testing is also continuously improved, and the error code rule is stricter and stricter, so that the error code testing becomes more and more important. At present, although a plurality of error detectors for testing high-speed signals have been developed, the cost is high, and the development and design are complex, which is not favorable for popularization and application of products. The traditional error code detector can only detect one speed signal, and particularly, when a high-temperature and low-temperature characteristic experiment is carried out on a unit to be detected, one traditional error code detector can only detect one unit to be detected after long waiting time, which is very time-consuming.
Disclosure of Invention
The invention aims to solve the technical problem of providing an error code detection system and a detection method thereof aiming at the defects of the prior art.
The technical scheme for solving the technical problems is as follows:
according to an aspect of the present invention, there is provided an error code detection system, including a user terminal, a control module, a detection module, a clock module and an optical module;
the user terminal is used for sending an operation instruction to the detection module through the control module and receiving error code data sent by the detection module;
the clock module is used for generating a first reference clock or an Nth reference clock, and when the system is started, the first reference clock is generated by default;
the detection module is used for starting system initialization according to the first reference clock, correspondingly starting a first working mode by default, carrying out a first error code test or an Nth error code test according to the operation instruction, and sending a corresponding pseudo random code sequence to the optical module, wherein if the operation instruction is to carry out the first error code test, the detection module configures the first working mode of the system, and if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and configures the Nth working mode of the system; the system is also used for receiving an operation result sent by an optical module, acquiring error code data from the operation result and analyzing the error code data;
wherein, the N is a natural number;
the optical module comprises an input interface, a variable optical attenuation unit and an output interface, wherein the input interface is used for receiving the pseudo random code sequence, and after the pseudo random code sequence is operated by the variable optical attenuation unit, an operation result is sent to the detection module through the output interface.
The invention has the beneficial effects that: the hardware cost of the invention is low, the operation is simple, the error code detection efficiency is high, when starting the system, the first reference clock is generated by the clock module default, the system is initialized, then the system defaults to correspondingly start the first working mode, and the first error code test or the Nth error code test is carried out according to the operation instruction of the user terminal, if the operation instruction is to carry out the first error code test, the detection module configures the first working mode of the system, if the operation instruction is to carry out the Nth error code test, the system is switched to the corresponding Nth reference clock, and configures the Nth working mode of the system, before carrying out the error code test, the system is initialized by the first reference clock generated by default, then directly carries out the first error code test according to the operation instruction, or is switched to the Nth working mode, the system starting initialization time can be reduced, and the working efficiency can be improved, the method can be used for error code detection of optical communication products with various speeds, thereby greatly reducing the production cost of the high-speed optical communication products, and can be assembled on a production line of the high-speed optical communication products in large quantity for production debugging of the optical communication products; in addition, by arranging the variable optical attenuation unit, the optical signal on the optical fiber link can be adjusted, the variable optical attenuation unit can be used for simulating the attenuation condition of the optical signal on the optical fiber channel, and the error code detection accuracy is improved.
On the basis of the technical scheme, the invention can be further improved as follows.
Further: the detection module comprises a detection unit, a sending unit and a receiving unit;
the detection unit is used for starting system initialization according to the first reference clock or the second reference clock, the system defaults to correspondingly start a first working mode, and sends a first error code test or Nth error code test instruction to the sending unit according to the operation instruction, wherein if the operation instruction is to carry out the Nth error code test, the system is switched to the corresponding Nth reference clock and the Nth working mode;
the transmitting unit is used for transmitting a corresponding pseudo random code sequence to the input interface according to a received first error code test instruction or an Nth error code test instruction;
the receiving unit is used for receiving the operation result sent by the output interface and analyzing error code data and alarm data according to the operation result.
The beneficial effects of the further scheme are as follows: the detection unit sends a test instruction to the sending unit, the receiving unit receives an operation result sent by the output interface, and simultaneously analyzes and collects error code data of the pseudo-random code sequence and corresponding alarm data when the signal is lost and unlocked, so that the accuracy of error code detection is improved.
Further: the transmitting unit comprises a code pattern generating subunit, and the code pattern generating subunit is used for transmitting a corresponding pseudo-random code sequence to the input interface.
The beneficial effects of the further scheme are as follows: and the pseudo-random code sequence is sent to the input interface to detect the error code data of the optical module in the operation process.
Further: the receiving unit comprises a code pattern detection subunit and an alarm monitoring subunit, wherein the code pattern detection subunit is used for receiving the operation result sent by the output interface, analyzing error code data according to the operation result and sending the error code data to the detecting unit; and the alarm monitoring subunit is used for analyzing alarm data according to the error code data and sending the alarm data to the detection unit.
The beneficial effects of the further scheme are as follows: in the course of operating pseudo-random code sequence by variable light attenuation unit, the code pattern detection subunit is used for making statistics and analysis of error code data produced in the course of operation, when the received signal loss and received signal loss lock are produced, the alarm monitoring subunit produces correspondent alarm data.
Further: the error data includes an error count, a current error rate, and an error alarm.
Further: the alarm data includes a received signal loss alarm and a received signal loss-of-lock alarm.
Further: the priority of the alarm data is higher than that of the error code data.
The beneficial effects of the further scheme are as follows: when the alarm monitoring subunit sends out a received signal loss alarm and a received signal lock loss alarm, the acquisition and analysis of the error code data can be stopped in time so as to improve the accuracy of the error code data.
Further: the control module comprises a micro control unit and an FPGA (field programmable gate array), the micro control unit realizes access control on the detection unit through the FPGA and realizes data interaction between the user terminal and the detection module; the FPGA is used for realizing the conversion of the communication protocol between the micro control unit and the detection unit.
The beneficial effects of the further scheme are as follows: because the micro control unit and the detection unit can not be directly communicated, different communication protocols are adopted between the micro control unit and the FPGA and between the FPGA and the detection unit, the FPGA realizes the mutual conversion between the two communication protocols, and further realizes the data interaction between the micro control unit, the user terminal and the detection unit.
According to another aspect of the present invention, there is provided a method for detecting an error detection system, comprising the steps of:
s01: the clock module generates a first reference clock by default;
s02: the detection module judges whether the first reference clock is ready, if not, the system fails to start, the step returns to the step S01, and if the first reference clock is ready, the step S03 is carried out;
s03: the detection module starts system initialization, and the system defaults to correspondingly start a first working mode;
s04: the detection module judges whether the system initialization is successful, if not, the system start is failed, the step is returned to S01, and if the system initialization is successful, the step is carried out S05;
s05: the detection module waits for an operation instruction of the user terminal and judges whether a first error code test is carried out, if so, the step S06 is carried out, and if not, the step S07 is carried out;
s06: if the first error code test is carried out, the detection module configures a first working mode of the system;
s07: if not, the detection module judges whether to perform the Nth error code test, if not, the step S05 is returned, if so, the clock module switches the Nth reference clock, and the detection module configures the Nth working mode of the system;
s08: the detection module sends a pseudo-random code sequence to the input interface, and the variable optical attenuation unit receives the pseudo-random code sequence and operates;
s09: the detection module receives an operation result sent by an output interface, acquires error code data from the operation result, and analyzes the error code data;
s10: the user terminal inquires error code data through the control module;
wherein, the N is a natural number.
The invention has the beneficial effects that: when the system is started, a first reference clock is generated by a clock module in a default mode to carry out system initialization, then the system is defaulted to correspondingly start a first working mode, a first error code test or an Nth error code test is carried out according to an operation instruction of a user terminal, if the operation instruction is to carry out the first error code test, a detection module configures the first working mode of the system, if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and configures the Nth working mode of the system, before the error code test is carried out, the system is initialized by the first reference clock which is generated by the default first reference clock, then the first error code test is directly carried out according to the operation instruction or the system is switched to the Nth working mode, the system startup initialization time can be reduced, the working efficiency is improved, and the system can be used for error code detection, therefore, the production cost of the high-speed optical communication product is reduced to a great extent, and the optical communication device can be assembled on a production line of the high-speed optical communication product in a large quantity and is used for production debugging of the optical communication product.
Drawings
FIG. 1 is a block schematic diagram of an error detection system of the present invention;
fig. 2 is a flow chart of the error detection method of the present invention.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
As shown in fig. 1, an error code detection system includes a user terminal, a control module, a detection module, a clock module, and an optical module;
the user terminal is used for sending an operation instruction to the detection module through the control module and receiving error code data sent by the detection module;
the clock module is used for generating a first reference clock or an Nth reference clock, and when the system is started, the first reference clock is generated by default;
wherein the first reference clock or the Nth reference clock is a crystal oscillator clock;
the detection module is used for starting system initialization according to the first reference clock, correspondingly starting a first working mode by default, carrying out a first error code test or an Nth error code test according to the operation instruction, and sending a corresponding pseudo random code sequence to the optical module, wherein if the operation instruction is to carry out the first error code test, the detection module configures the first working mode of the system, and if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and configures the Nth working mode of the system; the system is also used for receiving an operation result sent by an optical module, acquiring error code data from the operation result and analyzing the error code data;
wherein, the N is a natural number;
the optical module comprises an input interface, a variable optical attenuation unit and an output interface, wherein the input interface is used for receiving the pseudo random code sequence, and after the pseudo random code sequence is operated by the variable optical attenuation unit, an operation result is sent to the detection module through the output interface.
The input interface and the variable optical attenuation units are connected through optical fiber links, the output interface and the variable optical attenuation units are connected through optical fiber links,
the first reference clock, the first working mode and the first error code test are in one-to-one correspondence, and the Nth reference clock, the Nth working mode and the Nth error code test are in one-to-one correspondence; the first working mode and the nth working mode respectively correspond to working modes at a standard service rate, such as an IEEE 802.3bm 40GE standard service rate, an IEEE 802.3ba 100GE standard service rate, and an ITU OTL 4.4OTU4 standard service rate.
The detection module comprises a detection unit, a sending unit and a receiving unit;
the detection unit is used for starting system initialization according to the first reference clock, the system defaults to correspondingly start a first working mode, and sends a first error code test or an Nth error code test instruction to the sending unit according to the operation instruction, wherein if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and an Nth working mode;
the transmitting unit is used for transmitting a corresponding pseudo random code sequence to the input interface according to a received first error code test instruction or an Nth error code test instruction;
the receiving unit is used for receiving the operation result sent by the output interface and analyzing error code data and alarm data according to the operation result.
The transmitting unit comprises a code pattern generating subunit, and the code pattern generating subunit is used for transmitting a corresponding pseudo-random code sequence to the input interface.
The receiving unit comprises a code pattern detection subunit and an alarm monitoring subunit, wherein the code pattern detection subunit is used for receiving the operation result sent by the output interface, analyzing error code data according to the operation result and sending the error code data to the detecting unit; and the alarm monitoring subunit is used for analyzing alarm data according to the error code data and sending the alarm data to the detection unit.
The error data includes an error count, a current error rate, and an error alarm.
The alarm data includes a received signal loss alarm and a received signal loss-of-lock alarm.
The priority of the alarm data is higher than that of the error code data.
The control module comprises a micro control unit and an FPGA (field programmable gate array), the micro control unit realizes access control on the detection unit through the FPGA and realizes data interaction between the user terminal and the detection module; the FPGA is used for realizing the conversion of the communication protocol between the micro control unit and the detection unit.
In this embodiment, an MDIO communication protocol is adopted between the FPGA and the detection unit, and an SPI communication protocol is adopted between the micro control unit and the FPGA; the micro control unit and the detection unit can not be directly communicated, so that the FPGA realizes the mutual conversion between an MDIO communication protocol and an SPI communication protocol, and further realizes the data interaction between the user terminal and the detection unit.
As shown in fig. 2, a detection method of an error detection system includes the following steps:
s01: the clock module generates a first reference clock by default;
s02: the detection module judges whether the first reference clock is ready, if not, the system fails to start, the step returns to the step S01, and if the first reference clock is ready, the step S03 is carried out;
s03: the detection module starts system initialization, and the system defaults to correspondingly start a first working mode;
s04: the detection module judges whether the system initialization is successful, if not, the system start is failed, the step is returned to S01, and if the system initialization is successful, the step is carried out S05;
s05: the detection module waits for an operation instruction of the user terminal and judges whether a first error code test is carried out, if so, the step S06 is carried out, and if not, the step S07 is carried out;
s06: if the first error code test is carried out, the detection module configures a first working mode of the system;
s07: if not, the detection module judges whether to perform the Nth error code test, if not, the step S05 is returned, if so, the clock module switches the Nth reference clock, and the detection module configures the Nth working mode of the system;
s08: the detection module sends a pseudo-random code sequence to the input interface, and the variable optical attenuation unit receives the pseudo-random code sequence and operates;
s09: the detection module receives an operation result sent by an output interface, acquires error code data from the operation result, and analyzes the error code data;
s10: the user terminal inquires error code data through the control module;
wherein, the N is a natural number.
Specifically, the operations related to the detection modules in steps S02 to S09 are performed by the detection unit;
the specific operation flow of step S08 is that the detection unit starts the transmission unit, the code pattern generation subunit in the transmission unit transmits the pseudo random code sequence to the input interface, and the variable optical attenuation unit receives the pseudo random code sequence and operates;
the specific operation flow of step S09 is that the receiving unit receives the operation result sent by the output interface, the code pattern detecting subunit collects error code data from the operation result, and analyzes the error code data, and the alarm monitoring subunit analyzes the alarm data according to the error code data;
in step S10, the error data queried by the user terminal through the control module includes an error count, a current error rate, and an error alarm, and may also query alarm data including a received signal loss alarm and a received signal out-of-lock alarm.
The detection unit adopts a special error code test chip which is manufactured by Microsmi and has the model of VSC8248, the working principle and the electrical connection relation of the detection unit are the prior known technology, and the description is omitted.
In the operation process of the light module, the step S09 and the step S10 are synchronously operated in real time.
In step S10, if the alarm monitoring subunit receives the alarm data, that is, the received signal loss alarm and the received signal out-of-lock alarm, the code pattern detecting subunit in step S09 stops analyzing and updating the error code data until the alarm data disappears.
When the received signal loss alarm and the received signal out-of-lock alarm are generated, the received signal loss object can be locked immediately, and the influence of the received signal loss on the acquisition of error code data is reduced.
In step S10, if the user terminal queries the alarm data, the user terminal may locate the faulty object according to the received signal loss alarm and the received signal loss-of-lock alarm information, where the object is the pseudo random code sequence running in the optical module.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (5)
1. An error detection system, characterized by: the system comprises a user terminal, a control module, a detection module, a clock module and an optical module;
the user terminal is used for sending an operation instruction to the detection module through the control module and receiving error code data sent by the detection module;
the clock module is used for generating a first reference clock or an Nth reference clock, and when the system is started, the first reference clock is generated by default;
the detection module is used for starting system initialization according to the first reference clock, correspondingly starting a first working mode by default, carrying out a first error code test or an Nth error code test according to the operation instruction, and sending a corresponding pseudo random code sequence to the optical module, wherein if the operation instruction is to carry out the first error code test, the detection module configures the first working mode of the system, and if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and configures the Nth working mode of the system; the system is also used for receiving an operation result sent by an optical module, acquiring error code data from the operation result and analyzing the error code data;
wherein, the N is a natural number;
the optical module comprises an input interface, a variable optical attenuation unit and an output interface, wherein the input interface is used for receiving the pseudo random code sequence, and after the pseudo random code sequence is operated by the variable optical attenuation unit, an operation result is sent to the detection module through the output interface; the detection module comprises a detection unit, a sending unit and a receiving unit;
the detection unit is used for starting system initialization according to the first reference clock, the system defaults to correspondingly start a first working mode, and sends a first error code test or an Nth error code test instruction to the sending unit according to the operation instruction, wherein if the operation instruction is to carry out the Nth error code test, the system is switched to a corresponding Nth reference clock and an Nth working mode;
the transmitting unit is used for transmitting a corresponding pseudo random code sequence to the input interface according to a received first error code test instruction or an Nth error code test instruction;
the receiving unit is used for receiving the operation result sent by the output interface and analyzing error code data and alarm data according to the operation result;
the receiving unit comprises a code pattern detection subunit and an alarm monitoring subunit, wherein the code pattern detection subunit is used for receiving the operation result sent by the output interface, acquiring error code data according to the operation result and sending the error code data to the detection unit; the alarm monitoring subunit is used for analyzing alarm data according to the error code data and sending the alarm data to the detection unit;
if the alarm monitoring subunit receives the alarm data, namely the received signal loss alarm and the received signal lock loss alarm, the code pattern detection subunit stops analyzing and updating the error code data until the alarm data disappears;
the error code data comprises error code counting, current error code rate and error code warning;
the alarm data includes a received signal loss alarm and a received signal loss-of-lock alarm.
2. The error detection system of claim 1, wherein: the transmitting unit comprises a code pattern generating subunit, and the code pattern generating subunit is used for transmitting a corresponding pseudo-random code sequence to the input interface.
3. The error detection system of claim 1, wherein: the priority of the alarm data is higher than that of the error code data.
4. The error detection system of claim 1, wherein: the control module comprises a micro control unit and an FPGA (field programmable gate array), the micro control unit realizes access control on the detection unit through the FPGA and realizes data interaction between the user terminal and the detection module; the FPGA is used for realizing the conversion of the communication protocol between the micro control unit and the detection unit.
5. A detection method of an error code detection system is characterized by comprising the following steps:
s01: the clock module generates a first reference clock by default;
s02: the detection module judges whether the first reference clock is ready, if not, the system fails to start, the step returns to the step S01, and if the first reference clock is ready, the step S03 is carried out;
s03: the detection module starts system initialization, and the system defaults to correspondingly start a first working mode;
s04: the detection module judges whether the system initialization is successful, if not, the system start is failed, the step is returned to S01, and if the system initialization is successful, the step is carried out S05;
s05: the detection module waits for an operation instruction of the user terminal and judges whether a first error code test is carried out, if so, the step S06 is carried out, and if not, the step S07 is carried out;
s06: if the first error code test is carried out, the detection module configures a first working mode of the system;
s07: if not, the detection module judges whether to perform the Nth error code test, if not, the step S05 is returned, if so, the clock module switches the Nth reference clock, and the detection module configures the Nth working mode of the system;
s08: the detection module sends a pseudo-random code sequence to the input interface, and the variable optical attenuation unit receives the pseudo-random code sequence and operates;
s09: the detection module receives an operation result sent by an output interface, acquires error code data from the operation result, and analyzes the error code data;
s10: the user terminal inquires error code data through the control module;
wherein, the N is a natural number.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100409624C (en) * | 2005-04-14 | 2008-08-06 | 武汉电信器件有限公司 | 155 M bit error code analysis tester based on field programmable gate array |
CN102073504A (en) * | 2011-01-21 | 2011-05-25 | 深圳创维数字技术股份有限公司 | Multi-scene operating method, multi-scene operating system and intelligent device |
CN103888184A (en) * | 2014-04-03 | 2014-06-25 | 中国科学院半导体研究所 | Measuring device and method for relationship between error rate and luminous power of visible light communication system |
CN104125012A (en) * | 2014-07-31 | 2014-10-29 | 深圳市共进电子股份有限公司 | Method and system for testing high-speed optical module |
CN204068986U (en) * | 2014-08-22 | 2014-12-31 | 北京捷沃光通科技有限责任公司 | Error detection equipment and system |
CN204481817U (en) * | 2015-03-18 | 2015-07-15 | 江苏奥雷光电有限公司 | Optical module parameter testing equipment |
CN106160848A (en) * | 2015-03-24 | 2016-11-23 | 中兴通讯股份有限公司 | The error-code testing method of a kind of multichannel system, device and system |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6950972B2 (en) * | 2001-11-16 | 2005-09-27 | Oplink Communications, Inc. | Multi-purpose BER tester (MPBERT) for very high RZ and NRZ signals |
KR20120133160A (en) * | 2011-05-30 | 2012-12-10 | 한국전자통신연구원 | Method and Apparatus for controlling optical receiver with delay interferometer |
CN104333415B (en) * | 2014-09-26 | 2017-06-09 | 武汉光迅科技股份有限公司 | A kind of multichannel automatic test approach and system for testing optical module |
-
2018
- 2018-08-24 CN CN201810973924.8A patent/CN109194391B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100409624C (en) * | 2005-04-14 | 2008-08-06 | 武汉电信器件有限公司 | 155 M bit error code analysis tester based on field programmable gate array |
CN102073504A (en) * | 2011-01-21 | 2011-05-25 | 深圳创维数字技术股份有限公司 | Multi-scene operating method, multi-scene operating system and intelligent device |
CN103888184A (en) * | 2014-04-03 | 2014-06-25 | 中国科学院半导体研究所 | Measuring device and method for relationship between error rate and luminous power of visible light communication system |
CN104125012A (en) * | 2014-07-31 | 2014-10-29 | 深圳市共进电子股份有限公司 | Method and system for testing high-speed optical module |
CN204068986U (en) * | 2014-08-22 | 2014-12-31 | 北京捷沃光通科技有限责任公司 | Error detection equipment and system |
CN204481817U (en) * | 2015-03-18 | 2015-07-15 | 江苏奥雷光电有限公司 | Optical module parameter testing equipment |
CN106160848A (en) * | 2015-03-24 | 2016-11-23 | 中兴通讯股份有限公司 | The error-code testing method of a kind of multichannel system, device and system |
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