CN109194331B - Electronic device and method for correcting comparator in electronic device - Google Patents

Electronic device and method for correcting comparator in electronic device Download PDF

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Publication number
CN109194331B
CN109194331B CN201810995862.0A CN201810995862A CN109194331B CN 109194331 B CN109194331 B CN 109194331B CN 201810995862 A CN201810995862 A CN 201810995862A CN 109194331 B CN109194331 B CN 109194331B
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comparator
voltage
electronic device
counter
input terminal
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CN109194331A (en
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吴杰
奚道明
陈瑞
刘苇
曾晨
张鹏飞
谢庆国
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Suzhou Ruimeisi Technology Co.,Ltd.
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Suzhou Ruimaisi Medical Technology Co ltd
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Priority to PCT/CN2019/103079 priority patent/WO2020043134A1/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1071Measuring or testing

Abstract

The embodiment of the application discloses an electronic device and a method for correcting a comparator in the electronic device, wherein the electronic device comprises: a comparator; the non-inverting input end of the operational amplifier is suspended, and the output end of the operational amplifier is connected with the first input end of the comparator to provide a white noise signal for the comparator; a controller connected to the second input terminal of the comparator to control a voltage of the second input terminal; a counter connected to the controller and an output terminal of the comparator to count a number of transitions of an output signal of the comparator; and a processor connected with the counter to determine the conversion error of the comparator according to the transition times recorded by the counter. According to the technical scheme provided by the application, the comparator can be corrected by utilizing the white noise signal provided by the operational amplifier in the electronic device, and an additional device is not needed for providing the signal, so that the software and hardware expenditure and the labor cost can be reduced.

Description

Electronic device and method for correcting comparator in electronic device
Technical Field
The present disclosure relates to signal processing, and more particularly to an electronic device and a method for calibrating a comparator in the electronic device.
Background
The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
The comparator is a circuit that compares the voltage amplitude of the analog signal with the voltage amplitude of the reference signal, and can perform conversion of the analog signal into a digital signal. The working principle of the comparator is as follows: when the P terminal voltage is greater than the N terminal voltage, it outputs 1, otherwise, it outputs 0.
The comparator can be widely used in many electronic devices, such as an X-ray detector and a digital Positron Emission Tomography (PET) detector. However, the comparators applied to the above electronic devices generally have a problem of conversion errors. That is, the output of the comparator is transited from 0 to 1 or from 1 to 0 only when the voltage of the analog signal input at the N terminal and the voltage of the reference signal input at the P terminal are different by a certain voltage value. The specific voltage value is the conversion error of the comparator. The conversion error may vary from comparator to comparator. The conversion error of the comparator may affect the accuracy of the measurement results of the devices such as the X-ray detector and the digital PET detector.
In the electronic device, the conversion error is usually calculated by additionally inputting a triangular wave with a fixed pulse width to the P terminal of the comparator, so that the conversion error can be eliminated by superimposing a signal with the input amplitude as the conversion error on the basis of the original reference signal input to the N terminal.
Disclosure of Invention
In the process of implementing the present application, the inventor finds that at least the following problems exist in the prior art:
when correcting the conversion error of the comparator, a signal generator is additionally used to input a triangular wave and upper computer software is needed to calculate trend lines of the pulse width of the reference signal input at the N terminal and the pulse width of the output signal, which brings additional software and hardware expenses and cost.
An object of the embodiments of the present application is to provide an electronic device and a method for calibrating a comparator in the electronic device, so as to reduce software and hardware overhead and cost.
In order to achieve the above object, an electronic device and a method for correcting a comparator in the electronic device according to embodiments of the present application are implemented as follows:
an electronic device, the electronic device comprising:
a comparator;
the non-inverting input end of the operational amplifier is suspended, and the output end of the operational amplifier is connected with the first input end of the comparator to provide a white noise signal for the comparator;
a controller connected to the second input terminal of the comparator to control a voltage of the second input terminal;
a counter connected to the controller and an output terminal of the comparator to count a number of transitions of an output signal of the comparator; and
a processor connected to the counter to determine a conversion error of the comparator from the number of transitions recorded by the counter.
Preferably, the electronic device further comprises a bias voltage supply terminal connected to the output terminal of the operational amplifier and the first input terminal of the comparator.
Preferably, the electronic device further comprises a digital-to-analog converter connected to the second input of the comparator and the controller.
Preferably, the electronic device further comprises a memory connected with the processor to store the conversion error of the comparator.
Preferably, the electronic device further comprises a detection channel corresponding to the operational amplifier for detecting the optical signal and generating a corresponding electrical signal.
Preferably, the number of the comparators, the operational amplifiers and the counters corresponds to the number of the detection channels one to one.
Preferably, the controller, the counter and the processor are integrated on the same field programmable array chip.
A method of calibrating a comparator in an electronic device as described above, the method comprising:
step S1, after the operational amplifier outputs a white noise signal to the first input terminal of the comparator and the controller sets the voltage of the second input terminal of the comparator to the first voltage threshold, the counter records a first transition number of the output signal of the comparator within a preset time period;
step S2, after the counter completes counting within the preset time period, the controller changes the voltage of the second input terminal of the comparator by a preset variation, and the counter records the second transition number of the output signal of the comparator within the preset time period again;
step S3, repeating the above step S2 until the voltage value of the second input terminal of the comparator reaches the nth voltage threshold, and the counter records the nth transition number of the output signal of the comparator within the preset time period; and
in step S4, the processor compares all the transition times recorded by the counter, and determines a conversion error of the comparator according to the comparison result to correct the comparator.
Preferably, the step S1 further includes:
before the counter records the first transition number, an offset voltage supply terminal in the electronic device provides an offset voltage signal to a first input terminal of the comparator.
Preferably, the step S2 further includes:
before the counter records the second transition number of the output signal of the comparator in the preset time period, the controller resets the counter to return the counter to the initial state.
Preferably, the nth voltage threshold and the first voltage threshold satisfy the following relationship:
when the first voltage threshold is a preset voltage minimum value, the nth voltage threshold is a preset voltage maximum value, and the nth voltage threshold is equal to a first voltage threshold + (N-1) × preset variation;
when the first voltage threshold is a preset voltage maximum, the nth voltage threshold is a preset voltage minimum, and the nth voltage threshold is a first voltage threshold- (N-1) × preset variation,
wherein N is a positive integer greater than 1.
Preferably, the preset variation is smaller than or equal to the amplitude of a white noise signal generated by the operational amplifier.
Preferably, the step S4 of determining the conversion error of the comparator according to the comparison result includes:
and determining the voltage threshold value of the second input end of the comparator corresponding to the jump times with the largest value in all the jump times as the conversion error of the comparator.
Preferably, the method further comprises:
in step S5, the memory in the electronic device stores the conversion error of the comparator.
According to the technical scheme provided by the embodiment of the application, a white noise signal generated by an operational amplifier in an electronic device is used as a reference signal of a first input end of a comparator, a controller is used for controlling the voltage of a second input end of the comparator, a counter is used for recording the jump times of an output signal of the comparator, and a processor is used for processing the jump times, so that the conversion error of the comparator is determined to realize the correction of the comparator, an additional signal generator is not needed to provide the reference signal, and the aims of reducing the software and hardware expenses and the cost can be fulfilled. Moreover, when the conversion error of the comparator is corrected, the specific progress does not need to be controlled manually, and therefore labor cost can be reduced. In addition, when the conversion error of the comparator is corrected, upper computer software is not needed for calculating the signal pulse width, so that the resource consumption can be reduced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without any creative effort.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another electronic device provided in the embodiment of the present application;
fig. 3 is a flowchart illustrating a method for calibrating a comparator in an electronic device according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only used for explaining a part of the embodiments of the present application, but not all embodiments, and are not intended to limit the scope of the present application or the claims. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected/coupled" to another element, it can be directly connected/coupled to the other element or intervening elements may also be present. The term "connected/coupled" as used herein may include electrical and/or mechanical physical connections/couplings. The term "comprises/comprising" as used herein refers to the presence of features, steps or elements, but does not preclude the presence or addition of one or more other features, steps or elements. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In addition, in the description of the present application, the terms "first", "second", and the like are used for descriptive purposes only and to distinguish similar objects, and there is no order of precedence between the two, and no indication or implication of relative importance is to be inferred. In addition, in the description of the present application, "a plurality" means two or more unless otherwise specified.
An electronic device and a method for calibrating a comparator in the electronic device according to embodiments of the present application are described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the embodiment of the present application provides an electronic device, which can be applied to a photodetector such as an X-ray detector and a digital PET detector, but is not limited thereto. The electronic device may include:
a comparator 110;
an operational amplifier 120 having a non-inverting input terminal floating, an inverting input terminal connected to the peripheral circuit, and an output terminal connected to a first input terminal (i.e., P terminal) of the comparator 110 to provide a white noise signal to the comparator 110;
a controller 130 connected to a second input terminal (i.e., N terminal) of the comparator 110 to control a voltage of the second input terminal;
a counter 140 connected to the controller 130 and also connected to an output terminal of the comparator 110 to count the number of transitions of the output signal of the comparator 110; and
a processor 150 connected to the counter 140 to determine the conversion error of the comparator 110 according to the number of transitions recorded by the counter 140.
Comparator 110 may refer to a voltage comparator implemented with a differential IO port (e.g., a Low Voltage Differential Signaling (LVDS) port and a Stub Series Termination Logic (SSTL) port) of a Field Programmable Gate Array (FPGA) chip, may include dedicated voltage comparators (e.g., LM339 and LM393, etc.), and may also be other comparators.
The comparator 110 may output a signal according to a comparison result by comparing a voltage of the white noise signal (i.e., a voltage of the first input terminal) provided by the operational amplifier 120 with a voltage controlled by the controller 130. When the voltage of the first input terminal is greater than the voltage of the second input terminal, it outputs 1, and when the voltage of the first input terminal is less than the voltage of the second input terminal, it outputs 0.
The transition number may refer to a change number of the output signal of the comparator 110 that transitions from 0 to 1 or from 1 to 0.
The controller 130 may control the voltage of the second input terminal of the comparator 110 to be changed by a preset change amount according to the received control instruction. The control instruction can be received from the outside in advance or in real time by timing or manual triggering. The controller 130 may also reset the counter 140 back to the initial state.
The counter 140 may be a multi-bit counter, e.g., a 4-bit counter or an 8-bit counter, etc. After the comparator 110 outputs a signal, the counter 140 may start counting up from an initial state (e.g., 0 or other value) until its upper count limit is reached or reset by the controller 130; it may also count down from an initial state (e.g., the upper count limit of the counter) until its lower count limit is reached or reset by the controller 130.
The processor 150 may compare all transition times recorded by the counter 140 and determine a conversion error of the comparator 110 according to the comparison result.
The controller 130, counter 140 and processor 150 may be integrated on the same FPGA chip in the device or may be provided separately in the electronic device.
In another embodiment of the present application, the electronic device may further include an offset voltage supply terminal 125, which may be connected to the output terminal of the operational amplifier 120 and the first input terminal of the comparator 110 to provide an offset voltage signal to the first input terminal of the comparator 110, so that the voltage of the first input terminal of the comparator 110 is higher than the voltage of the second input terminal thereof. The magnitude of the bias voltage signal may be higher than the absolute value of the minimum switching error present by the comparator 110.
In another embodiment of the present application, the electronic device may further include a digital-to-analog converter (DAC)160, which may be connected to the second input terminal of the comparator 110 and the controller 130, and may convert the input digital signal into an analog signal and transmit the converted analog signal to the comparator. The controller 130 may control the voltage of the second input terminal of the comparator 110 by controlling the output voltage of the DAC 160.
In another embodiment of the present application, the electronic device may further include a memory 170, which may be coupled to the processor 150 to store the conversion error of the comparator 110 determined by the processor 150. Moreover, when the counter 140 does not have a storage function, the memory 170 may also be used to store data recorded by the counter 140. The memory 170 may be an on-chip Random Access Memory (RAM) or other memory.
In another embodiment of the present application, the electronic device may further include a detection channel corresponding to the operational amplifier 120 for detecting the optical signal and generating a corresponding electrical signal. In practical application, the detection channel can be connected with the non-inverting input end of the operational amplifier, and when the conversion error of the comparator is corrected, the non-inverting input end of the operational amplifier is suspended only by disconnecting the detection channel and the non-inverting input end of the comparator.
The number of the comparators 110, the operational amplifiers 120, and the counters 140 may correspond one-to-one to the number of the detection channels. The schematic structure of the electronic device is shown in fig. 2 for the case that the electronic device includes a plurality of detection channels.
As can be seen from the above description, the electronic device provided in the embodiment of the present application generates a white noise signal by using an operational amplifier therein to serve as a reference signal of a first input terminal of a comparator, controls a voltage of a second input terminal of the comparator by using a controller, records a number of transitions of an output signal of the comparator by using a counter, and processes the number of transitions by using a processor, thereby determining a conversion error of the comparator to achieve correction of the comparator without using an additional signal generator to provide the reference signal, so that the purpose of reducing software and hardware overhead and cost can be achieved. Moreover, when the conversion error of the comparator is determined by the processor, the specific schedule does not need to be controlled manually, and therefore labor cost can be reduced. In addition, in the process of correcting the comparator, upper computer software is not needed for calculating the trend line of the signal pulse width, so that the resource consumption can be reduced.
An embodiment of the present application further provides a method for calibrating a comparator in the electronic device, as shown in fig. 3, the method may include the following steps:
in step S1, after the operational amplifier outputs a white noise signal to the first input terminal of the comparator and the controller sets the voltage of the second input terminal of the comparator to the first voltage threshold, the counter records a first transition number of the output signal of the comparator within a preset time period.
When the non-inverting input terminal of each operational amplifier is suspended, a white noise signal is generated on the operational amplifier baseline, each operational amplifier can send the white noise signal to the first input terminal of the comparator corresponding to the operational amplifier, and the controller can set the voltage of the second input terminal of each comparator to be the first voltage threshold according to a control command received in advance or in real time. Then, each comparator may compare the magnitude of the white noise signal input at the first input terminal thereof with the first voltage threshold of the second input terminal, and may output 1 when the magnitude of the white noise signal of the first input terminal is greater than the first voltage threshold of the second input terminal, and may output 0 when the magnitude of the white noise signal of the first input terminal is less than the first voltage threshold of the second input terminal. After each comparator outputs a signal, each counter may record, from an initial state, a first transition number of the output signal of the corresponding comparator within a preset time period (e.g., 0.5ms to 1ms, etc.), which may be denoted as Num (m,1), where m may represent a sounding channel number or a packet number, for example. Each packet may be composed of an operational amplifier, a comparator and a counter.
In another embodiment of the present application, before the counter records the first transition number, the bias voltage supply terminal in the electronic device may provide a bias voltage signal to the first input terminal of each comparator to ensure that the voltage at the first input terminal of each comparator is greater than the voltage at the second input terminal of each comparator.
The first voltage threshold may be a preset voltage minimum value (i.e., a minimum value of the conversion error of the comparator) or a preset voltage maximum value (i.e., a maximum value of the conversion error of the comparator) which is previously counted or empirically determined using a method in the related art (e.g., a method of calculating the conversion error of the comparator by inputting a triangular wave).
It should be noted that, in this step, the execution sequence between the white noise signal output from the operational amplifier to the first input terminal of the comparator and the voltage setting of the second input terminal of the comparator by the controller is not limited, and the white noise signal output from the operational amplifier and the voltage setting of the second input terminal of the comparator may be executed sequentially or simultaneously.
In step S2, after the counter completes counting within the preset time period, the controller changes the voltage of the second input terminal of the comparator by the preset variation amount, and the counter records the second transition number of the output signal of the comparator within the preset time period again.
After the respective counters complete counting for a preset time period, the controller may increase or decrease the voltage of the second input terminal of the respective comparator by a preset variation amount. Then, each comparator may compare the voltage value between the first input terminal and the second input terminal again, and output a corresponding signal according to the comparison result, that is, when the voltage value of the first input terminal is greater than the voltage value of the second input terminal, 1 is output, and when the voltage value of the first input terminal is less than the voltage value of the second input terminal, 0 is output. After each comparator outputs a signal, each counter may record a second transition number of the output signal of the corresponding comparator within a preset time period again, which may be denoted as Num (m,2), for example. The second transition number may be equal to a difference between a current count of the counter and the first transition number.
In another embodiment of the present application, the controller may reset each counter back to the initial state before each counter starts counting. At this time, the second transition number is the current count of the counter.
And step S3, repeating the step S2 until the voltage value of the second input end of the comparator reaches the Nth voltage threshold value, and recording the Nth jumping times of the output signal of the comparator in a preset time period by the counter.
After each counter records the second transition number of the output signal of the corresponding comparator, the above step S2 may be repeated until the voltage value of the second input terminal of each comparator reaches the nth voltage threshold. At this time, each counter may record the nth transition number of the output signal of the corresponding comparator within the preset time period again, and record it as Num (m, N). The nth transition number may be equal to a difference between a current count of the counter and the nth-1 transition number.
In this step, the controller may reset each counter to the initial state before each counter starts counting. At this time, the nth transition number is the current count of the counter.
Wherein, the Nth voltage threshold and the first voltage threshold satisfy the following relation:
when the first voltage threshold is a preset voltage minimum value, the nth voltage threshold is a preset voltage maximum value, and the nth voltage threshold is equal to the first voltage threshold + (N-1) × preset variation;
when the first voltage threshold is the preset voltage maximum, the nth voltage threshold is the preset voltage minimum, and the nth voltage threshold is the first voltage threshold- (N-1) × preset variation.
The preset variation amount may be less than or equal to the magnitude of a white noise signal generated by the operational amplifier, and it may be determined according to the following formula:
Figure BDA0001781815100000081
wherein, Δ V is a predetermined variation, VmaxIs a preset voltage maximum value, VminFor the preset voltage minimum, N is a positive integer greater than 1, and the specific value thereof can be determined empirically or theoretically.
In step S4, the processor compares all the transition times recorded by the counter, and determines a conversion error of the comparator according to the comparison result to correct the comparator.
After each counter records the nth transition number of the corresponding comparator, the processor may sequentially compare all the transition numbers recorded by each counter, and determine the maximum transition number among all the transition numbers recorded by each counter, so as to determine the voltage threshold of the second input terminal of the comparator corresponding to the transition number as the conversion error of the comparator.
For example, for the ith detection channel and the jth detection channel, if the maximum values of the transition times of the ith detection channel and the jth detection channel are Num (i, K) and Num (j, L), respectively, the conversion error of the comparator corresponding to the ith detection channel is:
Vmin+ (K-1) Δ V or Vmax-(K-1)*△V;
The conversion error of the comparator corresponding to the jth detection channel is as follows:
Vmin+ (L-1) Δ V or Vmax-(L-1)*△V。
Wherein i and j are positive integers between 1 and m, and K and L are positive integers between 1 and N.
After the conversion error of each comparator is determined, the correction of the comparators can be realized by superimposing the input amplitude as the signal of the conversion error on the basis of the input of the original reference signal to the first input terminal of each comparator.
It should be noted that, in the above steps, for the case where a digital-to-analog converter (DAC) is provided between the controller and the comparator, the controller may change the voltage of the second input terminal of the comparator by controlling the output voltage of the DAC. Furthermore, the output voltage of the DAC is in a range of VminAnd VmaxIn the meantime.
In another embodiment of the present application, the method may further include:
in step S5, the memory stores the conversion error of the comparator determined by the processor.
After the conversion errors of all comparators have been determined, the conversion error of each comparator can be stored with a memory so that it is read and superimposed on the amplitude of the original reference signal for the next operation of the device to achieve a correction of the comparator.
As can be seen from the above description, the embodiments of the present application can reduce the hardware and software overhead by using an operational amplifier inside the electronic device to provide a white noise signal as a reference signal of the first input terminal of the comparator, using the controller to control the voltage of the second input terminal of the comparator, using the counter to record the number of transitions of the output signal of the comparator, and using the processor to compare the number of transitions of the output signal of the comparator, thereby determining the conversion error of the comparator without using an additional device to generate the reference signal of the first input terminal of the comparator. Moreover, when the conversion error of the comparator is corrected, the specific progress does not need to be controlled manually, and therefore labor cost can be reduced. In addition, when the conversion error of the comparator is corrected, upper computer software is not needed for calculating the signal pulse width, so that the resource consumption can be reduced. In addition, for each detection channel in the electronic device, the conversion error of the corresponding comparator can be corrected at the same time, which improves the working efficiency.
The apparatuses, units, modules, devices and the like illustrated in the above embodiments may be specifically implemented by a computer chip, a semiconductor chip and/or an entity, or implemented by a product having a certain function. For convenience of description, the above devices are described as being divided into various components for separate description. Of course, the functions of the various devices may be implemented in the same or multiple computer chips or semiconductor chips when implementing the present application.
Although the present application provides method steps as described in the above embodiments or flowcharts, additional or fewer steps may be included in the method, based on conventional or non-inventive efforts. In the case of steps where no necessary causal relationship exists logically, the order of execution of the steps is not limited to that provided by the embodiments of the present application.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments.
The embodiments described above are described in order to enable those skilled in the art to understand and use the present application. It will be readily apparent to those skilled in the art that various modifications to these embodiments may be made, and the generic principles described herein may be applied to other embodiments without the use of the inventive faculty. Therefore, the present application is not limited to the above embodiments, and those skilled in the art should make improvements and modifications within the scope of the present application based on the disclosure of the present application.

Claims (14)

1. An electronic device, comprising:
a comparator;
the non-inverting input end of the operational amplifier is suspended to generate a white noise signal, and the output end of the operational amplifier is connected with the first input end of the comparator to provide the white noise signal for the comparator;
a controller connected to the second input terminal of the comparator to control a voltage of the second input terminal, and specifically configured to change the voltage of the second input terminal by a preset change amount;
a counter connected to the controller and an output terminal of the comparator to count the number of transitions of the signal output by the comparator at different voltages; and
the processor is connected with the counter to determine the conversion error of the comparator according to the transition times recorded by the counter, and is specifically configured to compare all the transition times recorded by the counter to determine the maximum transition time of all the transition times, and determine the voltage of the second input end of the comparator corresponding to the maximum transition time as the conversion error of the comparator.
2. The electronic device of claim 1, further comprising a bias voltage supply terminal connected to the output terminal of the operational amplifier and the first input terminal of the comparator.
3. The electronic device of claim 1, further comprising a digital-to-analog converter coupled to the second input of the comparator and the controller.
4. The electronic device of claim 1, further comprising a memory coupled to the processor to store a conversion error of the comparator.
5. The electronic device of claim 1, further comprising a detection channel corresponding to the operational amplifier for detecting the optical signal and generating a corresponding electrical signal.
6. The electronic device according to claim 5, wherein the number of the comparators, the operational amplifiers and the counters corresponds to the number of the detection channels one to one.
7. The electronic device of claim 1, wherein the controller, the counter, and the processor are integrated on a same field programmable array chip.
8. An electronic device according to any of claims 1-7, characterized in that the electronic device comprises an X-ray detector or a digital PET detector.
9. A method of calibrating a comparator in an electronic device according to any one of claims 1-8, the method comprising:
step S1, after the operational amplifier outputs a white noise signal to the first input terminal of the comparator and the controller sets the voltage of the second input terminal of the comparator to the first voltage threshold, the counter records a first transition number of the output signal of the comparator within a preset time period;
step S2, after the counter completes counting within the preset time period, the controller changes the voltage of the second input terminal of the comparator by a preset variation, and the counter records the second transition number of the output signal of the comparator within the preset time period again;
step S3, repeating the above step S2 until the voltage value of the second input terminal of the comparator reaches the nth voltage threshold, and the counter records the nth transition number of the output signal of the comparator within the preset time period; and
and step S4, the processor compares all the transition times recorded by the counter to determine a maximum transition time among all the transition times, and determines a voltage threshold of the second input terminal of the comparator corresponding to the maximum transition time as a conversion error of the comparator, so as to correct the comparator.
10. The method according to claim 9, wherein the step S1 further comprises:
before the counter records the first transition number, an offset voltage supply terminal in the electronic device provides an offset voltage signal to a first input terminal of the comparator.
11. The method according to claim 9, wherein the step S2 further comprises:
before the counter records the second transition number of the output signal of the comparator in the preset time period, the controller resets the counter to return the counter to the initial state.
12. The method of claim 9, wherein the nth voltage threshold and the first voltage threshold satisfy the following relationship:
when the first voltage threshold is a preset voltage minimum value, the nth voltage threshold is a preset voltage maximum value, and the nth voltage threshold is equal to a first voltage threshold + (N-1) × preset variation;
when the first voltage threshold is a preset voltage maximum, the nth voltage threshold is a preset voltage minimum, and the nth voltage threshold is a first voltage threshold- (N-1) × preset variation,
wherein N is a positive integer greater than 1.
13. The method of claim 9 or 12, wherein the predetermined variation is less than or equal to the amplitude of a white noise signal generated by the operational amplifier.
14. The method of claim 9, further comprising:
in step S5, the memory in the electronic device stores the conversion error of the comparator.
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