CN109166522B - 像素电路、其驱动方法及显示装置 - Google Patents

像素电路、其驱动方法及显示装置 Download PDF

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CN109166522B
CN109166522B CN201811137019.5A CN201811137019A CN109166522B CN 109166522 B CN109166522 B CN 109166522B CN 201811137019 A CN201811137019 A CN 201811137019A CN 109166522 B CN109166522 B CN 109166522B
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transistor
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capacitor
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light emitting
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CN109166522A (zh
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朱正勇
孙光远
朱晖
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本发明涉及一种像素电路、其驱动方法及显示装置,该像素电路包括晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6、晶体管T7、电容C1和有机发光二极管OLED。在发光阶段期间,晶体管T5由发光控制信号导通,晶体管T1的第一极的电位由数据电压Vdata变为第一电源电压VDD,由于晶体管T3及晶体管T4处于截止状态,电容C1的电量保持不变,晶体管T1的控制端的电位由Vdata‑|Vth|变为Vdata‑|Vth|+η(VDD‑Vdata),从而流经有机发光二极管OLED的电流公式中系数(η‑1)2,由于η接近1,所以相邻灰阶分别对应的数据电压Vdata值可以具有较大的差异,从而解决灰阶不易展开的技术问题。

Description

像素电路、其驱动方法及显示装置
技术领域
本发明涉及OLED像素驱动领域,特别是涉及一种像素电路、其驱动方法及显示装置。
背景技术
有机发光显示器是一种应用有机发光二极管(Organic Light-Emitting Diode,简称OLED)作为发光器件的显示器,相比薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display,简称TFT-LCD),其具有高对比度、广视角、低功耗、体积薄等优点。OLED的亮度是由驱动薄膜晶体管(Thin Film Transistor,简称TFT)电路产生的电流大小决定。
现有的有源矩阵有机发光二极管(Active-Matrix Organic Light EmittingDiode,简称AMOLED)的驱动方式是由像素电路输出数据电压,数据电压直接写入像素电路,从而控制像素的亮度。
发明人发现,随着发光器件性能和显示面板分辨率的提高,存在相邻的灰阶不易展开的技术问题。
发明内容
基于此,有必要针对传统技术中相邻的灰阶不易展开的技术问题,提供一种像素电路、其驱动方法及显示装置。
一种像素电路,其特征在于,包括:晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6、晶体管T7、电容C1和有机发光二极管OLED;所述晶体管T4的控制端用于输入第一扫描信号,所述晶体管T4的第一极接所述晶体管T3的第二极、所述晶体管T1的控制端及所述电容C1一端,所述电容C1的另一端接所述晶体管T2的第二极、所述晶体管T5的第二极及所述晶体管T1的第一极;所述晶体管T5的控制端用于输入发光控制信号,所述晶体管T5的第一极用于输入所述第一电源电压VDD;所述晶体管T4的第二极用于输入参考电压Vref,并接所述晶体管T7的第二极;所述晶体管T2的控制端用于输入第二扫描信号,所述晶体管T2的第一极用于输入数据电压Vdata;所述晶体管T3的控制端用于输入第二扫描信号,所述晶体管T3的第一极接所述晶体管T1的第二极与所述晶体管T6的第一极;所述晶体管T6的控制端用于输入发光控制信号,所述晶体管T6的第二极接所述晶体管T7的第一极;所述晶体管T7的控制端用于输入第一扫描信号,所述晶体管T7的第一极接所述有机发光二极管OLED的输入端;所述有机发光二极管OLED的输出端用于输入第二电源电压VSS。
在其中一个实施例中,所述晶体管T1、所述晶体管T2、所述晶体管T3、所述晶体管T4、所述晶体管T5、所述晶体管T6及所述晶体管T7均为P型薄膜晶体管。
在其中一个实施例中,所述参考电压Vref低于所述第二电源电源VSS。
一种像素电路的驱动方法,所述驱动方法基于上述任一实施例所述的像素电路,包括:
初始化阶段,所述第一扫描信号为低电平信号,所述第二扫描信号为高电平信号;所述参考电压Vref,用于初始化所述有机发光二极管OLED的阳极及所述晶体管T1的控制端;
存储阶段,所述第一扫描信号及所述发光控制信号均为高电平信号,所述第二扫描信号为低电平信号;所述数据电压Vdata,用于将补偿电压写入所述电容C1;
发光阶段,所述第一扫描信号及所述第二扫描信号均为高电平信号,所述发光控制信号为低电平信号;所述第一电源电压VDD,用于提供给所述有机发光二极管OLED以使所述有机发光二极管OLED发光。
在其中一个实施例中,在初始化阶段,所述发光控制信号为高电平信号。
在其中一个实施例中,在初始化阶段,所述发光控制信号为低电平信号。
在其中一个实施例中,所述初始化阶段包括第一初始化阶段和第二初始化阶段;
在所述第一初始化阶段,所述第一扫描信号及所述发光控制信号均为低电平信号,所述第二扫描信号为高电平信号;所述晶体管T5及所述晶体管T6由所述发光控制信号导通,所述晶体管T7由所述第一扫描信号导通;
在所述第二初始化阶段,所述第一扫描信号为低电平信号,所述第二扫描信号及所述发光控制信号均为高电平信号;所述晶体管T5及所述晶体管T6由所述发光控制信号截止,所述晶体管T7由所述第一扫描信号导通。
在其中一个实施例中,在所述存储阶段,所述晶体管T5由所述发光控制信号截止,所述晶体管T2由所述第二扫描信号导通,所述晶体管T1的第一极的电位等于数据电压Vdata;
所述晶体管T1的控制端的电位等于Vdata-|Vth|。
在其中一个实施例中,在所述发光阶段,所述晶体管T5由所述发光控制信号导通,所述晶体管T4由所述第一扫描信号截止,所述晶体管T3由所述第二扫描信号截止,所述晶体管T1的第一极的电位等于第一电源电压VDD;
所述晶体管T1的控制端的电位等于Vdata-|Vth|+η(VDD-Vdata);
其中,η为所述电容C1与所述晶体管T1控制端处的总电容除电容C1之外的其他电容C2确定的分压比例系数。
一种显示装置,包括:如上述任一实施例所述的像素电路。
上述像素电路、其驱动方法及显示装置,该像素电路包括晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6、晶体管T7、电容C1和有机发光二极管OLED。在初始化阶段,参考电压Vref经晶体管T7加在有机发光二极管OLED的阳极,实现有机发光二极管OLED的阳极的初始化,参考电压Vref经晶体管T4加在晶体管T1的控制端上,初始化晶体管T1的控制端。在发光阶段期间,晶体管T5由发光控制信号导通,晶体管T1的第一极的电位由数据电压Vdata变为第一电源电压VDD,由于晶体管T3及晶体管T4处于截止状态,电容C1的电量保持不变,晶体管T1的控制端的电位由Vdata-|Vth|变为Vdata-|Vth|+η(VDD-Vdata),从而流经有机发光二极管OLED的电流公式中系数(η-1)2,由于η接近1,所以相邻灰阶分别对应的数据电压Vdata值可以具有较大的差异,从而解决灰阶不易展开的技术问题。
附图说明
图1为本申请一个实施例中的像素电路的电路图;
图2为本申请一个实施例中采用P型薄膜晶体管的像素电路的电路图;
图3为本申请一个实施例中驱动方法的时序图;
图4为本申请一个实施例中驱动方法的时序图;
图5为本申请一个实施例中驱动方法的时序图;
图6为本申请另一个实施例中显示装置的结构示意图。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图对本发明的具体实施方式做详细的说明。在下面的描述中阐述了很多具体细节以便于充分理解本发明。但是本发明能够以很多不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似改进,因此本发明不受下面公开的具体实施例的限制。
在一个实施例中,请参见图1,本申请提供一种像素电路,该像素电路包括:晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6、晶体管T7、电容C1和有机发光二极管OLED。其中,晶体管T1至晶体管T7均包括控制端、第一极和第二极。
具体地,晶体管T4的控制端接第一扫描信号端,用于输入经第一扫描信号线传输的第一扫描信号SCAN1。晶体管T4的第一极接晶体管T3的第二极、晶体管T1的控制端及电容C1的一端,电容C1的另一端接晶体管T2的第二极、晶体管T5的第二极及晶体管T1的第一极。
晶体管T5的控制端接发光控制端,用于输入经发光控制线传输的发光控制信号EM,晶体管T5的第一极接第一电源,用于输入第一电源电压VDD。
晶体管T4的第二极用于输入参考电压Vref,并接晶体管T7的第二极。
晶体管T2的控制端用于输入第二扫描信号SCAN2,晶体管T2的第一极用于输入数据电压Vdata。
晶体管T3的控制端接第二扫描信号端,用于输入经第二扫描信号线传输的第二扫描信号SCAN2,晶体管T3的第一极接晶体管T1的第二极与晶体管T6的第一极。
晶体管T6的控制端接发光控制端,用于输入经发光控制线传输的发光控制信号EM,晶体管T6的第二极接晶体管T7的第一极。
晶体管T7的控制端接第一扫描信号端,用于输入经第一扫描信号线传输的第一扫描信号SCAN1,晶体管T7的第一极接有机发光二极管OLED的输入端。
有机发光二极管OLED的输出端用于输入第二电源电压VSS。
其中,晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6及晶体管T7是像素电路中的开关晶体管。晶体管T1是像素电路中的驱动晶体管。电容C1是储能电容,连接于晶体管T1的控制端和晶体管T1的第一极之间。
在本实施例中,第一扫描信号SCAN1控制晶体管T4、晶体管T7的截止或者导通,第二扫描信号SCAN2控制晶体管T2、晶体管T3的截止或者导通。发光控制信号EM控制晶体管T5的截止或者导通。发光控制信号EM控制晶体管T6的截止或者导通。当晶体管T4导通时,参考电压Vref经晶体管T4初始化晶体管T1的控制端。当晶体管T7导通时,参考电压Vref经晶体管T7初始化有机发光二极管OLED的阳极。当晶体管T5导通时,初始化电容C1与晶体管T5第二极连接的极板。当晶体管T2及晶体管T3导通时,数据电压Vdata经晶体管T2、晶体管T1、晶体管T3加在驱动晶体管T1的栅极。当晶体管T5及晶体管T6导通时,第一电源电压VDD经晶体管T5、晶体管T1及晶体管T6加至有机发光二极管OLED,有机发光二极管OLED发光。
在一个实施例中,晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6及晶体管T7为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管以及非晶硅薄膜晶体管中的任一种。晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6及晶体管T7可以采用P型薄膜晶体管,也可以采用N型薄膜晶体管。在采用P型薄膜晶体管作为像素电路中的晶体管时,对需要导通的晶体管的控制端输入低电平信号;在采用N型薄膜晶体管作为像素电路中的晶体管时,对需要导通的晶体管的控制端输入高电平信号。
在一个实施例中,请参见图2,本申请提供的像素电路采用的晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6及晶体管T7均为P型薄膜晶体管。那么,可以理解的是,控制端可以是晶体管T1至晶体管T7的栅极,第一极可以是晶体管T1至晶体管T7的源极,第二极可以是晶体管T1至晶体管T7的漏极。
在一个实施例中,参考电压Vref低于第二电源电压VSS。其中,在发光阶段,第一电源电压VDD经晶体管T5、晶体管T1及晶体管T6加至有机发光二极管OLED,有机发光二极管OLED发光。在流过有机发光二极管OLED的正向电流的作用下,会造成空穴积累以及氧化铟锡中铟离子移动,加速了有机发光二极管OLED的老化。在初始化阶段,通过设置参考电压Vref低于第二电源信号VSS,对有机发光二极管OLED进行反向偏置,从而补偿发光阶段导致的老化,进而延长了有机发光二极管OLED的寿命。
在一个实施例中,本申请提供基于上述任一实施例中的像素动电路的驱动方法,该驱动方法依次包括:
初始化阶段t1,第一扫描信号SCAN1为低电平信号,第二扫描信号SCAN2为高电平信号。参考电压Vref,用于初始化有机发光二极管OLED的阳极、晶体管T1的控制端。
存储阶段t2,第一扫描信号SCAN1、发光控制信号EM均为高电平信号,第二扫描信号SCAN2为低电平信号。数据电压Vdata,用于将补偿电压写入电容C1。
发光阶段t3,第一扫描信号SCAN1及第二扫描信号SCAN2均为高电平信号,发光控制信号EM为低电平信号。第一电源电压VDD,用于提供给有机发光二极管OLED以使有机发光二极管OLED发光。
请参见图3,图3为该驱动方法对应的信号时序图,其中,信号时序图包括初始化阶段t1、存储阶段t2及发光阶段t3。具体地工作过程如下:
在初始化阶段t1,第一扫描信号SCAN1为低电平信号,晶体管T1、晶体管T4、晶体管T7导通,参考电压Vref初始化有机发光二极管OLED的阳极及晶体管T1的控制端。电容C1与晶体管T1控制端连接的第二极板的电位等于参考电压Vref。第二扫描信号SCAN2为高电平信号,晶体管T2、晶体管T3截止。当发光控制信号EM为高电平,晶体管T5及晶体管T6截止,没有驱动电流流经有机发光二极管OLED,从而其没有发光。当发光控制信号EM为低电平,晶体管T5及晶体管T6导通,由于晶体管T7导通,形成了从供应第一电源电压VDD的电源端经晶体管T5、晶体管T1、晶体管T6和晶体管T7到供应参考电压Vref的电源端的电流通路。同时,也没有驱动电流流经有机发光二极管OLED,从而其没有发光。
在存储阶段t2,第一扫描信号SCAN1、发光控制信号EM均为高电平信号,晶体管T4、晶体管T5、晶体管T6及晶体管T7截止,第二扫描信号SCAN2为低电平信号,晶体管T2和晶体管T3导通。晶体管T1的第一极的电位等于数据电压Vdata,晶体管T1的控制端的电位等于Vdata-|Vth|。
具体地,晶体管T5由发光控制信号EM截止,晶体管T2由第二扫描信号SCAN2导通,晶体管T1的第一极的电位等于数据电压Vdata。晶体管T1的控制端的电位等于Vdata-|Vth|。晶体管T1的第一极接电容C1的第一极板,晶体管T1的控制端接电容C1的第二极板,电容C1第一极板的电位等于数据电压Vdata,电容C1第二极板的电位等于Vdata-|Vth|,从而补偿电压|Vth|写入电容C1。
在发光阶段t3,第一扫描信号SCAN1及第二扫描信号SCAN2均为高电平信号,晶体管T4、晶体管T7截止,晶体管T2、晶体管T3截止。发光控制信号EM为低电平信号,晶体管T5、晶体管T6导通,第一电源电压VDD经晶体管T5、驱动晶体管T1及晶体管T6加至有机发光二极管OLED,使得有机发光二极管OLED发光。
具体地,电容C1的第一极板接晶体管T1的第一极,电容C1的第二极板接晶体管T1的控制端。晶体管T5由发光控制信号EM导通,电容C1的第一极板的电位等于第一电源电压VDD。在存储阶段t2,电容C1第一极板的电位等于Vdata,则电容C1第一极板的电位变化量为:VDD-Vdata。又,晶体管T1控制端节点处的总电容除电容C1之外的其他电容记为C2,且其他电容C2的分压作用进一步影响电容C1第二极板的电位,则电容C1第二极板的电位等于Vdata-|Vth|+η(VDD-Vdata)。其中,η为电容C1和晶体管T1控制端节点处的总电容除电容C1之外的其他电容C2确定的分压比例系数。
在本实施例中,晶体管T1的第一极的电位由数据电压Vdata变为第一电源电压VDD,由于晶体管T3及晶体管T4处于截止状态,电容C1的电量保持不变,晶体管T1的控制端的电位由Vdata-|Vth|变为Vdata-|Vth|+η(VDD-Vdata),从而流经有机发光二极管OLED的电流公式中系数(η-1)2,由于η接近1,所以相邻灰阶分别对应的数据电压Vdata值可以具有较大的差异,可以准确控制相邻灰阶对应的数据电压,从而解决灰阶不易展开的技术问题。
在一个实施例中,请参见图4,图4为该驱动方法对应的信号时序图,其中,发光控制信号EM为低电平。信号时序图包括初始化阶段t1、存储阶段t2及发光阶段t3。初始化阶段t1的工作过程如下:
第一扫描信号SCAN1为低电平信号,晶体管T1、晶体管T4、晶体管T7导通,参考电压Vref初始化有机发光二极管OLED的阳极及晶体管T1的控制端。电容C1与晶体管T1控制端连接的第二极板的电位等于参考电压Vref。第二扫描信号SCAN2为高电平信号,晶体管T2、晶体管T3截止。发光控制信号EM为低电平。
一方面,晶体管T5及晶体管T6导通。由于晶体管T7、晶体管T5及晶体管T6导通,形成了从供应第一电源电压VDD的电源端经晶体管T5、晶体管T1、晶体管T6和晶体管T7到供应参考电压Vref的电源端的电流通路。同时,也没有驱动电流流经有机发光二极管OLED,从而其没有发光。
另一方面,晶体管T5由发光控制信号EM导通,第一电源电压VDD初始化电容C1与晶体管T1第一极连接的第一极板。从而电容C1与晶体管T5第二极连接的第一极板的电位等于第一电源电压VDD,电容C1与晶体管T1控制端连接的第二极板的电位等于参考电压Vref。实现了电容C1在每一帧像素时间内初始化完成后均具有相同的状态,从而保证发光控制的准确性。
可以理解的是,存储阶段t2及发光阶段t3的工作过程与图3所示的信号时序图对应的工作过程是一致的,在此不再赘述。
在一个实施例中,初始化阶段包括第一初始化阶段和第二初始化阶段。请参见图5,图5为该驱动方法对应的信号时序图,其中,信号时序图包括第一初始化阶段t1、第二初始化阶段t2、存储阶段t3及发光阶段t4。第一初始化阶段t1、第二初始化阶段t2的工作过程如下:
在第一初始化阶段t1,第一扫描信号SCAN1及发光控制信号EM均为低电平信号,第二扫描信号SCAN2为高电平信号。晶体管T7由第一扫描信号SCAN1导通,晶体管T5、晶体管T6由发光控制信号导通。由于晶体管T7、晶体管T5及晶体管T6导通,形成了从供应第一电源电压VDD的电源端经晶体管T5、晶体管T1、晶体管T6和晶体管T7到供应参考电压Vref的电源端的电流通路。另外,晶体管T5由发光控制信号EM导通,第一电源电压VDD初始化电容C1与晶体管T1第一极连接的第一极板。从而电容C1与晶体管T5第二极连接的第一极板的电位等于第一电源电压VDD,电容C1与晶体管T1控制端连接的第二极板的电位等于参考电压Vref。实现了电容C1在每一帧像素时间内初始化完成后均具有相同的状态,从而保证发光控制的准确性。
在第二初始化阶段,第一扫描信号SCAN1为低电平信号,第二扫描信号SCAN2及发光控制信号EM均为高电平信号。晶体管T5、晶体管T6由发光控制信号截止。具体地,在第二初始化阶段,发光控制信号EM有低电平信号变为高电平信号,缩短了流经晶体管T5、晶体管T1、晶体管T6和晶体管T7的电流通路的时间,减小消耗,同时减慢驱动晶体管T1的老化,增长驱动晶体管T1的寿命。
可以理解的是,存储阶段t3及发光阶段t4的工作过程与图3所示的信号时序图对应的工作过程是一致的,在此不再赘述。
在一个实施例中,请参见图2和图5,其中,图5为该驱动方法对应的信号时序图,信号时序图包括第一初始化阶段t1、第二初始化阶段t2、存储阶段t3及发光阶段t4。具体地工作过程如下:
在第一初始化阶段t1,第一扫描信号SCAN1为低电平信号,晶体管T4导通,参考电压Vref初始化晶体管T1的栅极。晶体管T7导通,参考电压Vref初始化有机发光二极管OLED的阳极。发光控制信号EM均为低电平信号,晶体管T5及晶体管T6导通,第一电源电压VDD初始化电容C1与晶体管T1源极连接的第一极板。从而电容C1与晶体管T5漏极连接的第一极板的电位等于第一电源电压VDD,电容C1与晶体管T1控制端连接的第二极板的电位等于参考电压Vref。实现了电容C1在每一帧像素时间内初始化完成后均具有相同的状态,从而保证发光控制的准确性。
由于晶体管T7、晶体管T5及晶体管T6导通,形成了从供应第一电源电压VDD的电源端经晶体管T5、晶体管T1、晶体管T6和晶体管T7到供应参考电压Vref的电源端的电流通路,保证有机发光二极管OLED不发光。
在第二初始化阶段,第一扫描信号SCAN1为低电平信号,第二扫描信号SCAN2及发光控制信号EM均为高电平信号。晶体管T5、晶体管T6由发光控制信号截止。具体地,在第二初始化阶段,发光控制信号EM有低电平信号变为高电平信号,缩短了流经晶体管T5、晶体管T1、晶体管T6和晶体管T7的电流通路的时间,减小消耗,同时减慢驱动晶体管T1的老化,增长驱动晶体管T1的寿命。
在存储阶段t2,第一扫描信号SCAN1、发光控制信号EM均为高电平信号,晶体管T4、晶体管T5、晶体管T6及晶体管T7截止。第二扫描信号SCAN2为低电平信号,晶体管T2和晶体管T3导通。数据电压Vdata经晶体管T2加至晶体管T1的源极,直至晶体管T1处于临界状态,晶体管T1的源极的电位等于数据电压Vdata,晶体管T1的栅极的电位等于Vdata-|Vth|。由于晶体管T1的栅极、晶体管T1的源极分别接电容C1的两极板,从而补偿电压|Vth|写入电容C1。
此时,晶体管T2的栅极电压为Vdata-|Vth|,其中,Vth为晶体管T1的阈值电压,且该阈值电压的值为负值,则晶体管T1的栅极电压Vdata+Vth。
在发光阶段t3,第一扫描信号SCAN1及第二扫描信号SCAN2均为高电平信号,晶体管T4、晶体管T7截止,晶体管T2、晶体管T3截止。发光控制信号EM为低电平信号,晶体管T5、晶体管T6导通,第一电源电压VDD经晶体管T5、驱动晶体管T1及晶体管T6加至有机发光二极管OLED,使得有机发光二极管OLED发光。
电容C1的第一极板接晶体管T1的源极,电容C1的第二极板接晶体管T1的栅极,则电容C1的第一极板的电位等于晶体管T1源极的电位,电容C1的第二极板的电位等于晶体管T1栅极的电位。晶体管T5由发光控制信号EM导通,晶体管T1的源极的电位等于第一电源电压VDD,电容C1的第一极板的电位等于第一电源电压VDD。
由于晶体管T3截止,电容C1的电量保持不变,电容C1两极板之间的电压差亦保持不变,即电容C1第一极板的电位随着电容C1第二极板的电位变化而变化。
在存储阶段t2,电容C1第一极板的电位等于Vdata;
在从存储阶段t2至发光阶段t3的时间阶段内,电容C1第一极板的电位变化量为:VDD-Vdata。
又,晶体管T1栅极节点处的总电容除电容C1之外的其他电容记为C2,且其他电容C2的分压作用进一步影响电容C1第二极板的电位,则电容C1第二极板的电位等于Vdata+Vth+η(VDD-Vdata)。
其中η=C1/(C1+C2),即η为电容C1和晶体管T1栅极节点处的总电容除电容C1之外的其他电容C2确定的分压比例系数。
电容C1的第二极板接晶体管T1的栅极,则晶体管T1的栅极的电位等于Vdata-|Vth|+η(VDD-Vdata)。
晶体管T1的源极栅极压降为:Vgs=Vg-Vs;
Vgs=Vdata+Vth+η(VDD-Vdata)-VDD;
Vgs=(1-η)*(VDD-Vdata)+Vth;
晶体管T1中的驱动电流大小:
I=K*(Vgs-Vth)2=K*(1-η)2*(VDD-Vdata)2
其中,K=1/2*μ*Cox*W/L。μ是薄膜晶体管的电子迁移率,Cox是薄膜晶体管单位面积的栅氧化层电容,W是薄膜晶体管的沟道宽度,L是薄膜晶体管的沟道长度。
因此,可以得到第一晶体管T1中的驱动电流大小为:
I=1/2*μ*Cox*W/L*(1-η)2*(VDD-Vdata)2
从上述公式中可以得到,流经有机发光二极管OLED的电流公式引入系数(η-1)2,η接近于1,所以相邻灰阶对应的数据电压可以具有较大的差异,降低了解决灰阶不易展开的技术问题。另外,晶体管T1中的驱动电流大小与晶体管T2的阈值电压Vth大小无关,从而实现阈值电压补偿,以使有机发光二极管OLED的亮度稳定。
在一个实施例中,本申请提供一种显示装置,请参见图6,该显示装置包括:
多个像素,用于显示图像。每个像素包任上述一个实施例中的像素电路。
扫描驱动器610,将扫描信号顺序地施加到像素。
发光控制驱动器620,将发光控制信号施加到像素。
数据驱动器630,将数据电压施加到像素。
其中,像素响应扫描信号而接收数据电压,像素产生具有与数据电压对应的预定亮度的光以显示图像。像素的发光时间段由发光控制信号控制。发光控制驱动器响应于初始控制信号被初始化,并产生发光控制信号。
示例性地,请参见图6,扫描驱动器610通过扫描信号线S1至Sn连接矩阵形式排列的多个像素PX11至PXnm,像素PX11至PXnm也连接到发光控制信号线E1至Em,并通过发光控制信号线E1至Em连接发光控制驱动器620。像素PX11至PXnm也连接到数据信号线D1至Dm,并通过数据信号线D1至Em连接数据驱动器630。其中,发光控制信号线E1至Em大致平行于扫描信号线S1至Sn。发光控制信号线E1至Em大致垂直于数据信号线D1至Dm。
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。

Claims (8)

1.一种像素电路,其特征在于,由晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5、晶体管T6、晶体管T7、电容C1和有机发光二极管OLED构成;
所述晶体管T4的控制端用于输入第一扫描信号,所述晶体管T4的第一极接所述晶体管T3的第二极、所述晶体管T1的控制端及所述电容C1一端,所述电容C1的另一端接所述晶体管T2的第二极、所述晶体管T5的第二极及所述晶体管T1的第一极;
所述晶体管T5的控制端用于输入发光控制信号,所述晶体管T5的第一极用于输入第一电源电压VDD;
所述晶体管T4的第二极用于输入参考电压Vref,并接所述晶体管T7的第二极;
所述晶体管T2的控制端用于输入第二扫描信号,所述晶体管T2的第一极用于输入数据电压Vdata;
所述晶体管T3的控制端用于输入第二扫描信号,所述晶体管T3的第一极接所述晶体管T1的第二极与所述晶体管T6的第一极;
所述晶体管T6的控制端用于输入发光控制信号,所述晶体管T6的第二极接所述晶体管T7的第一极;
所述晶体管T7的控制端用于输入第一扫描信号,所述晶体管T7的第一极接所述有机发光二极管OLED的输入端;
所述有机发光二极管OLED的输出端用于输入第二电源电压VSS;
其中,在第一初始化阶段,所述第一扫描信号及所述发光控制信号均为低电平信号,所述第二扫描信号为高电平信号;在第二初始化阶段,所述第一扫描信号为低电平信号,所述第二扫描信号及所述发光控制信号均为高电平信号;在发光阶段,所述晶体管T5由所述发光控制信号导通,所述晶体管T4由所述第一扫描信号截止,所述晶体管T3由所述第二扫描信号截止,所述晶体管T1的第一极的电位等于第一电源电压VDD;所述晶体管T1的控制端的电位等于Vdata-|Vth|+η(VDD-Vdata);其中,η为所述电容C1与所述晶体管T1控制端处的总电容除电容C1之外的其他电容C2确定的分压比例系数。
2.根据权利要求1所述的像素电路,其特征在于,所述晶体管T1、所述晶体管T2、所述晶体管T3、所述晶体管T4、所述晶体管T5、所述晶体管T6及所述晶体管T7均为P型薄膜晶体管。
3.根据权利要求2所述的像素电路,其特征在于,所述参考电压Vref低于所述第二电源电压VSS。
4.一种显示装置,其特征在于,包括:如权利要求1至3任一项所述的像素电路。
5.一种像素电路的驱动方法,所述驱动方法基于权利要求1至3任一项所述的像素电路,其特征在于,包括:
初始化阶段,所述第一扫描信号为低电平信号,所述第二扫描信号为高电平信号;所述参考电压Vref,用于初始化所述有机发光二极管OLED的阳极及所述晶体管T1的控制端;
存储阶段,所述第一扫描信号及所述发光控制信号均为高电平信号,所述第二扫描信号为低电平信号;所述数据电压Vdata,用于将补偿电压写入所述电容C1;
发光阶段,所述第一扫描信号及所述第二扫描信号均为高电平信号,所述发光控制信号为低电平信号;所述第一电源电压VDD,用于提供给所述有机发光二极管OLED以使所述有机发光二极管OLED发光,在所述发光阶段,所述晶体管T5由所述发光控制信号导通,所述晶体管T4由所述第一扫描信号截止,所述晶体管T3由所述第二扫描信号截止,所述晶体管T1的第一极的电位等于第一电源电压VDD;所述晶体管T1的控制端的电位等于Vdata-|Vth|+η(VDD-Vdata);其中,η为所述电容C1与所述晶体管T1控制端处的总电容除电容C1之外的其他电容C2确定的分压比例系数;
其中,所述初始化阶段包括第一初始化阶段和第二初始化阶段;
在所述第一初始化阶段,所述第一扫描信号及所述发光控制信号均为低电平信号,所述第二扫描信号为高电平信号;所述晶体管T5及所述晶体管T6由所述发光控制信号导通,所述晶体管T7由所述第一扫描信号导通;
在所述第二初始化阶段,所述第一扫描信号为低电平信号,所述第二扫描信号及所述发光控制信号均为高电平信号;所述晶体管T5及所述晶体管T6由所述发光控制信号截止,所述晶体管T7由所述第一扫描信号导通。
6.根据权利要求5所述的驱动方法,其特征在于,在初始化阶段,所述发光控制信号为高电平信号。
7.根据权利要求5所述的驱动方法,其特征在于,在初始化阶段,所述发光控制信号为低电平信号。
8.根据权利要求5所述的驱动方法,其特征在于,在所述存储阶段,所述晶体管T5由所述发光控制信号截止,所述晶体管T2由所述第二扫描信号导通,所述晶体管T1的第一极的电位等于数据电压Vdata;
所述晶体管T1的控制端的电位等于Vdata-|Vth|。
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