CN109154923A - 基于存储器的电路板 - Google Patents

基于存储器的电路板 Download PDF

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Publication number
CN109154923A
CN109154923A CN201780030651.7A CN201780030651A CN109154923A CN 109154923 A CN109154923 A CN 109154923A CN 201780030651 A CN201780030651 A CN 201780030651A CN 109154923 A CN109154923 A CN 109154923A
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CN
China
Prior art keywords
memory
data
signal
processor
signal wire
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Pending
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CN201780030651.7A
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English (en)
Inventor
叶勇云
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SZ DJI Technology Co Ltd
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SZ DJI Technology Co Ltd
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Publication date
Application filed by SZ DJI Technology Co Ltd filed Critical SZ DJI Technology Co Ltd
Publication of CN109154923A publication Critical patent/CN109154923A/zh
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Abstract

本发明提供一种基于存储器的电路板(1)，在该电路板(1)上设置有存储器(2)，还设置有用于控制该存储器(2)的处理器(3)；存储器(2)和处理器(3)均包含有至少两组信号线；其中，存储器(2)上每组信号线的线组标识与处理器(3)上每组信号线的线组标识相对应；存储器(2)的信号线与处理器(3)的信号线，在同层电路板上无交叉连接；其中，相连接的存储器(2)的线组标识与处理器(3)的线组标识为非对应的线组标识。从而通过以信号线组为单位交换存储器(2)和处理器(3)之间的信号线，方便存储器(2)和处理器(3)间的信号线的走线，保证两者间的信号线没有交叉，进而保证信号间的通信质量。

Description

PCT国内申请，说明书已公开。

Claims (9)

  1. PCT国内申请，权利要求书已公开。
CN201780030651.7A 2017-03-10 2017-05-10 基于存储器的电路板 Pending CN109154923A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN2017202326404 2017-03-10
CN201720232640.4U CN206498588U (zh) 2017-03-10 2017-03-10 基于存储器的电路板
PCT/CN2017/083834 WO2018161431A1 (zh) 2017-03-10 2017-05-10 基于存储器的电路板

Publications (1)

Publication Number Publication Date
CN109154923A true CN109154923A (zh) 2019-01-04

Family

ID=59807224

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201720232640.4U Expired - Fee Related CN206498588U (zh) 2017-03-10 2017-03-10 基于存储器的电路板
CN201780030651.7A Pending CN109154923A (zh) 2017-03-10 2017-05-10 基于存储器的电路板

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN201720232640.4U Expired - Fee Related CN206498588U (zh) 2017-03-10 2017-03-10 基于存储器的电路板

Country Status (2)

Country Link
CN (2) CN206498588U (zh)
WO (1) WO2018161431A1 (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1936877A (zh) * 2005-09-22 2007-03-28 三星电子株式会社 数据传输线的布线方法和使用该方法的印刷线路板组件
CN101727970A (zh) * 2009-11-03 2010-06-09 深圳市共进电子有限公司 一种减小sdram产生辐射的方法
US20100257293A1 (en) * 2007-12-28 2010-10-07 Huawei Technologies Co., Ltd. Route Lookup System, Ternary Content Addressable Memory, and Network Processor
CN103885919A (zh) * 2014-03-20 2014-06-25 北京航空航天大学 一种多dsp和fpga并行处理系统及实现方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1936877A (zh) * 2005-09-22 2007-03-28 三星电子株式会社 数据传输线的布线方法和使用该方法的印刷线路板组件
US20100257293A1 (en) * 2007-12-28 2010-10-07 Huawei Technologies Co., Ltd. Route Lookup System, Ternary Content Addressable Memory, and Network Processor
CN101727970A (zh) * 2009-11-03 2010-06-09 深圳市共进电子有限公司 一种减小sdram产生辐射的方法
CN103885919A (zh) * 2014-03-20 2014-06-25 北京航空航天大学 一种多dsp和fpga并行处理系统及实现方法

Also Published As

Publication number Publication date
WO2018161431A1 (zh) 2018-09-13
CN206498588U (zh) 2017-09-15

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