CN109119127A - A kind of semiconductor memory high/low temperature ageing test box - Google Patents
A kind of semiconductor memory high/low temperature ageing test box Download PDFInfo
- Publication number
- CN109119127A CN109119127A CN201811003682.6A CN201811003682A CN109119127A CN 109119127 A CN109119127 A CN 109119127A CN 201811003682 A CN201811003682 A CN 201811003682A CN 109119127 A CN109119127 A CN 109119127A
- Authority
- CN
- China
- Prior art keywords
- test
- temperature
- area
- semiconductor memory
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 194
- 230000032683 aging Effects 0.000 title claims abstract description 69
- 239000004065 semiconductor Substances 0.000 title claims abstract description 52
- 230000017525 heat dissipation Effects 0.000 claims abstract description 13
- 230000003993 interaction Effects 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 5
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 238000006731 degradation reaction Methods 0.000 abstract description 2
- 238000013461 design Methods 0.000 description 6
- 230000009471 action Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000005057 refrigeration Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 101100498818 Arabidopsis thaliana DDR4 gene Proteins 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- -1 eMMC Proteins 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000013316 zoning Methods 0.000 description 2
- 230000005526 G1 to G0 transition Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011990 functional testing Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56016—Apparatus features
Abstract
The invention belongs to semiconductor memory high/low temperature degradation testing technique fields, disclose a kind of semiconductor memory high/low temperature ageing test box, are provided with room temperature area and one or more groups of test sections being made of the first humidity province, second temperature area, isolated area；The temperature difference of two humidity provinces is constant；The radiator of promising host computer and interchanger heat dissipation is arranged for placing host computer, interchanger in room temperature area；Test section is for placing semiconductor memory aging testing apparatus；First humidity province is used to place the first backboard of aging testing system, and on the first backboard can plug test core plate；Second temperature area be used for place the second backboard and on the second backboard can plug test board；Isolated area is provided with straight-through plate, and the test signal and power supply signal that the test core plate for being located at the first humidity province is sent are transferred to the test board positioned at second temperature area by leading directly to plate；Isolated area side is provided with the radiator to the heat dissipation of straight-through plate, to reduce influence of the second temperature area temperature to the first humidity province.
Description
Technical field
The invention belongs to semiconductor degradation testing technique fields, more particularly, to a kind of semiconductor memory high/low temperature
Ageing test box.
Background technique
Semiconductor memory has certain failure probability, and the relationship between failure probability and access times meets bathtub song
The characteristic of line, the failure probability of memory is high when beginning to use, when failure probability is greatly reduced after certain access times, directly
To after being close to or up to its service life, the failure probability of memory can increase again.So far dare to neglect without any memory manufacturer
The slightly Problem of Failure of semiconductor memory generally accelerates to store by burn-in test (Test During burn-in, TDBI)
The appearance of device failure probability directly allows it to enter product stationary phase to solve the problems, such as this.
The overall plan of semiconductor memory burn-in test is to supply power supply signal and test to tested semiconductor memory
Signal, allows time of tested semiconductor memory uninterruptedly operation setup under high/low temperature or room temperature, this process is known as
Aging (burn-in), thus carrys out the failure of accelerated semiconductor memory device, filters out non-defective unit.Due to the kind of semiconductor memory
There are many class, are widely used, and amount is big, performance is higher and operating temperature range is wide, it is therefore desirable to have a set of capacity flexibly, scalability
It gets well, the aging testing system that wide temperature range, feature-rich, framework reliability and cost performance are high is just able to satisfy practical application.
All there is a certain distance and deficiency compared with the demand in existing semiconductor memory ageing test box.
The Chinese patent of Publication No. CN103823171A discloses a kind of integrated circuit high temperature aging testing system and height
Functional test board is directly designed into inside high temperature ageing device to reduce the test space by warm ageing testing method；By function
The test of energy property and high temperature ageing test merge, to reduce the testing time；To achieve the purpose that reduce testing cost.But its
The performance for the test board being placed in high temperature ageing device is influenced by temperature can be very big, and does not provide low-temperature test side
Case；And the testing scheme is the universal testing method of custom integrated circuit, rather than specifically for the test of semiconductor memory
Method.
The Chinese patent of Publication No. CN1482660A discloses testing during burn-in system, discloses testing during burn-in system
The inside and outside layout of middle burning machine room (aging chamber), and the extension circuit plate for being put in the indoor burning machine plate of aging and being put in outside furnace；Its
Advantage is that the high and low temperature test and room temperature test can carry out having saved testing time and cost without influencing each other simultaneously；But it should
Patent document not publicly burns machine plate and the specific performance of extension circuit plate, function, structure and layout；And the testing during burn-in system
Under high/low temperature, the performance for burning machine plate will receive larger impact.
Summary of the invention
Aiming at the above defects or improvement requirements of the prior art, the present invention provides a kind of semiconductor memory high/low temperature is old
Change test box, its object is to reduce and rush to the unnecessary temperature of test equipment by zoning design and temperature zonal control
It hits.
To achieve the above object, according to one aspect of the present invention, a kind of semiconductor memory high/low temperature aging is provided
Test box, be arranged it is one or more groups of by the first humidity province, second temperature area and setting the first humidity province and second temperature area it
Between isolated area constitute test section；The temperature of first humidity province is steady state value or is arranged to track the temperature of second temperature area temperature
Range is spent, the temperature difference of the first, second two humidity provinces is kept constant, to avoid the frosting of second temperature area or damage test system
System；
Test section is for placing semiconductor memory aging testing apparatus；Wherein, the first humidity province is for placing aging survey
First backboard of test system, and on the first backboard can plug test core plate；Second temperature area is for placing the second back
Plate and on the second backboard can plug test board；
Isolated area is provided with straight-through plate, the signal and power supply that will be located at the test core plate of the first humidity province by leading directly to plate
It is transferred to the test board positioned at second temperature area；Isolated area side is provided with the radiator to the heat dissipation of straight-through plate, to reduce second
Influence of the humidity province temperature to the first humidity province.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box is provided with room temperature area, and the room temperature area is for putting
Set host computer, interchanger；The radiator of promising host computer, interchanger heat dissipation is set in the room temperature area.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, isolated area size adjustable, minimum are adjustable to and the
One humidity province merges into a single whole.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, using printed circuit board as straight-through plate.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, using resistance between the first, second backboard and straight-through plate
By high temperature and low temperature and heat-insulated board to board connector, backboard also act as other than providing the connection between board to each humidity province
Buffer action.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, the first backboard have multiple test core plates
Slot position can accommodate muti-piece test core plate；Its second backboard has multiple test board slot positions, can accommodate muti-piece test board；According to
The same survey number configuration test board and test core plate quantity of tested device, reduce test resource expense and damage risk；
It can each be supported by the test cell that test core plate, the first backboard, straight-through plate, the second backboard and test board are constituted
One tested device (Device Under Test, DUT) test or multiple tested devices are tested simultaneously；
By configuring different test boards to support multiple types semiconductor memory for example Nand Flash, Nor
The burn-in test of Flash, DDR2/DDR3/DDR4, eMMC, SSD.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box has between each test cell (slot) reserved
Gap, the air-flow in second temperature area is side outlet air, so that radiating airflow is uniformly unhinderedly blown between slot and slot
Gap so that second temperature area temperature control within ± 5 DEG C of set temperature, with realize to second temperature area temperature
It is precisely controlled, and the fast and stable of heating cooling is adjusted.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, second temperature area temperature is adjustable, temperature range branch
- 50 DEG C~+150 DEG C are held, temperature settability reaches as high as 0.1 DEG C.
Preferably, high-power heat-dissipation is arranged in the side of straight-through plate in above-mentioned semiconductor memory high/low temperature ageing test box
Device for example radiators such as one or more fans, as far as possible to take away the heat on straight-through plate, and prevent to place and survey
The temperature in the second temperature area of test plate (panel) is conducted by connector, the second backboard, straight-through plate into the first humidity province for placing core board,
Make the not tested test plate (panel) aging temperature of operating temperature of test core plate by reducing the heat transfer between the first, second humidity province
Influence.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, test core plate lateral position in ageing test box
The high-power heat-dissipation device for example radiators such as one or more fans are set, it is good to be formed in the upper and lower section of test core plate
Good air duct guarantees the operating temperature of test core plate in confidence band.
Preferably, above-mentioned semiconductor memory high/low temperature ageing test box, ageing test box front are provided with for showing
The state area of state, operation interface and power knob for human-computer interaction in ageing oven；The state area has instruction aging
The status indicator lamp and acousto-optic warning light of case operating status.
In general, through the invention it is contemplated above technical scheme is compared with the prior art, can obtain down and show
Beneficial effect:
(1) warm area is arranged, using back in temperature subregion by semiconductor memory high/low temperature ageing test box provided by the invention
Plate and straight-through plate carry out signal transmission, and test board and test core plate can be individually positioned in two independent humidity provinces and work, subtract
Lack to the unnecessary temperature shock of test macro；By putting test board and test core plate subregion when high/low temperature burn-in test
It sets, temperature is effectively isolated, the operating temperature of test core plate can be reduced as far as possible, reduce the temperature to test core plate device
Impact, guarantees test signal quality, improves test signal integrity a possibility that reducing device unstability under high/low temperature, can be with
The working frequency of DUT is even higher to 20MHz by conventional 10MHz promotion, the case where not increasing system complexity substantially
Lower promotion burn-in test efficiency, to further decrease testing cost；
(2) semiconductor memory high/low temperature ageing test box provided by the invention, by carrying out subregion, temperature to space in case
Zonal control is spent, the temperature range of burn-in test environment has been widened, aging temperature zone can be accomplished to -50 DEG C~+150 DEG C,
And can also accomplish more wide temperature range, two temperature ranges are well isolated by heat dissipation setting and isolated area, are kept away
Exempt from the temperature crosstalk between two warm areas, frosting or leak caused by the air-flow of two bursts of different temperatures meets, improves test
The safety of equipment；
Realize that high-speed test signal well passes by the test signal and power supply signal transmission that lead directly between plate progress warm area
It is defeated, the result of actual measurement shows that, in the case where signal integrity is met the requirements, test speed can steadily accomplish 50MHz；Highest can
Up to 200MHz or more；It not will increase the testing time, improve testing efficiency；
(3) semiconductor memory high/low temperature ageing test box provided by the invention is used, it can be according to the same of tested device
Number is surveyed to need flexible configuration test board and test core plate quantity, reduces test resource expense and damage risk；By matching
Different test boards is set, can support the various types such as Nand Flash, Nor Flash, DDR2/DDR3/DDR4, eMMC, SSD
The burn-in test of memory, reduces testing cost；
(4) semiconductor memory high/low temperature ageing test box provided by the invention, using printed circuit board as straight-through plate
Transmission test signal and power supply signal between two warm areas, the transmission medium compared to use cable as signal and power supply,
First is that solve can be simultaneously subjected to live high/low temperature aging cable it is at high cost, and be easy failure the problem of；Second is that having preferably
Heat-insulated and heat dissipation performance；Third is that the leakproofness more conducively between isolated area and humidity province designs.
Detailed description of the invention
Fig. 1 is the system block diagram of one embodiment of semiconductor memory high/low temperature ageing test box provided by the invention；
Fig. 2 is the structural representation of one embodiment of semiconductor memory high/low temperature ageing test box provided by the invention
Figure；
Fig. 3 is the backboard of one embodiment of semiconductor memory high/low temperature ageing test box provided by the invention and leads directly to
Plate structural schematic diagram.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.As long as in addition, technical characteristic involved in the various embodiments of the present invention described below
Not constituting a conflict with each other can be combined with each other.
Referring to Fig.1~3, semiconductor memory high/low temperature ageing test box provided by the invention is provided with room temperature area, and
By the first humidity province, second temperature area, the test section of the isolated area composition between the first humidity province and second temperature area is set；
Settable one or more groups of test sections in each ageing test box.
In a preferred embodiment, the size of isolated area can need to adjust according to design technology and actual test, can be with
Using a relatively narrow transition region as isolated area, can also will be isolated using a wider section as isolated area
Area merges with the first humidity province 1, depending on concrete application and to the needs of high/low temperature aging temperature.
The radiator of promising host computer and interchanger heat dissipation is arranged for example for placing host computer, interchanger in room temperature area
Fan.
Test section is used to place the test equipment of semiconductor memory burn-in test, and for example, the first humidity province 1 is for placing
Aging testing system for example the first backboard, and be arranged on the first backboard can plug several test core plates；Second temperature
Degree area 2 be used for place the second backboard and on the backboard can plug several test boards.
Isolated area is provided with straight-through plate；The signal and power supply that the test core plate of the first humidity province will be located at by leading directly to plate
It is transferred to the test board positioned at second temperature area；Isolated area side is provided with the radiator to radiate to straight-through plate, with as far as possible
Reduce influence of the temperature in second temperature area 2 to the first humidity province 1.In a preferred embodiment, using printed circuit board
(PCB) as straight-through plate.
Board to board connector is used between backboard and straight-through plate, they are resistant to high temperature and low temperature, and can play
Heat-insulated effect；Backboard also acts as the buffer action to each humidity province other than providing the connection between board.
Referring to Fig.1, in embodiment, for placing test core plate and backboard 1, the temperature in the area can be set for humidity province 1
For steady state value, the temperature range of tracking 2 temperature of humidity province also can be set into, keep constant the temperature difference of the two humidity provinces,
To avoid 2 frosting of humidity province or damage test macro.When test, by test core plate and backboard 1, straight-through plate, backboard 2 and survey
Test plate (panel) constitutes a test cell (slot), and each slot can support 256DUTs while test；It can also need to design according to test
Support the test cell of more DUT.
The temperature of humidity province 2 can be set, and temperature range supports -50 DEG C~+150 DEG C, and temperature settability is 0.1 DEG C.
For reach to 2 temperature of humidity province be precisely controlled and heat up and cool down fast and stable adjust.Have between each layer slot reserved
Clearance height, the height in the gap is 45mm in a preferred embodiment；The air-flow in second temperature area 2 is side outlet air,
It is even unhinderedly to blow over the gap between slot and slot, so as to so that the temperature accuracy of the humidity province 2 is controlled at ± 5 DEG C
Within, second temperature area temperature is precisely controlled with realizing, and the fast and stable of heating cooling is adjusted.
Embodiment provide ageing test box in, it is contemplated that a fairly large number of DUT simultaneously burn-in test when it is produced
Amount of heat, therefore the refrigeration of high-low temperature chamber and heating power need to consider the maximum load of humidity province 2.
The DUT that test board is carried is more, and total power consumption is bigger, and the heat of generation is more, and refrigeration work consumption is bigger；In embodiment
Refrigeration work consumption is designed according to maximum load；For semiconductor memory, in the case where same survey number is 256 DUT, maximum is negative
It carries generally within 9kW.
Signal and power delivery between warm area are carried out by this zoning design, temperature zonal control, by straight-through plate,
The wide temperature range and high-speed test signal good transmission for realizing burn-in test environment, meet the requirements in signal integrity
In the case where, test speed can steadily accomplish 50MHz；Reach as high as 200MHz or more.
When test, test signal and power supply are provided to DUT by test core plate, and be compared to DUT output signal,
Test result is saved in different storage sections respectively in order to analyze；Backboard 1 positioned at the first humidity province 1 gives test core
Plate and straight-through plate provide slot, realize the transmission of signal and power supply.
Referring to Fig. 2, ageing test box front is provided with the state area for state in show case, and state area design has height
The status indicator lamp and acousto-optic warning light of incubator operation；Operation interface for human-computer interaction；Using a touch in embodiment
Formula flat-panel monitor observes and analyzes test result according to DUT test program convenient for tester；Power knob and door and handle
Hand；In one embodiment, for convenience of operating, door and handle is respectively set in the forward and backward face of ageing test box；The front door of front
With handle for picking and placing BIB test board；Subsequent door and handle are convenient for picking and placing core test board, with connecing for aspect test equipment
Enter and takes out.
4 humidity provinces are provided in embodiment illustrated in Figure 2, wherein humidity province 4,3 is for placing test board；Isolation
Device is incorporated with humidity province 2,1, and humidity province 2,1 is for placing straight-through plate and test core plate；Operation interface can be simultaneously to 4 temperature
Degree area is controlled.
Referring to Fig. 3, board to board connector is used between backboard and straight-through plate, they are resistant to high temperature and low temperature, and
Heat-insulated effect can be played；Backboard also acts as the buffer action to each humidity province other than providing the connection between board.
In a preferred embodiment, flexible heat-insulated material is used inside ageing test box in the region of two humidity provinces of connection
Material, mating connector guarantee the good isolation between each humidity province.In high/low temperature burn-in test, the humidity province of test board is placed
Temperature can be conducted by connector, backboard 2, straight-through plate into the humidity province for placing core board, for the heat for reducing by two humidity provinces
A large amount of fans are arranged in the side of straight-through plate in conduction, and principle is 2 fans of placement between every two blocks of straight-through plates, with as far as possible
Heat on straight-through plate is taken away, guarantees the influence of the not tested test plate (panel) aging temperature of operating temperature of test core plate；In aging
A large amount of fans are arranged in test core plate lateral position in test box, with above and below core board section form good air duct, guarantee to survey
The operating temperature of core board is tried in confidence band.
As it will be easily appreciated by one skilled in the art that the foregoing is merely illustrative of the preferred embodiments of the present invention, not to
The limitation present invention, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should all include
Within protection scope of the present invention.
Claims (11)
1. a kind of semiconductor memory high/low temperature ageing test box, which is characterized in that be provided with one or more groups of by the first temperature
The test section that area, second temperature area and the isolated area being arranged between the first humidity province and second temperature area are constituted；
The temperature of first humidity province is steady state value, or is arranged to track the temperature range of second temperature area temperature；
The test section is for placing semiconductor memory aging testing apparatus；Wherein, the first humidity province is for placing the first back
Plate, and on the first backboard can plug test core plate；It is carried on the back for placing the second backboard, and second in second temperature area
On plate can plug test board；
The isolated area is provided with straight-through plate, is believed the test that the test core plate for being located at the first humidity province is sent by leading directly to plate
Number and power supply signal be transferred to the test board positioned at second temperature area；Isolated area side is provided with the heat dissipation to the heat dissipation of straight-through plate
Device.
2. semiconductor memory high/low temperature ageing test box as described in claim 1, which is characterized in that it is provided with room temperature area,
The room temperature area is for placing host computer, interchanger；The heat dissipation dress of promising host computer, interchanger heat dissipation is set in the room temperature area
It sets.
3. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that first back
Plate has multiple test core board slots position, and the second backboard has multiple test board slot positions；
Each by the test cell that test core plate, the first backboard, straight-through plate, the second backboard and test board are constituted support one or
Multiple tested devices are tested simultaneously.
4. semiconductor memory high/low temperature ageing test box as claimed in claim 3, which is characterized in that between each test cell
With reserved gap, the air-flow in the second temperature area is side outlet air, and radiating airflow is made uniformly unhinderedly to blow over test
Gap between unit.
5. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that the isolated area
Size adjustable, minimum are adjusted to merge into a single whole with the first humidity province.
6. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that described first,
Using tolerance high temperature and low temperature and heat-insulated board to board connector between two backboards and straight-through plate.
7. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that using printing electricity
Road plate is as straight-through plate.
8. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that second temperature
It is adjustable to spend area's temperature, adjustable temperature range is -50 DEG C~+150 DEG C.
9. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that the straight-through plate
Side be provided with one or more radiators.
10. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that ageing test box
Interior test core plate lateral position is provided with one or more radiators.
11. semiconductor memory high/low temperature ageing test box as claimed in claim 1 or 2, which is characterized in that ageing test box
Cabinet front is provided with for showing that the state area of state in ageing oven, the operation interface for human-computer interaction and power supply are pressed
Button；The state area has the status indicator lamp and acousto-optic warning light of instruction ageing oven operating status.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811003682.6A CN109119127A (en) | 2018-08-30 | 2018-08-30 | A kind of semiconductor memory high/low temperature ageing test box |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811003682.6A CN109119127A (en) | 2018-08-30 | 2018-08-30 | A kind of semiconductor memory high/low temperature ageing test box |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109119127A true CN109119127A (en) | 2019-01-01 |
Family
ID=64861626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811003682.6A Pending CN109119127A (en) | 2018-08-30 | 2018-08-30 | A kind of semiconductor memory high/low temperature ageing test box |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109119127A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109119128A (en) * | 2018-10-19 | 2019-01-01 | 武汉精鸿电子技术有限公司 | A kind of high/low temperature burn-in test rack structure |
| CN110244793A (en) * | 2019-05-30 | 2019-09-17 | 东莞维科电池有限公司 | A kind of the environment temperature control system and control method of battery core test |
| CN111308305A (en) * | 2020-03-04 | 2020-06-19 | 武汉精鸿电子技术有限公司 | Semiconductor test equipment |
| CN111551839A (en) * | 2020-04-23 | 2020-08-18 | 武汉精测电子集团股份有限公司 | High-low temperature aging test equipment for semiconductor memory |
| CN111707933A (en) * | 2020-08-20 | 2020-09-25 | 浙江杭可仪器有限公司 | Aging test cabinet for memory |
| CN116580752A (en) * | 2023-04-26 | 2023-08-11 | 深圳市晶存科技有限公司 | Incubator for test and test method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008224455A (en) * | 2007-03-13 | 2008-09-25 | Stk Technology Co Ltd | Chamber for test of semiconductor device |
| KR20090027281A (en) * | 2007-09-12 | 2009-03-17 | 미래산업 주식회사 | Test handler and method of testing semiconductor devices using the same |
| CN201716395U (en) * | 2010-05-27 | 2011-01-19 | 北京新润泰思特测控技术有限公司 | Aging test box |
| CN203054134U (en) * | 2013-01-30 | 2013-07-10 | 戴雷玉 | Electronic component aging test module |
| CN208737883U (en) * | 2018-08-30 | 2019-04-12 | 武汉精鸿电子技术有限公司 | A kind of semiconductor memory high/low temperature ageing test box |
-
2018
- 2018-08-30 CN CN201811003682.6A patent/CN109119127A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008224455A (en) * | 2007-03-13 | 2008-09-25 | Stk Technology Co Ltd | Chamber for test of semiconductor device |
| KR20090027281A (en) * | 2007-09-12 | 2009-03-17 | 미래산업 주식회사 | Test handler and method of testing semiconductor devices using the same |
| CN201716395U (en) * | 2010-05-27 | 2011-01-19 | 北京新润泰思特测控技术有限公司 | Aging test box |
| CN203054134U (en) * | 2013-01-30 | 2013-07-10 | 戴雷玉 | Electronic component aging test module |
| CN208737883U (en) * | 2018-08-30 | 2019-04-12 | 武汉精鸿电子技术有限公司 | A kind of semiconductor memory high/low temperature ageing test box |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109119128A (en) * | 2018-10-19 | 2019-01-01 | 武汉精鸿电子技术有限公司 | A kind of high/low temperature burn-in test rack structure |
| CN110244793A (en) * | 2019-05-30 | 2019-09-17 | 东莞维科电池有限公司 | A kind of the environment temperature control system and control method of battery core test |
| CN111308305A (en) * | 2020-03-04 | 2020-06-19 | 武汉精鸿电子技术有限公司 | Semiconductor test equipment |
| CN111308305B (en) * | 2020-03-04 | 2022-02-18 | 武汉精鸿电子技术有限公司 | Semiconductor test equipment |
| CN111551839A (en) * | 2020-04-23 | 2020-08-18 | 武汉精测电子集团股份有限公司 | High-low temperature aging test equipment for semiconductor memory |
| CN111707933A (en) * | 2020-08-20 | 2020-09-25 | 浙江杭可仪器有限公司 | Aging test cabinet for memory |
| CN116580752A (en) * | 2023-04-26 | 2023-08-11 | 深圳市晶存科技有限公司 | Incubator for test and test method thereof |
| CN116580752B (en) * | 2023-04-26 | 2024-03-19 | 深圳市晶存科技有限公司 | Incubator for test and test method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109119127A (en) | A kind of semiconductor memory high/low temperature ageing test box | |
| CN208737883U (en) | A kind of semiconductor memory high/low temperature ageing test box | |
| US11659694B2 (en) | Computer system with external bypass air plenum | |
| CN103037665B (en) | A kind of electronic device cooling system with radiator cooler | |
| CN206115385U (en) | Blade server | |
| CN105180613A (en) | Multi-box type lossless fabric drying system | |
| CN101640992A (en) | Network equipment cabinet with cooling system | |
| CN109119128A (en) | A kind of high/low temperature burn-in test rack structure | |
| CN106997979A (en) | A kind of high radiating combined type cavity of 4G communication base stations wave filter | |
| CN204963042U (en) | Computer lab air conditioner and computer lab air conditioning system between row | |
| CN103476231B (en) | Air-conditioning | |
| CN108244829A (en) | Note computer desk with radiator | |
| CN205404772U (en) | LED lamp pearl ageing oven based on semiconductor cooling method | |
| CN103500000A (en) | Refrigerating system for data machine room | |
| CN202166163U (en) | Intelligent air supply device with variable air volume | |
| KR20170023339A (en) | Apparatus for testing reliability of semiconductor component having vertical loading direction | |
| CN108521751A (en) | A kind of communication cabinet of rapid cooling | |
| CN208903668U (en) | A kind of high/low temperature burn-in test rack structure | |
| CN102238853A (en) | Air cooling heat dissipation system of electric communication equipment | |
| CN205093078U (en) | Network -type cabinet of computer | |
| CN109765968B (en) | Integrated circuit board for computer | |
| CN209015051U (en) | A kind of server fan assembly apparatus | |
| KR101013520B1 (en) | Rapidity temperature control device of test handler chamber | |
| CN207181649U (en) | A kind of LED test box | |
| CN207911230U (en) | A kind of enclosed radiation cabinet |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |