CN109116647A - 一种阵列基板及其制备方法、显示装置 - Google Patents

一种阵列基板及其制备方法、显示装置 Download PDF

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CN109116647A
CN109116647A CN201811082870.2A CN201811082870A CN109116647A CN 109116647 A CN109116647 A CN 109116647A CN 201811082870 A CN201811082870 A CN 201811082870A CN 109116647 A CN109116647 A CN 109116647A
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layer
underlay substrate
reflecting
storage capacitance
substrate
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CN109116647B (zh
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薛进进
史大为
李峰
姚磊
王文涛
徐海峰
杨璐
候林
王金锋
李梅
方业周
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to US16/382,679 priority patent/US11031419B2/en
Priority to US17/243,817 priority patent/US11637134B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Abstract

本申请提供了一种阵列基板及其制备方法、显示装置，其中阵列基板包括多个像素单元，像素单元划分为透光区域和反射区域，反射区域的阵列基板包括：衬底基板以及设置在衬底基板上的薄膜晶体管和存储电容；存储电容包括层叠设置在衬底基板一侧的金属层、层间介质层以及反射层，金属层靠近衬底基板设置；设置在存储电容背离衬底基板一侧的公共电极层，反射层与公共电极层连接，金属层与薄膜晶体管的有源层连接。由于反射区域中反射层的设置可以反射环境光，从而降低背光源的功率消耗；同时，金属层和反射层之间形成的存储电容可以存储液晶像素电压，使由漏电流所造成的电压变化量减少，从而可以有效增加液晶像素电位保持能力，提升显示效果。

Description

一种阵列基板及其制备方法、显示装置
技术领域
本发明涉及显示技术领域，特别是涉及一种阵列基板及其制备方法、显示装置。
背景技术
反射式或半透式显示一直是低功耗液晶显示的一种重要技术。一般而言，背光源的耗电量约占总功率消耗的70％～80％，反射式或半透式显示器件可以充分利用环境光源，因此可以节约背光源的功率消耗。另外，对于液晶显示产品而言漏电流的存在导致液晶像素电极的电压无法保持，影响显示效果。
发明内容
本发明提供及一种阵列基板及其制备方法、显示装置，以降低能耗并改善显示效果。
为了解决上述问题，本发明公开了一种阵列基板，所述阵列基板包括多个像素单元，所述像素单元划分为透光区域和反射区域，所述反射区域的阵列基板包括：
衬底基板以及设置在所述衬底基板上的薄膜晶体管和存储电容，所述存储电容包括层叠设置在所述衬底基板一侧的金属层、层间介质层以及反射层，所述金属层靠近所述衬底基板设置；
设置在所述存储电容背离所述衬底基板一侧的公共电极层，所述反射层与所述公共电极层连接，所述金属层与所述薄膜晶体管的有源层连接。
可选地，所述薄膜晶体管包括：层叠设置在所述衬底基板一侧的所述有源层、栅极绝缘层、栅极层、所述层间介质层以及源漏金属层，所述有源层靠近所述衬底基板设置；
其中，所述栅极层与所述金属层通过同一掩膜形成，所述金属层通过设置在所述栅极绝缘层上的过孔与所述有源层连接。
可选地，所述阵列基板还包括：设置在所述存储电容与所述公共电极层之间的平坦层，所述公共电极层通过设置在所述平坦层上的过孔与所述反射层连接。
可选地，所述阵列基板还包括：设置在所述公共电极层背离所述衬底基板一侧的钝化层和像素电极层，所述像素电极层通过设置在所述钝化层上的过孔与所述薄膜晶体管连接。
可选地，所述反射层的材质为银。
为了解决上述问题，本发明还公开了一种显示装置，所述显示装置包括任一实施例所述的阵列基板。
为了解决上述问题，本发明还公开了一种阵列基板的制备方法，所述制备方法包括：
提供衬底基板；
在所述衬底基板上形成薄膜晶体管和存储电容，所述存储电容包括依次形成在所述衬底基板上的金属层、层间介质层以及反射层，所述金属层与所述薄膜晶体管的有源层连接；
在所述存储电容背离所述衬底基板的一侧形成公共电极层，所述反射层与所述公共电极层连接。
可选地，在所述衬底基板上形成薄膜晶体管的步骤，包括：
在所述衬底基板的一侧依次形成有源层、栅极绝缘层、栅极层、所述层间介质层以及源漏金属层；
其中，所述栅极层与所述金属层通过同一掩膜形成；所述金属层通过设置在所述栅极绝缘层上的过孔与所述有源层连接。
可选地，在所述存储电容背离所述衬底基板的一侧形成公共电极层的步骤之前，所述制备方法还包括：
在所述存储电容背离所述衬底基板的一侧形成平坦层；
所述公共电极层形成在所述平坦层背离所述衬底基板的一侧，所述公共电极层通过设置在所述平坦层上的过孔与所述反射层连接。
可选地，所述制备方法还包括：
在所述公共电极层背离所述衬底基板的一侧依次形成钝化层和像素电极层，所述像素电极层通过设置在所述钝化层上的过孔与所述薄膜晶体管连接。
与现有技术相比，本发明包括以下优点：
本申请提供了一种阵列基板及其制备方法、显示装置，其中阵列基板包括多个像素单元，像素单元划分为透光区域和反射区域，反射区域的阵列基板包括：衬底基板以及设置在衬底基板上的薄膜晶体管和存储电容；存储电容包括层叠设置在衬底基板一侧的金属层、层间介质层以及反射层，金属层靠近衬底基板设置；设置在存储电容背离衬底基板一侧的公共电极层，反射层与公共电极层连接，金属层与薄膜晶体管的有源层连接。由于反射区域中反射层的设置可以反射环境光，从而降低背光源的功率消耗；同时，金属层和反射层之间形成的存储电容可以存储液晶像素电压，使由漏电流所造成的电压变化量减少，从而可以有效增加液晶像素电位保持能力，提升显示效果。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对本发明实施例的描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1示出了本申请一实施例提供的一种阵列基板的剖面结构示意图；
图2示出了本申请一实施例提供的一种阵列基板的制备方法的步骤流程图。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本发明作进一步详细的说明。
本申请一实施例提供了一种阵列基板，该阵列基板可以包括多个像素单元，各像素单元划分为透光区域和反射区域，参照图1，反射区域的阵列基板包括：衬底基板11以及设置在衬底基板11上的薄膜晶体管和存储电容13；存储电容13包括层叠设置在衬底基板11一侧的金属层131、层间介质层132以及反射层133，金属层131靠近衬底基板11设置；设置在存储电容13背离衬底基板11一侧的公共电极层14，反射层133与公共电极层14连接，金属层131与薄膜晶体管的有源层连接。
具体的，衬底基板11可以包括玻璃衬底基板、柔性衬底基板等衬底，还可以包括形成在衬底上的遮挡层和缓冲层等。
各像素单元的透光区域和反射区域各自所占的比例可根据产品应用属性，通过改变反射层133的大小来调整。由于反射区域中反射层的设置可以反射环境光，从而降低背光源的功率消耗。
设置在衬底基板11上的薄膜晶体管的结构可以有多种，例如可以包括层叠设置在衬底基板11上的栅极层、栅极绝缘层、有源层以及源漏金属层，或者包括层叠设置在衬底基板11上的有源层、栅极绝缘层、栅极层、层间介质层以及源漏金属层，本申请对薄膜晶体管的具体结构不作限定。对于后一种结构的薄膜晶体管对应的阵列基板后续实施例会详细介绍。
设置在衬底基板11上的存储电容13的两个极板分别为金属层131和反射层133。液晶像素电容的两个极板电压分别为像素电极的电压和公共电极的电压。为了使存储电容13与液晶像素电容成并联，从而存储液晶像素电容的电压，金属层131可以与薄膜晶体管的有源层连接，反射层133可以与公共电极连接。需要注意的是，金属层131与有源层连接，以及反射层133与公共电极连接的方式有多种，凡是能够使存储电容13存储液晶像素电容电压的连接方式都落在本实施例的保护范围之内。后续会对金属层131与薄膜晶体管的有源层连接，以及反射层133与公共电极连接的具体实现方式进行详细说明。
本实施例提供的阵列基板，通过金属层和反射层形成存储电容，该存储电容与液晶像素电容并联，当液晶像素电容由于漏电流的存在而导致电荷流失时，并联的存储电容可以及时为液晶像素电容补充电荷，使液晶像素电容由漏电流所造成的电压变化量减少，从而可以有效增加液晶像素电容的电位保持能力，提升显示效果；另外，由于反射区域中设置的反射层可以反射环境光，可以降低背光源的功率消耗；并且由于液晶像素电容的电位保持能力提升，可以适当降低画面的扫描频率，从而可以进一步降低背光源的功率消耗。
其中，公共电极层14可以设置在薄膜晶体管和存储电容13背离衬底基板11的一侧，其材质可以为ITO。
在本实施例的一种实现方式中，参照图1，薄膜晶体管可以包括：层叠设置在衬底基板11一侧的有源层121、栅极绝缘层122、栅极层123、层间介质层132以及源漏金属层124，有源层121靠近衬底基板11设置；其中，栅极层123与金属层131通过同一掩膜形成，金属层131通过设置在栅极绝缘层122上的过孔122h与有源层121连接。
在实际应用中，参照图1，有源层121可以包括沟道区121a和导通区121b，其中，栅极层123在衬底基板11上的正投影覆盖沟道区121a在衬底基板11上的正投影，沟道区121a的材料为半导体材料，沟道区121a用于根据栅极层123电压控制源极和漏极之间的导通或关断，导通区121b的材料可以为通过掺杂等方式导体化的半导体材料或金属材料等。具体的，金属层131可以通过设置在栅极绝缘层122上的过孔122h与有源层121的导通区121b连接。需要注意的是，图1中与源漏金属层连接的导通区121b，和与金属层131连接的导通区121b是相互连接的一个整体，其连接部分未在该剖面图中示出。
为了实现公共电极层14与反射层133的连接，本实施例提供的阵列基板还可以包括：设置在存储电容13与公共电极层14之间的平坦层15，公共电极层14通过设置在平坦层15上的过孔15h与反射层133连接。
需要注意的是，金属层131与薄膜晶体管的有源层连接，反射层133与公共电极层14连接并不仅限于上述的实现方式，例如，金属层131还可以与源漏金属层124同步形成并通过设置在层间介质层132和栅极绝缘层122的过孔与有源层121连接，相应地反射层133可以设置在平坦层15和公共电极层14之间，即反射层133与公共电极层14直接接触连接。金属层131还可以连接至源漏电极(源极或漏极)或像素电极等与有源层连接的导电结构，从而实现金属层131与有源层的连接；反射层133也可以连接至与公共电极层14连接的导电结构，最终实现反射层133与公共电极层14的连接。总之，凡是能够使金属层131与薄膜晶体管的有源层连接，反射层133与公共电极层14连接的阵列基板结构都落在本实施例保护范围之内。
在实际应用中，上述的阵列基板还可以包括：设置在公共电极层14背离衬底基板11一侧的钝化层16和像素电极层17，像素电极层17通过设置在钝化层16上的过孔16h与薄膜晶体管连接。
具体的，像素电极层17可以通过过孔16h与薄膜晶体管的源漏金属层124连接。像素电极层17的材质可以为ITO。
在上述各实施例中，反射层的材质可以为金属银等反射率较高的金属材质。
由于LTPS产品的漏电流问题比较严重，为了使改善漏电流的效果更显著，上述各实施例中的薄膜晶体管的有源层材质可以为低温多晶硅LTPS等。
本申请另一实施例还提供了一种显示装置，该显示装置可以包括上述任一实施例所述的阵列基板。
需要说明的是，本实施例中的显示装置可以为：显示面板、电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本申请另一实施例还提供了一种阵列基板的制备方法，参照图2，该制备方法可以包括：
步骤201：提供衬底基板。
具体地，该步骤可以包括提供玻璃衬底基板、柔性衬底基板等衬底，还可以包括在衬底上形成遮挡层和缓冲层等步骤。
步骤202：在衬底基板上形成薄膜晶体管和存储电容，存储电容包括依次形成在衬底基板上的金属层、层间介质层以及反射层，金属层与薄膜晶体管的有源层连接。
具体地，在本实施例的一种实现方式中，步骤202中在衬底基板上形成薄膜晶体管的步骤可以进一步包括：
在衬底基板的一侧依次形成有源层、栅极绝缘层、栅极层、层间介质层以及源漏金属层；其中，栅极层与金属层通过同一掩膜形成；金属层通过设置在栅极绝缘层上的过孔与有源层连接。
具体地，薄膜晶体管的各层结构都可以通过构图工艺形成。其中，在栅极绝缘层GI的制备过程中可以通过GI Mask形成使金属层和有源层连接的过孔。另外，由于金属层和栅极层可以通过同一掩膜形成，在栅极层掩膜版上需要增加与金属层对应的图案。
在形成薄膜晶体管的源漏金属层之后，形成反射层。可采用金属材料银作为反射层，通过溅射成膜方式、曝光、刻蚀工艺形成所需设计的反射层结构pattern。
步骤203：在存储电容背离衬底基板的一侧形成公共电极层，反射层与公共电极层连接。
具体地，步骤203可以进一步包括：
在存储电容背离衬底基板的一侧形成平坦层；
在平坦层背离衬底基板的一侧形成公共电极层，公共电极层通过设置在平坦层上的过孔与反射层连接。
具体的，用于连接公共电极层和反射层的过孔也可以通过构图工艺形成。
在实际应用中，上述的制备方法还可以包括：
步骤204：在公共电极层背离衬底基板的一侧依次形成钝化层和像素电极层，像素电极层通过设置在钝化层上的过孔与薄膜晶体管连接。
上述任一实施例所述的阵列基板可以通过本实施例提供的制备方法制备得到。
本申请实施例提供了一种阵列基板及其制备方法、显示装置，其中阵列基板包括多个像素单元，像素单元划分为透光区域和反射区域，反射区域的阵列基板包括：衬底基板以及设置在衬底基板上的薄膜晶体管和存储电容；存储电容包括层叠设置在衬底基板一侧的金属层、层间介质层以及反射层，金属层靠近衬底基板设置，设置在存储电容背离衬底基板一侧的公共电极层，反射层与公共电极层连接，金属层与薄膜晶体管的有源层连接。通过金属层和反射层形成存储电容，该存储电容与液晶像素电容并联，当液晶像素电容由于漏电流的存在而导致电荷流失时，并联的存储电容可以及时为液晶像素电容补充电荷，使液晶像素电容由漏电流所造成的电压变化量减少，从而可以有效增加液晶像素电容的电位保持能力，提升显示效果；另外，由于反射区域中设置的反射层可以反射环境光，可以降低背光源的功率消耗；并且由于液晶像素电容的电位保持能力提升，可以适当降低画面的扫描频率，从而可以进一步降低背光源的功率消耗。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
以上对本发明所提供的一种阵列基板及其制备方法、显示装置进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (10)

1.一种阵列基板，其特征在于，所述阵列基板包括多个像素单元，所述像素单元划分为透光区域和反射区域，所述反射区域的阵列基板包括：
衬底基板以及设置在所述衬底基板上的薄膜晶体管和存储电容，所述存储电容包括层叠设置在所述衬底基板一侧的金属层、层间介质层以及反射层，所述金属层靠近所述衬底基板设置；
设置在所述存储电容背离所述衬底基板一侧的公共电极层，所述反射层与所述公共电极层连接，所述金属层与所述薄膜晶体管的有源层连接。
2.根据权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管包括：层叠设置在所述衬底基板一侧的所述有源层、栅极绝缘层、栅极层、所述层间介质层以及源漏金属层，所述有源层靠近所述衬底基板设置；
其中，所述栅极层与所述金属层通过同一掩膜形成，所述金属层通过设置在所述栅极绝缘层上的过孔与所述有源层连接。
3.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括：设置在所述存储电容与所述公共电极层之间的平坦层，所述公共电极层通过设置在所述平坦层上的过孔与所述反射层连接。
4.根据权利要求3所述的阵列基板，其特征在于，所述阵列基板还包括：设置在所述公共电极层背离所述衬底基板一侧的钝化层和像素电极层，所述像素电极层通过设置在所述钝化层上的过孔与所述薄膜晶体管连接。
5.根据权利要求1至4任一项所述的阵列基板，其特征在于，所述反射层的材质为银。
6.一种显示装置，其特征在于，所述显示装置包括权利要求1至5任一项所述的阵列基板。
7.一种阵列基板的制备方法，其特征在于，所述制备方法包括：
提供衬底基板；
在所述衬底基板上形成薄膜晶体管和存储电容，所述存储电容包括依次形成在所述衬底基板上的金属层、层间介质层以及反射层，所述金属层与所述薄膜晶体管的有源层连接；
在所述存储电容背离所述衬底基板的一侧形成公共电极层，所述反射层与所述公共电极层连接。
8.根据权利要求7所述的制备方法，其特征在于，在所述衬底基板上形成薄膜晶体管的步骤，包括：
在所述衬底基板的一侧依次形成有源层、栅极绝缘层、栅极层、所述层间介质层以及源漏金属层；
其中，所述栅极层与所述金属层通过同一掩膜形成；所述金属层通过设置在所述栅极绝缘层上的过孔与所述有源层连接。
9.根据权利要求7所述的制备方法，其特征在于，在所述存储电容背离所述衬底基板的一侧形成公共电极层的步骤之前，所述制备方法还包括：
在所述存储电容背离所述衬底基板的一侧形成平坦层；
所述公共电极层形成在所述平坦层背离所述衬底基板的一侧，所述公共电极层通过设置在所述平坦层上的过孔与所述反射层连接。
10.根据权利要求9所述的制备方法，其特征在于，所述制备方法还包括：
在所述公共电极层背离所述衬底基板的一侧依次形成钝化层和像素电极层，所述像素电极层通过设置在所述钝化层上的过孔与所述薄膜晶体管连接。
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