CN109065613A - A kind of manufacturing method of vertical structure germanium slot field-effect transistor device - Google Patents

A kind of manufacturing method of vertical structure germanium slot field-effect transistor device Download PDF

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CN109065613A
CN109065613A CN201810758788.0A CN201810758788A CN109065613A CN 109065613 A CN109065613 A CN 109065613A CN 201810758788 A CN201810758788 A CN 201810758788A CN 109065613 A CN109065613 A CN 109065613A
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film
germanium
insulating layer
annealing
effect transistor
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CN109065613B (en
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张睿
赵毅
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Zhejiang University ZJU
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The invention discloses a kind of manufacturing methods of vertical structure germanium slot field-effect transistor device.It deposits germanium film and nickel film on substrate first, and source electrode of the nickel germanium alloy film as device is formed by annealing;Secondly the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are deposited on source electrode;It etches the first insulating layer of thin-film, hafnium nitride film and second insulating layer film and forms channel hole, and the hafnium nitride for aoxidizing channel hole inner wall generates oxynitriding hafnium or hafnium oxide, the gate insulation layer as device;The deposited amorphous germanium in channel hole, and pass through the channel for making germanium crystal form device of annealing;Finally channel disposed thereon nickel film and anneal form drain electrode of the nickel germanium alloy as device.The present invention sufficiently lowers the technology difficulty in preparation vertical structure device process using the method that grid stacking prepares channel again is first prepared, and reduces process costs, and device obtained has the advantages such as driving current is big, integration density is high.

Description

A kind of manufacturing method of vertical structure germanium slot field-effect transistor device
Technical field
The invention belongs to field of semiconductor devices, are related to a kind of high-performance vertical structure germanium slot field-effect transistor device Manufacturing method.
Background technique
Silicon slot field-effect transistor (Si MOSFET) is the most basic component units of modern integrated circuits, is integrated electricity Realize the basis of the functions such as operation, storage in road.Measure the unlatching electricity that the most important index of MOSFET element performance height is device Stream, the method by reducing MOSFET element channel length are able to ascend the performance of device.By semicentennial technological progress, The characteristic size of MOSFET element is smaller and smaller, and the MOSFET element channel length of volume production grade has reached 20nm at present.Further The method for reducing device size will lead to serious short-channel effect, it is difficult to further promote performance of integrated circuits.In order to solve This problem proposes germanium channel mosfet (Ge MOSFET) device technology.Using germanium carrier mobility more higher than silicon, MOSFET element performance can be persistently promoted under the premise of not reducing device size.Domestic and international each large enterprises and scientific research institution are equal Using Ge MOSFET element technology as one of the candidate scheme of next-generation high performance integrated circuit device.It is fast by recent years Speed development, Ge MOSFET element technology achieve marked improvement, and the firing current for being mainly reflected in device has been significantly higher than tradition Si MOSFET element, it is shown that the wide application prospect of GeMOSFET device technology.
In addition to increasing bigger device firing current, the integrated level for promoting device is also to obtain more high density integrated circuit performance Effective means.Channel is in and is parallel to substrate surface in traditional MOSFET element, due to the source electrode of device, drain electrode, channel etc. The area in region can not continue to reduce, and limit the integration density of MOSFET element.Utilize the MOSFET element (ditch of vertical structure Road is perpendicular to substrate surface), it can sufficiently reduce the projected area of device, promote the integrated level of device.Vertical structure germanium channel Source electrode, channel and the drain region of field effect transistor stack from bottom to top, surrounding of the grid stacking around vertical channel.In this way Design feature cause traditional method that channel prepares grid stacking again that first prepares to be difficult to form the germanium ditch place where Taoist rites are performed of vertical structure Effect transistor.Therefore, the present invention proposes a kind of method for first preparing grid stacking and preparing channel again, realizes vertical structure germanium ditch The preparation of road field effect transistor.
Summary of the invention
It is an object of the invention to be directed to the deficiency of existing silicon slot field-effect transistor device, provide a kind of based on vertical The manufacturing method of the germanium channelling effect transistor device of channel structure.
The purpose of the present invention is achieved through the following technical solutions: a kind of vertical structure germanium slot field-effect transistor The manufacturing method of device, this method comprises the following steps:
(1) it is sequentially depositing germanium film and nickel film on substrate, and nickel germanium alloy film is formed as device by annealing Source electrode;
(2) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are sequentially depositing on source electrode;
(3) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are etched and forms channel hole, and oxidation ditch The hafnium nitride of road hole inner wall generates oxynitriding hafnium or hafnium oxide, the gate insulation layer as device;
(4) the deposited amorphous germanium in channel hole, and pass through the channel for making germanium crystal form device of annealing;
(5) channel disposed thereon nickel film and anneal form drain electrode of the nickel germanium alloy as device, ultimately form vertically Structure germanium slot field-effect transistor device.
Further, the substrate material is including but not limited to silicon, silicon face cvd silicon oxide, quartz, sapphire;It is described First insulating layer and the material of second insulating layer are including but not limited to silica, silicon nitride, aluminium oxide and hafnium oxide.
Further, in the step (1), the method for depositing germanium film and nickel film is hot evaporation or sputtering;Annealing Method is thermal annealing, flash lamp annealing or laser annealing;In the step (2), the first insulating layer and second insulating layer are deposited Method is atomic layer deposition;The method of cvd nitride hafnium film is atomic layer deposition or sputtering.
Further, in the step (2), the first insulating layer of etching, hafnium nitride film and second insulating layer form channel The method of hole is reactive ion etching.
Further, in the step (3), the method for aoxidizing the hafnium nitride of channel hole inner wall is thermal oxide or ozone oxygen Change.
Further, in the step (4), the method for deposited amorphous germanium is hot evaporation, sputtering or change in channel hole Learn vapor deposition;Annealing makes method thermal annealing, flash lamp annealing or the laser annealing of germanium crystal.
Further, in the step (5), the method for deposition nickel film is hot evaporation or sputtering;The method of annealing is heat Annealing, flash lamp annealing or laser annealing.
Further, in the step (2) hafnium nitride film with a thickness of 20 to 500 nanometers, the first insulating layer and second The thickness of insulating layer is 5 to 10 nanometers;Gate insulation layer with a thickness of 2 to 20 nanometers in the step (3).
Further, channel hole is cylindrical in the step (3), and a diameter of 10 to 25 nanometers.
Further, in the step (5), the lower surface of drain electrode is not higher than the upper surface of second insulating layer.
The beneficial effects of the present invention are: 1, it can be obtained under the premise of not changing device size using germanium channel bigger Driving current promotes the performance of device;2, reduce the projected area of device by vertical channel structure, it is close to increase integrating for device Degree obtains high performance integrated circuit;3, using cvd nitride hafnium film is first passed through as metal gates, then etch nitride hafnium is thin Film forms channel hole, and the hafnium nitride of oxidation channel hole inner wall forms gate insulation layer, so that the grid stacking of device is made, most The channel of device is made in the deposit Germanium in channel hole afterwards;The method for preparing channel again by first preparing grid stacking above, fills Divide the technology difficulty reduced in preparation vertical structure device process, reduces process costs.The present invention utilizes vertical structure Germanium channel, with carrier mobility is high, device projected area is small, integrated level is high, compatible with existing integrated circuit fabrication process Etc. advantages, have broad application prospects in the fields such as programmable logic device and super large-scale integration.
Detailed description of the invention
Fig. 1 (a) is to grow germanium film and the first nickel film schematic diagram on substrate;
Fig. 1 (b) is that annealing makes germanium film and the first nickel film react the source electrode schematic diagram for generating nickel germanium alloy as device;
Fig. 2 (a) is to illustrate in one insulating layer of nickel germanium alloy film surface growth regulation, hafnium nitride film and second insulating layer Figure;
Fig. 2 (b) is that etching second insulating layer, hafnium nitride film and the first insulating layer form channel hole schematic diagram;
Fig. 2 (c) is that oxidation channel hole inner wall generates oxynitriding hafnium or hafnium oxide gate insulation layer schematic diagram;
Fig. 3 (a) is the deposited amorphous germanium schematic diagram in channel hole;
Fig. 3 (b) is to make amorphous germanium crystal using annealing, forms the channel schematic diagram of device;
Fig. 4 (a) is that the second nickel film schematic diagram is deposited on channel;
Fig. 4 (b) is to react the second nickel film with the germanium in channel using annealing to generate nickel germanium alloy as the leakage of device Pole schematic diagram;
Fig. 5 is the structure chart of vertical structure germanium slot field-effect transistor device;
In figure, quartz substrate 10, germanium film 11, the first nickel film 12, source electrode 13, the first insulating layer 20, hafnium nitride film 21, second insulating layer 22, gate insulation layer 23, amorphous germanium 30, channel 31, the second nickel film 40, drain electrode 41.
Specific embodiment
With reference to the accompanying drawing and specific embodiment invention is further described in detail.
A kind of manufacturing method of vertical structure germanium slot field-effect transistor device provided by the invention, including walk as follows It is rapid:
(1) it is sequentially depositing germanium film and the first nickel film on substrate, and nickel germanium alloy film conduct is formed by annealing The source electrode of device;
(2) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are sequentially depositing on source electrode;
(3) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are etched and forms channel hole, and oxidation ditch The hafnium nitride of road hole inner wall generates oxynitriding hafnium or hafnium oxide, the gate insulation layer as device;
(4) the deposited amorphous germanium in channel hole, and pass through the channel for making germanium crystal form device of annealing;
(5) channel disposed thereon the second nickel film and anneal form drain electrode of the nickel germanium alloy as device, ultimately form Vertical structure germanium slot field-effect transistor device.
Further, the substrate material is including but not limited to silicon, silicon face cvd silicon oxide, quartz, sapphire.
Further, the hafnium nitride film with a thickness of 20 to 500 nanometers.
Further, first insulating layer and the material of second insulating layer are including but not limited to silica, silicon nitride, oxygen Change aluminium and hafnium oxide, with a thickness of 5 to 10 nanometers.
Further, the channel hole is cylindrical, a diameter of 10 to 25 nanometers.
Further, the gate insulation layer with a thickness of 2 to 20 nanometers.
Further, in the step (1), the method for depositing germanium film and nickel film is hot evaporation or sputtering;Annealing Method is thermal annealing, flash lamp annealing or laser annealing.
Further, in the step (2), the method for depositing the first insulating layer and second insulating layer is atomic layer deposition; The method of cvd nitride hafnium film is atomic layer deposition or sputtering.
Further, in the step (2), the first insulating layer of etching, hafnium nitride film and second insulating layer form channel The method of hole is reactive ion etching.
Further, in the step (3), the method for aoxidizing the hafnium nitride of channel hole inner wall is thermal oxide or ozone oxygen Change.
Further, in the step (4), the method for deposited amorphous germanium is hot evaporation, sputtering or change in channel hole Learn vapor deposition;Annealing makes method thermal annealing, flash lamp annealing or the laser annealing of germanium crystal;
Further, in the step (5), the method for the second nickel film of deposition is hot evaporation or sputtering;The method of annealing For thermal annealing, flash lamp annealing or laser annealing.
Embodiment 1: in the present embodiment, using quartz substrate, the preparation of vertical structure germanium slot field-effect transistor device Method is as follows:
(1) as shown in Fig. 1 (a), germanium film 11 is deposited in quartz substrate 10, deposition method is chemical vapor deposition, heat Vapor deposition or sputtering;The first nickel film 12 is deposited on germanium film 11, deposition method is chemical vapor deposition, hot evaporation or sputtering; 11 thickness of germanium film is identical as 12 thickness of the first nickel film;
(2) as shown in Fig. 1 (b), germanium film 11 and the first nickel film 12 are reacted by annealing and generates the conduct of nickel germanium alloy The source electrode 13 of device;The method of annealing is thermal annealing, flash lamp annealing or laser annealing;
(3) as shown in Fig. 2 (a), the first insulating layer 20, hafnium nitride film 21 and the second insulation are sequentially depositing on source electrode 13 Layer 22;First insulating layer 20 and the material of second insulating layer 22 are including but not limited to silica, silicon nitride, aluminium oxide and oxidation Hafnium, with a thickness of 5 to 10 nanometers, deposition method is atomic layer deposition;Hafnium nitride film 21 with a thickness of 20 to 500 nanometers, deposition Method is atomic layer deposition or sputtering;
(4) as shown in Fig. 2 (b), etching second insulating layer 22, hafnium nitride film 21 and the first insulating layer 20 are until source electrode 13 Surface forms channel hole, and channel hole is preferably cylindrical, and a diameter of 10 to 25 nanometers, but shape is not limited to cylinder, Such as rectangle, irregular shape can be achieved, the method for etching is reactive ion etching;
(5) as shown in Fig. 2 (c), the hafnium nitride of oxidation channel hole inner wall forms oxynitriding hafnium or hafnia film conduct The gate insulation layer 23 of device;The method of oxidation is thermal oxide or ozone oxidation;
(6) as shown in Fig. 3 (a), the deposited amorphous germanium 30 in channel hole, the upper surface of amorphous germanium 30 is higher than the second insulation The upper surface of layer 22;Deposition method is chemical vapor deposition, hot evaporation or sputtering;
(7) as shown in Fig. 3 (b), annealing makes amorphous germanium 30 crystallize the channel 31 for forming monocrystalline germanium as device;The side of annealing Method is thermal annealing, flash lamp annealing or laser annealing;
(8) as shown in Fig. 4 (a), the second nickel film 40 is deposited on 31 surface of channel, the method for deposition is hot evaporation or splashes It penetrates;
(9) as shown in Fig. 4 (b), annealing makes the second nickel film 40 react generation nickel germanium alloy with the germanium in channel 31, as The drain electrode 41 of device;The lower surface of drain electrode 41 is not higher than the upper surface of second insulating layer 22;The method of annealing be rapid thermal annealing, Flash lamp annealing or laser annealing;
(10) Fig. 5 is the vertical structure germanium slot field-effect transistor device finally obtained.
Above-described embodiment is used to illustrate the present invention, rather than limits the invention, in spirit of the invention and In scope of protection of the claims, to any modifications and changes that the present invention makes, protection scope of the present invention is both fallen within.

Claims (10)

1. a kind of manufacturing method of vertical structure germanium slot field-effect transistor device, which is characterized in that this method includes as follows Step:
(1) it is sequentially depositing germanium film and nickel film on substrate, and source of the nickel germanium alloy film as device is formed by annealing Pole;
(2) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are sequentially depositing on source electrode;
(3) the first insulating layer of thin-film, hafnium nitride film and second insulating layer film are etched and forms channel hole, and aoxidize channel hole The hafnium nitride of hole inner wall generates oxynitriding hafnium or hafnium oxide, the gate insulation layer as device;
(4) the deposited amorphous germanium in channel hole, and pass through the channel for making germanium crystal form device of annealing;
(5) channel disposed thereon nickel film and anneal form drain electrode of the nickel germanium alloy as device, ultimately form vertical structure Germanium slot field-effect transistor device.
2. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that The substrate material is including but not limited to silicon, silicon face cvd silicon oxide, quartz, sapphire;First insulating layer and second The material of insulating layer is including but not limited to silica, silicon nitride, aluminium oxide and hafnium oxide.
3. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (1), the method for depositing germanium film and nickel film is hot evaporation or sputtering;The method of annealing is thermal annealing, flash of light Lamp annealing or laser annealing;In the step (2), the method for depositing the first insulating layer and second insulating layer is atomic layer deposition; The method of cvd nitride hafnium film is atomic layer deposition or sputtering.
4. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (2), the method that the first insulating layer of etching, hafnium nitride film and second insulating layer form channel hole be reaction from Son etching.
5. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (3), the method for aoxidizing the hafnium nitride of channel hole inner wall is thermal oxide or ozone oxidation.
6. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (4), the method for deposited amorphous germanium is hot evaporation, sputtering or chemical vapor deposition in channel hole;Annealing makes The method of germanium crystal is thermal annealing, flash lamp annealing or laser annealing.
7. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (5), the method for deposition nickel film is hot evaporation or sputtering;The method of annealing be thermal annealing, flash lamp annealing or Laser annealing.
8. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that In the step (2) hafnium nitride film with a thickness of 20 to 500 nanometers, the thickness of the first insulating layer and second insulating layer is 5 To 10 nanometers;Gate insulation layer with a thickness of 2 to 20 nanometers in the step (3).
9. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, which is characterized in that Channel hole is cylindrical in the step (3), a diameter of 10 to 25 nanometers.
10. the manufacturing method of vertical structure germanium slot field-effect transistor device according to claim 1, feature exist In in the step (5), the lower surface of drain electrode is not higher than the upper surface of second insulating layer.
CN201810758788.0A 2018-07-11 2018-07-11 Method for manufacturing germanium channel field effect transistor device with vertical structure Active CN109065613B (en)

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US20120052640A1 (en) * 2010-08-31 2012-03-01 Mark Fischer Methods Of Forming Pluralities Of Vertical Transistors, And Methods Of Forming Memory Arrays
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