CN109061448A - IC testing stimuli based on modularization excitation model generates system - Google Patents

IC testing stimuli based on modularization excitation model generates system Download PDF

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Publication number
CN109061448A
CN109061448A CN201811265842.4A CN201811265842A CN109061448A CN 109061448 A CN109061448 A CN 109061448A CN 201811265842 A CN201811265842 A CN 201811265842A CN 109061448 A CN109061448 A CN 109061448A
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module
task point
test case
task
test
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CN201811265842.4A
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Inventor
郑金艳
张清
李思
陈朋
刘军
李娜
安鹏伟
魏伟波
赵常
张依漪
张骢
李昂
陈盼
张谦
李晓伟
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Beijing Jinghang Computing Communication Research Institute
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Beijing Jinghang Computing Communication Research Institute
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Priority to CN201811265842.4A priority Critical patent/CN109061448A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention belongs to ic test technique fields, and in particular to a kind of IC testing stimuli generation system based on modularization excitation model.Application time axis configuration method of the present invention generates task point corresponding with test case, by configuration task point, forms the excitation file comprising excitation model, realizes the generation of pumping signal.And so that task point is corresponded to test case, realize the visualized management to test case and execute in batches.It not only solves that cost of labor in existing scheme is big, debugs complicated contradiction, and configuration mode is simple, the emulation testing suitable for integrated circuits such as ASIC, SOC, FPGA.

Description

IC testing stimuli based on modularization excitation model generates system
Technical field
The invention belongs to ic test technique fields, and in particular to a kind of integrated electricity based on modularization excitation model Road test and excitation generates system.
Background technique
At present when carrying out integrated circuit testing, test specification document is write by tester first, test specification text Shelves include whole test cases of to-be-measured integrated circuit.Each test case describes test purpose, test input data, surveys Try is rapid and it is expected test result.By taking the test case of certain FPGA software as an example, as shown in Figure 1.
FPGA Software Simulation Test, needs above-mentioned test case being changed into FPGA and emulates the language that tool can identify Speech executes emulation to be loaded into the tool of emulating.The realization of test case at present is to pass through people in Code Edit environment Work edit code realizes TESTBENCH file, need to consume a large amount of manpowers and time.The TESTBENCH completed by line by line coding File, as shown in Figure 2.
The line by line coding mode of above-mentioned test case is difficult to embody whole test cases and tests the corresponding relationship of code, and It is difficult to the execution to single test case or multiple test cases and implements effective control.When also can not clearly show test case Sequence is realized, has both influenced testing progress and quality, it is also difficult to executing in batches for FPGA emulation testing is realized, to FPGA emulation testing The elevator belt of technology development and personage's quality level carrys out problem.
Therefore, a kind of IC testing stimuli generation for meeting systematicness, timing, visualizing, executing in batches is established Method becomes technical problem urgently to be resolved.
Summary of the invention
(1) technical problems to be solved
The technical problem to be solved by the present invention is cost of labor is big in terms of how solving current ic test technique, Complicated contradiction is debugged, systematicness, the timing, visualization, test case batch processing of integrated circuit simulating test environment are promoted Function.
(2) technical solution
In order to solve the above technical problems, the present invention provides a kind of IC testing stimuli based on modularization excitation model Generation system, it includes: establishment of coordinate system module, task point configuration module, task that the IC testing stimuli, which generates system, Point setup module, sequence generating module, wherein,
The establishment of coordinate system module is used for the system architecture by analyzing tested integrated circuit, determines tested integrated circuit And its peripheral interface device, tested integrated circuit and each peripheral interface device are used as an individual module, establish band There are the two-dimensional coordinates of above-mentioned module, obtaining abscissa is tested integrated circuit and its peripheral interface module, and ordinate is to correspond to The two-dimensional coordinate system of time or timing;
On the basis of obtaining two-dimensional coordinate system based on establishment of coordinate system module, the task point configuration module is for further Task point is configured on a two-dimensional coordinate axis according to the requirement of test case, sets task point title to and test case Title it is associated;
Task based access control point configuration module is on the basis of configuration task point in the two-dimensional coordinates of each module, the task Point setup module is used for the setting of further progress task point, and the requirement according to test case sets each task point It sets, is required for test object, affiliated partner described in test case, test and excitation and timing, response, determine task point Triggered time, trigger condition, test input data, and the above-mentioned related content of test case is allocated to appointing in two-dimensional coordinates Business point, and test case title is described by task dot characteristics;
On the basis of task point is arranged according to test case in task based access control point setup module, described in the sequence generating module The task point of further progress whole test case configures, the corresponding test case description explanation of each task point and enabling Control forms task point sequence and test case sequence;
On the basis of completing task point sequence and test case sequence based on sequence generating module, the excitation file generated Module for further progress emulate in test cases selection, the test case according to selection is different, is formed sustainable Tripartite's emulation tool executes the excitation file of emulation.
Wherein, the task point that the task point configuration module is configured is set as concurrent scheduling.
Wherein, the task point that the task point configuration module is configured is set as sequential scheduling.
Wherein, the excitation file generating module selects single test case to form excitation file.
Wherein, the excitation file generating module selects multiple or whole test cases to form excitation file as needed.
(3) beneficial effect
Compared with prior art, the present invention is motivated using modularization excitation model spanning set at circuit test, is realized Test and excitation automatically generates, and not only solves between personnel's qualification in existing scheme, Time To Market and test and excitation validity Contradiction, and realize simply be easy to grasp, the test suitable for various integrated circuits.
By implementing above-mentioned technical proposal, preferably resolves when integrated circuit establishes Simulation Test Environment and edit survey line by line Code is tried, leads to largely to test code being difficult to effectively corresponding problem with test case.By the way that task point, each task is arranged Point can be corresponding with test case, the corresponding relationship of task schedule and whole test cases can be preferably embodied, to make Task point can preferably coverage test illustrate the test case in document.
The present invention preferably resolves the systematicness of integrated circuit testing use-case sequence, the graphical interfaces displaying of timing is asked Topic.By reference axis, to each device on Simulation Model, task point is set according to its timing requirements, task point Setting can be realized comprehensively corresponding and be covered with test case, enable the integrated circuit testing use-case be in task scheduling interface System ground is shown.
The present invention, which is preferably resolved, to be asked what the execution of single test case or multiple test cases was implemented effectively to control Topic.It can realize that the test case in simulation process combines selection in such a way that user interface selects, realize that single test is used Example, multiple test cases and batch testing use-case emulate, to realize that integrated circuit automation simulation provides preferable side Method.
Detailed description of the invention
Fig. 1 is that FPGA software test case describes schematic diagram.
Fig. 2 is the hardware description language schematic diagram that artificial edit code line by line realizes test case.
Fig. 3 is 1 schematic diagram of FPGA to be measured and its peripheral interface device test case two-dimensional coordinates achievement.
Fig. 4 is 2 schematic diagram of time shaft configuration schedules task point achievement.
Fig. 5 is that 3 schematic diagram of code achievement is arranged in scheduler task point.
Fig. 6 is that task point corresponds to 3 schematic diagram of test case achievement.
Fig. 7 is 4 schematic diagram of task point sequence achievement.
Fig. 8 is 4 schematic diagram of test case sequence achievement.
Fig. 9 is that batch testing use-case generates 5 schematic diagram of Simulation Engineering file achievement.
Figure 10 is task point schematic diagram.
Figure 11 is that task point attribute inputs schematic diagram.
Figure 12 is technical solution of the present invention flow chart.
Specific embodiment
To keep the purpose of the present invention, content and advantage clearer, with reference to the accompanying drawings and examples, to of the invention Specific embodiment is described in further detail.
To solve problem of the prior art, it is sharp that the present invention provides a kind of integrated circuit testing based on modularization excitation model Generation system is encouraged, the IC testing stimuli generates system and includes: establishment of coordinate system module, task point configuration module, appoints A business point setup module, sequence generating module, wherein,
The establishment of coordinate system module is used for the system architecture by analyzing tested integrated circuit, determines tested integrated circuit And its peripheral interface device, tested integrated circuit and each peripheral interface device are used as an individual module, establish band There are the two-dimensional coordinates of above-mentioned module, obtaining abscissa is tested integrated circuit and its peripheral interface module, and ordinate is to correspond to The two-dimensional coordinate system of time or timing;
On the basis of obtaining two-dimensional coordinate system based on establishment of coordinate system module, the task point configuration module is for further Task point is configured on a two-dimensional coordinate axis according to the requirement of test case, sets task point title to and test case Title it is associated;
Task based access control point configuration module is on the basis of configuration task point in the two-dimensional coordinates of each module, the task Point setup module is used for the setting of further progress task point, and the requirement according to test case sets each task point It sets, is required for test object, affiliated partner described in test case, test and excitation and timing, response, determine task point Triggered time, trigger condition, test input data, and the above-mentioned related content of test case is allocated to appointing in two-dimensional coordinates Business point, and test case title is described by task dot characteristics;
On the basis of task point is arranged according to test case in task based access control point setup module, described in the sequence generating module The task point of further progress whole test case configures, the corresponding test case description explanation of each task point and enabling Control forms task point sequence and test case sequence;
On the basis of completing task point sequence and test case sequence based on sequence generating module, the excitation file generated Module for further progress emulate in test cases selection, the test case according to selection is different, is formed sustainable Tripartite's emulation tool executes the excitation file of emulation.
Wherein, the task point that the task point configuration module is configured is set as concurrent scheduling.
Wherein, the task point that the task point configuration module is configured is set as sequential scheduling.
Wherein, the excitation file generating module selects single test case to form excitation file.
Wherein, the excitation file generating module selects multiple or whole test cases to form excitation file as needed.
In addition, the present invention also provides a kind of IC testing stimuli generation methods based on modularization excitation model, such as Shown in Fig. 1, the method generates system based on IC testing stimuli to implement, and the IC testing stimuli generates system System include: establishment of coordinate system module, task point configuration module, task point setup module, sequence generating module,
As shown in figure 12, it the described method comprises the following steps:
Step S1: establishment of coordinate system module is tested the system architecture of integrated circuit by analyzing, and determines tested integrated circuit And its peripheral interface device, tested integrated circuit and each peripheral interface device are used as an individual module, establish band There are the two-dimensional coordinates of above-mentioned module, obtaining abscissa is tested integrated circuit and its peripheral interface module, and ordinate is to correspond to The two-dimensional coordinate system of time or timing;Form achievement 1;As shown in Figure 3.
Step S2: on the basis of obtaining two-dimensional coordinate system based on establishment of coordinate system module, task point configuration module is further Task point is configured on a two-dimensional coordinate axis according to the requirement of test case, sets task point title to and test case Title it is associated;Form achievement 2;As shown in Figure 4.
Step S3: task based access control point configuration module on the basis of configuration task point in the two-dimensional coordinates of each module, The setting of task point setup module further progress task point, the requirement according to test case set each task point It sets, is required for test object, affiliated partner described in test case, test and excitation and timing, response, determine task point Triggered time, trigger condition, test input data, and the above-mentioned related content of test case is allocated to appointing in two-dimensional coordinates Business point, and test case title is described by task dot characteristics;Form achievement 3;As shown in Figure 5, Figure 6.
Step S4: on the basis of task point is arranged according to test case in task based access control point setup module, sequence generating module The task point of further progress whole test case configures, the corresponding test case description explanation of each task point and enabling Control forms task point sequence and test case sequence;Form achievement 4;As shown in Figure 7, Figure 8.
Step S5: on the basis of completing task point sequence and test case sequence based on sequence generating module, file is motivated Generation module further progress emulate in test cases selection, the test case according to selection is different, is formed sustainable Tripartite's emulation tool executes the excitation file of emulation.Form achievement 5.As shown in Figure 9.
Wherein, in the step S2, the task point configured is set as concurrent scheduling.
Wherein, in the step S2, the task point configured is set as sequential scheduling.
Wherein, in the step S5, single test case is selected.
Wherein, in the step S5, multiple or whole test cases are selected as needed.
Embodiment 1
In the present embodiment,
1) this method is applied in integrated circuit emulation support platform.In the emulation platform, analysing integrated circuits and Its peripheral system framework determines tested integrated circuit and its peripheral interface module.
The characteristics of 2) analyzing test case, determining input and output object, the output output data of test case related data, Test case sequential relationship feature.
3) reference axis is established, which is tested integrated circuit and its peripheral interface module, ordinate are Time.Each device on abscissa corresponds to a longitudinal axis.
4) by the time shaft where tested integrated circuit, peripheral interface device, according to parallel sequential, the requirement of serial timing Carry out the task point setting of timing and data.As shown in Figure 10.
5) above-mentioned task point is required to be configured according to test case, there is preferable corresponding relationship with test case, As shown in figure 11.
6) it by the configuration of reference axis whole task point, automatically generates integrated circuit simulating and executes code.
To sum up, the invention belongs to ic test technique fields, and in particular to a kind of to motivate model based on modularization IC testing stimuli generation method.Solve it is existing IC testing stimuli is generated by human-edited's code line by line, Lack from system perspective and hold test assignment and timing, it is difficult to the drawbacks of batch control and implementation of test cases.The present invention is applicable in In integrated circuit testing, the test request that test case is embodied as to batch task scheduling is required according to system sequence.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations Also it should be regarded as protection scope of the present invention.

Claims (5)

1. a kind of IC testing stimuli based on modularization excitation model generates system, which is characterized in that the integrated electricity It includes: establishment of coordinate system module, task point configuration module, task point setup module, sequence generation that road test and excitation, which generates system, Module,
Wherein,
The establishment of coordinate system module is used for the system architecture by analyzing tested integrated circuit, determine tested integrated circuit and its Peripheral interface device, tested integrated circuit and each peripheral interface device are used as an individual module, establish with upper The two-dimensional coordinates of module are stated, obtaining abscissa is tested integrated circuit and its peripheral interface module, and ordinate is the corresponding time Or the two-dimensional coordinate system of timing;
Based on establishment of coordinate system module obtain two-dimensional coordinate system on the basis of, the task point configuration module be used for according further to The requirement of test case on a two-dimensional coordinate axis configures task point, sets the name with test case for task point title Claim associated;
On the basis of configuration task point in the two-dimensional coordinates of each module, the task point is set task based access control point configuration module Setting of the module for further progress task point is set, the requirement according to test case is configured each task point, needle Test object, affiliated partner described in test case, test and excitation and timing, response are required, determine the triggering of task point Time, trigger condition, test input data, and the above-mentioned related content of test case is allocated to the task in two-dimensional coordinates Point, and test case title is described by task dot characteristics;
On the basis of task point is arranged according to test case in task based access control point setup module, into one described in the sequence generating module Step carries out the task point configuration of whole test cases, each task point corresponds to a test case description explanation and enables control System forms task point sequence and test case sequence;
On the basis of completing task point sequence and test case sequence based on sequence generating module, the excitation file generating module For further progress emulate in test cases selection, the test case according to selection is different, forms sustainable tripartite Emulation tool executes the excitation file of emulation.
2. the IC testing stimuli as described in claim 1 based on modularization excitation model generates system, feature exists In the task point that the task point configuration module is configured is set as concurrent scheduling.
3. the IC testing stimuli as described in claim 1 based on modularization excitation model generates system, feature exists In the task point that the task point configuration module is configured is set as sequential scheduling.
4. the IC testing stimuli as described in claim 1 based on modularization excitation model generates system, feature exists In the excitation file generating module selects single test case to form excitation file.
5. the IC testing stimuli as described in claim 1 based on modularization excitation model generates system, feature exists In the excitation file generating module selects multiple or whole test cases to form excitation file as needed.
CN201811265842.4A 2018-10-29 2018-10-29 IC testing stimuli based on modularization excitation model generates system Pending CN109061448A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106896710A (en) * 2017-04-07 2017-06-27 成都府河电力自动化成套设备有限责任公司 Scene configurable time synchronization test system and implementation method
US20170228332A1 (en) * 2011-01-14 2017-08-10 Skyworks Solutions, Inc. Apparatus and methods for serial interfaces
CN107168100A (en) * 2017-05-26 2017-09-15 华北电力大学 A kind of modularization multi-level converter real-time simulation modeling method based on field programmable gate array
CN108121657A (en) * 2017-11-29 2018-06-05 北京京航计算通讯研究所 Programmable logic device software simulation verification system based on system model
CN108153669A (en) * 2017-11-29 2018-06-12 北京京航计算通讯研究所 The method that application time axis configuration mode realizes FPGA software emulation task schedulings

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170228332A1 (en) * 2011-01-14 2017-08-10 Skyworks Solutions, Inc. Apparatus and methods for serial interfaces
CN106896710A (en) * 2017-04-07 2017-06-27 成都府河电力自动化成套设备有限责任公司 Scene configurable time synchronization test system and implementation method
CN107168100A (en) * 2017-05-26 2017-09-15 华北电力大学 A kind of modularization multi-level converter real-time simulation modeling method based on field programmable gate array
CN108121657A (en) * 2017-11-29 2018-06-05 北京京航计算通讯研究所 Programmable logic device software simulation verification system based on system model
CN108153669A (en) * 2017-11-29 2018-06-12 北京京航计算通讯研究所 The method that application time axis configuration mode realizes FPGA software emulation task schedulings

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Application publication date: 20181221