CN109037259A - A kind of encapsulating structure and its packaging method of image sensing chip - Google Patents
A kind of encapsulating structure and its packaging method of image sensing chip Download PDFInfo
- Publication number
- CN109037259A CN109037259A CN201811105613.6A CN201811105613A CN109037259A CN 109037259 A CN109037259 A CN 109037259A CN 201811105613 A CN201811105613 A CN 201811105613A CN 109037259 A CN109037259 A CN 109037259A
- Authority
- CN
- China
- Prior art keywords
- image sensing
- sensing chip
- layer
- groove
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 50
- 238000000034 method Methods 0.000 title claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 104
- 239000002184 metal Substances 0.000 claims description 122
- 229910052751 metal Inorganic materials 0.000 claims description 122
- 230000008878 coupling Effects 0.000 claims description 21
- 238000010168 coupling process Methods 0.000 claims description 21
- 238000005859 coupling reaction Methods 0.000 claims description 21
- 230000015572 biosynthetic process Effects 0.000 claims description 18
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 claims 56
- 239000002344 surface layer Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 12
- 230000000694 effects Effects 0.000 abstract description 11
- 230000002411 adverse Effects 0.000 abstract description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 8
- 229910052718 tin Inorganic materials 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000005538 encapsulation Methods 0.000 description 5
- 229910001128 Sn alloy Inorganic materials 0.000 description 4
- 238000002360 preparation method Methods 0.000 description 3
- -1 Sillim Chemical compound 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 2
- PSMFTUMUGZHOOU-UHFFFAOYSA-N [In].[Sn].[Bi] Chemical compound [In].[Sn].[Bi] PSMFTUMUGZHOOU-UHFFFAOYSA-N 0.000 description 2
- WGCXSIWGFOQDEG-UHFFFAOYSA-N [Zn].[Sn].[In] Chemical compound [Zn].[Sn].[In] WGCXSIWGFOQDEG-UHFFFAOYSA-N 0.000 description 2
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 2
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- GZCWPZJOEIAXRU-UHFFFAOYSA-N tin zinc Chemical compound [Zn].[Sn] GZCWPZJOEIAXRU-UHFFFAOYSA-N 0.000 description 2
- 229910000969 tin-silver-copper Inorganic materials 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- 229910000967 As alloy Inorganic materials 0.000 description 1
- NTSDHVIXFWZYSM-UHFFFAOYSA-N [Ag].[Sb].[Sn] Chemical compound [Ag].[Sb].[Sn] NTSDHVIXFWZYSM-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 108010074164 cyclohexylglycyl-alanyl-arginine-4-nitroanilide Proteins 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
Abstract
This application discloses the encapsulating structures and its packaging method of a kind of image sensing chip, wherein, the encapsulating structure of the image sensing chip passes through encapsulated layer, substrate and image sensing chip constitute one for the closed cavity in video sensing area to be arranged, and in such a way that the first groove is set in buffer layer, the buffer layer contacted with the external world is avoided to contact with the direct of closed cavity, and since the water absorbing properties of the material as buffer layer are generally relatively strong, the buffer layer and closed cavity that contact with the external world are completely cut off, the confined space of the encapsulating structure of image sensing chip can be entered by buffer layer to avoid outside moisture, it is easy to enter in closed cavity by the encapsulating structure of image sensing chip to solve outside moisture, and adverse effect is led to the problem of to the video sensing area of image sensing chip.
Description
Technical field
This application involves technical field of semiconductor encapsulation, more specifically to a kind of encapsulation knot of image sensing chip
Structure and its packaging method.
Background technique
Image sensing chip is that one kind can experience extraneous light and convert thereof into the sensing chip of electric signal.In image
After sensing chip completes, then by carrying out a series of packaging technology to image sensing chip, to be formed packaged
Image sensing chip, for various electronic equipments such as digital camera, DVs.
In the encapsulating structure of image sensing chip, need the video sensing area for image sensing chip provide one it is closed
Cavity, and the good moisture barrier properties that discharge water are provided for the closed cavity, so that the video sensing area of image sensing chip is from outer
The erosion of boundary's steam.But in encapsulating structure in the prior art, extraneous moisture is easy closed into this by encapsulating structure
In cavity, and adverse effect is generated to the video sensing area of image sensing chip.
Summary of the invention
In order to solve the above technical problems, this application provides a kind of encapsulating structure of image sensing chip and its encapsulation sides
Method is easy to enter in closed cavity by the encapsulating structure of image sensing chip to image sensing chip to solve outside moisture
Video sensing area lead to the problem of adverse effect.
To realize the above-mentioned technical purpose, the embodiment of the present application provides following technical solution:
A kind of encapsulating structure of image sensing chip, comprising:
Substrate;
Positioned at the buffer layer of the substrate surface;
Through the first groove of the buffer layer, first groove exposes the part substrate surface;
Cover the metal layer for the substrate surface that the buffer layer and first groove expose;
Through the second groove of the metal layer and the buffer layer, second groove exposes the part substrate table
Face;First groove is located at the periphery of second groove;
Upside-down mounting includes the first surface being oppositely arranged in the image sensing chip in the substrate, the image sensing chip
And second surface, video sensing area and the first pad around the video sensing area are provided in the first surface, it is described
First pad and metal layer electrical connection, the video sensing area is towards second groove;
It at least covers described in the side wall of the image sensing chip, the substrate surface that first groove exposes and part
The encapsulated layer of metal layer.
Optionally, the orthographic projection of the buffer layer and the metal layer on the substrate partly or entirely covers the base
The wiring region surface at bottom.
Optionally, the encapsulated layer is that the second surface for covering the image sensing chip, first groove expose
Substrate surface and the metal layer plastic packaging layer.
Optionally, the encapsulated layer is that the second surface for covering the image sensing chip, first groove expose
Substrate surface, the metal layer and the substrate exposed surface plastic packaging layer.
It optionally, further include the connection terminal for running through the plastic packaging layer, the connection terminal electrically connects with the metal layer
It connects.
Optionally, the height of the connection terminal is greater than the height of the plastic packaging layer.
Optionally, the encapsulated layer is the substrate surface and the image sensing core that covering first groove exposes
The point glue-line of piece side wall.
Optionally, further includes: the connection terminal being set on the metal layer, the height of the connection terminal are greater than described
Vertical range between image sensing chip and the metal layer.
Optionally, further includes: the metal coupling between first pad and the metal layer, the metal coupling
It is electrically connected with the metal layer and first pad.
Optionally, the part buffer layer is provided between first groove and second groove.
Optionally, first groove and second groove penetrate through.
A kind of packaging method of image sensing chip, comprising:
A substrate is provided, the substrate includes multiple functional areas and the Cutting Road between the adjacent functional areas, institute
Stating functional areas includes transparent area and the wiring region positioned at the transparent area two sides;
The buffer layer at least partly covering the wiring region is formed, and the buffer layer is handled, is formed and runs through institute
Buffer layer is stated, and exposes the first groove of the part substrate surface;
Form the metal layer for covering the substrate surface that the buffer layer and first groove expose;
The metal layer and the buffer layer are handled, to form the through the metal layer and the buffer layer
Two grooves, second groove expose the part substrate surface;First groove is located at the periphery of second groove;
Image sensing chip is provided, the image sensing chip includes the first surface and second surface being oppositely arranged, institute
It states and is provided with video sensing area and the first pad around the video sensing area, first pad and described in first surface
Metal layer electrical connection, and by the image sensing flip-chip on the functional areas, so that the video sensing area is towards institute
State the second groove;
Formation at least covers the side wall of the image sensing chip, the substrate surface that first groove exposes and part
The encapsulated layer of the metal layer;
The substrate is cut along the Cutting Road.
Optionally, described formed at least partly covers the buffer layer of the wiring region and includes:
Form the buffer layer for partly or entirely covering the wiring region surface.
Optionally, it is described formation at least cover the side wall of the image sensing chip, the base that first groove exposes
The encapsulated layer of bottom surface and the part metal layer includes:
It is formed and covers substrate surface that second surface, first groove of the image sensing chip expose and described
The plastic packaging layer of metal layer;
Or
Form the substrate surface for covering second surface, first groove of the image sensing chip and exposing, described
The plastic packaging layer of metal layer and the substrate exposed surface.
Optionally, it is described formation at least cover the side wall of the image sensing chip, the base that first groove exposes
After the encapsulated layer of bottom surface and the part metal layer, it is described the substrate is cut along the Cutting Road before also wrap
It includes:
The plastic packaging layer is handled, to form multiple third grooves for exposing the metal layer, the third is recessed
Slot position is in the periphery of the image sensing chip;
Fill conductive material in the third groove, with formed be located at the third groove in, and with the metal layer
The connection terminal of electric connection.
Optionally, it is described formation at least cover the side wall of the image sensing chip, the base that first groove exposes
The encapsulated layer of bottom surface and the part metal layer includes:
Form the point glue-line for covering substrate surface and the image sensing chip side wall that first groove exposes.
Optionally, it is described formation at least cover the side wall of the image sensing chip, the base that first groove exposes
After the encapsulated layer of bottom surface and the part metal layer, it is described the substrate is cut along the Cutting Road before also wrap
It includes:
The connection terminal being electrically connected with the metal layer is formed on the metal layer.
It can be seen from the above technical proposal that the embodiment of the present application provide a kind of image sensing chip encapsulating structure and
Its packaging method, wherein the encapsulating structure of the image sensing chip is constituted by encapsulated layer, substrate and image sensing chip
One for the closed cavity in video sensing area to be arranged, and in such a way that the first groove is set in buffer layer, avoid with
Buffer layer and the closed cavity of external world's contact directly contact, and due to the water absorbing properties of the material as buffer layer generally compared with
By force, the buffer layer and closed cavity that contact with the external world are completely cut off, image sensing can be entered by buffer layer to avoid outside moisture
The confined space of the encapsulating structure of chip is easy to enter by the encapsulating structure of image sensing chip to solve outside moisture
In closed cavity, and adverse effect is led to the problem of to the video sensing area of image sensing chip.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of application for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of cross-section structure signal of the encapsulating structure for image sensing chip that one embodiment of the application provides
Figure;
Fig. 2 is overlooking structure diagram of the Fig. 1 along Z axis negative sense;
Fig. 3 is that a kind of cross-section structure of the encapsulating structure for image sensing chip that another embodiment of the application provides shows
It is intended to;
Fig. 4 is overlooking structure diagram of the Fig. 3 along Z axis negative sense;
Fig. 5 is that a kind of cross-section structure of the encapsulating structure for image sensing chip that another embodiment of the application provides shows
It is intended to;
Fig. 6 is that a kind of cross-section structure of the encapsulating structure for image sensing chip that the further embodiment of the application provides shows
It is intended to;
Fig. 7-Figure 18 is that a kind of process of the packaging method for image sensing chip that one embodiment of the application provides is shown
It is intended to.
Specific embodiment
As described in background, the encapsulating structure of image sensing chip in the prior art be difficult to avoid that outside moisture into
Enter in closed cavity, so that the video sensing area to image sensing chip generates adverse effect.Main cause is as follows:
It is provided with buffer layer in the substrate of image sensing chip in the prior art, connection image is provided on buffer layer and is passed
Pad is electrically connected with the metal layer by the metal layer of the pad of sense chip, image sensing chip by way of upside-down mounting, finally by
The closed cavity structure between image sensing chip and substrate is formed in the mode of the two sides of image sensing chip setting encapsulated layer.
But since the moisture pick-up properties of the material as buffer layer is relatively strong, in this encapsulating structure, extraneous steam is easy to be buffered
Layer absorbs, and diffuses into closed cavity along buffer layer, so that the waterproof and dampproof performance of the encapsulating structure is poor, it is difficult
Enter in closed cavity to avoid outside moisture, so that the video sensing area to image sensing chip generates adverse effect.
In view of this, the embodiment of the present application provides a kind of encapsulating structure of image sensing chip, the image sensing core
The encapsulating structure of piece constitutes one for the confined air in video sensing area to be arranged by encapsulated layer, substrate and image sensing chip
Chamber, and by way of the first groove is arranged in buffer layer avoids the straight of the buffer layer contacted with the external world and closed cavity
Contact, so as to avoid outside moisture enter by buffer layer image sensing chip encapsulating structure confined space, solve
Outside moisture of having determined is easy to enter in closed cavity by the encapsulating structure of image sensing chip, and to the shadow of image sensing chip
As induction zone leads to the problem of adverse effect.
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
In order to make the above objects, features, and advantages of the present application more apparent, with reference to the accompanying drawing and it is specific real
Applying mode, the present application will be further described in detail.
With reference to Fig. 1-Fig. 6, Fig. 1, Fig. 3, Fig. 5 and Fig. 6 are the encapsulation knot of image sensing chip provided by the embodiments of the present application
The schematic diagram of the section structure of structure, Fig. 2 are overlooking structure diagram of the Fig. 1 along Z axis opposite direction, and Fig. 4 is Fig. 3 along Z axis opposite direction
Overlooking structure diagram.Coordinate system in attached drawing provided by the embodiments of the present application is to be directed toward image perpendicular to substrate surface
Sensing chip is the right-handed coordinate system that Z axis forward direction is established, and X-axis, Y-axis and Z axis are perpendicular to one another.
The encapsulating structure includes:
Substrate 11;
Buffer layer 12 positioned at 11 surface of substrate;
The first groove TH1, the first groove TH1 through the buffer layer 12 exposes part 11 table of substrate
Face;
Cover the metal layer 13 on 11 surface of substrate that the buffer layer 12 and the first groove TH1 expose;
The second groove TH2, the second groove TH2 through the metal layer 13 and the buffer layer 12 exposes part
11 surface of substrate;The first groove TH1 is located at the periphery of the second groove TH2;
In the image sensing chip 16 in the substrate 11, the image sensing chip 16 includes the be oppositely arranged for upside-down mounting
One surface and second surface are provided with video sensing area 162 in the first surface and around the of the video sensing area 162
One pad 161, first pad 161 and the metal layer 13 are electrically connected, and the video sensing area 162 is recessed towards described second
Slot TH2;
At least cover the side wall of the image sensing chip 16,11 surface of substrate that the first groove TH1 exposes and
The encapsulated layer of the part metal layer 13.
With reference to Fig. 1, Fig. 3 and Fig. 6, in Fig. 1, Fig. 3 and encapsulating structure shown in fig. 6, the substrate 11 includes transparent area
111 and positioned at the wiring region 112 of 111 two sides of transparent area, the buffer layer 12 and the metal layer 13 are in the substrate 11
Orthographic projection all covers 112 surface of wiring region of the substrate 11;The process to form exposure mask can be reduced in this way, to a certain degree
The upper preparation section for reducing encapsulating structure.
With reference to Fig. 5, in encapsulating structure shown in Fig. 5, in order to solve the cost of encapsulating structure, the buffer layer 12 and institute
State 112 surface of wiring region that orthographic projection part of the metal layer 13 in the substrate 11 covers the substrate 11.It is advantageous in that,
It is subsequent when forming encapsulated layer, encapsulated layer can be formed as covering the second surface of the image sensing chip 16, described
The plastic packaging layer 142 for 11 exposed surface of 11 surface of substrate, the metal layer 13 and the substrate that one groove TH1 exposes.Due to
The plastic packaging layer 142 is covered in 11 exposed surface of substrate, so that 13 side wall of metal layer be made to be enveloped by plastic packaging layer 142, prevents
Only the side wall of metal layer 13 and external circuit occur it is unnecessary be electrically connected, the material of metal layer 13 can also be prevented to be oxidized,
To improve the reliability for the encapsulating structure being subsequently formed.
With reference to Fig. 3 and Fig. 4, when the orthographic projection of the buffer layer 12 and the metal layer 13 in the substrate 11 is all covered
When covering 112 surface of wiring region of the substrate 11, the encapsulated layer can be the second table of the covering image sensing chip 16
The plastic packaging layer 142 on 11 surface of substrate and the metal layer 13 that face, the first groove TH1 expose.
With reference to Fig. 4, for the ease of wiring, the video sensing area 162 of image sensing chip 16 is located at image sensing chip 16
Middle position, the first pad 161 is located at the periphery in video sensing area 162, in structure shown in Fig. 4, first pad
161 are located at the two sides in the video sensing area 162;In the alternative embodiment of the application, first pad 161 can be with position
It is in distributed rectangular, each side is formed with several the first pads in four sides, three sides or side in video sensing area 162
161, the quantity of the first pad 161 depends on the type of chip, subsequent that first pad 161 is connected with metal layer 13, passes through
Metal layer 13 connect image sensing chip 16 with external circuit.
In Fig. 3, Fig. 4 and encapsulating structure shown in fig. 5, further it is shown that be located at first pad 161 and the metal
Metal coupling 17 between layer 13 and the connection terminal 15 through the plastic packaging layer 142, the metal coupling 17 and the gold
Belong to layer 13 and first pad 161 is electrically connected, the connection terminal 15 is electrically connected with the metal layer 13.
And the height of the connection terminal 15 is greater than the height of the plastic packaging layer 142.
Referring still to Fig. 4, the top of the metal coupling 17 is higher than the top of photosensitive element in video sensing area 162.Institute
State the effect of metal coupling 17 are as follows: on the one hand, make first pad 161 and the metal layer that is subsequently formed by the metal coupling 17
13 electrical connections;On the other hand, the top for being higher than video sensing area 162 by the way that the top of the metal coupling 17 is arranged, it is subsequent to incite somebody to action
It when first pad 161 is electrically connected with metal layer 13, prevents the surface of metal layer 13 from encountering video sensing area 162, plays protection shadow
As the effect of induction zone 162.
The shape of the metal coupling 17 is rectangular or spherical.The present embodiment is rectangular with the shape of the metal coupling 17
For do exemplary illustrated, the formation process of the metal coupling 17 is screen printing technique.
As in an alternative embodiment, the specific process of the metal coupling 17 is formed using screen printing technique are as follows:
It provides and has meshed web plate, the mesh is corresponding with the position of metal coupling 17;By web plate and image sensing chip 16
First surface fitting is brushed in mesh so that the mesh in web plate exposes the surface of the first pad 161 into gold, tin or tin
The materials such as alloy form metal coupling 17 on 161 surface of the first pad.
The material of the metal coupling 17 can be for gold, tin or tin alloy, the tin alloy Xi Yin, tin-lead,
Tin silver copper, tin silver-colored zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver antimony etc..
The connection terminal 15 is set to the two sides of image sensing chip 16, and each side is provided with several connections
Terminal 15 is electrically connected the first pad 161 with external circuit by connection terminal 15, to make the normal work of image sensing chip 16
Make;In some alternative embodiments of the application, the connection terminal 15 can also be set to image sensing chip 16 side,
Three sides or four sides, the application is to this and without limitation.
15 crest surface shape of connection terminal is arc, and the material of connection terminal 15 is gold, tin or tin alloy, institute
Stating tin alloy can be Xi Yin, tin-lead, tin silver copper, tin silver-colored zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin
Silver-colored antimony etc..As an alternative embodiment, the material of the connection terminal 15 is tin.
As in a specific embodiment, between 142 top of plastic packaging layer described in 15 distance from top of connection terminal away from
From being 20 μm -100 μm.
Most 15 surface of connection terminal is coated by plastic packaging layer 142, only retains few 15 surface of connection terminal outside
It in boundary's environment, effectively prevents connection terminal 15 from being aoxidized by external environment, improves the reliability for the encapsulating structure being subsequently formed
And stability.Also, connection terminal 15 is formed in plastic packaging layer 142, the top of the connection terminal 15 is slightly above plastic packaging layer 142
Surface can be such that image sensing chip 16 is electrically connected with external circuit, and the top of connection terminal 15 is slightly above plastic packaging layer 142
Surface can further decrease the integral thickness for the encapsulating structure being subsequently formed, and be conducive to improve encapsulation integrated level.
With reference to Fig. 1 and Fig. 2, in Fig. 1 and encapsulating structure shown in Fig. 2, the encapsulated layer is to cover first groove
The point glue-line 141 on 11 surface of substrate and 16 side wall of image sensing chip that TH1 exposes.
Likewise, also showing the connection terminal 15 being set on the metal layer 13 in Fig. 1 and Fig. 2 and being located at described
Metal coupling 17 between first pad 161 and the metal layer 13, the metal coupling 17 and the metal layer 13 and described
First pad 161 is electrically connected, and the connection terminal 15 is electrically connected with the metal layer 13.
Described glue-line 141 is in video sensing area 162 in closed cavity, prevents external environment to image sensing chip
16 cause adverse effect.In the specific embodiment of the application, described glue-line 141 carries out gluing process using dispenser
It is formed.
The material of the connection terminal 15 and metal coupling 17 can refer to explanation above.In the present embodiment, using plant
Ball technique forms the connection terminal 15, and the vertical range that 15 distance from top of connection terminal influences sensing chip top surface is 20
μm-100μm。
In Fig. 1-encapsulating structure shown in fig. 5, it is provided between the first groove TH1 and the second groove TH2
The part buffer layer 12.Due to the presence of the first groove TH1, between the first groove TH1 and the second groove TH2
Buffer layer 12 is also sealed by metal layer 13 and encapsulated layer, is not contacted with the external world, so as to avoid the buffer layer of this part
12 absorb water and diffuse into the possibility in closed cavity.
In encapsulating structure shown in Fig. 6, the first groove TH1 and the second groove TH2 are penetrated through, and are eliminated completely
The buffer layer 12 contacted with closed cavity, further reduced as buffer layer 12 water suction and caused by outside moisture enter it is closed
Possibility in cavity.
Based on above-mentioned encapsulating structure embodiment, correspondingly, the embodiment of the present application also provides a kind of image sensing chips
Packaging method, for the packaging method as shown in Fig. 7-Figure 18, Fig. 7-Figure 18 is a kind of image that one embodiment of the application provides
The flow diagram of the packaging method of sensing chip, the packaging method include:
S101: as shown in Figure 7 and Figure 8, providing a substrate 11 ', and the substrate 11 ' includes multiple functional areas 20 and is located at phase
Cutting Road 30 between the adjacent functional areas 20, the functional areas 20 are including transparent area 111 and are located at 111 two sides of transparent area
Wiring region 112, the transparent area 111 in being subsequently formed technique be arranged image sensing chip 16 video sensing area
162;In substrate 11 ' shown in fig. 7 after cutting technique, the substrate of the encapsulating structure of peace chip is created as single image
11’。
S102: as shown in Figure 8 and Figure 9, the buffer layer 12 at least partly covering the wiring region 112 is formed, and to described
Buffer layer 12 is handled, and is formed and is run through the buffer layer 12, and exposes first groove on the part 11 ' surface of substrate
TH1;In fig. 8, the buffer layer 12 of formation covers the functional areas 20 and the Cutting Road 30, is located at the Cutting Road
Buffer layer 12 on 30 can be removed in cutting technique, form the buffering for covering the functional areas 20 and the Cutting Road 30
Layer 12 may not need to form mask layer, simplify the formation process of encapsulating structure.With reference to Fig. 9, the first groove TH1 is formed in
The two sides of transparent area 111, and do not contacted with the transparent area 111, in the alternative embodiment of the application, described first is recessed
The forming region of slot TH1 can be contacted with the transparent area 111.
S103: it as shown in Figure 10, is formed and covers the substrate 11 ' that the buffer layer 12 and the first groove TH1 expose
The metal layer 13 on surface;Likewise, metal layer 13 is also formed on the buffer layer 12 being located on Cutting Road 30 in Figure 10,
These metal layers 13 can equally remove in cutting technique, but form covering buffer layer 12, the base that the first groove TH1 exposes
The metal layer 13 on 11 ' surface of bottom may not need the formation for carrying out exposure mask, simplify preparation process.
S104: referring to Figure 11 and Figure 12, handle the metal layer 13 and the buffer layer 12, runs through institute to be formed
The second the groove TH2, the second groove TH2 for stating metal layer 13 and the buffer layer 12 exposes the part 11 ' table of substrate
Face;The first groove TH1 is located at the periphery of the second groove TH2.The forming region of the second groove TH2 and the base
The transparent area 111 at bottom 11 ' is overlapped, and provides setting position with the video sensing area 162 for image sensing chip 16.
In Figure 11, the part buffer layer 12 is remained between the first groove TH1 and the second groove TH2,
In Figure 12, the first groove TH1 and the second groove TH2 are penetrated through.
S105: referring to Figure 13, provides image sensing chip 16, and the image sensing chip 16 includes first be oppositely arranged
Surface and second surface are provided with video sensing area 162 in the first surface and around the first of the video sensing area 162
Pad 161, first pad 161 and the metal layer 13 are electrically connected, and the image sensing chip 16 are inverted in described
On functional areas 20, so that the video sensing area 162 is towards the second groove TH2;
In Figure 13, further it is shown that the metal coupling 17 of connection first pad 161 and the metal layer 13, the gold
The formation process and forming material for belonging to convex block 17 can refer to described above, and this will not be repeated here by the application.
S106: referring to Figure 14 and Figure 16, forms side wall, first groove at least covering the image sensing chip 16
The encapsulated layer for 11 ' surface of substrate and the part metal layer 13 that TH1 exposes;
In Figure 14, the encapsulated layer is the 11 ' surface of substrate and the shadow that covering the first groove TH1 exposes
It is as the point glue-line 141 of 16 side wall of sensing chip, i.e., described to form the side wall at least covering the image sensing chip 16, described the
The encapsulated layer for 11 ' surface of substrate and the part metal layer 13 that one groove TH1 exposes includes: that form covering described first recessed
The point glue-line 141 on 11 ' surface of substrate and 16 side wall of image sensing chip that slot TH1 exposes.
In Figure 16, the encapsulated layer is the second surface for covering the image sensing chip 16, the first groove TH1
The plastic packaging layer 142 of the 11 ' exposed surface of 11 ' surface of substrate, the metal layer 13 and the substrate exposed;The i.e. described formation is extremely
The side wall of the image sensing chip 16 is covered less, 11 ' surface of substrate and the part gold that the first groove TH1 exposes
Belong to layer 13 encapsulated layer include: to form the second surface for covering the image sensing chip 16, the first groove TH1 exposes
11 ' exposed surface of 11 ' surface of substrate, the metal layer 13 and the substrate plastic packaging layer 142.
S107: referring to Figure 15 and Figure 17, and the connection being electrically connected with the metal layer 13 is formed on the metal layer 13
Terminal 15;The connection terminal 15 is set to the periphery of the image sensing chip 16, and is provided with several on each side
Connection terminal 15 is electrically connected the first pad 161 with external circuit by connection terminal 15, to make image sensing chip 16 just
Often work.
In the embodiment shown in Figure 17, described to form the side wall at least covering the image sensing chip 16, described the
It is described along the Cutting Road 30 after the encapsulated layer for 11 ' surface of substrate and the part metal layer 13 that one groove TH1 exposes
Before being cut to the substrate 11 ' further include:
The plastic packaging layer 142 is handled, to form multiple third grooves for exposing the metal layer 13, described
Three grooves are located at the periphery of the image sensing chip 16;
Fill conductive material in the third groove, with formed be located at the third groove in, and with the metal layer
13 connection terminals 15 being electrically connected.
S108: the substrate 11 ' is cut along the Cutting Road 30.
It is described to form the buffer layer 12 at least partly covering the wiring region 112 in Fig. 7-embodiment shown in figure 15
Include:
Form the buffer layer 12 for all covering 112 surface of wiring region
In some alternative embodiments of the application, with reference to Figure 18, the formation at least partly covers the wiring region 112
Buffer layer 12 include:
Form the buffer layer 12 that part covers 112 surface of wiring region.In Figure 18, in order to solve encapsulating structure at
This, the orthographic projection part of the buffer layer 12 and the metal layer 13 in the substrate 11 ' covers the wiring of the substrate 11 '
112 surface of area.It is advantageous in that, subsequent when forming encapsulated layer, encapsulated layer can be formed as covering the image sensing core
11 ' surface of substrate, the metal layer 13 and the substrate 11 ' that the second surface of piece 16, the first groove TH1 expose are naked
Reveal the plastic packaging layer 142 on surface.Since the plastic packaging layer 142 is covered in the 11 ' exposed surface of substrate, to make 13 side of metal layer
Wall is enveloped by plastic packaging layer 142, prevent the side wall of metal layer 13 and external circuit occur it is unnecessary be electrically connected, can also prevent
The material of metal layer 13 is oxidized, to improve the reliability for the encapsulating structure being subsequently formed.
In conclusion the embodiment of the present application provides the encapsulating structure and its packaging method of a kind of image sensing chip 16,
Wherein, the encapsulating structure of the image sensing chip 16 constitutes one by encapsulated layer, substrate 11 ' and image sensing chip 16
For the closed cavity in video sensing area 162 to be arranged, and by way of the first groove TH1 is arranged in buffer layer 12, keep away
Exempt from the buffer layer 12 contacted with the external world to contact with the direct of closed cavity, and due to the water absorbing properties of the material as buffer layer 12
It is generally relatively strong, the buffer layer 12 that contact with the external world and closed cavity are completely cut off, can pass through to avoid outside moisture buffer layer 12 into
Enter the confined space of the encapsulating structure of image sensing chip 16, is easy to solve outside moisture through image sensing chip 16
Encapsulating structure enter in closed cavity, and adverse effect is led to the problem of to the video sensing area 162 of image sensing chip 16.
It should be noted that each embodiment in this specification is described in a progressive manner, each embodiment emphasis is said
Bright is the difference from other embodiments, the same or similar parts in each embodiment cross-reference.For reality
For applying packaging method disclosed in example, since it is corresponding with encapsulating structure disclosed in embodiment, so be described relatively simple,
Related place illustrates referring to encapsulating structure corresponding portion.
The foregoing description of the disclosed embodiments makes professional and technical personnel in the field can be realized or use the application.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the application.Therefore, the application
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (17)
1. a kind of encapsulating structure of image sensing chip characterized by comprising
Substrate;
Positioned at the buffer layer of the substrate surface;
Through the first groove of the buffer layer, first groove exposes the part substrate surface;
Cover the metal layer for the substrate surface that the buffer layer and first groove expose;
Through the second groove of the metal layer and the buffer layer, second groove exposes the part substrate surface;
First groove is located at the periphery of second groove;
In the image sensing chip in the substrate, the image sensing chip includes the first surface being oppositely arranged and for upside-down mounting
Two surfaces, are provided with video sensing area and the first pad around the video sensing area in the first surface, and described first
Pad and metal layer electrical connection, the video sensing area is towards second groove;
At least cover the side wall of the image sensing chip, substrate surface and the part metal that first groove exposes
The encapsulated layer of layer.
2. the encapsulating structure of image sensing chip according to claim 1, which is characterized in that the buffer layer and the gold
Belong to the wiring region surface that the orthographic projection of layer on the substrate partly or entirely covers the substrate.
3. the encapsulating structure of image sensing chip according to claim 2, which is characterized in that the encapsulated layer is covering institute
State the second surface of image sensing chip, the plastic packaging layer of the substrate surface that first groove exposes and the metal layer.
4. the encapsulating structure of image sensing chip according to claim 2, which is characterized in that the encapsulated layer is covering institute
State the second surface of image sensing chip, substrate surface, the metal layer and the substrate that first groove exposes it is naked
Reveal the plastic packaging layer on surface.
5. according to the encapsulating structure of the described in any item image sensing chips of claim 3 or 4, which is characterized in that further include passing through
The connection terminal of the plastic packaging layer is worn, the connection terminal and the metal layer are electrically connected.
6. the encapsulating structure of image sensing chip according to claim 5, which is characterized in that the height of the connection terminal
Greater than the height of the plastic packaging layer.
7. the encapsulating structure of image sensing chip according to claim 2, which is characterized in that the encapsulated layer is covering institute
State the point glue-line of substrate surface and the image sensing chip side wall that the first groove exposes.
8. the encapsulating structure of image sensing chip according to claim 7, which is characterized in that further include: it is set to described
Connection terminal on metal layer, the height of the connection terminal are greater than hanging down between the image sensing chip and the metal layer
Straight distance.
9. the encapsulating structure of image sensing chip according to claim 1, which is characterized in that further include: it is located at described the
Metal coupling between one pad and the metal layer, the metal coupling and the metal layer and first pad are electrical
Connection.
10. the encapsulating structure of image sensing chip according to claim 1, which is characterized in that first groove and institute
It states and is provided with the part buffer layer between the second groove.
11. the encapsulating structure of image sensing chip according to claim 1, which is characterized in that first groove and institute
State the perforation of the second groove.
12. a kind of packaging method of image sensing chip characterized by comprising
A substrate is provided, the substrate includes multiple functional areas and the Cutting Road between the adjacent functional areas, the function
Energy area includes transparent area and the wiring region positioned at the transparent area two sides;
The buffer layer at least partly covering the wiring region is formed, and the buffer layer is handled, is formed through described slow
Layer is rushed, and exposes the first groove of the part substrate surface;
Form the metal layer for covering the substrate surface that the buffer layer and first groove expose;
The metal layer and the buffer layer are handled, to be formed through the second recessed of the metal layer and the buffer layer
Slot, second groove expose the part substrate surface;First groove is located at the periphery of second groove;
Image sensing chip is provided, the image sensing chip includes the first surface and second surface being oppositely arranged, and described the
Video sensing area and the first pad around the video sensing area, first pad and the metal are provided in one surface
Layer electrical connection, and by the image sensing flip-chip on the functional areas, so that the video sensing area is towards described the
Two grooves;
Formation at least covers described in the side wall of the image sensing chip, the substrate surface that first groove exposes and part
The encapsulated layer of metal layer;
The substrate is cut along the Cutting Road.
13. the packaging method of image sensing chip according to claim 12, which is characterized in that the formation is at least partly
The buffer layer for covering the wiring region includes:
Form the buffer layer for partly or entirely covering the wiring region surface.
14. the packaging method of image sensing chip according to claim 13, which is characterized in that the formation at least covers
The encapsulated layer packet for substrate surface and the part metal layer that the side wall of the image sensing chip, first groove expose
It includes:
It is formed and covers substrate surface and the metal that second surface, first groove of the image sensing chip expose
The plastic packaging layer of layer;
Or
It is formed and covers substrate surface, the metal that second surface, first groove of the image sensing chip expose
The plastic packaging layer of layer and the substrate exposed surface.
15. the packaging method of image sensing chip according to claim 14, which is characterized in that the formation at least covers
The encapsulated layer for substrate surface and the part metal layer that the side wall of the image sensing chip, first groove expose it
Afterwards, it is described the substrate is cut along the Cutting Road before further include:
The plastic packaging layer is handled, to form multiple third grooves for exposing the metal layer, third groove position
In the periphery of the image sensing chip;
Conductive material is filled in the third groove, is located in the third groove with being formed, and is electrical with the metal layer
The connection terminal of connection.
16. the packaging method of image sensing chip according to claim 13, which is characterized in that the formation at least covers
The encapsulated layer packet for substrate surface and the part metal layer that the side wall of the image sensing chip, first groove expose
It includes:
Form the point glue-line for covering substrate surface and the image sensing chip side wall that first groove exposes.
17. the packaging method of image sensing chip according to claim 16, which is characterized in that the formation at least covers
The encapsulated layer for substrate surface and the part metal layer that the side wall of the image sensing chip, first groove expose it
Afterwards, it is described the substrate is cut along the Cutting Road before further include:
The connection terminal being electrically connected with the metal layer is formed on the metal layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811105613.6A CN109037259B (en) | 2018-09-21 | 2018-09-21 | Packaging structure and packaging method of image sensing chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811105613.6A CN109037259B (en) | 2018-09-21 | 2018-09-21 | Packaging structure and packaging method of image sensing chip |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109037259A true CN109037259A (en) | 2018-12-18 |
CN109037259B CN109037259B (en) | 2023-12-12 |
Family
ID=64617394
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811105613.6A Active CN109037259B (en) | 2018-09-21 | 2018-09-21 | Packaging structure and packaging method of image sensing chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109037259B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112985471A (en) * | 2021-04-30 | 2021-06-18 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1638020A (en) * | 2003-12-18 | 2005-07-13 | 精工爱普生株式会社 | Manufacturing method of semiconductor device, semiconductor device, circuit substrate and electronic equipment |
US20070236596A1 (en) * | 2006-04-07 | 2007-10-11 | Kabushiki Kaisha Toshiba | Solid-state image pickup device, a camera module and a method for manufacturing thereof |
CN103489885A (en) * | 2013-09-30 | 2014-01-01 | 格科微电子(上海)有限公司 | Wafer-level packaging method of image sensor chips |
US20150087086A1 (en) * | 2012-05-30 | 2015-03-26 | Olympus Corporation | Method for producing image pickup apparatus, and method for producing semiconductor apparatus |
CN105185751A (en) * | 2015-08-18 | 2015-12-23 | 苏州晶方半导体科技股份有限公司 | Semiconductor chip packaging structure and packaging method thereof |
CN208781847U (en) * | 2018-09-21 | 2019-04-23 | 苏州晶方半导体科技股份有限公司 | A kind of encapsulating structure of image sensing chip |
-
2018
- 2018-09-21 CN CN201811105613.6A patent/CN109037259B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1638020A (en) * | 2003-12-18 | 2005-07-13 | 精工爱普生株式会社 | Manufacturing method of semiconductor device, semiconductor device, circuit substrate and electronic equipment |
US20070236596A1 (en) * | 2006-04-07 | 2007-10-11 | Kabushiki Kaisha Toshiba | Solid-state image pickup device, a camera module and a method for manufacturing thereof |
US20150087086A1 (en) * | 2012-05-30 | 2015-03-26 | Olympus Corporation | Method for producing image pickup apparatus, and method for producing semiconductor apparatus |
CN103489885A (en) * | 2013-09-30 | 2014-01-01 | 格科微电子(上海)有限公司 | Wafer-level packaging method of image sensor chips |
CN105185751A (en) * | 2015-08-18 | 2015-12-23 | 苏州晶方半导体科技股份有限公司 | Semiconductor chip packaging structure and packaging method thereof |
CN208781847U (en) * | 2018-09-21 | 2019-04-23 | 苏州晶方半导体科技股份有限公司 | A kind of encapsulating structure of image sensing chip |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112985471A (en) * | 2021-04-30 | 2021-06-18 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
CN112985471B (en) * | 2021-04-30 | 2021-11-02 | 深圳市汇顶科技股份有限公司 | Capacitive sensor and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN109037259B (en) | 2023-12-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6630373B2 (en) | Ground plane for exposed package | |
CN105702696B (en) | The encapsulating structure and preparation method thereof of image sensing chip | |
CN103985723B (en) | Method for packing and encapsulating structure | |
CN103972256B (en) | Method for packing and encapsulating structure | |
JP2001284523A (en) | Semiconductor package | |
CN105977225B (en) | Encapsulating structure and packaging method | |
TW200416787A (en) | Semiconductor stacked multi-package module having inverted second package | |
TW200421568A (en) | Image sensor device | |
CN101834166A (en) | Leadless integrated circuit package having standoff contacts and die attach pad | |
CN106816388A (en) | Semiconductor packaging structure and manufacturing method thereof | |
CN106298699A (en) | Encapsulating structure and method for packing | |
US6864588B2 (en) | MCM package with bridge connection | |
CN208781847U (en) | A kind of encapsulating structure of image sensing chip | |
CN205789973U (en) | The encapsulating structure of image sensing chip | |
CN109037259A (en) | A kind of encapsulating structure and its packaging method of image sensing chip | |
CN105355641A (en) | Packaging structure and packaging method of high-pixel image sensing chip | |
TWI478304B (en) | Package substrate and fabrication method thereof | |
KR20020061222A (en) | stack-type semiconductor package | |
JP2016149386A (en) | Semiconductor device, electronic device and semiconductor device manufacturing method | |
CN206259337U (en) | Encapsulating structure | |
KR20010056618A (en) | Semiconductor package | |
CN208781831U (en) | A kind of chip-packaging structure | |
CN206098376U (en) | Packaging structure | |
CN110299330A (en) | A kind of encapsulating structure and packaging method of wafer stage chip | |
CN206558504U (en) | Imaging sensor module |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |