CN103985723B

CN103985723B - Method for packing and encapsulating structure

Info

Publication number: CN103985723B
Application number: CN201410214061.8A
Authority: CN
Inventors: 王之奇; 喻琼; 王蔚
Original assignee: China Wafer Level CSP Co Ltd
Current assignee: China Wafer Level CSP Co Ltd
Priority date: 2014-05-20
Filing date: 2014-05-20
Publication date: 2017-06-20
Anticipated expiration: 2034-05-20
Also published as: CN103985723A

Abstract

A kind of method for packing and encapsulating structure, wherein method for packing include：Some single image sensing chips are provided, the image sensing chip has video sensing area and the pad around the video sensing area；PCB substrate is provided, PCB substrate surface is formed with metal level；Image sensing flip-chip is placed in the top of PCB substrate, and pad and metal level electrical connection；Formation is covered in the plastic packaging layer of layer on surface of metal and image sensing chip surface；The through hole for exposing layer on surface of metal is formed in plastic packaging layer；The solder-bump of the full through hole of filling is formed, and solder-bump top is higher than plastic packaging layer surface；PCB substrate is cut along Cutting Road region, some single encapsulating structures are formed.Packaging technology of the present invention is simple, and encapsulating structure has preferable encapsulation performance and reliability, and partial encapsulation technique can be carried out using PCB making technologies, reduces packaging technology difficulty and packaging cost.

Description

Method for packing and encapsulating structure

Technical field

The present invention relates to semiconductor packaging, more particularly to a kind of method for packing and encapsulating structure.

Background technology

Image sensor is a kind of can to experience extraneous light and convert thereof into the sensor of electric signal.In image sensing After the completion of device chip manufacturing, then a series of packaging technologies are carried out by image sensor dice, so as to form packaged shadow As sensor, for the various electronic equipments of such as digital camera, DV etc..

Traditional image sensor package method is typically with wire bonding (Wire Bonding) and is packaged, but with Developing rapidly for integrated circuit, lead more long causes that product size is unable to reach preferably requirement, therefore, wafer-level packaging (WLP：Wafer Level Package) gradually replace wire bond package as a kind of more conventional method for packing.

As shown in figure 1, Fig. 1 is a kind of encapsulating structure, including：Substrate 101；Positioned at the dike structure on the surface of substrate 101 102；The image sensing chip 100 of the top of substrate 101 is inverted in, the front of image sensing chip 100 has the He of video sensing area 103 It is in contact with the surface of dike structure 102 around the pad 104 in the video sensing area 103, and the upper surface of the pad 104；Position Through hole in the image sensing chip 100, the through hole exposes the lower surface of pad 104；Positioned at through-hole side wall, Yi Jiying As the protective layer 105 at the back side of sensing chip 100, and expose the lower surface of pad 104 of via bottoms；Positioned at through-hole side wall and The metal redistribution layer 106 at the back side of image sensing chip 100；Positioned at the insulating barrier 107 on the metal redistribution layer surface；It is located at Opening in the insulating barrier 107, and the opening exposes metal redistribution layer 106；Welding in the opening is convex Play 108.

However, the encapsulation performance of above-mentioned encapsulating structure needs further raising, and form the encapsulation work of above-mentioned encapsulating structure Skill is complex.

The content of the invention

The problem that the present invention is solved is to provide a kind of method for packing and encapsulating structure, improves encapsulation performance and reliability Property.

To solve the above problems, the present invention provides a kind of method for packing, including：Some single image sensing cores are provided Piece, the image sensing chip has video sensing area and the pad around the video sensing area；PCB substrate is provided, it is described PCB substrate includes some functional areas and the Cutting Road region between adjacent functional area, PCB substrate functional areas surface It is formed with metal level；The image sensing flip-chip is placed in the top of PCB substrate functional areas, and the pad and metal level Electrical connection；Formation is covered in the plastic packaging layer of the layer on surface of metal and image sensing chip surface；The shape in plastic packaging layer Into through hole, the via bottoms expose layer on surface of metal；The solder-bump of the full through hole of filling is formed, and the welding is convex It is higher than plastic packaging layer surface to play top；The PCB substrate is cut along the Cutting Road region, some single encapsulating structures are formed.

Optionally, the hole through PCB substrate is formed in the PCB substrate, and after pad and metal level electrical connection Video sensing area is located at hole top.

Optionally, described hole is formed using punching press or bore process.

Optionally, after the metal level is formed, adhesive tape layer, adhesive tape layer closing described hole are formed at the PCB substrate back side One end.

Optionally, the material of the adhesive tape layer is UV dispergation rubber belt material, pyrolysis glue rubber belt material, IR glass or AR glass Glass.

Optionally, the metal level is covered in PCB substrate functional areas and Cutting Road region surface.

Optionally, the plastic packaging layer is covered in the metal level sidewall surfaces of same functional areas.

Optionally, the material of the metal level is Cu, Al, W, Sn, Au or Sn-Au alloy.

Optionally, the forming step of some single image sensing chips includes：Wafer to be wrapped is provided, it is described to treat With some video sensing areas and the pad around the video sensing area in encapsulation wafer；Cut the wafer to be wrapped, shape Into some single image sensing chips.

Optionally, before the wafer to be wrapped is cut, also including step：Thinning place is carried out to the wafer to be wrapped Reason.

Optionally, also including step：Metal coupling, the pad and gold are formed in the bond pad surface or layer on surface of metal Category layer is electrically connected by metal coupling.

Optionally, the material of the metal coupling is tin, gold or tin alloy.

Optionally, pad is connected with metal level using solder bonds technique, wherein, solder bonds technique is eutectic key Conjunction, ultrasonic thermocompression, thermal compression welding or ultrasonic wire bonding.

Optionally, the material of the plastic packaging layer is epoxy resin or acrylic resin.

Optionally, the processing step for forming solder-bump includes：The metal material of the full through hole of filling is formed, using returning Stream technique, forms the solder-bump.

Optionally, the distance at the top of the solder-bump top to plastic packaging layer is 20 μm to 100 μm.

Optionally, the through hole is formed using etching or laser boring technique.

Accordingly, the present invention also provides a kind of encapsulating structure, including：PCB substrate；Positioned at the gold on the PCB substrate surface Category layer；The image sensing chip above PCB substrate is inverted in, the image sensing chip has video sensing area and around described The pad in video sensing area, and the pad and metal level electrical connection；Positioned at the layer on surface of metal and image sensing chip The plastic packaging layer on surface；Through hole in plastic packaging layer, and the through hole exposes layer on surface of metal；The full through hole of filling Solder-bump, solder-bump top is higher than plastic packaging layer surface.

Optionally, there is the hole through PCB substrate in the PCB substrate, and video sensing area is located at hole top.

Optionally, width of the width of described hole more than or equal to video sensing area.

Optionally, also include：Metal coupling, the metal coupling is located between pad and metal level, by the metal Projection electrically connects the pad and metal level.

Optionally, the material of the metal coupling is tin, gold or tin alloy.

Optionally, metal level side wall is flushed with PCB substrate side wall.

Optionally, the plastic packaging layer is covered in metal level sidewall surfaces.

Optionally, the PCB substrate back side is formed with adhesive tape layer, and adhesive tape layer closes one end of described hole.

The present invention also provides a kind of method for packing, including：Some single image sensing chips, the image sensing are provided Chip has video sensing area and the pad around the video sensing area；PCB substrate is provided, the PCB substrate includes some Functional areas and the Cutting Road region between adjacent functional area, PCB substrate functional areas surface is formed with metal level；Will The image sensing flip-chip is placed in the top of PCB substrate functional areas, and the pad and metal level electrical connection；In the gold Category layer surface forms solder-bump, and solder-bump top is higher than image sensing chip surface；Along the Cutting Road region The PCB substrate is cut, some single encapsulating structures are formed.

Optionally, also including step：Formation is covered in the point glue-line of the image sensing chip sidewall surfaces.

Optionally, the point glue-line of formation is also covered in metal coupling sidewall surfaces.

Optionally, the hole through PCB substrate is formed in the PCB substrate, is placed in by image sensing flip-chip Behind the top of PCB substrate functional areas, video sensing area is located at hole top.

Accordingly, the present invention also provides a kind of encapsulating structure, including：PCB substrate；Positioned at the gold on the PCB substrate surface Category layer；The image sensing chip above PCB substrate is inverted in, the image sensing chip has video sensing area and around described The pad in video sensing area, and the pad and metal level electrical connection；It is positioned at the solder-bump of the layer on surface of metal and described Solder-bump top is higher than image sensing chip surface.

Optionally, also include：Also include：Metal coupling, the metal coupling is located between pad and metal level, by institute State metal coupling and electrically connect the pad and metal level.

Optionally, also include：It is covered in the point of the image sensing chip sidewall surfaces and metal coupling sidewall surfaces Glue-line.

Optionally, there is the hole through the PCB substrate, video sensing area is located at hole top in the PCB substrate.

Compared with prior art, the technical scheme that the present invention is provided has advantages below：

The embodiment of the present invention provides a kind of method for packing, and packaging technology is simple, there is provided some single image sensing chips； PCB substrate is provided, PCB substrate functional areas surface is formed with some discrete metal levels；The image sensing chip is fallen The top of PCB substrate is installed on, and the pad is connected with metal level；Formation is covered in the layer on surface of metal and image The plastic packaging layer of censorchip surface；Through hole is formed in plastic packaging layer, the via bottoms expose layer on surface of metal；Formed The solder-bump of the full through hole of filling, and solder-bump top is higher than plastic packaging layer surface；The PCB is cut along the Cutting Road region Substrate, forms some single encapsulating structures.The present invention forms the metal level being connected with pad by PCB substrate surface, The through hole for exposing metal level is formed in plastic packaging layer, the solder-bump that the metal level exposed with the through hole is electrically connected is formed, Encapsulating structure domain external circuit is electrically connected by the solder-bump, therefore, embodiment of the present invention packaging technology is simple, and makees It is little with the encapsulation procedure on image sensing chip so that image sensing chip keeps preferably performance, so as to improve to be formed Encapsulating structure encapsulation yield, encapsulation performance and reliability effectively improve.

Simultaneously as the present embodiment forms encapsulating structure on the basis of PCB substrate, therefore, partial encapsulation technique can be adopted Carried out with PCB making technologies, for example, metal level is formed in PCB substrate using PCB making technologies, using PCB making technology shapes Into plastic packaging layer, so as to reduce packaging cost；The cheap of PCB substrate is additionally, since, encapsulation can be further effectively reduced Cost.

Also, in the embodiment of the present invention, PCB substrate can have very big area, therefore upside-down mounting is placed in PCB substrate top Image sensing chip quantity it is more, within a packaging technology cycle, can be with the very big encapsulating structure of quantity of formation, effectively Raising packaging efficiency, shorten packaging time.

Further, the hole through the PCB substrate is formed in the embodiment of the present invention, in PCB substrate, and in pad and gold After category layer is connected, video sensing area is located at the top of hole, and ambient propagates to video sensing area by described hole, seals Assembling structure converts optical signal into electrical signal.

Further, in the embodiment of the present invention, adhesive tape layer is formed at the PCB substrate back side, the adhesive tape layer closes described hole One end, therefore when image sensing flip-chip be placed in PCB substrate top after, video sensing area be located at PCB substrate and adhesive tape layer Between formed cavity in, follow-up packaging technology can be avoided to have undesirable effect video sensing area, further improve envelope The encapsulation performance of assembling structure.The material of the adhesive tape layer is UV dispergation adhesive tape or pyrolysis glue adhesive tape, is subsequently forming single encapsulation After structure, by way of UV irradiates or heats, you can adhesive tape layer is separated with encapsulating structure, packaging technology is simple.

Further, in the embodiment of the present invention, before wafer to be wrapped is cut, also including step：To wafer to be wrapped Second face carries out reduction processing so that the thinner thickness of image sensing chip；Also, due to forming single image sensing core After piece, the encapsulation procedure carried out to image sensing chip is few, and image sensing chip need not be in order to have stronger machinery Intensity and keep relatively thick thickness, therefore, compared with prior art, after the thinning wafer to be wrapped of the embodiment of the present invention, subtract The thickness of the wafer to be wrapped after thin is significantly less than the thickness of wafer to be wrapped in the prior art, the encapsulation for being formed on this basis The thickness of structure is significantly less than the thickness of the encapsulating structure of prior art formation, is conducive to meeting semiconductor miniaturization, miniaturization Development trend.

Further, metal coupling is formed in layer on surface of metal, it is to avoid forming metal coupling in bond pad surface may be to image The harmful effect that sensing chip is caused, further reduces the encapsulation procedure that image sensing chip experiences in itself, makes image sensing Chip keeps preferably performance, so as to further improve the encapsulation performance of encapsulating structure.

Further, the metal material of the full through hole of filling is formed, using reflux technique, the solder-bump is formed, no Only further reduce packaging technology step so that packaging technology is simpler；And solder-bump top to plastic packaging layer surface away from It is 20 μm to 100 μm from very small, the solder-bump sidewall surfaces to be formed almost is covered by plastic packaging layer, reduces welding Area of the projection in external environment, so as to the possibility that solder-bump is aoxidized or damaged by external environment greatly reduces Property, it is effective to improve the reliability and stability of encapsulating structure, and can further reduce the thickness of encapsulating structure.

Further, plastic packaging layer is located at metal level sidewall surfaces, i.e. plastic packaging layer is covered in metal level sidewall surfaces, along cutting Formed after road region cutting PCB substrate in encapsulating structure, metal level sidewall surfaces are covered by plastic packaging layer, prevent metal level with it is outside There is unnecessary electrical connection in circuit, while preventing external environment from causing to aoxidize equivalent damage to metal level, improve encapsulating structure Reliability and stability.

The embodiment of the present invention also provides a kind of structural behaviour superior encapsulating structure, including is inverted in above PCB substrate Image sensing chip, and pad and PCB substrate surface metal level electrical connection；Positioned at the layer on surface of metal and image sensing The plastic packaging layer of chip surface；Through hole in plastic packaging layer, and the through hole exposes layer on surface of metal；Filling is full described The solder-bump of through hole.In encapsulating structure, through hole is located in plastic packaging layer, and via bottoms expose layer on surface of metal, by weldering Connect projection to be connected with the metal level that via bottoms expose, encapsulating structure is electrically connected with external circuit, reduce image biography Damage and pollution that sense chip is subject to, therefore, the encapsulation performance of encapsulating structure provided in an embodiment of the present invention is superior.

Further, the top of the full through hole of solder-bump filling, and the solder-bump to plastic packaging layer surface distance It is very small, it is 20 μm to 100 μm, therefore solder-bump major part sidewall surfaces are enveloped by plastic packaging layer, reduce welding Area of the projection in external environment, so as to reduce the possibility that solder-bump causes to aoxidize or pollute by external environment Property, improve the stability and reliability of encapsulating structure；Also, due to solder-bump top to plastic packaging layer surface distance very It is small, therefore encapsulating structure provided in an embodiment of the present invention has relatively thin thickness, meets semiconductor miniaturization, the development of miniaturization Trend.

Further, the plastic packaging layer is covered in metal level sidewall surfaces, prevents metal level side wall to be exposed to external environment In, it is to avoid there is unnecessary electrical connection in metal level and external environment, while metal level is prevented by external environmental, further Improve the stability and reliability of encapsulating structure.

Further, there is the hole through the PCB substrate, the video sensing area is located on hole in PCB substrate Side, makes video sensing area receive extraneous light by described hole, and aperture width is more than video sensing sector width, improves image Induction zone to the utilization rate of light, so as to improve the performance of encapsulating structure.

The embodiment of the present invention also provides a kind of method for packing, after image sensing flip-chip is placed in above PCB substrate, Solder-bump is formed in layer on surface of metal, image sensing chip is electrically connected with external circuit by the solder-bump, encapsulated Process is simple, and the encapsulation procedure that image sensing chip experiences in itself is few so that and image sensing chip has performance higher, Therefore the encapsulating structure for being formed encapsulation performance is good, reliability is high.

Further, the embodiment of the present invention forms the point glue-line for being covered in image sensing chip sidewall surfaces, described glue-line Prevent external environment from being had undesirable effect to image sensing chip, further improve the reliability of the encapsulating structure for being formed.

The embodiment of the present invention also provides a kind of simple structure and encapsulating structure of good performance, including：PCB substrate；It is located at The metal level on the PCB substrate surface；The image sensing chip above PCB substrate is inverted in, the image sensing chip has Video sensing area and the pad around the video sensing area, and the pad and metal level electrical connection；Positioned at the metal level The solder-bump on surface, and solder-bump top is higher than image sensing chip surface.Encapsulating structure is made by solder-bump Electrically connected with external circuit, reduce damage and pollution that image sensing chip is subject to, therefore, envelope provided in an embodiment of the present invention The encapsulation performance of assembling structure is superior.

Brief description of the drawings

Fig. 1 is the cross-sectional view of prior art encapsulating structure；

The structural representation of the encapsulating structure forming process that Fig. 2 to Figure 15 is provided for one embodiment of the invention；

The structural representation of the encapsulating structure forming process that Figure 16 to Figure 20 is provided for another embodiment of the present invention；

Figure 21 to Figure 23 is the cross-sectional view of further embodiment of this invention image sensor package process.

Specific embodiment

From background technology, the encapsulation performance and reliability of the encapsulating structure that prior art is provided have much room for improvement, and shape Technique into above-mentioned encapsulating structure is complex, and packaging cost is higher.

It has been investigated that, it is the reason for the encapsulation performance and reliability of encapsulating structure have much room for improvement：

First, the packaging technology for forming aforementioned encapsulation structure is extremely complex, and in encapsulation process, image sensing chip warp Thinning, etching is gone through to form through hole, form protective layer, form metal level, form the multiple tracks encapsulation procedures, the encapsulation system such as insulating barrier Journey has undesirable effect to the performance of image sensing chip, causes the encapsulating structure performance to be formed to be difficult to reach optimum state.

Secondly as image sensing chip needs experience etching to form through hole, form the multiple tracks encapsulation procedures, institute such as metal level Stating image sensing chip must have mechanical strength higher, prevent image sensing chip from being broken during the encapsulation procedure Split；To ensure the mechanical strength of image sensing chip, image sensing chip needs to keep thicker thickness, so as to what is resulted in Encapsulating structure thickness is partially thick, is unfavorable for semiconductor devices miniaturization, the development trend of miniaturization.

Also, the image sensing chip yield level in wafer differs, when forming above-mentioned encapsulating structure using packaging technology, It is that the encapsulating structure that rear cutting crystal wafer is formed is packaged to monoblock wafer, the shape on the basis of the image sensing chip of yield difference Into the encapsulation yield of encapsulating structure be substantially also unsatisfactory for technological standards, cause the waste of packaging cost.

Therefore, the present invention provides a kind of method for packing and encapsulating structure, there is provided some single image sensing chips, institute Stating image sensing chip has video sensing area and the pad around the video sensing area；PCB substrate, PCB substrate table are provided Face is formed with metal level；Image sensing flip-chip is placed in the top of PCB substrate, and pad and metal level electrical connection；Formed It is covered in the plastic packaging layer of layer on surface of metal and image sensing chip surface；Formed in plastic packaging layer and expose layer on surface of metal Through hole；The solder-bump of the full through hole of filling is formed, and solder-bump top is higher than plastic packaging layer surface；Along Cutting Road area PCB substrate is cut in domain, forms some single encapsulating structures.Packaging technology of the present invention is simple, and image sensing chip experiences in itself Encapsulation procedure is few so that encapsulating structure has preferable encapsulation performance and a reliability, and encapsulating structure thinner thickness.

It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the present invention Specific embodiment be described in detail.

Fig. 2 to Figure 18 is the structural representation of encapsulation process provided in an embodiment of the present invention.

Refer to Fig. 2 and Fig. 3, Fig. 3 is cut-away section structural representations of the Fig. 2 along line of cut AA1 directions, there is provided to be packaged Wafer 200, the wafer to be wrapped 200 has the first face and second face relative with first face, the wafer to be wrapped 200 the first face is formed with some video sensing areas 201 and the pad 202 around the video sensing area 201.

In this implementation, the wafer to be wrapped 200 includes some chip areas 210 arranged in arrays and positioned at chip region The first Cutting Road region 220 between domain 210, the chip area 210 is used to form image sensor dice, subsequently along the One Cutting Road region 220 to wafer to be wrapped 200 cut forming several discrete crystal grain, and each crystal grain is correspondingly formed One image sensing chip.

The face of chip area 210 first of the wafer to be wrapped 200 has video sensing area 201 and around the image sense The pad 202 in area 201, the chip area 210 is answered to be also formed with the metal for electrically connecting video sensing area 201 and pad 202 Interconnection structure (not shown), be formed with the video sensing area 201 image sensor unit and with image sensor list Ambient is received and converted into electrical signal by the associated circuit that unit is connected, video sensing area 201, and the electricity is believed Number by metal interconnection structure and pad 201 and the metal level that is subsequently formed, external circuit is sent to.

In the present embodiment, as shown in figure 4, overlooking the structure diagrams of the Fig. 4 for one single chip region 210, for the ease of cloth Line, video sensing area 201 is located at the centre position in one single chip region 210, and pad 202 is located at the margin location of chip area 210 Put, and the pad 202 is located at four sides in video sensing area 201, rectangular distribution, each side is formed with several pads , subsequently with metal level be connected pad 202 by 202 (quantity of pad 202 depends on the type of chip), and shadow is made by metal level As sensor chip is connected with external circuit.

It should be noted that in other embodiments, the position in pad 202 and video sensing area 201 can be according to reality The requirement of technique is adjusted flexibly, for example, in the present embodiment, pad is located at four sides in video sensing area 201, in other embodiment In, pad and the side positioned at video sensing area, both sides or three sides, and the quantity of the pad of each side can be according to actual process It is required that being adjusted flexibly.

In the present embodiment, the pad 202 of different chip areas 210 is independently arranged；In other embodiments, in phase The pad being connected can be formed in adjacent chip area, that is, the pad for being formed crosses over the first Cutting Road region, due to subsequently cutting After cutting wafer to be wrapped, the pad across the first Cutting Road region can be cut to be held, therefore does not interfere with image sensing core The electric property of piece.

Fig. 5 is refer to, metal coupling 203 is formed on the surface of the pad 202.

Top of the top of the metal coupling 203 higher than photo-sensitive cell in video sensing area 201.

The metal coupling 203 act as：On the one hand, make pad 202 and be subsequently formed by the metal coupling 203 Metal level electrical connection；On the other hand, by setting the top of the top higher than video sensing area 201 of the metal coupling 203, When subsequently pad 202 is electrically connected with the metal layer, prevent the surface of metal level from encountering video sensing area 201, play protection image The effect of induction zone 201, so as to improve encapsulation yield.

Being shaped as the metal coupling 203 is square or spherical.The present embodiment is with the side of being shaped as of the metal coupling 203 Do exemplary illustrated as a example by shape, the formation process of the metal coupling 203 is screen printing technique.

As one embodiment, use screen printing technique formed the specific process of the metal coupling 203 for：Tool is provided Meshed web plate, the mesh corresponding with the position of metal coupling 203 (that is, the position of described network interface card and the position of pad 202 Put corresponding)；Web plate is fitted with the first face of wafer to be wrapped 200 so that the mesh in web plate exposes the table of pad 202 Face, brushes into materials such as gold, tin or tin alloys in mesh, removes the meshed half tone of tool, is formed on the surface of pad 202 Metal coupling 203.

The material of the metal coupling 203 can be gold, tin or tin alloy, the tin alloy can for tin silver, tin-lead, SAC, tin silver-colored zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver antimony etc..

In other embodiments, when being shaped as spherical of metal coupling, the formation process of the metal coupling is：Plant ball work Skill or screen printing and reflux technique.

It should be noted that in the present embodiment, being formed before reduction processing is carried out to the face of wafer to be wrapped 200 second The metal coupling 203, because the thickness of wafer to be wrapped 200 is thicker so that wafer to be wrapped 200 has extraordinary machinery Intensity, so as to the technical process for avoiding the formation of metal coupling 203 causes wafer to be wrapped 200 problem of rupture occur；Also, Metal coupling 203 is formed before thinning wafer to be wrapped 200 so that the encapsulation procedure of the experience of wafer to be wrapped 200 after thinning Tail off, therefore, it can further to reduce the thickness that wafer to be wrapped 200 after follow-up thinning wafer to be wrapped 200 has so that after The thickness of the continuous encapsulating structure for being formed is thinner, is more beneficial for meeting semiconductor miniaturization, the development trend of miniaturization.

In an alternative embodiment of the invention, it is also possible to after reduction processing is carried out to the face of wafer to be wrapped second, in pad Surface forms metal coupling.

Fig. 6 is refer to, the second face to the wafer to be wrapped 200 carries out reduction processing.

Specifically, the back side of the wafer to be wrapped 200 is ground, until the thickness of wafer to be wrapped 200 is to predetermined thickness, The grinding can be mechanical lapping or cmp.

Because the second face of wafer to be wrapped 200 is typically formed without function element (for example, pad and video sensing area), Therefore, the second face of wafer to be wrapped 200 is carried out a certain degree of thinning, had both ensured function element in wafer to be wrapped 200 Performance be not affected, it is also possible to make the thinner thickness of the encapsulating structure being subsequently formed.

Also, wafer to be wrapped 200 (the image sensing chip of i.e. any single) will not subsequently be carried out in the present embodiment Etching forms the technique of through hole, and the manufacturing process for subsequently being carried out in itself to image sensing chip is less, therefore, image sensing chip There need not be mechanical strength very high, i.e., after thinning wafer to be wrapped 200, image sensing chip can have less pre- Determine thickness, make the thickness of the encapsulating structure being subsequently formed thin as far as possible.

And in the prior art, after thinning wafer to be wrapped, rear extended meeting etching wafer to be wrapped exposes pad to be formed Through hole, therefore, it is thinning after wafer to be wrapped need with larger predetermined thickness so that wafer to be wrapped have it is enough Mechanical strength, prevents the problem of image sensing chip rupture, therefore, prior art after the completion of packaging technology, formation Image sensing chip-packaging structure has thicker thickness.

Fig. 7 is refer to, the wafer to be wrapped 200 is cut along the first Cutting Road region 220, formed some single Image sensing chip 230.

The cutting technique is laser cutting or slicer cutting.Because laser cutting parameter has smaller otch wide Degree, therefore, the wafer to be wrapped 200 is cut using laser cutting parameter in the present embodiment, form some single image sensings Chip 230.

Image sensing chip 230 with some matrix arrangements in wafer to be wrapped 200, in these image sensing chips In 230, may there is the poor image sensing chip 230 of some yields, the poor image sensing chip 230 of the yield Performance is not up to design requirement, if the image sensing chip 230 poor to these yields is packaged, the encapsulating structure of formation Also it is difficult in input practical application, therefore, the image sensing chip 230 poor to yield is packaged and can both cause packaging cost Waste, will also result in packaging efficiency low.

And in the present embodiment, after cutting wafer to be wrapped 200 forms some single image sensing chips 220, select good The image sensing chip 230 that rate meets technological standards carries out follow-up packaging technology, it is to avoid the waste of packaging cost and raising envelope Dress efficiency.

Refer to Fig. 8, there is provided PCB substrate 204, the PCB substrate 204 includes some functional areas 240 and positioned at adjacent The second Cutting Road region 250 between functional areas 240.

It is follow-up that in the top upside-down mounting of 204 functional areas of the PCB substrate 240, image sensing chip 230 is set, to be packaged work Skill；And in the last of packaging technology, PCB substrate 204 is cut along the second Cutting Road region 250, to form single encapsulating structure. The area in the area of the functional areas 240 and the second Cutting Road region 250 can set according to actual package process requirements.

The PCB substrate 204 is provided a supporting role for image sensor dice 230, also, follow-up in the table of PCB substrate 204 After face forms patterned metal level, the patterned metal level is used to connect pad 202 and external circuit, makes image sensing Chip 230 is electrically connected with external circuit.

It is cheap due to PCB substrate 204, can greatly reduce packaging cost；Also, the area of PCB substrate 204 Can be made thin big, therefore subsequently can carry out one in the greater number of image sensing chip 230 of top upside-down mounting of PCB substrate 204 After the packaging technology of series, more encapsulating structure can be formed, effectively raise packaging efficiency；Simultaneously as PCB substrate The particularity of 204 material and existing PCB processing procedures so that the technical process for being subsequently formed plastic packaging layer can use PCB systems Plastic packaging (molding) technique in journey is carried out, and can further reduce packaging cost.

Can be according to actual process it needs to be determined that the size of PCB substrate 204.

Please continue to refer to Fig. 8, the hole 207 through PCB substrate 204 is formed in the PCB substrate 204.

The position of described hole 207 corresponds to the position in video sensing area 201 after the upside-down mounting of subsequent images sensing chip 230. Formed described hole 207 purpose be：After being subsequently formed encapsulating structure, ambient propagates to shadow by described hole 207 As induction zone 201, video sensing area 201 receives light and is converted into electrical signal.

In the present embodiment, in order that video sensing area 201 farthest receives ambient, the width of hole 207 is big In or equal to video sensing area 201 width.

The horizontal plane section shape of described hole 207 is square, circular or other shapes, and the present embodiment is with described hole 207 horizontal plane section shape is to do exemplary illustrated as a example by square.

Described hole 207 is formed using punching press or bore process.

Fig. 9 is refer to, in the forming metal layer on surface 208 of 204 functional areas of the PCB substrate 240, in same functional areas 240 The metal level on surface has opening 209.

In the present embodiment, due to having hole 207 in PCB substrate 204, then the opening 209 is located at the upper of hole 207 Side, and for Simplified flowsheet step, reduction technology difficulty, the shape of the opening 209 is identical and described with the shape of hole 207 The width of opening 209 is identical with the width of hole 207.

In the present embodiment, the metal level 208 on the surface of adjacent functional area 240 is connected, i.e., metal level 208 is except positioned at PCB bases Outside the surface of 204 functional areas of plate 240, the metal level 208 is also covered in the surface of the second Cutting Road region 250, and formation is covered in tool The metal level 208 on the PCB substrate surface of hole 207；Due to the second Cutting Road region 250 can finally be cut in packaging technology Cut open, the metal level 208 across the second Cutting Road region 250 is cut and opens, therefore do not interfere with single encapsulating structure Performance.

The material of the metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.Because the PCB substrate 204 has Special performance, therefore, the metal level 208 can be formed using conventional PCB processing procedures, for example, using sputtering technology or deposition Technique forms the metal level 207.

Because the material of PCB substrate 204 is generally resinous material, in the forming metal layer on surface 208 of the PCB substrate 204 Afterwards, between the metal level 208 and PCB substrate 204 have very strong adhesiveness, raising be subsequently formed encapsulating structure can By property.

There are some openings 209, subsequently the image sense after pad 202 is connected with metal level 208 in the metal level 208 Area 201 is answered to be located at the top of opening 209.The width of the width more than or equal to video sensing area 201 of the opening 209, so that shadow As the reception ambient of the energy maximum magnitude of induction zone 201.

In the embodiment of the present invention, the same surface of functional areas 240 of PCB substrate 204 forms some discrete metal levels 208, and The quantity and position phase of the pad 202 that the quantity of discrete metal level 208 and position have with single image sensor dice 230 Correspondence, for example, the side of video sensing area 201 4 of image sensor dice 230 is each formed with pad 202, then be open 209 four sides Be each formed with metal level 208, and discrete metal levels 208 of the opening 209 per sides quantity and video sensing area 201 corresponding The quantity of the pad 202 of side is identical, and each discrete correspondence of metal level 208 is connected with a pad 202；In the present invention In other embodiment, the relative both sides in video sensing area are formed with pad, then the relative both sides that are open are formed with metal level, and open Mouth is identical with the quantity of the pad of the corresponding side in video sensing area per the quantity of the discrete metal level in side.

In the present embodiment, the area of PCB substrate 204 can be made thin big so that PCB substrate 204 has more functional areas 240, each functional areas 240 correspondence is subsequently formed an encapsulating structure, therefore, on the basis of one piece of PCB substrate 204, Substantial amounts of encapsulating structure can be subsequently formed in one encapsulation cycle, packaging efficiency is improved.

Continuation Fig. 9 is refer to, adhesive tape layer 206, the closing described hole 207 of adhesive tape layer 206 are formed at the back side of PCB substrate 204.

The back side of the PCB substrate 204 refers to the one side for being formed without metal level 208, and the adhesive tape layer 206 is used for cap holes 207 one end, can prevent video sensing area 201 in external environment condition in follow-up potting process, prevent image Induction zone 201 is contaminated or damages.

The material of the adhesive tape layer 206 is UV (Ultraviolet Rays, ultraviolet) dispergation rubber belt materials or pyrolysis glue Rubber belt material or other suitable rubber belt materials, the adhesive tape layer 206 directly paste the back side for being formed in PCB substrate 204, are formed Process is simple, adhesive tape layer 206 can be very good protection video sensing area 201 in encapsulation process will not be contaminated or damage, After encapsulating structure is formed, very easily adhesive tape layer 206 can subsequently removed by way of UV light irradiations or heating, taken off Except when also will not to video sensing area 201 produce damage or pollute.

In other embodiments, the material of adhesive tape layer can also be IR (infra-red) glass or AR (anti- Reflection) glass.

Figure 10 is refer to, the image sensing chip 230 upside-down mounting is placed in the top of 204 functional areas of PCB substrate 240, and institute State pad 202 and metal level 208 is electrically connected.

In the present embodiment, select yield and meet the upside-down mounting of image sensing chip 230 of standard and be placed in the top of PCB substrate 204.

Specifically, the pad 202 is connected with metal level 208 by metal coupling 203, and each pad 202 pairs Ying Yuyi discrete metal level 208.Pad 202 is connected with metal level 208 using solder bonds technique, the pad 202 and metal level 208 welded together by the material in metal coupling 203.

The solder bonds technique is eutectic bonding, ultrasonic thermocompression, thermal compression welding, ultrasonic wire bonding etc..For example, when described When the material of metal level 208 is Al, the material of the metal coupling 203 is Au, and solder bonds technique is ultrasonic thermocompression mode；When When the material of the metal level 208 is Au, the material of the metal coupling 203 is Sn, and solder bonds technique is eutectic bonding side Formula.

After pad 202 is connected with metal level 208, video sensing area 201 is located at the top of opening 209, and extraneous light leads to Hole 207 is crossed through the video sensing area 201 that the top of opening 209 is propagated to after PCB substrate 204, is beneficial to video sensing area 201 Receive extraneous light；Also, in the present embodiment, the width of the width more than video sensing area 201 of opening 209 can make image Induction zone 201 receives extraneous light to greatest extent, improves the light utilization in video sensing area 201.

Simultaneously as thickness of the thickness of metal coupling 203 more than photo-sensitive cell in video sensing area 201 so that inciting somebody to action When image sensing chip 230 is inverted in 204 top of PCB substrate, video sensing area 201 will not touch the surface of metal level 208, prevent Only video sensing area 201 sustains damage.

Figure 11 is refer to, formation is covered in the surface of the metal level 208 and the face of image sensing chip 230 second and side wall The plastic packaging layer 211 on surface.

Form acting as the plastic packaging layer 211：On the one hand, the plastic packaging layer 211 of formation plays protection image sensing chip 230 effect, prevents the performance failure of image sensing chip 230 caused under the influence of external environment, prevents moisture by outside Invade and external electrical insulation；On the other hand, the plastic packaging layer 211 plays a part of support image sensing chip 230, by shadow Connected in order to follow-up circuit as sensing chip 230 is fixed, also, after packaging is accomplished so that chip is hardly damaged；Separately Outward, the plastic packaging layer 211 also acts as the effect of the solder-bump that fixation is subsequently formed, for solder-bump provides protection.

The plastic packaging layer 211 is formed using plastic package process (molding), the plastic package process uses branch mode or pressing Mode, the top surface of the plastic packaging layer 211 and the face of image sensing chip 230 second are flush or above image sensing chip 230 Second face.

Due to providing the support image sensing of PCB substrate 204 chip 230 in the present embodiment, according to the special of PCB substrate 204 Property, and the quantity of image sensing chip 230 of the top of PCB substrate 204 is more (area of PCB substrate 204 is larger), the plastic packaging work Skill can be carried out using the plastic package process in PCB processing procedures, compared with the plastic package process in using wafer level packaging processing procedure, PCB systems The relatively low of cost of the plastic package process in journey.The present embodiment forms the plastic packaging layer 211 using the plastic package process in PCB processing procedures, bright It is aobvious to reduce the difficulty of plastic package process, and reduce packaging cost.Formed by the way of whole module or some separate modules The plastic packaging layer 211.

In the present embodiment, the plastic packaging layer 211 is formed by the way of whole module, i.e. to the PCB substrate 204 of monoblock The metal level 208 and image sensing chip 230 of top carry out plastic package process, and the plastic packaging layer 211 of formation is removed and is covered in functional areas 240 Metal level 208 and image sensing chip 230 outside, be also covered in the surface of metal level 208 in the second Cutting Road region 250.Using When the mode of whole module forms plastic packaging layer 211, alignment issues can be avoided, so as to reduce the difficulty of plastic package process.

In other embodiments, when plastic packaging layer 211 are formed by the way of some separate modules, a modeling for module Sealing 211 is at least covered in the surface of metal level 208 and the face of image sensing chip 230 second in One function area 240, such as Figure 12 Shown, plastic packaging layer 211 can cover the metal level 208 of whole functional areas 240, also can the only area of covering function area 240 Metal level 208.As a specific embodiment, while the method for forming the plastic packaging layer 211 with some separate modules For：Using multiple moulds, and in each mould fill plastic packaging layer 211 material, by mold compresses PCB substrate 204 metal level 208 surfaces, carry out drying and processing recession except mould, form the plastic packaging layer 211 with some separate modules.

The material of the plastic packaging layer 211 is resin or anti-solder ink material, for example, epoxy resin or acrylic resin.

Figure 13 is refer to, through hole 212 is formed in plastic packaging layer 211, the bottom-exposed of the through hole 212 goes out metal level 208 surfaces.

Specifically, the through hole 212 formed in the present embodiment exposes the surface of metal level 208.The purpose for forming through hole 212 exists In, solder-bump is subsequently formed in through hole 212, metal level 208 is electrically connected with external circuit by solder-bump, so that real The electrical connection of existing pad 202 and external circuit so that the encapsulating structure formed after encapsulation can be put into practical application.

The through hole 212 is formed using laser boring technique or etching technics.As one embodiment, using etching technics The processing step for forming through hole 212 includes：Patterned mask layer is formed on 211 surface of plastic packaging layer, it is described patterned There is groove, the position of the groove and width correspond to position and the width for being subsequently formed through hole 212 in mask layer；With described Patterned mask layer is mask, etches the plastic packaging layer 211 until exposing the surface of metal level 208, in plastic packaging layer 211 It is interior to form the through hole 212 for exposing the surface of metal level 208；Remove the patterned mask layer.

The quantity of the through hole 212 of formation is identical with the quantity of pad 202, in other words, the quantity of the through hole 212 with it is discrete Metal level 208 quantity it is identical, each top of discrete metal level 208 is each formed with a through hole 212 so that image is passed Each pad 202 of sense chip 230 can be electrically connected with external circuit.

In the present embodiment, by way of forming through hole 212 in plastic packaging layer 211, realize pad 202 with external circuit electricity The purpose of connection, it is to avoid the harmful effect that through hole brings is formed in image sensing chip 230, the envelope being subsequently formed is improve The performance of assembling structure.

In the technical process for forming through hole 212, due to the presence of adhesive tape layer 206, video sensing area 201 is close in one In envelope chamber, prevent the technique to form through hole 212 from causing damage or impurity to enter in video sensing area 201 to video sensing area 201.

Figure 14 is refer to, the solder-bump 215 of the full through hole 212 (refer to Figure 13) of filling, and the welding is formed Raised 215 top is higher than 211 surface of plastic packaging layer.

Pad 202 is set to be electrically connected with external circuit by the solder-bump 215, so that image sensing chip 230 is just Often work.

The crest surface shape of the solder-bump 215 is arc, and the material of solder-bump 215 is gold, tin or tin alloy, The tin alloy can for tin silver, tin-lead, SAC, tin silver-colored zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or Tin silver antimony etc..

Used as one embodiment, the material of solder-bump 215 is tin, is included the step of form solder-bump 215：Shape Into the metal material of the full through hole 212 of filling, using reflux technique, the solder-bump 215 is formed.

Used as a specific embodiment, the distance between top of the solder-bump 215 to the top of plastic packaging layer 211 is 20 μm To 100 μm.

The surface of most solder-bump 215 is coated by plastic packaging layer 211, only retains few surface of solder-bump 215 and exists In external environment, effectively prevent solder-bump 215 from being aoxidized by external environment, the reliability of the encapsulating structure that raising is subsequently formed Property and stability.Also, solder-bump 215 is formed in plastic packaging layer 211, the top of the solder-bump 215 is slightly above plastic packaging 211 surface of layer, you can make image sensing chip 230 be electrically connected with external circuit, and the top of solder-bump 215 is slightly above plastic packaging layer 211 surfaces (distance of the top of solder-bump 215 to 211 surface of plastic packaging layer is 20 μm to 100 μm), can further reduce follow-up shape Into encapsulating structure integral thickness, be conducive to improve encapsulation integrated level.

Refer to Figure 15, along the second Cutting Road region 250 (refer to Figure 14) cut plastic packaging layer 211 and PCB substrate 204, forms some single encapsulating structures.

In the present embodiment, using slicer cutting or laser cutting parameter cut plastic packaging layer 211, metal level 208, PCB substrate 204 and adhesive tape layer 206, form some single encapsulating structures.

The cutting technique only carries out cutting process to PCB substrate 204, plastic packaging layer 211 and metal level 208, it is to avoid right The cutting process of image sensing chip 230；Also, form tool after reduction processing is carried out to wafer to be wrapped due to foregoing There is the image sensing chip 230 of lower thickness, therefore, the thinner thickness of the encapsulating structure that the present embodiment is formed；Meanwhile, this implementation The packaging technology that example forms encapsulating structure is simple, and few (the image sensing core of the encapsulation procedure carried out to image sensing chip 230 Piece 230 itself only experienced encapsulation procedure that is thinning, forming metal coupling 203 and once cut) so that encapsulating structure has Extraordinary encapsulation performance, encapsulation yield gets a promotion；Finally, the present embodiment can select the preferable image sensing chip of yield 230 are packaged, and so as to further increase encapsulation yield, effectively reduce packaging cost.

Also, the support image sensing of PCB substrate 204 chip 230 is provided in the present embodiment, on the one hand, PCB substrate 204 It is cheap, reduce packaging cost；On the other hand, the area of PCB substrate 204 can be made thin big, therefore, it is inverted in PCB The quantity of the image sensing chip 230 on substrate 204 is more, and more encapsulation knot can be formed within a packaging technology cycle Structure, so as to greatly improve packaging efficiency；Simultaneously as the particularity of PCB substrate 204, can when plastic packaging layer 211 is formed Using the plastic package process in PCB processing procedures, compared with the plastic package process in silicon wafer process, packaging cost is further reduced.

During cutting technique, adhesive tape layer 206 is protected video sensing area 201 not to be cut technique and is destroyed, so as to carry Encapsulation performance high.

After the completion of packaging technology, and before upper camera lens module, the adhesive tape layer 206 can be removed.

When the material of the adhesive tape layer 206 is UV dispergation adhesive tapes, using adhesive tape layer 206 described in UV light irradiations, then take off Except the adhesive tape layer 206, the video sensing area 101 of the top of hole 207 is exposed.

When the material of the adhesive tape layer 206 is for pyrolysis glue adhesive tape, the adhesive tape layer 206 is heated, then removed The adhesive tape layer 206.

Accordingly, the present embodiment provides a kind of encapsulating structure, refer to Figure 15, and the encapsulating structure includes：

PCB substrate 204；

Positioned at some discrete metal level 208 on the surface of the PCB substrate 204；

Be inverted in the image sensing chip 230 of the top of PCB substrate 204, the image sensing chip 230 have the first face and Second face relative with first face, the face of the image sensing chip 230 first has video sensing area 201 and around described The pad 202 in video sensing area 201, and the pad 202 and metal level 208 electrically connect；

Positioned at the plastic packaging layer 211 on the surface of the metal level 208 and the surface of image sensing chip 230；

Through hole in plastic packaging layer 211, and the through hole exposes the surface of metal level 208；

The solder-bump 215 of the full through hole of filling, and the top of the solder-bump 215 is higher than 211 surface of plastic packaging layer.

There is the hole 207 through PCB substrate 204, and 201, video sensing area in the present embodiment, in PCB substrate 204 In the top of hole 207, the width of the width more than or equal to video sensing area 201 of hole 207.

In embodiments of the present invention, adhesive tape layer 206, the blind hole of the adhesive tape layer 206 are formed with the back side of PCB substrate 204 The one end in hole 207, to prevent impurity from dropping in video sensing area 201, it is to avoid video sensing area 201 sustains damage.

There is the opening 209 for exposing PCB substrate 204, the video sensing area 201 is located at and opens in the metal level 208 The top of mouth 209, video sensing area 201 can receive ambients by the opening 209, and in the present embodiment, the opening 209 is wide Degree is more than the width of video sensing area 201, improves 201 pairs, area of the video sensing utilization rate of light.

The position of the metal level 208 and quantity are corresponding with the position of pad 202 and quantity.Specifically, working as image sense When answering the side of area 201 4 to be respectively provided with some pads 202, then the side of hole 207 4 is respectively provided with some discrete metal levels 208, and each Individual discrete metal level 208 is connected corresponding to a pad 202.In other embodiments, when the side of video sensing area 201 has When having some pads, then described hole side has the discrete metal level of equal number.

The material of the metal level 208 is Cu, Al or W.

In the present embodiment, the metal level 208 is flushed away from the side wall of the opening 209 with the side wall of PCB substrate 204.

The encapsulating structure also includes：Metal coupling 203, the metal coupling 203 is located at pad 202 and metal level 208 Between, the pad 202 and metal level 208 are electrically connected by the metal coupling 203.Specifically, passing through the metal coupling 203 connection pad 202 and metal levels 208.

The quantity of the metal coupling 203 and position are corresponding with the quantity of pad 202 and position, i.e. metal coupling 203 Quantity it is identical with the quantity of pad 202, and the spacing of adjacent metal projection 203 and the spacing of adjacent pad 202 are equal so that Each pad 202 can be connected with a metal level 208, so as to realize the purpose that pad 202 is electrically connected with external circuit.

Being shaped as the metal coupling 203 is square or spherical, and the material of the metal coupling 203 is that tin, gold or tin are closed Gold.

In the present embodiment, the top shape of the solder-bump 215 is spherical, the material of the solder-bump 215 is tin, Gold or tin alloy.

The encapsulating structure that the present embodiment is provided, plastic packaging layer 211 envelopes image sensing chip 230, prevents external environment Image sensing chip 230 is had undesirable effect, the reliability and stability of encapsulating structure are improved；Formed in plastic packaging layer 211 There is the through hole for exposing the surface of metal level 208, solder-bump 215 is formed with through hole, pad is made by solder-bump 215 212 electrically connect with external circuit, have both avoided the damage or pollution caused in itself to image sensing chip 230, make encapsulating structure Encapsulation performance be improved；Also, the major part of solder-bump 215 is enveloped by plastic packaging layer 211, reduces solder-bump 215 The area contacted with external environment, so as to the possibility that solder-bump 215 is oxidized or is damaged by other greatly reduces, Further improve the reliability of encapsulating structure.

Meanwhile, as can be seen that compared with prior art, forming the encapsulation knot that the present embodiment is provided from the encapsulating structure In packaging technology in structure, substantially than prior art, much less for the encapsulation procedure in effect image sensing chip 230, the present embodiment The thickness of the image sensing chip 230 in encapsulating structure is less than the thickness of the image sensing chip of prior art, therefore, this implementation The thickness of encapsulating structure is significantly less than the thickness of the encapsulating structure of prior art in example.

Also, the distance due to the top of solder-bump 215 to 211 surface of plastic packaging layer is very small, is 20 μm to 100 μm, because This, area very little of the solder-bump 215 in external environment, the effective reliability for improving encapsulating structure；Simultaneously as Distance of the top of solder-bump 215 to 211 surface of plastic packaging layer is very small, further reduces the thickness of encapsulating structure.

Another embodiment of the present invention also provides a kind of method for packing, and Figure 16 to Figure 20 is passed for another embodiment of the present invention image The cross-sectional view of sensor encapsulation process is, it is necessary to explanation, structure same with the above-mentioned embodiment in the present embodiment Parameter and effect etc. are limited and repeated no more in the present embodiment, specifically refer to above-described embodiment.

Refer to Figure 16, there is provided some single image sensing chips 230, the image sensing chip 230 has image Induction zone 201 and the pad 202 around the video sensing area 201.

The forming step of the image sensing chip 230 and metal coupling 203 refers to the explanation of previous embodiment, This is repeated no more.

Refer to Figure 17, there is provided PCB substrate 204, the PCB substrate 204 includes some functional areas 240 and positioned at adjacent The second Cutting Road region 250 between functional areas 240；Formed in the functional areas 240 of the PCB substrate 205 and run through PCB substrate 204 hole 207；Form some discrete metal levels 208 on the surface of the PCB substrate 204, and same functional areas 240 gold The opening 209 for exposing the surface of PCB substrate 204 is formed with category layer 208；Metal coupling is formed on the surface of the metal level 208 203；Adhesive tape layer 206, the opening of the one end of 206 cap holes of the adhesive tape layer 207 are formed at the back side of PCB substrates 204.

Width of the width of described hole 207 more than or equal to video sensing area 201.

In the present embodiment, in order to save packaging technology cost, the metal level 208 is only located in functional areas 240, second The surface of Cutting Road region 250 does not form metal level 208.The metal level 208 can be formed using PCB making technologies, for example, sputtering Or depositing operation, with reference to etching technics in the forming metal layer on surface 208 of 204 functional areas of PCB substrate 240.

Specifically, used as one embodiment, the processing step for forming the metal level 208 includes：In the PCB substrate 204 surfaces form metal film；Patterned mask layer is formed in the metallic film surface；With the mask layer as mask, removal The metal of the metal film positioned at the surface of the second Cutting Road region 250 and the area near the second Cutting Road region 250 Film, forms some discrete metal levels 208, exposes between the side wall of metal level 208 and the border of the second Cutting Road region 250 The surface of 204 functional areas of PCB substrate 20.

In the present embodiment, after the metal level 208 is formed, the side wall of metal level 208 and the second Cutting Road area are exposed The surface of 204 functional areas of PCB substrate 240 between the border of domain 250, it is advantageous in that, subsequently when plastic packaging layer is formed, plastic packaging layer covers The surface of 204 functional areas of PCB substrate 240 for exposing is placed on, so that the side wall of metal level 208 is enveloped by plastic packaging layer 211, There is unnecessary electrical connection in the side wall and external circuit for preventing metal level 208, be also prevented from the material of metal level 208 by oxygen Change, so as to improve the reliability for being subsequently formed encapsulating structure.In other embodiments, the side wall of the metal level 208 can also Positioned at the boundary in the second Cutting Road region 250.

The material of the metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.

Pad in the position of metal level 208 discrete in same functional areas 240 and quantity and image sensing chip 230 202 position is corresponding with quantity.Subsequently when image sensing chip 230 is inverted in PCB substrate 204, video sensing area 201 are located at the top of opening 209 so that video sensing area 201 can receive extraneous light.In the present embodiment, the opening 209 Width of the width more than video sensing area 201.

It should be noted that in other embodiments, metal level is covered in PCB substrate functional areas and Cutting Road region table Face.

The quantity of the metal coupling 203 and position correspond to quantity and the position of pad 202, adjacent metal projection 203 Spacing it is equal with the spacing of adjacent pad 202, that is to say, that image sensing chip 230 is subsequently being inverted in PCB substrate When on 204, each metal coupling 203 is in contact corresponding to a surface of pad 202.

In the present embodiment, metal coupling 203 is formed on 204 metal level of PCB substrate 208 surface, it is to avoid in the table of pad 202 Face forms the encapsulation procedure of metal coupling 203, therefore the encapsulation procedure of image sensing chip 230 experience itself is further reduced, So as to the harmful effect for avoiding encapsulation procedure from bringing image sensing chip 230 so that image sensing chip 230 keeps higher Performance.

Figure 18 is refer to, the image sensing chip 230 is inverted in the top of 204 functional areas of PCB substrate 240, pad 202 Electrically connected by metal coupling 203 with metal level；Form the He of metal level 208 in the covering functional areas 240 of PCB substrate 204 The plastic packaging layer 211 on the surface of image sensing chip 230.

By metal coupling 203 and the solder bonds of pad 202, so as to realize the electrical connection between pad 202 and metal level.Tool Body, each metal coupling 203 is corresponded to and the solder bonds of pad 202 so that pad 202 and discrete metal level 208 It is connected.

Solder bonds technique is eutectic bonding, ultrasonic thermocompression, thermal compression welding or ultrasonic wire bonding.

The plastic packaging layer 211 is formed using plastic package process.In the present embodiment, due to the particularity of the material of PCB substrates 204 And the particularity of PCB processing procedures, the present embodiment can form the plastic packaging layer 211 using the plastic package process in PCB processing procedures, it is to avoid adopt The problem that packaging cost is high and encapsulation difficulty is big brought with the plastic package process in silicon wafer process, the present embodiment uses PCB processing procedures In plastic package process formed plastic packaging layer 211, reduce packaging cost and encapsulation difficulty.

The plastic packaging layer 211 is formed by the way of whole module or some separate modules.

In the present embodiment, the plastic packaging layer 211 is located in functional areas 240, and the surface of the second Cutting Road region 250 is not formed Have plastic packaging layer 211, i.e. form plastic packaging layer 211 by the way of some separate modules, a plastic packaging layer 211 for module to The surface of metal level 208 and the face surface of image sensing chip 230 second being covered in less in One function area 240.Need explanation It is that 211 border of plastic packaging layer in same functional areas 240 both can be located in functional areas 240, it is also possible to the second Cutting Road region 250 overlapping margins.

In the present embodiment, the plastic packaging layer 211 of formation is covered in the sidewall surfaces of metal level 208 in same functional areas 240, prevents The side wall of metal level 208 is only subsequently formed after encapsulating structure in external environment, thus improve encapsulating structure reliability and Stability.

In other embodiments of the present invention, the plastic packaging layer of formation can also be covered in the second Cutting Road region surface, i.e. adopt The plastic packaging layer is formed with the mode of whole module.

Figure 19 is refer to, through hole is formed in plastic packaging layer 211, the via bottoms expose the surface of metal level 208； The solder-bump 215 of the full through hole of filling, and the top of the solder-bump 215 are formed higher than 211 surface of plastic packaging layer.

The effect of the solder-bump 215 of formation and benefit refer to the description of previous embodiment, will not be repeated here.

Figure 20 is refer to, cutting the PCB substrate 204 along the second Cutting Road region 250 (refer to Figure 19) (please join Examine Figure 19), form some single encapsulating structures.

In cutting process, the adhesive tape layer 206 prevents the impurity that cutting process is produced from pounding in video sensing area 201 It is interior, it is to avoid video sensing area 201 is had undesirable effect.

In the present embodiment, the side wall of metal level 208 has a certain distance from the border of the second Cutting Road region 250, therefore, edge Second Cutting Road region 250PCB substrate 204, forms some single encapsulating structures.Because cutting technique does not cut metal level 208, therefore the side wall of metal level 208 is still by the covering of plastic packaging layer 211, so as to prevent the side wall of metal level 208 from exposing external environment In, improve the reliability and stability of encapsulating structure.

In the present embodiment, seldom (image sensing chip 230 only experienced to act on the encapsulation procedure of image sensing chip 230 Thinning and cutting process) so that image sensing chip 230 keeps the yield of performance higher, the encapsulating structure of formation to be carried Rise, the encapsulation performance of encapsulating structure is excellent；Also, the present embodiment forms through hole by plastic packaging layer 211, and weldering is formed in through hole Raised 215 mode is connect, image sensing chip 230 is electrically connected with external circuit, further reduce packaging technology step, Packaging technology is simple；And the major part of solder-bump 215 is covered by plastic packaging layer 211, external environment is reduced convex to welding 215 harmful effect is played, the reliability and stability of encapsulating structure are improved；Simultaneously as image sensing chip 230 is thinned to Relatively thin thickness so that the encapsulating structure of formation also has relatively thin thickness.And the present embodiment can to select yield preferable Image sensing chip 230 is packaged, and greatly improves the encapsulation yield of packaging efficiency and encapsulating structure, reduces encapsulation work Skill cost.

Also, the support image sensing of PCB substrate 204 chip 230 is provided in the present embodiment, on the one hand, PCB substrate 204 It is cheap, so as to reduce packaging cost；On the other hand, the area of PCB substrate 204 can be made thin big, therefore, it is inverted in The quantity of the image sensing chip 230 in PCB substrate 204 is more, and more encapsulation can be formed within a packaging technology cycle Structure, so as to greatly improve packaging efficiency；Simultaneously as the particularity of PCB substrate 204, the energy when plastic packaging layer 211 is formed Enough using the plastic package process in PCB processing procedures, compared with the plastic package process in silicon wafer process, packaging cost is further reduced.

After the completion of packaging technology, and before upper camera lens module, the adhesive tape layer 206 is removed.

Accordingly, the present embodiment provides a kind of encapsulating structure, refer to Figure 20, and the encapsulating structure includes：

PCB substrate 204；

Positioned at the metal level 208 on the surface of the PCB substrate 204；

Be inverted in the image sensing chip 230 of the top of PCB substrate 204, the image sensing chip 230 have the first face and Second face relative with first face, the face of the image sensing chip 230 first is formed with some video sensing areas 201 and ring It is connected with metal level 208 around the pad 202 in the video sensing area 201, and the pad 202；

Positioned at the plastic packaging layer 211 of the surface of the metal level 208 and the face of image sensing chip 230 second and sidewall surfaces；

Solder-bump 215, the full through hole of the filling of shown solder-bump 215, and the top of the solder-bump 215 are higher than 211 surface of plastic packaging layer.

The surface of PCB substrate 204 has a discrete metal level 208, and the discrete metal level 208 position and quantity with The position of pad 202 is corresponding with quantity.Specifically, when the side of video sensing area 201 4 is respectively provided with some pads 202, then hole The side of hole 207 4 is respectively provided with some discrete metal levels 208.In other embodiments, when the side of video sensing area 201 have it is some During pad, then described hole side has the discrete metal level of equal number.

The material of the metal level 208 is Cu, Al or W.

In the present embodiment, the metal level 208 exposes the part surface of PCB substrate 204 away from the opening 209, institute State plastic packaging layer 211 and be covered in the part surface of PCB substrate 204 for exposing, and plastic packaging layer 211 is covered in metal level 208 sidewall surfaces, prevent the side wall of metal level 208 to be exposed in external environment, it is to avoid the metal level in external environment 208 there is unnecessary electrical connection with external circuit, and the material for being also prevented from metal level 208 is aoxidized by external environment, carried The reliability of encapsulating structure high.

The encapsulating structure also includes：Metal coupling 203, the metal coupling 203 be located at pad 202 and metal level it Between, the pad 202 and metal level are connected by the metal coupling 203.Specifically, being connected by the metal coupling 203 Pad 202 and metal level 208.

The position of the metal coupling 203 and quantity are corresponding with the position of pad 202 and quantity.Specifically, working as image When the side of induction zone 201 4 is respectively provided with some pads 202, then the side of hole 207 4 is respectively provided with the metal coupling 203 of equal number, and Spacing per side pad 202 is equal with the spacing of the metal coupling 203 of corresponding side.In other embodiments, image is worked as When the side of induction zone 201 has some pads 202, then the side of described hole 207 has the metal coupling 203 of equal number, and Spacing between metal coupling 203 is equal with the spacing between pad 202.

The encapsulating structure that the present embodiment is provided, plastic packaging layer 211 envelopes image sensing chip 230, prevents external environment Image sensing chip 230 is had undesirable effect, the reliability and stability of encapsulating structure are improved；Formed in plastic packaging layer 211 There is the through hole for exposing the surface of metal level 208, solder-bump 215 is formed with through hole, pad is made by solder-bump 215 202 electrically connect with external circuit, have both avoided the damage or pollution caused in itself to image sensing chip 230, make encapsulating structure Encapsulation performance be improved；Also, the major part of solder-bump 215 is enveloped by plastic packaging layer 211, reduces solder-bump 215 The area contacted with external environment, so as to the possibility that solder-bump 215 is oxidized or is damaged by other greatly reduces, Further improve the reliability of encapsulating structure.

Further embodiment of this invention also provides a kind of method for packing, and Figure 21 to Figure 23 is passed for further embodiment of this invention image The cross-sectional view of sensor encapsulation process is, it is necessary to explanation, structure same with the above-mentioned embodiment in the present embodiment Parameter and effect etc. are limited and repeated no more in the present embodiment, specifically refer to above-described embodiment.

Refer to Figure 21, there is provided some single image sensing chips 230, the image sensing chip 230 has image Induction zone 201 and the pad 202 around the video sensing area；PCB substrate 204 is provided, the PCB substrate 204 includes some Functional areas 210 and the second Cutting Road region 250 between adjacent functional area 240, the functional areas 240 of the PCB substrate 204 Surface is formed with metal level 208；The image sensing chip 230 upside-down mounting is placed in the top of the functional areas 240 of PCB substrate 204, and The pad 202 and metal level 208 are electrically connected.

The hole 207 through the PCB substrate 204 is formed in the PCB substrate 204, is had in the metal level 208 Opening 209, the video sensing area 201 is located at the top of opening 209, i.e., the upside-down mounting of image sensing chip 230 is being placed in into PCB substrate Behind the surface of 204 functional areas 240, video sensing area 201 is located at the top of hole 207, is beneficial to video sensing area 201 and receives the external world Light.In the present embodiment, the opening 209 is corresponding with the position of hole 207 and size is identical.

Also include step：Adhesive tape layer 206, the closing described hole 207 of the adhesive tape layer 206 are formed at the back side of PCB substrate 204 One end.The material of the adhesive tape layer 206 is UV dispergation rubber belt material, pyrolysis glue rubber belt material, IR glass or AR glass.

Also include step：Metal coupling 203, the pad are formed on the surface of the pad 202 or the surface of metal level 208 202 and metal level 208 electrically connected by metal coupling 203.

About image sensing chip 230, PCB substrate 204, metal level 208, metal coupling 203 description refer to it is foregoing Embodiment, will not be repeated here.

Figure 22 is refer to, formation is covered in the point glue-line 214 of the sidewall surfaces of image sensing chip 230；In the gold Category layer 208 surface forms solder-bump 215, and the top of the solder-bump 215 is higher than the surface of image sensing chip 230.

Described glue-line 214 can be covered in the partial sidewall surface of image sensing chip 230, it is also possible to be covered in image sensing Whole sidewall surfaces of chip 230.In the present embodiment, the point glue-line 214 of formation is also covered in the sidewall surfaces of metal coupling 203.

In the present embodiment, the point glue-line 214 of formation is also covered in the sidewall surfaces of metal coupling 203.

Described glue-line 214 makes video sensing area 201 be in sealing state, prevents external environment to image sensing chip 230 have undesirable effect.

As a specific embodiment, gluing process is carried out using point gum machine and forms described glue-line 214.

The material of the solder-bump 215 refers to the explanation of previous embodiment.In the present embodiment, using plant ball technique shape Into the solder-bump 215, the vertical range at the top of solder-bump 215 to the surface of image sensing chip 230 is 20 μm to 100 μ m。

Figure 23 is refer to, the PCB substrate 204 is cut along the second Cutting Road region 250, form some single encapsulation Structure.

The cutting technique refers to the explanation of previous embodiment, will not be repeated here.

In the present embodiment, because image sensing chip 230 only experienced cutting technique, (cutting wafer to be wrapped forms some Single image sensing chip 230), by way of forming solder-bump 215 on the surface of metal level 208, make image sensing chip 230 are electrically connected with external circuit, therefore the image sensing chip 230 maintains performance higher, so that formed The encapsulation performance of encapsulating structure is good.

Also, (concrete reason refers to foregoing due to the thinner thickness of image sensing chip 230 that is provided in the present embodiment The explanation of embodiment), therefore, the thickness of the encapsulating structure of formation reduces.Meanwhile, method for packing provided in an embodiment of the present invention, Packaging technology is more simple.

Accordingly, this implementation provides a kind of encapsulating structure, refer to Figure 23, and the encapsulating structure includes：

PCB substrate 204；

Positioned at the metal level 208 on the surface of the PCB substrate 204；

The image sensing chip 230 of the top of PCB substrate 204 is inverted in, the image sensing chip 230 has video sensing Area 201 and the pad 202 around the video sensing area 201, and the pad 202 and metal level 208 electrically connect；

Positioned at the solder-bump 215 on the surface of the metal level 208, and the top of the solder-bump 215 is higher than image sensing The surface of chip 230.

Also include：Metal coupling 203, the metal coupling 203 is located between pad 202 and metal level 208, by described Metal coupling 203 electrically connects the pad 202 and metal level 208.

Also include：The point glue-line 214 of the sidewall surfaces of image sensing chip 230 is covered in, and described glue-line 214 is also It is covered in the sidewall surfaces of metal coupling 203.Described glue-line 214 plays a part of protection image sensing chip 230, prevents the external world Environment has undesirable effect to image sensing chip 230, improves the reliability of encapsulating structure.Described glue-line 214 can be covered in The partial sidewall surface of image sensing chip 230, it is also possible to be covered in whole sidewall surfaces of image sensing chip 230.This implementation In example, the point glue-line 214 of formation is also covered in the sidewall surfaces of metal coupling 203.

There is the hole 209 through the PCB substrate 204, the size of described hole 209 is more than in the PCB substrate 204 Or equal to the size in video sensing area 201；Tool opening 209 in the metal level 208, video sensing area 201 is located at opening 209 Top, i.e. the width that the video sensing area 201 is located at the top of hole 207 opening 209 is more than or equal to video sensing area 201 width.

Also include：Positioned at the adhesive tape layer 206 at the back side of PCB substrate 204, the one of the closing described hole 207 of the adhesive tape layer 206 End.The material of the adhesive tape layer 206 is UV dispergation rubber belt material, pyrolysis glue rubber belt material, IR glass or AR glass.

In the present embodiment, the vertical range at the top of solder-bump 215 to the surface of image sensing chip 230 is 20 μm to 100 μ M, wherein, the vertical range refer to perpendicular to the surface of metal level 208 distance in the in-plane direction, the image sensing The surface of chip 230 refers to being formed without the surface of pad 202.

The encapsulating structure that the present embodiment is provided is simple, sets solder-bump 215 by the surface of metal level 208 so that weldering Disk 202 is electrically connected with external circuit, it is to avoid the damage or pollution that are caused in itself to image sensing chip 230, makes encapsulation The encapsulation performance of structure is improved；Also, distance of the top of solder-bump 215 to the surface of image sensing chip 230 is very small, It is 20 μm to 100 μm so that encapsulating structure has less thickness, meets the development trend of semiconductor miniaturization miniaturization.

Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this In the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute The scope of restriction is defined.

Claims

1. a kind of method for packing, it is characterised in that including：

Some single image sensing chips are provided, the image sensing chip has video sensing area and around the image sense Answer the pad in area；

PCB substrate is provided, the PCB substrate includes some functional areas and the Cutting Road region between adjacent functional area, PCB substrate functional areas surface is formed with metal level；

The image sensing flip-chip is placed in the top of PCB substrate functional areas, and the pad and metal level electrical connection；

Formation is covered in the plastic packaging layer of the functional areas layer on surface of metal and image sensing chip surface；

Through hole is formed in plastic packaging layer, the via bottoms expose layer on surface of metal；

The solder-bump of the full through hole of filling is formed, and solder-bump top is higher than plastic packaging layer surface；

The PCB substrate is cut along the Cutting Road region, some single encapsulating structures are formed.

2. method for packing as claimed in claim 1, it is characterised in that formed through the hole of PCB substrate in the PCB substrate Hole, and video sensing area is located above hole after pad and metal level electrical connection.

3. method for packing as claimed in claim 2, it is characterised in that described hole is formed using punching press or bore process.

4. method for packing as claimed in claim 2, it is characterised in that after the metal level is formed, formed at the PCB substrate back side Adhesive tape layer, adhesive tape layer closing described hole one end.

5. method for packing as claimed in claim 4, it is characterised in that the material of the adhesive tape layer is UV dispergation rubber belt material, heat Dispergation rubber belt material, IR glass or AR glass.

6. method for packing as claimed in claim 1, it is characterised in that the metal level is covered in PCB substrate functional areas and cutting Road region surface.

7. method for packing as claimed in claim 1, it is characterised in that the plastic packaging layer is covered in the metal level side of same functional areas Wall surface.

8. method for packing as claimed in claim 1, it is characterised in that the material of the metal level is Cu, Al, W, Sn, Au or Sn- Au alloys.

9. method for packing as claimed in claim 1, it is characterised in that the forming step of some single image sensing chips Including：There is provided in wafer to be wrapped, the wafer to be wrapped with some video sensing areas and around the video sensing area Pad；The wafer to be wrapped is cut, some single image sensing chips are formed.

10. method for packing as claimed in claim 9, it is characterised in that before the wafer to be wrapped is cut, also including step Suddenly：Reduction processing is carried out to the encapsulation wafer.

11. method for packing as claimed in claim 9, it is characterised in that also including step：In the bond pad surface or metal level table Face forms metal coupling, and the pad and metal level are electrically connected by metal coupling.

12. method for packing as claimed in claim 11, it is characterised in that the material of the metal coupling is tin, gold or tin alloy.

13. method for packing as claimed in claim 11, it is characterised in that connected pad and metal level using solder bonds technique Connect, wherein, solder bonds technique is eutectic bonding, ultrasonic thermocompression, thermal compression welding or ultrasonic wire bonding.

14. method for packing as claimed in claim 1, it is characterised in that the material of the plastic packaging layer is epoxy resin or acrylic acid Resin.

15. method for packing as claimed in claim 1, it is characterised in that the processing step for forming solder-bump includes：Form filling The metal material of the full through hole, using reflux technique, forms the solder-bump.

16. method for packing as claimed in claim 1 are characterized in that, the distance at the top of solder-bump top to plastic packaging layer is 20 μm to 100 μm.

17. method for packing as claimed in claim 1, it is characterised in that the through hole is formed using etching or laser boring technique.

A kind of 18. encapsulating structures, it is characterised in that including：

PCB substrate；

Positioned at the metal level on the PCB substrate surface；

The image sensing chip above PCB substrate is inverted in, the image sensing chip has video sensing area and around described The pad in video sensing area, and the pad and metal level electrical connection；

Positioned at the plastic packaging layer of the layer on surface of metal and image sensing chip surface；

Through hole in plastic packaging layer, and the through hole exposes layer on surface of metal；

The solder-bump of the full through hole of filling, the solder-bump top is higher than plastic packaging layer surface.

19. encapsulating structures as claimed in claim 18, it is characterised in that have through the hole of PCB substrate in the PCB substrate Hole, and video sensing area is located at hole top.

20. encapsulating structures as claimed in claim 19, it is characterised in that the width of described hole is more than or equal to video sensing area Width.

21. encapsulating structures as claimed in claim 18, it is characterised in that the distance at the top of the solder-bump top to plastic packaging layer It is 20 μm to 100 μm.

22. encapsulating structures as claimed in claim 18, it is characterised in that also include：Metal coupling, the metal coupling is located at weldering Between disk and metal level, the pad and metal level are electrically connected by the metal coupling.

23. encapsulating structures as claimed in claim 22, it is characterised in that the material of the metal coupling is tin, gold or tin alloy.

24. encapsulating structures as claimed in claim 18, it is characterised in that the material of the metal level be Cu, Al, W, Sn, Au or Sn-Au alloys.

25. encapsulating structures as claimed in claim 18, it is characterised in that metal level side wall is flushed with PCB substrate side wall.

26. encapsulating structures as claimed in claim 18, it is characterised in that the plastic packaging layer is covered in metal level sidewall surfaces.

27. encapsulating structures as claimed in claim 19, it is characterised in that the PCB substrate back side is formed with adhesive tape layer, adhesive tape layer Close one end of described hole.

A kind of 28. method for packing, it is characterised in that including：

Solder-bump is formed in the layer on surface of metal, and solder-bump top is higher than image sensing chip surface；

29. method for packing as claimed in claim 28, it is characterised in that also including step：Formation is covered in the image sensing The point glue-line of chip sidewall surfaces.

30. method for packing as claimed in claim 29, it is characterised in that also including step：In the bond pad surface or metal level Surface forms metal coupling, and the pad and metal level are electrically connected by metal coupling.

31. method for packing as claimed in claim 30, it is characterised in that the point glue-line of formation is also covered in metal coupling side wall table Face.

32. method for packing as claimed in claim 28, it is characterised in that formed through the hole of PCB substrate in the PCB substrate Hole, after image sensing flip-chip is placed in above PCB substrate functional areas, video sensing area is located at hole top.

A kind of 33. encapsulating structures, it is characterised in that including：

PCB substrate；

Positioned at the metal level on the PCB substrate surface；

Positioned at the solder-bump of the layer on surface of metal, and solder-bump top is higher than image sensing chip surface；

The encapsulating structure also includes：Metal coupling, the metal coupling is located between pad and metal level, by the metal Projection electrically connects the pad and metal level；

The encapsulating structure also includes：It is covered in the point of the image sensing chip sidewall surfaces and metal coupling sidewall surfaces Glue-line.

34. encapsulating structures as claimed in claim 33, it is characterised in that have through the PCB substrate in the PCB substrate Hole, video sensing area is located at hole top.