CN203895460U - Packaging structure - Google Patents
Packaging structure Download PDFInfo
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- CN203895460U CN203895460U CN201420258956.7U CN201420258956U CN203895460U CN 203895460 U CN203895460 U CN 203895460U CN 201420258956 U CN201420258956 U CN 201420258956U CN 203895460 U CN203895460 U CN 203895460U
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Abstract
A packaging structure comprises a substrate, a buffer layer located on the surface of the substrate, a metal layer located on the surface of the buffer layer, an image sensing chip invertedly mounted above the substrate, a plastic packaging layer located on the surfaces of the metal layer and the image sensing chip, through holes in the plastic packaging layer, and welding projections filled in the through holes. The image sensing chip comprises image induction zones and bonding pads around the image induction zones. The bonding pads are electrically connected with the metal layer. The bottoms of the through holes expose the surface of the metal layer. The tops of the welding projections are higher than the surface of the plastic packaging layer. The packaging structure is better in packaging performance, and the thickness of the packaging structure is thinner.
Description
Technical field
The utility model relates to semiconductor packaging, particularly a kind of encapsulating structure.
Background technology
Image sensor is a kind of transducer that can experience extraneous light and convert thereof into the signal of telecommunication.After image sensor dice completes, then by image sensor dice is carried out to a series of packaging technologies, thereby form packaged image sensor, for the various electronic equipments such as digital camera, Digital Video etc.
Traditional image sensor package method normally adopts Bonding (Wire Bonding) to encapsulate, but the develop rapidly along with integrated circuit, longer lead-in wire makes product size cannot reach desirable requirement, therefore, wafer-level packaging (WLP:Wafer Level Package) replaces wire bond package gradually becomes a kind of comparatively conventional method for packing.
As shown in Figure 1, Fig. 1 is a kind of encapsulating structure, comprising: substrate 101; Be positioned at the embankment structure 102 on substrate 101 surfaces; The image sensing chip 100 of upside-down mounting above substrate 101, image sensing chip 100 fronts have video sensing district 103 and around the pad 104 in described video sensing district 103, and described pad 104 upper surfaces contact with embankment structure 102 surfaces; Be positioned at the through hole of described image sensing chip 100, described through hole exposes pad 104 lower surfaces; Be positioned at the protective layer 105 at through-hole side wall and image sensing chip 100 back sides, and expose pad 104 lower surfaces of via bottoms; Be positioned at the metal redistribution layer 106 at through-hole side wall and image sensing chip 100 back sides; Be positioned at the insulating barrier 107 on described metal redistribution layer surface; Be positioned at the opening of described insulating barrier 107, and described opening exposes metal redistribution layer 106; Be positioned at the solder-bump 108 of described opening.
Yet the encapsulation performance of above-mentioned encapsulating structure needs further to be improved.
Utility model content
The problem that the utility model solves is to provide a kind of encapsulating structure, improves encapsulation performance and reliability.
For addressing the above problem, the utility model also provides a kind of encapsulating structure, comprising: substrate; The metal level that is positioned at the resilient coating of described substrate surface and is positioned at buffer-layer surface; The image sensing chip of upside-down mounting above substrate, described image sensing chip has video sensing district and around the pad in described video sensing district, and described pad and metal level are electrically connected to; Be positioned at the plastic packaging layer of described layer on surface of metal and image sensing chip surface; Be positioned at the through hole of described plastic packaging layer, and described via bottoms exposes layer on surface of metal; Fill the solder-bump of full described through hole, and described solder-bump top is higher than plastic packaging layer surface.
Optionally, the distance on described solder-bump top to plastic packaging layer surface is 20 μ m to 100 μ m.
Optionally, also comprise: metal coupling, metal coupling, between pad and metal level, is electrically connected to described pad and metal level by described metal coupling.
Optionally, in described resilient coating, have opening, described video sensing district is positioned at opening top.
Optionally, described A/F is more than or equal to video sensing sector width.
Optionally, described metal level sidewall flushes with base side wall.
Optionally, described plastic packaging layer is covered in metal level sidewall surfaces.
The utility model also provides a kind of encapsulating structure, comprising: substrate; The metal level that is positioned at the resilient coating of described substrate surface and is positioned at buffer-layer surface; The image sensing chip of upside-down mounting above substrate, described image sensing chip has video sensing district and around the pad in described video sensing district, and described pad and metal level are electrically connected to; Be positioned at the solder-bump of described layer on surface of metal, and described solder-bump top is higher than image sensing chip surface.
Optionally, also comprise: metal coupling, described metal coupling, between pad and metal level, is electrically connected to described pad and metal level by described metal coupling.
Optionally, also comprise: the some glue-line that is covered in described image sensing chip side wall surface and metal coupling sidewall surfaces.
Optionally, in described resilient coating, have opening, described video sensing district is positioned at opening top.
Compared with prior art, the technical solution of the utility model has the following advantages:
The utility model embodiment provides the encapsulating structure that a kind of structural behaviour is superior, comprises substrate, the metal level that is positioned at the resilient coating of substrate surface and is positioned at buffer-layer surface; The image sensing chip of upside-down mounting above substrate, and pad and metal level electrical connection; Be positioned at the plastic packaging layer of described layer on surface of metal and image sensing chip surface; Be positioned at the through hole of described plastic packaging layer, and described via bottoms exposes layer on surface of metal; Fill the solder-bump of full through hole, and described solder-bump top is higher than plastic packaging layer surface.In encapsulating structure, through hole is positioned at plastic packaging layer, and via bottoms exposes layer on surface of metal, the metal level exposing with via bottoms by solder-bump is electrically connected to, encapsulating structure is electrically connected to external circuit, reduced damage and pollution that image sensing chip is subject to, therefore, the encapsulation performance of the encapsulating structure that the utility model embodiment provides is superior.
Further, solder-bump is filled full described through hole, and the top of described solder-bump is higher than plastic packaging layer surface, the distance on solder-bump top to plastic packaging layer surface is 20 μ m to 100 μ m, the most of sidewall surfaces of therefore described solder-bump is enveloped by plastic packaging layer, reduce solder-bump and be exposed to the area in external environment, thereby reduced the possibility that solder-bump is caused oxidation or pollutes by external environment, improved stability and the reliability of encapsulating structure; And, because solder-bump top is very little to the distance on plastic packaging layer surface, be 20 μ m to 100 μ m, therefore further reduce the thickness of encapsulating structure.
Further again, described plastic packaging layer is covered in described metal level sidewall surfaces, prevents that metal level sidewall is exposed in external environment, avoids metal level and external environment that unnecessary being electrically connected to occurs, prevent that metal level is by external environmental simultaneously, further improve stability and the reliability of encapsulating structure.
Further, in described resilient coating, there is the opening that exposes substrate, described video sensing district is positioned at opening top, make video sensing district receive extraneous light by described opening, and A/F is greater than video sensing sector width, improve the utilance of video sensing district to light, thereby improve the performance of encapsulating structure.
The utility model embodiment also provides a kind of simple in structure and well behaved encapsulating structure, comprising: light-transparent substrate; Be positioned at the resilient coating on described light-transparent substrate surface and the metal level that is positioned at buffer-layer surface; The image sensing chip of upside-down mounting above light-transparent substrate, described image sensing chip has video sensing district and around the pad in described video sensing district, and described pad and metal level are electrically connected to; Be positioned at the solder-bump of described layer on surface of metal, and described solder-bump top is higher than image sensing chip surface.By solder-bump, encapsulating structure is electrically connected to external circuit, has reduced damage and pollution that image sensing chip is subject to, therefore, the encapsulation performance of the encapsulating structure that the utility model embodiment provides is superior.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of prior art encapsulating structure;
The structural representation of the encapsulating structure forming process that Fig. 2 to Figure 14 provides for the utility model one embodiment;
The structural representation of the encapsulating structure forming process that Figure 15 to Figure 19 provides for another embodiment of the utility model;
The structural representation of the encapsulating structure forming process that Figure 20 to Figure 22 provides for the another embodiment of the utility model.
Embodiment
From background technology, the encapsulation performance of the encapsulating structure that prior art provides and reliability need further to be improved.
Find after deliberation, the encapsulation performance reason poor and that reliability needs further to be improved of encapsulating structure is:
First; the packaging technology that forms aforementioned encapsulating structure is very complicated; and in encapsulation process; image sensing chip experience attenuate, etching form through hole, form protective layer, form metal level, form the multiple tracks encapsulation procedures such as insulating barrier; described encapsulation procedure causes harmful effect to the performance of image sensing chip, causes the encapsulating structure performance of formation to be difficult to reach optimum state.
Secondly, because image sensing chip need to experience etching, form through hole, form the multiple tracks encapsulation procedures such as metal level, described image sensing chip must have higher mechanical strength, prevents that image sensing chip from breaking in described encapsulation procedure process; For guaranteeing the mechanical strength of image sensing chip, image sensing chip need to keep thicker thickness, thereby causes the encapsulating structure thickness of formation partially thick, is unfavorable for the development trend of semiconductor device miniaturization, microminiaturization.
And the image sensing chip yield level in wafer differs, and while adopting packaging technology to form above-mentioned encapsulating structure, be that monoblock wafer is encapsulated to the encapsulating structure that rear cutting crystal wafer forms, cause the waste of packaging cost.
For this reason, the utility model provides a kind of encapsulating structure, and some single image sensing chips are provided, and described image sensing chip has video sensing district and around the pad in described video sensing district; Provide substrate, the metal level that substrate surface is formed with resilient coating and is positioned at buffer-layer surface; Image sensing flip-chip is placed in to the top of substrate, and pad and metal level electrical connection; Formation is covered in the plastic packaging layer of layer on surface of metal and image sensing chip surface; In plastic packaging layer, form the through hole that exposes layer on surface of metal; Form the solder-bump of filling full through hole, and described solder-bump top is higher than plastic packaging layer surface; Along the cutting substrate of Cutting Road region, form some single encapsulating structures.The utility model packaging technology is simple, and the encapsulation procedure of image sensing chip experience itself is few, makes encapsulating structure have good encapsulation performance and reliability, and the thinner thickness of encapsulating structure.
For above-mentioned purpose of the present utility model, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiment of the utility model is described in detail.
The structural representation of the encapsulation process that Fig. 2 to Figure 14 provides for the utility model embodiment.
Please refer to Fig. 2 and Fig. 3, Fig. 3 is that Fig. 2 is along the cut-away section structural representation of line of cut AA1 direction, wafer to be wrapped 200 is provided, described wafer to be wrapped 200 have first surface with relative with described first surface second, the first surface of described wafer to be wrapped 200 is formed with some video sensings district 201 and around the pad 202 in described video sensing district 201.
Described wafer to be wrapped 200 can be wafer, in this enforcement, described wafer to be wrapped 200 comprises the some chip area 210 of matrix arrangement and the first Cutting Road regions 220 between chip area 210 of being, described chip area 210 is used to form image sensor dice, follow-uply along 220 pairs, the first Cutting Road region wafer to be wrapped 200, cuts and forms several image sensing chips.
Chip area 210 first surfaces of described wafer to be wrapped 200 have video sensing district 201 and around the pad 202 in described video sensing district 201, described chip area 210 is also formed with the metal interconnect structure (not shown) of video sensing district 201 and pad 202 electrical connections, in described video sensing district 201, be formed with image sensor unit and the associated circuit being connected with image sensor unit, video sensing district 201 receives and converts to electrical signal by extraneous light, and by described electrical signal by metal interconnect structure and pad 201, and the metal level of follow-up formation, send external circuit to.
In the present embodiment, as shown in Figure 4, Fig. 4 is the plan structure schematic diagram in one single chip region 210, for the ease of wiring, video sensing district 201 is positioned at the centre position in one single chip region 210, pad 202 is positioned at the marginal position of chip area 210, and described pad 202 is positioned at four sides in video sensing district 201, rectangular distribution, each side is formed with several pads 202 (quantity of pad 202 depends on the type of chip), follow-up pad 202 is connected with metal level, by metal level, image sensor dice is connected with external circuit.
It should be noted that, in other embodiments, the position in pad 202He video sensing district 201 can be adjusted flexibly according to the requirement of actual process, for example, in the present embodiment, pad is positioned at four sides in video sensing district 201, in other embodiments, and pad and the side, both sides or three sides that are positioned at video sensing district.
In the present embodiment, the pad 202 of different chip areas 210 is independent setting; In other embodiments, in adjacent chip area, can form the pad being connected, the pad forming is crossed over the first Cutting Road region, due to follow-up cutting the first substrate after, the pad in described leap the first Cutting Road region can be cut to be held, and therefore can not affect the electric property of image sensing chip.
Please refer to Fig. 5, on described pad 202 surfaces, form metal coupling 203.
The top of described metal coupling 203 is higher than the top of video sensing district 201 interior photo-sensitive cells.
Acting as of described metal coupling 203: on the one hand, by described metal coupling 203, pad 202 is electrically connected to the metal level of follow-up formation; On the other hand, by the top of described metal coupling 203 being set higher than the top in video sensing district 201, follow-up when pad 202 is electrically connected to metal level, prevent that the surface of metal level from encountering video sensing district 201, play the effect in protection video sensing district 201.
Being shaped as of described metal coupling 203 is square or spherical.The present embodiment take that being shaped as of described metal coupling 203 is square does exemplary illustrated as example, and the formation technique of described metal coupling 203 is screen printing technique.
As an embodiment, employing screen printing technique forms the concrete process of described metal coupling 203 and is: provide tool meshed web plate, described mesh is corresponding with the position of metal coupling; By the first surface laminating of web plate and wafer to be wrapped 200, make mesh in web plate expose the surface of pad 202, in mesh, brush into materials such as gold, tin or ashbury metals, on pad 202 surfaces, form metal couplings 203.
The material of described metal coupling 203 can be gold, tin or ashbury metal, and described ashbury metal can be plumbous for tin silver, tin, SAC, tin silver zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver antimony etc.
In other embodiments, being shaped as when spherical of metal coupling, the formation technique of described metal coupling is: plant ball technique or screen printing and reflux technique.
It should be noted that, in the present embodiment, before being carried out to reduction processing, wafer to be wrapped 200 second faces form described metal coupling 203, the thicker wafer to be wrapped 200 that makes of thickness by wafer to be wrapped 200 has extraordinary mechanical strength, thereby avoids the technical process that forms metal coupling 203 to cause wafer to be wrapped 200 to occur the problem of breaking; And, before attenuate wafer to be wrapped 200, form metal coupling 203, the encapsulation procedure of wafer to be wrapped 200 experience after attenuate is tailed off, therefore, can further reduce the thickness that the rear wafer to be wrapped 200 of follow-up attenuate wafer to be wrapped 200 has.
In another embodiment of the utility model, also can carry out after reduction processing wafer to be wrapped the second face, in bond pad surface, form metal coupling.
Please refer to Fig. 6, the second face of described wafer to be wrapped 200 is carried out to reduction processing.
Concrete, the back side of grinding described wafer to be wrapped 200, until the thickness of wafer to be wrapped 200 is to predetermined thickness, described grinding can be mechanical lapping or cmp.
For example, because second of wafer to be wrapped 200 (is not generally formed with function element, pad and video sensing district), therefore, the second face to wafer to be wrapped 200 carries out attenuate to a certain degree, both the performance that had guaranteed wafer to be wrapped 200 interior function element is not affected, and can make the thinner thickness of the encapsulating structure of follow-up formation yet.
And, follow-uply in the present embodiment can not carry out the technique that etching forms through hole to wafer to be wrapped 200 the image sensing chip of single (arbitrarily), the follow-up manufacturing process that image sensing chip is carried out itself is less, therefore, image sensing chip does not need to have very high mechanical strength, after attenuate wafer to be wrapped 200, image sensing chip can have less predetermined thickness.
And in prior art, after attenuate wafer to be wrapped, rear extended meeting etching wafer to be wrapped is to form the through hole that exposes pad, therefore, the wafer to be wrapped after attenuate need to have larger predetermined thickness, so that wafer to be wrapped has enough mechanical strengths, prevent the problem of image sensing chip rupture, therefore, prior art is after packaging technology completes, and the image sensing chip-packaging structure of formation has thicker thickness.
Please refer to Fig. 7, along described the first Cutting Road region 220 (please refer to Fig. 6), cut described wafer to be wrapped 200, form some single image sensing chips 230.
Described cutting technique is laser cutting or slicer cutting.Because laser cutting parameter has less kerf width, therefore, in the present embodiment, adopt laser cutting parameter to cut described wafer to be wrapped 200, form some single image sensing chips 230.
In wafer to be wrapped 200, there is the image sensing chip 230 that some matrixes are arranged, in these image sensing chips 230, may there is the poor image sensing chip 230 of some yields, the performance of the image sensing chip 230 that described yield is poor does not reach design requirement, if the image sensing chip 230 poor to these yields encapsulates, the encapsulating structure forming is also difficult to drop in practical application, therefore, the image sensing chip 230 poor to yield encapsulates the waste that both can cause packaging cost, also can cause packaging efficiency low.
And in the present embodiment, at cutting wafer to be wrapped 200, form after some single image sensing chips 220, selecting the image sensing chip 230 that yield meets technological standards carries out follow-up packaging technology, avoids the waste of packaging cost and improves packaging efficiency.
Please refer to Fig. 8, substrate 204 is provided, described substrate 204 comprises some functional areas 240 and the second Cutting Road region 250 between adjacent functional district 240.
Follow-up above described substrate 204 functional areas 240 upside-down mounting image sensing chip 230 is set, to carry out packaging technology; And last in packaging technology, along the second Cutting Road region 250 cutting substrates 204, to form single encapsulating structure.
The area in the area of described functional areas 240 and the second Cutting Road region 250 can be set according to actual package process requirements.
Described substrate 204 provides a supporting role for image sensor dice 230, and follow-up after substrate 204 surface formation resilient coatings and metal level, described metal level is used for connecting pad 202 and external circuit, and image sensing chip 230 is electrically connected to external circuit.
In order to simplify packaging technology step, in the present embodiment, the substrate 204 providing is light-transparent substrate, for example, the material of described substrate 204 is unorganic glass, polymethyl methacrylate or filter glass, and, in the present embodiment, in image sensor dice 230, there is video sensing district 201, after receiving light, described video sensing district 201 is converted into electrical signal, therefore, and after forming encapsulating structure, video sensing district 201 should be able to receive extraneous light, so that encapsulating structure can normally be worked.
Please continue to refer to Fig. 8, the metal level 208 that forms resilient coating 207 and be positioned at resilient coating 207 surfaces on 240 surfaces, described substrate 204 functional areas, resilient coating 207 on 240 surfaces, same functional areas has opening 209, and described opening 209 exposes substrate 204 surfaces.
In the present embodiment, described substrate 204 is substrate of glass, when described glass basic surface forms the metal level of metal material, the metal level of described metal material and the viscosity of glass basic surface are poor, easily cause between substrate 204 and image sensing chip 230 separated in encapsulation process; In order to improve the adhesiveness between substrate 204 and image sensing chip 230, in the present embodiment, before forming metal level 208, on substrate 204 surfaces, form resilient coating 207, between described resilient coating 207 and substrate 204 surfaces, there is stronger viscosity, and between described resilient coating 207 and metal level 208, also there is stronger viscosity, thereby improve encapsulation performance.
The material of described resilient coating 207 is organic polymer photoresist, for example, and epoxy resin or acrylic resin; The material of described metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.
In the present embodiment, the metal level 208 on 240 surfaces, adjacent functional district is connected, the resilient coating 207 in adjacent functional district 240 is connected, be that resilient coating 207 is positioned at substrate 204 functional areas 240 and 250 surfaces, the second Cutting Road region, accordingly, metal level 208 is positioned at substrate 204 functional areas 240 and the second Cutting Road region 250; Because the second Cutting Road region 250 is finally can being cut and holding of packaging technology, the metal level 208 in described leap the second Cutting Road region 250 and resilient coating 207 is cut opens, therefore can not affect the performance of single encapsulating structure.
In the present embodiment, the formation step of described resilient coating 207 and metal level 208 comprises: adopt dry film technique or wet film technique to form initial buffer layer on substrate 204 surfaces; Described initial buffer layer is carried out to exposure imaging processing, form the resilient coating 207 that is positioned at substrate 204 surfaces, have opening 209 in resilient coating 207, described opening 209 exposes 240 surfaces, substrate 204 partial function district; On described resilient coating 207 surfaces and sidewall form initial metal layer; Etching is removed the initial metal layer that is positioned at resilient coating 207 sidewalls, at resilient coating 207 forming metal layer on surfaces 208.
In embodiment of the utility model, the formation step of described resilient coating and metal level comprises: at basal surface, form initial buffer layer; On described initial buffer layer surface, form initial metal layer; On described initial metal layer surface, form patterned mask layer; The institute's mask layer of take is mask, and etching initial metal layer and initial buffer layer, form resilient coating at substrate surface successively, at buffer-layer surface, forms metal level, wherein, has opening in resilient coating, and described open bottom exposes surface, base part functional areas.
In described resilient coating 209, there are some openings 209, accordingly, the metal level 208 that is positioned at resilient coating 207 surfaces has some openings 209, follow-up after pad 202 is connected with metal level 208 video sensing district 201 be positioned at above opening 209, in the present embodiment, described opening 209 exposes 240 surfaces, substrate 204 partial function district, and the width of described opening 209 is more than or equal to the width in video sensing district 201, so that the extraneous light of reception that video sensing district 201 can maximum magnitudes.
In the utility model embodiment, 204 surfaces, the same functional areas of substrate 204 form some discrete metal levels 208, and the quantity of discrete metal level 208 is corresponding with quantity and the position of the pad 202 that position has with single image sensor dice 230, for example, video sensing district 201 4 sides of image sensor dice 230 are all formed with pad 202, four sides of opening 209 are all formed with metal level 208, and the quantity of the discrete metal level 208 of opening 209 each side is identical with the quantity of the pad 202 of the corresponding side in video sensing district 201; In other embodiment of the utility model, relative both sides, video sensing district are formed with pad, and the both sides that opening is relative are formed with metal level, and the quantity of the discrete metal level of each side of opening is identical with the quantity of the pad of the corresponding side in video sensing district.
Please refer to Fig. 9, described image sensing chip 230 upside-down mountings are placed in to 240 tops, substrate 204 functional areas, and described pad 202 and metal level 208 electrical connections.
In the present embodiment, select image sensing chip 230 upside-down mountings that yield meets standard and be placed in the top of substrate 204.
Concrete, described pad 202 is connected by metal coupling 203 with metal level 208, and each pad 202 is corresponding to a discrete metal level 208.Adopt solder bonds technique that pad 202 is connected with metal level 208, described pad 202 and metal level 208 weld together by the material in metal coupling 203.
Described solder bonds technique is eutectic bonding, ultrasonic thermocompression, thermal compression welding, ultrasonic wire bonding etc.For example, when the material of described metal level 208 is Al, the material of described metal coupling 203 is Au, and solder bonds technique is ultrasonic thermocompression mode; When the material of described metal level 208 is Au, the material of described metal coupling 203 is Sn, and solder bonds technique is eutectic bonding mode.
After pad 202 and metal level 208 electrical connections, video sensing district 201 is positioned at opening 209 tops, and extraneous light, through the video sensing district 201 that is transmitted to opening 209 tops after substrate 204, is beneficial to video sensing district 201 and receives extraneous lights; And in the present embodiment, the width of opening 209 is greater than the width in video sensing district 201, can make video sensing district 201 receive to greatest extent extraneous light, improve the light utilization in video sensing district 201.
Simultaneously, because the thickness of metal coupling 203 is greater than the thickness of video sensing district 201 interior photo-sensitive cells, make by 230 upside-down mountings of image sensing chip above substrate 204 time, video sensing district 201 can not touch metal level 208 surfaces, prevents that video sensing district 201 from sustaining damage.
Please refer to Figure 10, form the plastic packaging layer 211 that is covered in described metal level 208 surfaces and 230 second of image sensing chips and sidewall surfaces.
Form acting as of described plastic packaging layer 211: on the one hand, the plastic packaging layer 211 forming plays the effect of protection image sensing chip 230, prevent image sensing chip 230 performance failures that cause under the impact of external environment, prevent that moisture from being invaded, being insulated with external electrical by outside; On the other hand, described plastic packaging layer 211 plays the effect of supporting image sensing chip 230, image sensing chip 230 is fixed so that follow-up circuit connects, and, after encapsulation completes, make chip not fragile; In addition, described plastic packaging layer 211 also plays the effect of the solder-bump of fixing follow-up formation, for solder-bump provides protection.
Adopt plastic package process (molding) to form described plastic packaging layer 211, described plastic package process adopts branch mode or pressing mode, and the top surface of described plastic packaging layer 211 flushes with image sensing chip 230 second faces or higher than 230 second of image sensing chips.
Adopt the mode of whole module or some separate modules to form described plastic packaging layer 211.
In the present embodiment, adopt the mode of whole module to form described plastic packaging layer 211,, the resilient coating 207 of substrate 204 tops of monoblock, metal level 208 and image sensing chip 230 are carried out to plastic package process, the plastic packaging layer 211 forming, except being covered in metal level 208 surfaces and image sensing chip 230 surfaces of functional areas 240, is also covered in metal level 208 surfaces in the second Cutting Road region 250.While adopting the mode of whole module to form plastic packaging layer 211, can avoid alignment issues, thereby reduce the difficulty of plastic package process.
In other embodiments, while adopting the mode of some separate modules to form described plastic packaging layer 211, the plastic packaging layer 211 of a module is at least covered in 230 second of a metal level on functional areas 240 208 surfaces and image sensing chips, as shown in figure 11, described plastic packaging layer 211 can cover the metal level 208 of whole functional areas 240, the metal level 208 of Ye Kejin covering function district 240 part areas, but to guarantee to cover completely image sensing chip 230 surfaces.
As a specific embodiment, the method described in forming with the plastic packaging layer 211 of some separate modules is simultaneously: adopt a plurality of moulds, and in each mould, fill plastic packaging layer 211 material, metal level 208 surfaces by mold compresses in substrate 204, carry out drying and processing recession except mould, form the plastic packaging layer 211 with some separate modules.
The material of described plastic packaging layer 211 is resin or anti-solder ink material, for example, and epoxy resin or acrylic resin.
Please refer to Figure 12, at the interior formation through hole 212 of described plastic packaging layer 211, described through hole 212 bottom-exposed go out metal level 208 surfaces.
The object that forms through hole 212 is, follow-up in the interior formation solder-bump of through hole 212, by solder-bump, metal level 208 is electrically connected to external circuit, thereby realizes being electrically connected to of pad 202 and external circuit, the encapsulating structure that encapsulates rear formation can be dropped in practical application.
Adopt laser drilling technique or etching technics to form described through hole 212.As an embodiment, the processing step that adopts etching technics to form through hole 212 comprises: on described plastic packaging layer 211 surface, form patterned mask layer, in described patterned mask layer, have groove, the position of described groove and width are corresponding to position and the width of follow-up formation through hole 212; The described patterned mask layer of take is mask, and plastic packaging layer 211 described in etching until expose metal level 208 surfaces, exposes the through hole 212 on metal level 208 surfaces in the interior formation of described plastic packaging layer 211; Remove described patterned mask layer.
The quantity of the through hole 212 forming is identical with the quantity of pad 202, in other words, the quantity of described through hole 212 is identical with the quantity of discrete metal level 208, each discrete metal level 208 top is all formed with a through hole 212, and each pad 202 of image sensing chip 230 all can be electrically connected to external circuit.
In the present embodiment, by the mode at the interior formation through hole 212 of plastic packaging layer 211, realize the object that pad 202 is electrically connected to external circuit, avoided the harmful effect that brings at the interior formation through hole of image sensing chip 230, improved the performance of the encapsulating structure of follow-up formation.
Please refer to Figure 13, form the solder-bump 215 of filling full through hole 212 (please refer to Figure 12), and described solder-bump 215 tops are higher than plastic packaging layer 211 surface.
By described solder-bump 215, pad 202 is electrically connected to external circuit, thereby image sensing chip 230 is normally worked.
Described solder-bump 215 top surfaces are shaped as arc, the material of solder-bump 215 is gold, tin or ashbury metal, and described ashbury metal can be plumbous for tin silver, tin, SAC, tin silver zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver antimony etc.
As an embodiment, the material of solder-bump 215 is tin, and the step that forms described solder-bump 215 comprises: form the metal material of filling full described through hole 212, adopt reflux technique, form described solder-bump 215.
As a specific embodiment, the distance between described solder-bump 215 tops to plastic packaging layer 211 top is 20 μ m to 100 μ m.
Most solder-bump 215 surfaces are coated by plastic packaging layer 211, only retain few solder-bump 215 surfaces in external environment, effectively prevent that solder-bump 215 is oxidized by external environment, improves the reliability and stability of the encapsulating structure of follow-up formation.And, in the interior formation solder-bump 215 of plastic packaging layer 211, the top of described solder-bump 215 is a little more than plastic packaging layer 211 surface, can make image sensing chip 230 be electrically connected to external circuit, and solder-bump 215 tops are a little more than plastic packaging layer 211 surface (distance on solder-bump 215 tops to plastic packaging layer 211 surface is 20 μ m to 100 μ m), the integral thickness that can further reduce the encapsulating structure of follow-up formation, is conducive to improve encapsulation and integration degree.
Please refer to Figure 14, along described the second Cutting Road region 250 (please refer to Figure 13), cut described plastic packaging layer 211 and substrate 204, form some single encapsulating structures.
In the present embodiment, adopt slicer cutting or laser cutting parameter to cut described plastic packaging layer 211, metal level 208, resilient coating 207 and substrate 204, form some single encapsulating structures.
Described cutting technique only carries out cutting process to substrate 204, plastic packaging layer 211, resilient coating 207 and metal level 208, has avoided the cutting process to image sensing chip 230; And, due to aforementioned, wafer to be wrapped is being carried out after reduction processing, formed the image sensing chip 230 having compared with minimal thickness, therefore, the thinner thickness of the encapsulating structure that the present embodiment forms; Simultaneously, the packaging technology that the present embodiment forms encapsulating structure is simple, and the encapsulation procedure that image sensing chip 230 is carried out few (encapsulation procedure that image sensing chip 230 itself has only experienced attenuate and formed metal coupling 203), make encapsulating structure have extraordinary encapsulation performance, encapsulation yield gets a promotion; Finally, the present embodiment can be selected the good image sensing chip 230 of yield and encapsulate, thereby has further improved encapsulation yield, effectively reduces packaging cost.
And, because solder-bump 215 tops are very little to the distance on plastic packaging layer 211 surface, be 20 μ m to 100 μ m, therefore further reduced the integral thickness of the encapsulating structure forming; Meanwhile, because solder-bump 215 major parts are enveloped by plastic packaging layer 211, reduce solder-bump 215 and be exposed to the area in external environment, thereby prevented that solder-bump 215 from being destroyed by external environment, further improved the reliability of encapsulating structure.
Accordingly, the present embodiment provides a kind of encapsulating structure, please refer to Figure 14, and described encapsulating structure comprises:
Substrate 204;
Be positioned at the resilient coating 207 on described substrate 204 surfaces and the metal level 208 that is positioned at resilient coating 207 surfaces;
The image sensing chip 230 of upside-down mounting above substrate 204, described image sensing chip 230 has video sensing district 201 and around the pad 202 in described video sensing district 201, and described pad 202 and metal level 208 are electrically connected to;
Be positioned at the plastic packaging layer 211 on described metal level 208 surfaces and image sensing chip 230 surfaces;
Be positioned at the through hole of described plastic packaging layer 211, and described via bottoms exposes metal level 208 surfaces;
Fill the solder-bump 215 of full described through hole, and described solder-bump 215 tops are higher than plastic packaging layer 211 surface.
The material of described substrate 204 is unorganic glass, polymethyl methacrylate or filter glass, and in the utility model specific embodiment, described substrate 204 is light-transparent substrate.
In described resilient coating 207, there is the opening 209 that exposes substrate 204, described video sensing district 201 is positioned at opening 209 tops, video sensing district 201 can receive extraneous light by described opening 209, in the present embodiment, described opening 209 width are more than or equal to video sensing district 201 width, improve the utilance of the 201 pairs of light in video sensing district.
The position of described metal level 208 is corresponding with position and the quantity of pad 202 with quantity.Concrete, when video sensing district 201 4 sides all have some pads 202, hole 207 4 sides all have some discrete metal levels 208, and each discrete metal level 208 is electrically connected to corresponding to a pad 202.In other embodiments, when video sensing district 201 1 sides have some pads, described hole one side has the discrete metal level of equal number.Described resilient coating 207 increases the adhesiveness between substrates 204 and metal level 208, thereby the adhesiveness between raising substrate 204 and image sensing chip 230 prevents between image sensing chip 230 and substrate 204 separated.
The material of described resilient coating 207 is organic polymer photoresist, and described organic polymer photoresist is epoxide-resin glue, acrylic resin, polyimides glue, benzocyclobutene glue or polybenzoxazoles glue; The material of described metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.
In the present embodiment, described metal level 208 sidewalls flush with plastic packaging layer 211 sidewall, that is to say, metal level 208 flushes with plastic packaging layer 211 sidewall away from the sidewall of opening 209.In other embodiments, in encapsulating structure, metal level 208 fringe regions can not covered by plastic packaging layer 211 yet, and plastic packaging layer 211 is covered in image sensing chip 230 surfaces, the most of sidewall surfaces of solder-bump 215 completely.
In the present embodiment, the top shape of described solder-bump 215 is spherical, and the material of described solder-bump 215 is tin, gold or ashbury metal.
As a specific embodiment, the distance on described solder-bump 215 tops to plastic packaging layer 211 surface is 20 μ m to 100 μ m.
The encapsulating structure that the present embodiment provides, plastic packaging layer 211 envelopes image sensing chip 230, prevents that external environment from causing harmful effect to image sensing chip 230, improves the reliability and stability of encapsulating structure; In plastic packaging layer 211, be formed with the through hole that exposes metal level 208 surfaces, in through hole, be formed with solder-bump 215, by solder-bump 215, pad 212 is electrically connected to external circuit, both avoided damage or pollution that image sensing chip 230 is caused itself, the encapsulation performance of encapsulating structure is improved; And, solder-bump 215 major parts are enveloped by plastic packaging layer 211, reduced the area that solder-bump 215 contacts with external environment, thereby it is oxidized or be subject to the possibility of other damages to have reduced greatly solder-bump 215, further improves the reliability of encapsulating structure.
Simultaneously, from described encapsulating structure, can find out, compared with prior art, in packaging technology in the encapsulating structure that formation the present embodiment provides, encapsulation procedure in effect image sensing chip 230 is obviously than few many of prior art, the thickness of the image sensing chip 230 in the present embodiment encapsulating structure is less than the thickness of the image sensing chip of prior art, and therefore, in the present embodiment, the thickness of encapsulating structure is significantly less than the thickness of the encapsulating structure of prior art.
And, because solder-bump 215 tops are very little to the distance on plastic packaging layer 211 surface, be 20 μ m to 100 μ m, therefore, the area that solder-bump 215 is exposed in external environment is very little, effectively improves the reliability of encapsulating structure; Meanwhile, because solder-bump 215 tops are very little to the distance on plastic packaging layer 211 surface, further reduced the thickness of encapsulating structure.Described encapsulating structure also comprises: metal coupling 203, described metal coupling 203, between pad 202 and metal level 208, connects described pad 202 and metal level 208 by described metal coupling 203.
The position of described metal coupling 203 is corresponding with position and the quantity of described pad 202 with quantity, and the quantity of metal coupling 203 is identical with the quantity of pad 202, and the spacing of adjacent metal projection 203 equates with the spacing of adjacent pad 202.
Being shaped as of described metal coupling 203 is square or spherical, and the material of described metal coupling 203 is tin, gold or ashbury metal.The utility model another embodiment also provide a kind of method for packing, Figure 15 to Figure 19 is the cross-sectional view of another embodiment image sensor package process of the utility model, it should be noted that, in the present embodiment, the restriction such as the parameter of structure same with the above-mentioned embodiment and effect repeats no more in the present embodiment, specifically please refer to above-described embodiment.
Please refer to Figure 15, some single image sensing chips 230 are provided, described image sensing chip 230 has video sensing district 201 and around the pad 202 in described video sensing district 201.
The formation step of described image sensing chip 230 can, with reference to the explanation of previous embodiment, not repeat them here.
Please refer to Figure 16, substrate 204 is provided, described substrate 204 comprises some functional areas 240 and the second Cutting Road region 250 between adjacent functional district 240; The metal level 208 that forms resilient coating 207 and be positioned at resilient coating 207 surfaces on described substrate 204 surfaces, and in the resilient coating 207 of same functional areas 240, be formed with the opening 209 that exposes substrate 204 surfaces; On described metal level 208 surfaces, form metal coupling 203.
In the present embodiment, in order to save packaging technology cost, described resilient coating 207 and metal level 208 are only positioned at functional areas 240, and before follow-up formation plastic packaging layer, expose 240 surfaces, substrate 204 functional areas between metal level 208 sidewalls and 250 borders, the second Cutting Road region.Its benefit is, follow-up when forming plastic packaging layer, plastic packaging layer is covered in 240 surfaces, described substrate 204 functional areas, thereby metal level 208 sidewalls are enveloped by plastic packaging layer 211, there is unnecessary being electrically connected to external circuit in the sidewall that prevents metal level 208, the material that can also prevent metal level 208 is oxidized, thereby improves the reliability of follow-up formation encapsulating structure.In other embodiments, the sidewall of described metal level also can be positioned at the boundary in the second Cutting Road region.
The material of described resilient coating 207 is organic polymer photoresist, and organic polymer photoresist has very strong adhesiveness, can improve the binding ability between substrate 204 and metal level 208; As an embodiment, described organic polymer photoresist is epoxy resin, acrylic resin, polyimides glue, benzocyclobutene glue or polybenzoxazoles glue.
The material of described metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.
The position of the interior discrete metal level 208 in same functional areas 240 and quantity are corresponding with position and the quantity of pad 202 in image sensing chip 230.Follow-up by 230 upside-down mountings of image sensing chip in substrate 204 time, video sensing district 201 is positioned at opening 209 tops, makes video sensing district 201 can receive extraneous light.In the present embodiment, the width of described opening 209 is greater than the width in video sensing district 201.
Being shaped as of described metal coupling 203 is spherical or square, and the present embodiment take that being shaped as of described metal coupling 203 is square does exemplary illustrated as example, by screen printing process, forms described metal coupling 203.The material of described metal coupling 203 is tin, gold or ashbury metal.
The position of described metal coupling 203 is corresponding to the position of pad 202, and the quantity of metal coupling 203 equates with the quantity of pad 202, the spacing of adjacent metal projection 203 equates with the spacing of adjacent pad 202, that is to say, follow-up by 230 upside-down mountings of image sensing chip in substrate 204 time, each metal coupling 203 contacts corresponding to pad 202 surfaces.
Please refer to Figure 17, by described image sensing chip 230 upside-down mountings, above substrate 204 functional areas 240, pad 202 is electrically connected to by metal coupling 203 with metal level 208; Metal level 208 in formation covering described substrate 204 functional areas 240 and the plastic packaging layer 211 on image sensing chip 230 surfaces.
By metal coupling 203 and pad 202 solder bonds, thereby realize being electrically connected between pad 202 and metal level.Concrete, each metal coupling 203 correspondence and pad 202 solder bonds, makes pad 202 be connected with discrete metal level 208.
Solder bonds technique is eutectic bonding, ultrasonic thermocompression, thermal compression welding or ultrasonic wire bonding.
Adopt the mode of whole module or some separate modules to form described plastic packaging layer 211.
In the present embodiment, described plastic packaging layer 211 is positioned at functional areas 240, and 250 surfaces, the second Cutting Road region are not formed with plastic packaging layer 211,, the plastic packaging layer 211 that adopts the mode of some separate modules to form 211, one module of described plastic packaging layer is at least covered in 230 second of metal level 208 surfaces on functional areas 240 and image sensing chips.It should be noted that, plastic packaging layer 211 sidewall in same functional areas 240 both can be positioned at functional areas 240, also can overlap with 250 borders, the second Cutting Road region.
In the present embodiment, the plastic packaging layer 211 of formation is covered in metal level 208 sidewall surfaces in same functional areas 240, prevent follow-up formation encapsulating structure after metal level 208 sidewalls be exposed in external environment, thereby improve the reliability and stability of encapsulating structure.
In other embodiment of the utility model, the plastic packaging layer of formation also can be covered in the second Cutting Road area surfaces, that is, adopt the mode of whole module to form described plastic packaging layer.
Please refer to Figure 18, at the interior formation through hole of described plastic packaging layer 211, described via bottoms exposes metal level 208 surfaces; Form the solder-bump 215 of filling full described through hole, and described solder-bump 215 tops are higher than plastic packaging layer 211 surface.
As an embodiment, the material of solder-bump 215 is tin, and the step that forms described solder-bump 215 comprises: form the metal material of filling full described through hole, adopt reflux technique, form described solder-bump 215.
Described solder-bump 215 top surfaces are shaped as arc, the material of solder-bump 215 is gold, tin or ashbury metal, and described ashbury metal can be plumbous for tin silver, tin, SAC, tin silver zinc, tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver antimony etc.
As a specific embodiment, described solder-bump 215 tops to the distance of plastic packaging layer 211 is 20 μ m to 100 μ m.
In the present embodiment, most solder-bump 215 surfaces are coated by plastic packaging layer 211, only retain few solder-bump 215 surfaces in external environment, effectively prevent that solder-bump 215 is oxidized by external environment, improves the reliability of the encapsulating structure of follow-up formation.And, in the interior formation solder-bump 215 of plastic packaging layer 211, the top of described solder-bump 215 is a little more than plastic packaging layer 211 surface (distance on solder-bump 215 tops to plastic packaging layer 211 surface is 20 μ m to 100 μ m), can make image sensing chip 230 be electrically connected to external circuit, can effectively reduce the thickness of the encapsulating structure of follow-up formation, be conducive to improve encapsulation and integration degree.
Please refer to Figure 19, along described the second Cutting Road region 250 (please refer to Figure 18), cut described substrate 204, form some single encapsulating structures.
In the present embodiment, metal level 208 sidewalls have certain distance from 250 borders, the second Cutting Road region, therefore, along the second Cutting Road region 250 cutting substrates 204, form some single encapsulating structures.Due to cutting technique not cutting metal layer 208 and resilient coating 207, and metal level 208 sidewalls are covered by plastic packaging layer 211, therefore in cutting, form after single encapsulating structure, plastic packaging layer 211 is still covered in metal level 208 sidewall surfaces, thereby prevent that metal level 208 sidewalls from exposing in external environment, improved the reliability and stability of encapsulating structure.
In the present embodiment, act on image sensing chip 230 encapsulation procedures seldom (image sensing chip 230 has only experienced attenuate and cutting process), make image sensing chip 230 keep higher performance, the yield of the encapsulating structure of formation gets a promotion, and the encapsulation performance of encapsulating structure is excellent; And the present embodiment, by the interior formation through hole of plastic packaging layer 211, forms the mode of solder-bump 215 in through hole, and image sensing chip 230 can be electrically connected to external circuit, has further reduced packaging technology step, packaging technology is simple.
And solder-bump 215 major parts are covered by plastic packaging layer 211, reduced the harmful effect of external environment to solder-bump 215, improve the reliability and stability of encapsulating structure; And solder-bump 215 tops are very little to the distance on plastic packaging layer 211 surface, are 20 μ m to 100 μ m, thereby reduce the thickness of the encapsulating structure of formation.
Meanwhile, because image sensing chip 230 is thinned to thinner thickness, make the encapsulating structure forming also there is thinner thickness.And the present embodiment can select the good image sensing chip 230 of yield and encapsulate, improved greatly the encapsulation yield of packaging efficiency and encapsulating structure, reduce packaging technology cost.
Accordingly, the present embodiment provides a kind of encapsulating structure, please refer to Figure 19, and described encapsulating structure comprises:
Substrate 204;
Be positioned at the resilient coating 207 on described substrate 204 surfaces and the metal level 208 that is positioned at resilient coating 207 surfaces;
The image sensing chip 230 of upside-down mounting above substrate 204, described image sensing chip 230 has video sensing district 201 and around the pad 202 in described video sensing district 201, and described pad 202 and metal level 208 are electrically connected to;
Be positioned at the plastic packaging layer 211 on described metal level 208 surfaces and image sensing chip 230 surfaces;
Be positioned at the through hole of described plastic packaging layer 211, and described via bottoms exposes metal level 208 surfaces;
Fill the solder-bump 215 of full described through hole, and solder-bump 215 tops are higher than plastic packaging layer 211 surface.
The material of described substrate 204 is unorganic glass, polymethyl methacrylate or filter glass, and in the utility model specific embodiment, described substrate 204 is light-transparent substrate.
In described resilient coating 207, there is the opening 209 that exposes substrate 204, in corresponding metal level 208, also there is the opening 209 that exposes substrate 204 surfaces, described video sensing district 201 is positioned at opening 209 tops, video sensing district 201 can receive extraneous light by described opening 209, in the present embodiment, the width of opening 209 is more than or equal to the width in video sensing district 201.
Described resilient coating 207 increases the adhesiveness between substrates 204 and metal level 208, thereby the adhesiveness between raising substrate 204 and image sensing chip 230 prevents between image sensing chip 230 and substrate 204 separated.
Substrate 204 surfaces have discrete metal level 208, and the position of discrete metal level 208 is corresponding with position and the quantity of pad 202 with quantity.Concrete, when video sensing district 201 4 sides all have some pads 202, hole 207 4 sides all have some discrete metal levels 208.In other embodiments, when video sensing district 201 1 sides have some pads, described hole one side has the discrete metal level of equal number.
The material of described resilient coating 207 is organic polymer photoresist, and described organic polymer photoresist is epoxide-resin glue, acrylic resin, polyimides glue, benzocyclobutene glue or polybenzoxazoles glue; The material of described metal level 208 is Cu, Al, W, Sn, Au or Sn-Au alloy.
In the present embodiment, described plastic packaging layer 211 metal level 208 sidewall surfaces, the sidewall that prevents metal level 208 is exposed in external environment, there is unnecessary being electrically connected to external circuit in the metal level 208 of avoiding being exposed in external environment, the material that can also prevent metal level 208 is oxidized by external environment, has improved the reliability of encapsulating structure.
Described encapsulating structure also comprises: metal coupling 203, described metal coupling 203, between pad 202 and metal level 208, connects described pad 202 and metal level 208 by described metal coupling 203.
The quantity of described metal coupling 203 is identical with the quantity of pad 202, and the spacing of adjacent metal projection 203 equates with the spacing of adjacent pad 202.
Being shaped as of described metal coupling 203 is square or spherical, and the material of described metal coupling 203 is tin, gold or ashbury metal.
In the present embodiment, the top shape of described solder-bump 215 is spherical, and the material of described solder-bump 215 is tin, gold or ashbury metal.
As a specific embodiment, the distance on described solder-bump 215 tops to plastic packaging layer 211 surface is 20 μ m to 100 μ m.
The encapsulating structure that the present embodiment provides, plastic packaging layer 211 envelopes image sensing chip 230, prevents that external environment from causing harmful effect to image sensing chip 230, improves the reliability and stability of encapsulating structure; In plastic packaging layer 211, be formed with the through hole that exposes metal level 208 surfaces, in through hole, be formed with solder-bump 215, by solder-bump 215, pad 202 is electrically connected to external circuit, both avoided damage or pollution that image sensing chip 230 is caused itself, the encapsulation performance of encapsulating structure is improved; And, solder-bump 215 major parts are enveloped by plastic packaging layer 211, reduced the area that solder-bump 215 contacts with external environment, thereby it is oxidized or be subject to the possibility of other damages to have reduced greatly solder-bump 215, further improves the reliability and stability of encapsulating structure.
Simultaneously, compared with prior art, the thickness of the image sensing chip 230 in the present embodiment encapsulating structure is significantly less than the thickness of the image sensing chip of prior art, and therefore, in the present embodiment, the thickness of encapsulating structure is significantly less than the thickness of the encapsulating structure of prior art.
And, because solder-bump 215 tops are very little to the distance on plastic packaging layer 211 surface, be 20 μ m to 100 μ m, thereby further reduced the thickness of encapsulating structure.
The utility model another embodiment also provide a kind of method for packing, Figure 20 to Figure 22 is the cross-sectional view of the another embodiment image sensor package of the utility model process, it should be noted that, in the present embodiment, the restriction such as the parameter of structure same with the above-mentioned embodiment and effect repeats no more in the present embodiment, specifically please refer to above-described embodiment.
Please refer to Figure 20, some single image sensing chips 230 are provided, described image sensing chip 230 has video sensing district 201 and around the pad 202 in described video sensing district; Substrate 204 is provided, and described substrate 204 comprises some functional areas 210 and the second Cutting Road region 250 between adjacent functional district 240, the metal level 208 that 240 surfaces, described substrate 204 functional areas are formed with resilient coating 207 and are positioned at resilient coating 207 surfaces; Described image sensing chip 230 upside-down mountings are placed in to the top of light-transparent substrate 204 functional areas 240, and described pad 202 and metal level 208 electrical connections.
In described metal level 208, have opening 209, described video sensing district 201 is positioned at opening 209 tops.Also comprise step: on described pad 202 surfaces or metal level 208 surface form metal couplings 203, described pad 202 and metal level 208 are electrically connected to by metal coupling 203.
The description of relevant image sensing chip 230, substrate 204, metal level 208, metal coupling 203 can, with reference to previous embodiment, not repeat them here.
Please refer to Figure 21, form the some glue-line 214 that is covered in described image sensing chip 230 sidewall surfaces; On described metal level 208 surfaces, form solder-bump 215, and described solder-bump 215 tops are higher than image sensing chip 230 surfaces.
Described some glue-line 214 can be covered in image sensing chip 230 partial sidewall surfaces, also can be covered in whole sidewall surfaces of image sensing chip 230.In the present embodiment, the some glue-line 214 of formation is also covered in metal coupling 203 sidewall surfaces.
Described some glue-line 214Shi video sensing district 201, in sealing state, prevents that external environment from causing harmful effect to image sensing chip 230.
As a specific embodiment, adopt point gum machine to carry out gluing process and form described some glue-line 211.
The material of described solder-bump 215 can be with reference to the explanation of previous embodiment.In the present embodiment, employing is planted ball technique and is formed described solder-bump 215, and the vertical range on solder-bump 215 tops to image sensing chip 230 surfaces is 20 μ m to 100 μ m.
Please refer to Figure 22, along described the second Cutting Road region 250 (please refer to Figure 21), cut described substrate 204, form some single encapsulating structures.
Described cutting technique can, with reference to the explanation of previous embodiment, not repeat them here.
In the present embodiment, because image sensing chip 230 has only experienced cutting technique (cutting wafer to be wrapped forms some single image sensing chips 230), by form the mode of solder-bump 215 on metal level 208 surfaces, image sensing chip 230 is electrically connected to external circuit, therefore described image sensing chip 230 has kept higher performance, thereby makes the encapsulation performance of the encapsulating structure that forms good.
And due to the thinner thickness of the image sensing chip 230 providing in the present embodiment (concrete reason can with reference to the explanation of previous embodiment), therefore, the thickness of the encapsulating structure of formation reduces.Meanwhile, the method for packing that the utility model embodiment provides, packaging technology is more simple.
Accordingly, this enforcement provides a kind of encapsulating structure, please refer to Figure 22, and described encapsulating structure comprises:
Substrate 204;
Be positioned at the resilient coating 207 on described substrate 204 surfaces and the metal level 208 that is positioned at resilient coating 207 surfaces;
The image sensing chip 230 of upside-down mounting above substrate 204, described image sensing chip 230 has video sensing district 201 and around the pad 202 in described video sensing district 201, and described pad 202 and metal level 208 are electrically connected to;
Be positioned at the solder-bump 215 on described metal level 208 surfaces, and described solder-bump 215 tops are higher than image sensing chip 230 surfaces.
Also comprise: metal coupling 203, described metal coupling 203, between pad 202 and metal level 208, is electrically connected to described pad 202 and metal level 208 by described metal coupling 203.
Also comprise: be covered in the some glue-line 214 of described image sensing chip 230 sidewall surfaces, and described some glue-line 214 is also covered in metal coupling 203 sidewall surfaces.Described some glue-line 214 plays the effect of protection image sensing chip 230, prevents that external environment from causing harmful effect to image sensing chip 230, improves the reliability of encapsulating structure.
The interior tool opening 209 of described metal level 208, video sensing district 201 is positioned at the top of opening 209, and the width of described opening 209 is more than or equal to the width in video sensing district 201.
In the present embodiment, the vertical range on solder-bump 215 tops to image sensing chip 230 surfaces is 20 μ m to 100 μ m, wherein, described vertical range refers to perpendicular to the distance on the in-plane of the surperficial place of metal level 208, and described image sensing chip 230 surfaces refer to the surface that is not formed with pad 202.
The encapsulating structure that the present embodiment provides is simple, by solder-bump 215 being set on metal level 208 surfaces, pad 202 is electrically connected to external circuit, has avoided damage or pollution that image sensing chip 230 is caused itself, the encapsulation performance of encapsulating structure is improved; And solder-bump 215 tops are very little to the distance on image sensing chip 230 surfaces, be 20 μ m to 100 μ m, make encapsulating structure there is less thickness, meet the development trend of semiconductor miniaturization microminiaturization.
Although the utility model discloses as above, the utility model is not defined in this.Any those skilled in the art, within not departing from spirit and scope of the present utility model, all can make various changes or modifications, and therefore protection range of the present utility model should be as the criterion with claim limited range.
Claims (11)
1. an encapsulating structure, is characterized in that, comprising:
Substrate;
The metal level that is positioned at the resilient coating of described substrate surface and is positioned at buffer-layer surface;
The image sensing chip of upside-down mounting above substrate, described image sensing chip has video sensing district and around the pad in described video sensing district, and described pad and metal level are electrically connected to;
Be positioned at the plastic packaging layer of described layer on surface of metal and image sensing chip surface;
Be positioned at the through hole of described plastic packaging layer, and described via bottoms exposes layer on surface of metal;
Fill the solder-bump of full described through hole, and described solder-bump top is higher than plastic packaging layer surface.
2. encapsulating structure as claimed in claim 1, is characterized in that, the distance on described solder-bump top to plastic packaging layer surface is 20 μ m to 100 μ m.
3. encapsulating structure as claimed in claim 1, is characterized in that, also comprises: metal coupling, metal coupling, between pad and metal level, connects described pad and metal level by described metal coupling.
4. encapsulating structure as claimed in claim 1, is characterized in that having opening in described resilient coating, and described video sensing district is positioned at opening top.
5. encapsulating structure as claimed in claim 4, is characterized in that, described A/F is more than or equal to video sensing sector width.
6. encapsulating structure as claimed in claim 1, is characterized in that, described metal level sidewall flushes with base side wall.
7. encapsulating structure as claimed in claim 1, is characterized in that, described plastic packaging layer is covered in metal level sidewall surfaces.
8. an encapsulating structure, is characterized in that, comprising:
Substrate;
The metal level that is positioned at the resilient coating of described substrate surface and is positioned at buffer-layer surface;
The image sensing chip of upside-down mounting above substrate, described image sensing chip has video sensing district and around the pad in described video sensing district, and described pad and metal level are electrically connected to;
Be positioned at the solder-bump of described layer on surface of metal, and described solder-bump top is higher than image sensing chip surface.
9. encapsulating structure as claimed in claim 8, is characterized in that, also comprises: metal coupling, described metal coupling, between pad and metal level, is electrically connected to described pad and metal level by described metal coupling.
10. encapsulating structure as claimed in claim 9, is characterized in that, also comprises: the some glue-line that is covered in described image sensing chip side wall surface and metal coupling sidewall surfaces.
11. encapsulating structures as claimed in claim 8, is characterized in that, tool opening in described resilient coating, and video sensing district is positioned at the top of opening.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420258956.7U CN203895460U (en) | 2014-05-20 | 2014-05-20 | Packaging structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420258956.7U CN203895460U (en) | 2014-05-20 | 2014-05-20 | Packaging structure |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103972256A (en) * | 2014-05-20 | 2014-08-06 | 苏州晶方半导体科技股份有限公司 | Packaging method and packaging structure |
| CN111029261A (en) * | 2019-11-22 | 2020-04-17 | 徐州顺意半导体科技有限公司 | Biological identification module and preparation method thereof |
| CN111092019A (en) * | 2019-11-22 | 2020-05-01 | 徐州顺意半导体科技有限公司 | Fingerprint identification module and preparation method thereof |
| US20220077326A1 (en) * | 2020-09-04 | 2022-03-10 | Advanced Semiconductor Engineering, Inc. | Package structure and method for manufacturing the same |
-
2014
- 2014-05-20 CN CN201420258956.7U patent/CN203895460U/en not_active Withdrawn - After Issue
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103972256A (en) * | 2014-05-20 | 2014-08-06 | 苏州晶方半导体科技股份有限公司 | Packaging method and packaging structure |
| CN103972256B (en) * | 2014-05-20 | 2017-03-29 | 苏州晶方半导体科技股份有限公司 | Method for packing and encapsulating structure |
| CN111029261A (en) * | 2019-11-22 | 2020-04-17 | 徐州顺意半导体科技有限公司 | Biological identification module and preparation method thereof |
| CN111092019A (en) * | 2019-11-22 | 2020-05-01 | 徐州顺意半导体科技有限公司 | Fingerprint identification module and preparation method thereof |
| CN111029261B (en) * | 2019-11-22 | 2021-09-24 | 云南安防科技有限公司 | Biological identification module and preparation method thereof |
| US20220077326A1 (en) * | 2020-09-04 | 2022-03-10 | Advanced Semiconductor Engineering, Inc. | Package structure and method for manufacturing the same |
| US11626525B2 (en) * | 2020-09-04 | 2023-04-11 | Advanced Semiconductor Engineering, Inc. | Package structure and method for manufacturing the same |
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