CN109037171A - Integrated circuit package body and its manufacturing method - Google Patents
Integrated circuit package body and its manufacturing method Download PDFInfo
- Publication number
- CN109037171A CN109037171A CN201810987491.1A CN201810987491A CN109037171A CN 109037171 A CN109037171 A CN 109037171A CN 201810987491 A CN201810987491 A CN 201810987491A CN 109037171 A CN109037171 A CN 109037171A
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- China
- Prior art keywords
- glue film
- chip
- package substrate
- integrated circuit
- packaging body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The present invention relates to integrated circuit package body and its manufacturing methods.One embodiment of the invention provides an integrated circuit package body comprising: package substrate, surface are provided with conductive contact；Chip comprising: first surface；The second surface opposite with first surface；And metal structure, it is set to first surface；Metal structure is connect with conductive contact, and cavity is collectively formed with the surface of the first surface of chip, package substrate；Glue film extends at least above height of the first surface of chip from the surface of package substrate and seals cavity；And packaging body, covering package substrate, glue film and chip.The present invention can be realized with a low cost highly reliable product quality.
Description
Technical field
The present invention relates to field of semiconductor package, more particularly to integrated circuit package body and manufacture integrated circuit package body
Method.
Background technique
Surface acoustic wave (Surface acoustic wave, SAW) filter is one of component indispensable in communication apparatus.
When SAW filter chip or chip (hereafter referred to collectively as " SAW filter chip ") are integrated to the surface of conductor package substrate
When upper, needed to guarantee the sky that there is the interdigital transducer (Inter-Digital Transducer, IDT) for accommodating SAW filter
Chamber, to realize the effect of IDT filtering.Other than the condition of formation to be met and protection cavity, also need to guarantee that encapsulating products have
Good reliability and it can be realized quick volume production.
SAW filter chip quickly and is in batches encapsulated for how to realize, while it is good to guarantee that the product after encapsulation has
Reliability, there are still considerable technical problem urgent need to resolve in the industry.
Summary of the invention
One of the objects of the present invention is to provide integrated circuit package body and the methods for manufacturing integrated circuit package body, can
The integrated circuit package body of low-cost and high-quality is realized with simple processing procedure and technique.
One embodiment of the invention provides an integrated circuit package body comprising: package substrate, surface are provided with conduction
Contact；Chip comprising: first surface；Second surface, the second surface are opposite with the first surface；And metal structure,
It is set to the first surface；The metal structure is connect with the conductive contact, and with the first surface of the chip, institute
Cavity is collectively formed in the surface for stating package substrate；Glue film extends at least above described crystalline substance from the surface of the package substrate
The height of the first surface of piece simultaneously seals the cavity；And packaging body, cover the package substrate, the glue film and the crystalline substance
Piece.
In another embodiment of the invention, the glue film is formed by the colloid or dry film of processing fluidity difference.In this hair
In bright another embodiment, the second surface of the glue film covering chip.In another embodiment of the invention, the glue film
Thickness is at least more than 1 micron.In another embodiment of the present invention, the packaging body and glue film are formed from different materials, shape
It is greater than the processing fluidity for forming the material of glue film at the processing fluidity of the material of packaging body.In another embodiment of the present invention
In, it forms the thermal expansion coefficient of the material of the packaging body and forms the similar thermal expansion coefficient of the material of the package substrate.
In another embodiment of the present invention, the chip is filter wafer.
Another embodiment of the present invention provides the method for a manufacture integrated circuit package body comprising: package substrate is provided,
The package substrate includes surface, and the surface is provided with conductive contact；Chip is provided, the chip includes: first surface；The
Two surfaces, the second surface are opposite with the first surface；And metal structure, it is set to the first surface；It will be described
Chip is set to the surface of the package substrate, wherein the metal structure is configured to connect to the conductive contact, and with
The first surface of the chip, the package substrate surface between form cavity；Glue film is set in the table of the package substrate
Face so that the glue film from the surface of the package substrate extend at least above described chip first surface height and
Seal the cavity；And packaging body is formed, the packaging body at least covers the surface of the package substrate, the glue film and described
Chip.
Integrated circuit package body provided in an embodiment of the present invention and its manufacturing method can not only guarantee the complete of IDT cavity
It is whole, additionally it is possible to which that the product after guaranteeing encapsulation has good reliability, realizes the mesh of integrated circuit package body rapid batch production
, and also have many advantages, such as that manufacturing process is simple and manufacturing cost is low.
Detailed description of the invention
Hereinafter will be briefly explained attached drawing necessary in order to describe the embodiment of the present invention or the prior art in order to
The embodiment of the present invention is described.It should be evident that the attached drawing in being described below is merely the section Example in the present invention.To ability
For field technique personnel, under the premise of not needing creative work, still can according to these attached drawings in illustrated by structure
To obtain the attached drawing of other embodiments.
Fig. 1 is the longitudinal cross-section schematic diagram of integrated circuit package body according to an embodiment of the invention
Fig. 2 a-2d is the flow diagram of embodiment manufacture integrated circuit package body according to the present invention, can manufacture Fig. 1
Shown in integrated circuit package body
Fig. 3 a-3c is the flow diagram of another embodiment manufacture integrated circuit package body according to the present invention, can be manufactured
Integrated circuit package body shown in FIG. 1
Specific embodiment
Embodiments herein will be shown hereinafter by detailed retouch.In present specification full text, by identical or
Similar component and component with the same or similar function are indicated by like reference numerals.It is described herein to have
Closing the embodiment of attached drawing is illustrative, graphic nature and the basic comprehension for providing to the application.The reality of the application
It applies example and is not construed as limitation of the present invention.
In the present specification, unless except being specified or being limited, the word of relativity for example: it is " central ", " longitudinal
", " lateral ", " front ", " rear ", " right ", " left ", " internal ", " external ", " lower ",
" higher ", " horizontal ", " vertically ", " being higher than ", " being lower than ", " top ", " lower section ", " top ", " bottom "
And its derivative word (such as " horizontally ", " down ", " upward " etc.) should be construed to reference under discussion
It is described or retouch the direction shown in the accompanying drawings.The word of these relativities be only used for description on convenience, and be not required for by
The application construction or operation in a certain direction.
As used herein, term " substantially ", " generally ", " essence " and " close " is to describe and illustrate small change
Change.When being used in combination with event or situation, the term can be referred to the example that wherein event or situation accurately occur and its
The example that middle event or situation pole approximatively occur.For example, when combination numerical value is in use, term can be referred to be less than or equal to
± 10% variation range of the numerical value, e.g., less than or equal to ± 5%, be less than or equal to ± 4%, be less than or equal to ±
3%, it is less than or equal to ± 2%, is less than or equal to ± 1%, is less than or equal to ± 0.5%, is less than or equal to ± 0.1% or small
In or equal to ± 0.05%.For example, if difference between two values be less than or equal to the average value of described value ±
20% (e.g., less than or equal to ± 10%, be less than or equal to ± 5%, be less than or equal to ± 4%, be less than or equal to ± 3%, it is small
In or be equal to ± 2%, be less than or equal to ± 1%, be less than or equal to ± 0.5%, be less than or equal to ± 0.1% or be less than or wait
In ± 0.05%), then it is assumed that described two numerical value " generally " are identical and " close ".
Furthermore for ease of description, " first ", " second ", " third " etc. can be used to distinguish herein a figure or one
The different components of series of drawing." first ", " second ", " third " etc. are not intended to describe corresponding component.
In this application, unless except being specified or being limited, " setting ", " connection ", " coupling ", " fixation " and with
Its similar word is that widely, and those skilled in the art can understand above-mentioned use according to specific circumstances in use
Word can be, for example, fixedly connected, removable connection or integrated connection；It is also possible to mechanically connection or electrical ties；Its
It can be the indirect link for directly linking or passing through intermediary agent structure；It is also possible to the internal communication of two components.
It note that " chip " as referred to herein refers to any kind of chip or chip for convenience of describing.
Fig. 1 is the longitudinal cross-section schematic diagram of integrated circuit package body 100 according to an embodiment of the invention.As shown in Figure 1,
Integrated circuit package body 100 according to an embodiment of the invention includes: package substrate 10, chip 12, glue film 14 and packaging body 16.
The package substrate 10 includes surface 101, and the surface 103 opposite with surface 101.Surface 101 is provided with one or more
A conductive contact 105, surface 103 are provided with one or more external pin (not shown)s.The package substrate 10 can be this
Common various package substrates in field, such as printed circuit board, papery copper foil laminates, composite copper foil laminates, or polymerization
The glass fibre class copper foil laminates of object dipping.The package substrate 10 may include interconnection structure, for example, redistribution layer (RDL) or
Earth element.
The chip 12 includes surface 121, the surface 123 opposite with surface 121, metal structure 125 and is located on surface 121
Interdigital transducer IDT (not shown).The chip 12 is SAW filter chip.The metal structure 125 can be
Tin ball, metal column or other structures commonly used in the art.The chip 12 can by upside-down mounting die bond (Flip-Chip Die Bond,
FC Die Bond) mode the surface 101 of package substrate 10, and metal structure 125 and envelope are set to via metal structure 125
The conductive contact 105 for filling substrate 10 connects, so that chip 12 may be electrically connected to package substrate 10 by metal structure 125.It should
The cavity for accommodating the IDT of chip 12 is collectively formed with the surface 121 of chip 12, the surface 101 of package substrate 10 for metal structure 125
18。
The glue film 14 extends to the height roughly the same with surface 123 from the surface of package substrate 10 101 upward and encloses
Cavity 18 is sealed, to play the role of protecting cavity 18.Glue film 14 is by processing fluidity difference and to form bearing height
Colloid or dry film.The thickness D (referring to Fig. 1) of glue film 14 is at least more than 1 micron.In another embodiment of the application, glue film 14
Thickness D at least more than 10 microns.In the another embodiment of the application, the thickness D of glue film 14 is at least more than 20 microns.Glue film
14 thickness D guarantees that when being packaged processing procedure to form packaging body 16, there is glue film 14 enough intensity to prevent cavity 18 from meeting with
To destroying to protect the complete of cavity 18, the stability of product is improved.
In another embodiment of the application, which extends at least upward from the surface of package substrate 10 101
Higher than the surface 121 of filter wafer 12 height and seal cavity 18.For example, glue film 14 is from the surface of package substrate 10 101
The height roughly the same with surface 121 or height between surface 121 and surface 123 are extended to upward and seal cavity
18 or glue film 14 extend to above the height on surface 123 upward from the surface of package substrate 10 101 and seal cavity 18,
And glue film 14 covers the surface 123 of filter wafer 12.
The packaging body 16 covers package substrate 10, chip 12 and glue film 14.The encapsulating material for forming packaging body 16 can be this
Synthetic resin, plastics or the ceramic material of common various insulation in field, such as, but not limited to, epoxy resin.In some realities
It applies in example, forms the thermal expansion coefficient phase of the thermal expansion coefficient and the material for forming package substrate 10 of the material of the packaging body 16
Closely, to reduce the warped degree of integrated circuit package body 100, for example, forming the thermal expansion coefficient and shape of the material of the packaging body 16
About ± 20% is differed at the thermal expansion coefficient of the package substrate 10, preferably, about ± 10%.Packaging body 16 and glue film 14 are by difference
Material formed.It is heat cured for forming the material of glue film 14, therefore glue film 14 will not occur again after by hot setting
Fusing, so that glue film 14 will not be affected by temperature still seal cavity during forming packaging body 16
18.In some embodiments, the processing fluidity for forming the material of packaging body 16 is greater than the processing stream for forming the material of glue film 14
Dynamic property.Further, since forming the material of packaging body 16 has good processing fluidity, thus joint filling is stronger, thus in shape
It can prevent steam from entering during at packaging body 16, to improve the reliability of integrated circuit package body 100.
The embodiment of the present application also provides the methods for manufacturing integrated circuit package body 100.
Fig. 2 a-2d is the flow diagram that integrated circuit package body 100 is manufactured according to one embodiment of the application, can be manufactured
Integrated circuit package body 100 as shown in Figure 1.
As shown in Figure 2 a, package substrate 10 is provided.The package substrate 10 includes surface 101, and the table opposite with surface 101
Face 103.Surface 101 is provided with one or more conductive contacts 105, and surface 103 is provided with one or more external pins and (does not show in figure
Out).The package substrate 10 can be various package substrates commonly used in the art, such as printed circuit board, papery copper foil are laminated
Object, composite copper foil laminates or polymer impregnated glass fibre class copper foil laminates.The package substrate 10 may include mutually linking
Structure, such as redistribution layer (RDL) or earth element.
Then, chip 12 is provided.The chip 12 includes surface 121, the surface 123 opposite with surface 121, metal structure
125 and the interdigital transducer IDT (not shown) on surface 121.The chip 12 is SAW filter.The metal
Structure 125 can be tin ball, metal column or other structures commonly used in the art.Pass through upside-down mounting die bond (Flip-Chip Die
Bond, FC Die Bond) mode the chip 12 is set to the surface 101 of package substrate 10 via metal structure 125, make
It obtains metal structure 125 to connect with conductive contact 105, so that chip 12 may be electrically connected to package substrate by metal structure 125
10.The IDT for accommodating chip 12 is collectively formed with the surface 121 of chip 12, the surface 101 of package substrate 10 for the metal structure 125
Cavity 18.
As shown in Figure 2 b, glue film 14 is set in the surface of package substrate 10 101 by way of suppressing glue film 14, so that
Glue film 14 extends to the height on covering surface 123 upward from the surface of package substrate 10 101 and seals cavity 18, to play
Protect the effect of cavity 18.Glue film 14 is the colloid or dry film shape that can for example, form bearing height by processing fluidity difference
At so that good protection of the cavity 18 by glue film 14.Then, technological means commonly used in the art is used to make glue film 14 solid
Change.
As shown in Figure 2 c, hemisection (half cut) technique is used to remove cured part glue film 14 in package substrate 10
Surface 101 on form encapsulated space, remaining glue film 14 extends to and chip 12 upward from the surface of package substrate 10 101
Surface 123 roughly the same height and still seal cavity 18, to protect cavity 18.In some embodiments, remaining
The thickness D of glue film 14 is (referring to Fig. 1 and Fig. 2 c) at least more than 1 micron.In another embodiment of the application, remaining glue film 14
Thickness D at least more than 10 microns.In the another embodiment of the application, the thickness D of remaining glue film 14 is micro- at least more than 20
Rice.The thickness D of remaining glue film 14 guarantees that when being packaged processing procedure to form packaging body 16, glue film 14 has enough intensity
Prevent cavity 18 by destroying to protect the complete of cavity 18.
In another embodiment of the application, part glue film 14 can be removed using other this field any suitable techniques
To form encapsulated space on the surface of package substrate 10 101, wherein remaining glue film 14 from the surface of package substrate 10 101 to
Shangdi extends to the height on the surface 121 of at least above filter wafer 12 and seals cavity 18.In the another implementation of the application
In example, remaining glue film 14 can extend to upward between surface 121 and surface 123 from the surface of package substrate 10 101
Height and seal cavity 18.In another embodiment of the application, remaining glue film 14 from the surface of package substrate 10 101 to
Shangdi extends to above the height on surface 123 and seals cavity 18, and glue film 14 covers the surface 123 of chip 12.
As shown in Figure 2 d, packaging body 16 is formed using compression molding (compression molding) technique, so that encapsulation
Body 16 at least covers surface 101, glue film 14 and the chip 12 of package substrate 10.The material of packaging body 16 can be commonly used in the art
Various insulation synthetic resin, plastics or ceramic material, such as, but not limited to, epoxy resin.In some embodiments, it is formed
The similar thermal expansion coefficient of the material of the thermal expansion coefficient and formation of the material of the packaging body 16 package substrate 10, to reduce collection
At the warped degree of circuit package 100, for example, forming the thermal expansion coefficient of the material of the packaging body 16 and forming the package substrate
The thermal expansion coefficient difference about ± 20% of 10 material, preferably, about ± 10%.Packaging body 16 and glue film 14 are by different materials
It is formed.It is heat cured for forming the material of glue film 14, therefore glue film 14 will not melt again after by hot setting, from
And glue film 14 will not be affected by temperature still seal cavity 18 during forming packaging body 16.Some
In embodiment, the processing fluidity for forming the material of packaging body 16 is greater than the processing fluidity for forming the material of glue film 14.In addition,
Material due to forming packaging body 16 has good processing fluidity, thus joint filling is stronger, thus forming packaging body 16
During can prevent steam from entering, to improve the reliability of integrated circuit package body 100.
In another embodiment of the application, transmission mold forming (transfer molding) or other this fields can be used
Any suitable technique forms packaging body 16, so that packaging body 16 at least covers surface 101, glue film 14 and the crystalline substance of package substrate 10
Piece 12.
Then, the packaging body for completing injection molding is identified, the content of mark is personalized.Then, to multiple collection
It is split at circuit package 100, to obtain integrated circuit package body 100 as shown in Figure 1.
Fig. 3 a-3c is the flow diagram of another embodiment manufacture integrated circuit package body according to the present invention, can be manufactured
Integrated circuit package body shown in FIG. 1.
As shown in Figure 3a, package substrate 10 is provided.The package substrate 10 includes surface 101, and the table opposite with surface 101
Face 103.Surface 101 is provided with one or more conductive contacts 105, and surface 103 is provided with one or more external pins and (does not show in figure
Out).The package substrate 10 can be various package substrates commonly used in the art, such as printed circuit board, papery copper foil are laminated
Object, composite copper foil laminates or polymer impregnated glass fibre class copper foil laminates.The package substrate 10 may include mutually linking
Structure, such as redistribution layer (RDL) or earth element.
Then, chip 12 is provided.The chip 12 includes surface 121, the surface 123 opposite with surface 121, metal structure
125 and the interdigital transducer IDT (not shown) on surface 121.The chip 12 is SAW filter.The metal
Structure 125 can be tin ball, metal column or other structures commonly used in the art.Pass through upside-down mounting die bond (Flip-Chip Die
Bond, FC Die Bond) mode the chip 12 is set to the surface 101 of package substrate 10 via metal structure 125, make
It obtains metal structure 125 to connect with conductive contact 105, so that chip 12 may be electrically connected to package substrate by metal structure 125
10.The IDT for accommodating chip 12 is collectively formed with the surface 121 of chip 12, the surface 101 of package substrate 10 for the metal structure 125
Cavity 18.
As shown in Figure 3b, glue film 14 is arranged in the surface of package substrate 10 101, so that glue film 14 by mode for dispensing glue
It is extended to upward from the surface of package substrate 10 101 and the roughly the same height on the surface 123 of chip 12 and seals cavity
18, to play the role of protecting cavity 18.Glue film 14 is the glue that can for example, form bearing height by processing fluidity difference
Body or dry film are formed, so that good protection of the cavity 18 by glue film 14.Then, made using technological means commonly used in the art
Glue film 14 is obtained to solidify.
In some embodiments, the thickness D (referring to Fig. 3 b) of glue film 14 is at least more than 1 micron.In another reality of the application
It applies in example, the thickness D of glue film 14 is at least more than 10 microns.In the another embodiment of the application, the thickness D of glue film 14 is at least big
In 20 microns.The thickness D of glue film 14 guarantees that when being packaged processing procedure to form packaging body 16, glue film 14 has enough intensity
Prevent cavity 18 by destroying to protect the complete of cavity 18.
In another embodiment of the application, glue film 14 extends at least high upward from the surface of package substrate 10 101
In the surface of filter wafer 12 121 height and seal cavity 18.In the another embodiment of the application, glue film 14 can be from envelope
The height that is extended between surface 121 and surface 123 upward of surface 101 of dress substrate 10 simultaneously seals cavity 18.At this
In another embodiment of application, glue film 14 extends to above the height on surface 123 simultaneously from the surface of package substrate 10 101 upward
Cavity 18 is sealed, and glue film 14 covers the surface 123 of chip 12.
In another embodiment of the application, glue film 14 is set by way of drawing glue in the surface of package substrate 10 101.
As shown in Figure 3c, packaging body 16 is formed using compression molding (compression molding) technique, so that encapsulation
Body 16 at least covers surface 101, glue film 14 and the chip 12 of package substrate 10.The material of packaging body 16 can be commonly used in the art
Various insulation synthetic resin, plastics or ceramic material, such as, but not limited to, epoxy resin.In some embodiments, it is formed
The similar thermal expansion coefficient of the material of the thermal expansion coefficient and formation of the material of the packaging body 16 package substrate 10, to reduce collection
At the warped degree of circuit package 100, for example, forming the thermal expansion coefficient of the material of the packaging body 16 and forming the package substrate
The thermal expansion coefficient difference about ± 20% of 10 material, preferably, about ± 10%.Packaging body 16 and glue film 14 are by different materials
It is formed.It is heat cured for forming the material of glue film 14, therefore glue film 14 will not melt again after by hot setting, from
And glue film 14 will not be affected by temperature still seal cavity 18 during forming packaging body 16.Some
In embodiment, the processing fluidity for forming the material of packaging body 16 is greater than the processing fluidity for forming the material of glue film 14.In addition,
Material due to forming packaging body 16 has good processing fluidity, thus joint filling is stronger, thus forming packaging body 16
During can prevent steam from entering, to improve the reliability of integrated circuit package body 100.
In another embodiment of the application, transmission mold forming (transfer molding) or other this fields can be used
Any suitable technique forms packaging body 16, so that packaging body 16 at least covers surface 101, glue film 14 and the crystalline substance of package substrate 10
Piece 12.
Then, the packaging body for completing injection molding is identified, the content of mark is personalized.Then, to multiple collection
It is split at circuit package 100, to obtain integrated circuit package body 100 as shown in Figure 1.
The embodiment of the present application guarantees the complete of IDT cavity by using glue film, has manufacturing cost low, packaging technology letter
Many advantages, such as list, suitable rapid batch production.
Technology contents and technical characterstic of the invention have revealed that as above, however those skilled in the art still may base
Make various replacements and modification without departing substantially from spirit of that invention in teachings of the present invention and announcement.Therefore, protection model of the invention
The revealed content of embodiment should be not limited to by enclosing, and should include various without departing substantially from replacement and modification of the invention, and be this patent
Application claims are covered.
Claims (15)
1. a kind of integrated circuit package body comprising:
The surface of package substrate, the package substrate is provided with conductive contact；
Chip comprising:
First surface；
Second surface, the second surface are opposite with the first surface；And
Metal structure is set to the first surface；The metal structure is connect with the conductive contact, and with the chip
The first surface, the package substrate the surface cavity is collectively formed；
Glue film extends to the height of the first surface of at least above described chip from the surface of the package substrate
And seal the cavity；And
Packaging body covers the package substrate, the glue film and the chip.
2. integrated circuit package body according to claim 1, wherein the glue film is by the colloid of processing fluidity difference or dry
Film is formed.
3. integrated circuit package body according to claim 1, wherein the glue film covers the second surface of the chip.
4. integrated circuit package body described in any one of -3 claims according to claim 1, wherein the thickness of the glue film
At least more than 1 micron.
5. integrated circuit package body described in any one of -3 claims according to claim 1, wherein the packaging body and institute
It states glue film to be formed from different materials, the processing fluidity for forming the material of the packaging body is greater than the material for forming the glue film
Processing fluidity.
6. integrated circuit package body described in any one of -3 claims according to claim 1, wherein forming the packaging body
Material thermal expansion coefficient and formed the package substrate material similar thermal expansion coefficient.
7. integrated circuit package body described in any one of -3 claims according to claim 1, wherein the chip is filtering
Device chip.
8. a kind of method for manufacturing integrated circuit package body comprising:
Package substrate is provided, the package substrate includes surface, and the surface is provided with conductive contact；
Chip is provided, the chip includes:
First surface；
Second surface, the second surface are opposite with the first surface；And
Metal structure is set to the first surface；
The chip is set to the surface of the package substrate, wherein the metal structure be configured to connect to it is described
Conductive contact, and with the first surface of the chip, the package substrate the surface between form cavity；
Glue film is set in the surface of the package substrate, so that the glue film prolongs from the surface of the package substrate
It extends to the height of the first surface of at least above described chip and seals the cavity；And
Packaging body is formed, the packaging body at least covers the surface, the glue film and the chip of the package substrate.
9. according to the method described in claim 8, wherein the glue film is formed by the colloid or dry film of processing fluidity difference.
10. according to the method described in claim 8, wherein the glue film covers the second surface of the chip.
11. according to method described in any one of claim 8-10 claim, wherein the thickness of the remaining glue film
Degree is at least more than 1 micron.
12. according to method described in any one of claim 8-10 claim, wherein the packaging body and the glue film by
Different materials are formed, and the processing fluidity for forming the material of the packaging body is greater than the processing stream for forming the material of the glue film
Dynamic property, and form the thermal expansion coefficient phase of the thermal expansion coefficient and the material for forming the package substrate of the material of the packaging body
Closely.
13. according to method described in any one of claim 8-10 claim, wherein by way of suppressing glue film, dispensing
Mode or draw glue mode the glue film is set in the surface of the package substrate.
14. according to method described in any one of claim 8-10 claim, wherein the chip is filter wafer.
15. according to the method for claim 13, wherein the glue film is arranged in described by way of the compacting glue film
The step of surface of package substrate includes: the removal portion after the surface of the glue film in the package substrate is arranged
Point glue film is to form encapsulated space on the surface of the package substrate, wherein the remaining glue film is from the envelope
The surface of dress substrate extends to the height of the first surface of at least above described chip and seals the cavity.
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