CN108958985A - Chip - Google Patents
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- Publication number
- CN108958985A CN108958985A CN201710355661.XA CN201710355661A CN108958985A CN 108958985 A CN108958985 A CN 108958985A CN 201710355661 A CN201710355661 A CN 201710355661A CN 108958985 A CN108958985 A CN 108958985A
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- Prior art keywords
- low
- voltage
- power source
- spare area
- type device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
Abstract
A kind of chip, the spare area of electronic system, it is characterized in that, the spare area includes the first kind device and Second Type device, the spare area has backup power source, in backup power source power supply, the backup power source provides different voltage to the first kind device and Second Type device.The first kind device and Second Type device can effectively reduce electric leakage, reduce power consumption in different operating at voltages.
Description
Technical field
The present invention relates to the field IC more particularly to a kind of spare area and electronic systems.
Background technique
As the scale of IC chip is increasing, digital circuit is also corresponding more and more, it is followed by that power consumption
It can be increasing.For the equipment of portable device and use battery, the demand for reducing IC chip power consumption is more and more stronger
It is strong.With popularizing for green energy resource, similarly for the low-power consumption of IC chip, super low-power consumption proposes harsh challenge.
In chip, random access memory (RAM) can be usually configured, additionally usually can all there is one piece of spare random read-write
Memory (Backup RAM).Chip can use the read-write that RAM carries out data, save operation.But random access memory
(RAM) the characteristics of, is, when entire chip all power down, the data saved in RAM can also lose therewith.Spare random read-write
Memory (Backup RAM) also has the characteristics that identical.Data therein can not be maintained when chip power-down.
On the other hand, present IC chip proposes more requirements to power consumption, needs power consumption that can effectively be reduced.
The present invention proposes that a kind of spare area, spare random access memory are placed on spare area, can fall in chip
When electric, data are still able to maintain, and are avoided that the excessive problem of power consumption.
Summary of the invention
Technical problem to be solved by the present invention lies in overcome problems of the prior art, provide a kind of spare area
Domain, spare random access memory are placed on spare area, can be maintained under backup power source and keep when chip power-down
Data, and it is avoided that the excessive problem of power consumption.
To solve the above-mentioned problems, the technical scheme is that it is such:
A kind of spare area of electronic system, the spare area include the first kind device and Second Type device
Part, the spare area have backup power source, and in backup power source power supply, the backup power source is to the first kind device
Different voltage is provided with Second Type device.
The voltage that the backup power source is provided to the first kind device is higher than the backup power source to second class
The voltage that type device provides.The backup power source is generally 3v~5v to the voltage that the first kind device provides；It is described standby
1.1V~1.2V is generally to the voltage that the Second Type device provides with power supply.
The backup power source is powered by a voltage reduction module to the Second Type device.
The voltage reduction module includes band-gap reference, low-pass filter and the first low pressure difference linear voltage regulator, the low pass
Filter connects the backup power source and a low-voltage, and the band-gap reference connects the low-pass filter and the low-voltage,
First low pressure difference linear voltage regulator connects the backup power source, band-gap reference, the low-voltage and Second Type device
One end, another termination low-voltage of the Second Type device；Or, the voltage reduction module includes band-gap reference, low-pass filter
And first low pressure difference linear voltage regulator, the band-gap reference connect the backup power source and a low-voltage, the low-pass filtering
Device connects the band-gap reference and the low-voltage, and first low pressure difference linear voltage regulator connects the band-gap reference, described
One end of low-voltage and Second Type device, another termination low-voltage of the Second Type device.
One end of the Second Type device is connect with a main power source VCC, when the main power source stops powering, described the
Two types of devices and the first kind device are powered by the backup power source.
The first kind device is located at one first field, and the Second Type device is located at one second field.
The first kind device includes clock wake-up module, and the clock wake-up module connects the backup power source.
The clock wake-up module includes a device real-time controller and a grade crystal oscillator in parallel.
The Second Type device includes spare random access memory.
The present invention simultaneously proposes a kind of electronic system, which is characterized in that including spare area as described above.The Department of Electronics
System can be the electronic systems such as MCU.
The present invention provides a kind of spare area, and the spare area includes the first kind device and Second Type device
Part, the spare area has backup power source, and in chip power-down, the first kind device and Second Type device are described in
Backup power source power supply, guarantees that the first kind device and Second Type device will not cannot work since system is powered down；Institute
It states backup power source and provides different voltage to the first kind device and Second Type device, guarantee the first kind device
With Second Type device in different operating at voltages.Electric leakage can be effectively reduced, power consumption is reduced.
Further, the first kind device includes clock wake-up module, the Second Type device include it is spare with
Machine memory, in backup power source power supply, the operating voltage of the clock wake-up module is greater than the spare random storage
Device, the spare random access memory will not cannot work since system is powered down, and the spare random access memory can be allowed to be in
Standby mode and the data saved will not lose；In backup power source power supply, the voltage of the spare random access memory is low,
The leakage current that the spare random access memory can be effectively reduced, reduces the power consumption of spare area.
Detailed description of the invention
The following describes the present invention in detail with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the circuit diagram for indicating spare area according to an embodiment of the invention.
Fig. 2 is the implementation method flow diagram for indicating spare area according to an embodiment of the invention.
Specific embodiment
A kind of all cores of spare area (core) field.The leakage current (leak electric current) of the core device in the field core
It compares input and output device (I/O device) to be greater, therefore under the biggish certain techniques of the leakage current of core device, standby function
Consumption can be quite big.
In another spare area, since LDO also needs to give device Sub-OSC and RTC power supply, when need will be spare by user
When random access memory is closed, LDO can not be also switched off and achieve the purpose that reduce power consumption.
Due to technique, the leakage current of core (core) device is very big.If all according to a kind of spare area
The core field (core) is designed, the operating current and leakage current of device real-time controller (RTC) and secondary crystal oscillator (Sub-OSC)
Summation will be considerable, wherein leakage current occupies significant proportion.In order to reduce power consumption, it is contemplated that IO (input and output) device
Leakage current compared to core device it is much smaller, the present invention proposes that spare random access memory and the mixing of the field IO function are taken
It carries.
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, tie below
Conjunction is specifically illustrating, and the present invention is further explained.
The present invention proposes that a kind of spare area of electronic system, the spare area include the first kind device and
Two types of devices, the spare area are (described standby i.e. when normal main power source disconnects by backup power source progress stand-by power supply
Powered with power supply to the spare area), in backup power source power supply, the backup power source is to the first kind device
Different voltage is provided with Second Type device.
The voltage that the backup power source is provided to the first kind device is higher than the backup power source to second class
The voltage that type device provides.The backup power source is generally 3v~5v to the voltage that the first kind device provides；It is described standby
1.1V~1.2V is generally to the voltage that the Second Type device provides with power supply.
The first kind device includes clock wake-up module, and the clock wake-up module connects the backup power source.Institute
Stating clock wake-up module includes a device real-time controller and a grade crystal oscillator in parallel.The Second Type device includes spare
Random access memory.
The present invention provides a kind of spare area, and the spare area includes the first kind device and Second Type device
Part, the spare area has backup power source, and in chip power-down, the first kind device and Second Type device are described in
Backup power source power supply, guarantees that the first kind device and Second Type device will not cannot work since system is powered down；Institute
It states backup power source and provides different voltage to the first kind device and Second Type device, guarantee the first kind device
With Second Type device in different operating at voltages, electric leakage can be effectively reduced, power consumption is reduced.
Fig. 1 is the circuit diagram for indicating spare random access memory according to an embodiment of the invention.
Referring to Fig. 1, the spare area 10 includes the first kind device and Second Type device, the spare area
10 carry out stand-by power supply by a backup power source (VBAT), in the backup power source (VBAT) power supply, the backup power source
(VBAT) different voltage is provided to the first kind device and Second Type device.
In the present embodiment, the first kind device be located at one first field (be in the present embodiment the field IO 12,
That is the operating voltage in the field is generally 3v~5v), the Second Type device be located at one second field (in the present embodiment for
The operating voltage in the field core 11, the i.e. field is generally 1.1V~1.2V).
The first kind device includes clock wake-up module, and the clock wake-up module connects the backup power source
(VBAT).Specifically, the clock wake-up module includes a device real-time controller (RTC) 122 and a grade crystal oscillator in parallel
(Sub-OSC) 121, the clock wake-up module is used to provide clock to electronic system.The first kind device can also wrap
Other modules are included, as long as equal with the operating voltage of the clock wake-up module, within thought range of the invention.
The Second Type device includes spare random access memory (backup RAM) 111.The spare area 10 has standby
With power supply (VBAT), when main power source (VCC) power down, the spare random access memory (backup RAM) 111 passes through described standby
It is powered with power supply (VBAT), guarantees that the spare random access memory (backup RAM) 111 will not cannot since system is powered down
Work, the data of preservation will not lose.The Second Type device can also include other modules, as long as with described spare random
The operating voltage of memory (backup RAM) 111 is equal, within thought range of the invention.
The voltage that the backup power source (VBAT) provides to the first kind device is higher than the backup power source to described
The voltage that Second Type device provides.For example, the voltage one that the backup power source (VBAT) provides to the first kind device
As be 3v~5v, i.e., operating voltage one of the described backup power source (VBAT) to the first field (being in the present embodiment the field IO 12)
As be 3v~5v；The backup power source is generally 1.1V~1.2V to the voltage that the Second Type device provides, i.e., described standby
1.1V~1.2V is generally to the operating voltage of the second field (being in the present embodiment the field core 11) with power supply (VBAT).
Preferably, the backup power source (VBAT) is by a voltage reduction module to the Second Type device (such as this implementation
The spare random access memory backup RAM 111 in example) power supply.By the voltage reduction module, the backup power source
(VBAT) voltage is down to the operating voltage of the spare random access memory backup RAM 111.In the present embodiment, described
Voltage reduction module includes band-gap reference (BGR) 113, low-pass filter (LPF) 114 and the first low pressure difference linear voltage regulator (LDO)
112, the low-pass filter (LPF) 114 connects the backup power source (VBAT) and a low-voltage, the band-gap reference (BGR)
113 connect the low-pass filter (LPF) 114 and the low-voltage, first low voltage difference of the first low pressure difference linear voltage regulator
Linear voltage regulator (LDO) 112 connects the backup power source (VBAT), band-gap reference (BGR) 113, the low-voltage and the second class
One end of type device (such as described spare random access memory backup RAM 111 in the present embodiment), the Second Type
Another termination low-voltage of device (such as described spare random access memory backup RAM 111 in the present embodiment).
Optionally, the Second Type device (such as the spare random access memory backup RAM in the present embodiment
111) one end is connect with a main power source VCC, when the main power source VCC stops powering, the Second Type device and described
First kind device is powered by the backup power source (VBAT).
Specifically, the Second Type device (such as the spare random access memory backup RAM in the present embodiment
111) can be switched by one second low pressure difference linear voltage regulator (LDO) 101 and one (such as complementary metal oxide semiconductor is opened
Close CMOSSW) connection main power source, when the main power source VCC is powered on, the main power source VCC is the Second Type device (example
The spare random access memory backup RAM 111 as described in the present embodiment) and the first kind device (such as this implementation
The device real-time controller (RTC) 122 and a grade crystal oscillator (Sub-OSC) 121 in example) power supply；When the main power source
When VCC power down, the backup power source (VBAT) is that the Second Type device (such as spare deposit at random by described in the present embodiment
Reservoir backup RAM 111) and the first kind device (such as the device real-time controller in the present embodiment
RTC122 and grade crystal oscillator Sub-OSC121) power supply, switch (such as the complementary metal oxide semiconductor switch
CMOSSW the connection of the Second Type device and the first kind device and the main power source VCC) is disconnected.
Backup power source VBAT, such as by backup circuit breaker VBATSW, connect respectively with the field IO 12 and the field core 11,
The signal VBAT_RTC of the backup power source VBAT is issued into 11 device of the field IO 12 and the field core.Second field and
First field is in parallel.
Device real-time controller (RTC) 121 and secondary crystal oscillator (Sub-OSC) 122 are placed on the field IO 12, can effectively drop
Low-leakage current is to reduce the power consumption of spare area.Leakage current accounts in the summation of RTC and Sub-OSC operating current and leakage current
According to significant proportion.In order to reduce power consumption, it is contemplated that the leakage current of the first kind device is wanted compared to the Second Type device
Much smaller, RTC 121 and Sub-OSC 122 are placed on the field IO 12.RTC 121 and Sub-OSC 122 is used as the first kind
Type device, compares the field core 11 that is placed on, and the summation of operating current and leakage current is much smaller.
The spare area of the invention can be used for electronic system, such as the electronic system can be the electronics such as MCU
System, it is ensured that the electronic systems such as MCU during power down, guarantee that the first kind device and Second Type device will not be due to
System is powered down and cannot work, and can effectively reduce electric leakage, reduces power consumption.
The field core 11 is individually control, i.e., when user does not need using spare random access memory (Backup
RAM) 111 when, can be about to spare random access memory and relating module power-off certainly to reach reduces power consumption
Purpose.In the present embodiment, the voltage reduction module (including band-gap reference BGR 113, low-pass filter LPF 114 and first
Low pressure difference linear voltage regulator LDO 112) itself there is switch controllable function, it can be by controlling band-gap reference BGR 113, low pass
The input signal of filter LPF 114 and the first low pressure difference linear voltage regulator LDO 112, control the conducting of the voltage reduction module
State.When backup power source VBAT power supply, do not needing using spare random access memory (Backup RAM) 111
When, the shutdown of the voltage reduction module is controlled, spare random access memory (Backup RAM) 111 and the standby electricity are disconnected
The connection of source VBAT, to save the electricity of the backup power source VBAT.
Fig. 2 is the implementation method process signal for indicating spare random access memory according to an embodiment of the invention
Figure.
Referring to fig. 2, implementation method includes step S201, and spare random access memory (Backup RAM) is configured at
Spare area.Since spare area has battery that can power, it is ensured that spare area is in the state for having electricity always, therefore standby
It will not cannot be worked since system is powered down with random access memory, spare random access memory can be allowed to be in standby shape
State and the data saved will not lose.Step S202, spare area are input and output field (field IO) and core realm (core
Field) mixing carry.Device R TC is placed on the field IO, and step S204, device Sub-OSC is placed by step S203
In the field IO, leakage current can be effectively reduced to reduce the power consumption of spare area.Step S205 realizes the independent of the field core
Control, when user does not need using spare random access memory, can be about to certainly spare random access memory with
And relating module power-off is to achieve the purpose that reduce power consumption.
According to one embodiment of present invention, backup random-access memory is configured in backup region, in chip power-down
In the case where, data are still able to maintain, the deficiency of structure is improved.In order to reduce the leakage current in the field core, leaked using I/O device
The small feature of electric current ratio core device comes RTC and Sub-OSC module from the module transitions in the field core at the field IO module
Design, to form the design architecture of the mixing carrying of the field core and the field IO function.While realizing this framework, again
The module for realizing the field core can individually turn off the function of reaching and save current drain.
Presently preferred embodiments of the present invention as described above, but the present invention is not limited to contents disclosed above, such as:
The voltage reduction module is not limited to structure shown in Fig. 1, and in other embodiments, the voltage reduction module can be with
Including band-gap reference, low-pass filter and the first low pressure difference linear voltage regulator, the low-pass filter connects the standby electricity
Source and a low-voltage, the band-gap reference connects the low-pass filter and the low-voltage, first low pressure difference linearity are steady
Depressor connects one end of the low-pass filter, the low-voltage and Second Type device, the Second Type device it is another
Terminate low-voltage.
The basic principles, main features and advantages of the present invention have been shown and described above.The technology of the industry
Personnel only illustrate the present invention it should be appreciated that the present invention is not limited by examples detailed above described in examples detailed above and specification
Principle, various changes and improvements may be made to the invention without departing from the spirit and scope of the present invention, these variation and
Improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention is by appended claims and its is equal
Object defines.
Claims (10)
1. a kind of spare area of electronic system, which is characterized in that the spare area includes the first kind device and
Two types of devices, the spare area carry out stand-by power supply by a backup power source, described spare in backup power source power supply
Power supply provides different voltage to the first kind device and Second Type device.
2. spare area as described in claim 1, which is characterized in that the backup power source is provided to the first kind device
Voltage the voltage that provides to the Second Type device of the backup power source is provided.
3. spare area as claimed in claim 2, which is characterized in that the backup power source is by a voltage reduction module to described the
The power supply of two types of devices.
4. spare area as claimed in claim 3, which is characterized in that the voltage reduction module includes band-gap reference, low-pass filtering
Device and the first low pressure difference linear voltage regulator, the low-pass filter connect the backup power source and a low-voltage, the band gap
Low-pass filter described in reference connection and the low-voltage, first low pressure difference linear voltage regulator connect the backup power source,
One end of band-gap reference, the low-voltage and Second Type device, another termination low-voltage of the Second Type device；Or,
The voltage reduction module includes band-gap reference, low-pass filter and the first low pressure difference linear voltage regulator, and the low-pass filter connects
Connecing the backup power source and a low-voltage, the band-gap reference connects the low-pass filter and the low-voltage, and described first
Low pressure difference linear voltage regulator connects one end of the low-pass filter, the low-voltage and Second Type device, second class
Another termination low-voltage of type device.
5. spare area as described in claim 1, which is characterized in that one end of the Second Type device and a main power source connect
It connects, when the main power source stops powering, the Second Type device and the first kind device pass through the backup power source
Power supply.
6. spare area as described in claim 1, which is characterized in that the first kind device is located at one first field, institute
It states Second Type device and is located at one second field.
7. the spare area as described in claim 1 to 6 any one, which is characterized in that when the first kind device includes
Clock wake-up module, the clock wake-up module connect the backup power source.
8. spare area as claimed in claim 7, which is characterized in that the clock wake-up module includes that a device in parallel is real
When a controller and grade crystal oscillator.
9. the spare area as described in claim 1 to 6 any one, which is characterized in that the Second Type device includes standby
Use random access memory.
10. a kind of electronic system, which is characterized in that including spare area as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710355661.XA CN108958985A (en) | 2017-05-19 | 2017-05-19 | Chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710355661.XA CN108958985A (en) | 2017-05-19 | 2017-05-19 | Chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108958985A true CN108958985A (en) | 2018-12-07 |
Family
ID=64462120
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201710355661.XA Pending CN108958985A (en) | 2017-05-19 | 2017-05-19 | Chip |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1423424A (en) * | 2001-12-07 | 2003-06-11 | 明基电通股份有限公司 | Portable electronic device with power source failture restoring function and failture restoring method |
| CN101075751A (en) * | 2006-05-16 | 2007-11-21 | 株式会社理光 | Power supply device, method thereof, and image forming device |
| CN102694542A (en) * | 2012-05-09 | 2012-09-26 | 北京华大信安科技有限公司 | Method, device and chip for isolating signal |
| CN103607718A (en) * | 2013-11-11 | 2014-02-26 | 立昂技术股份有限公司 | Intelligent wireless network communication optimization device |
| CN103809638A (en) * | 2012-11-14 | 2014-05-21 | 安凯(广州)微电子技术有限公司 | High-power supply rejection ratio, low-noise low-voltage difference linear voltage stabilizer |
| CN105244056A (en) * | 2014-07-08 | 2016-01-13 | 新汉股份有限公司 | Solid state disk device |
-
2017
- 2017-05-19 CN CN201710355661.XA patent/CN108958985A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1423424A (en) * | 2001-12-07 | 2003-06-11 | 明基电通股份有限公司 | Portable electronic device with power source failture restoring function and failture restoring method |
| CN101075751A (en) * | 2006-05-16 | 2007-11-21 | 株式会社理光 | Power supply device, method thereof, and image forming device |
| CN102694542A (en) * | 2012-05-09 | 2012-09-26 | 北京华大信安科技有限公司 | Method, device and chip for isolating signal |
| CN103809638A (en) * | 2012-11-14 | 2014-05-21 | 安凯(广州)微电子技术有限公司 | High-power supply rejection ratio, low-noise low-voltage difference linear voltage stabilizer |
| CN103607718A (en) * | 2013-11-11 | 2014-02-26 | 立昂技术股份有限公司 | Intelligent wireless network communication optimization device |
| CN105244056A (en) * | 2014-07-08 | 2016-01-13 | 新汉股份有限公司 | Solid state disk device |
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Effective date of registration: 20220627 Address after: 201210 floor 10, block a, building 1, No. 1867, Zhongke Road, pilot Free Trade Zone, Pudong New Area, Shanghai Applicant after: Xiaohua Semiconductor Co.,Ltd. Address before: Room 303-304, block a, 112 liangxiu Road, pilot Free Trade Zone, Pudong New Area, Shanghai Applicant before: HUADA SEMICONDUCTOR Co.,Ltd. |
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Application publication date: 20181207 |