CN108919603B - Novel multi-wafer box for integrated circuit mask plate - Google Patents
Novel multi-wafer box for integrated circuit mask plate Download PDFInfo
- Publication number
- CN108919603B CN108919603B CN201811050521.2A CN201811050521A CN108919603B CN 108919603 B CN108919603 B CN 108919603B CN 201811050521 A CN201811050521 A CN 201811050521A CN 108919603 B CN108919603 B CN 108919603B
- Authority
- CN
- China
- Prior art keywords
- fixedly connected
- integrated circuit
- strip
- box
- lid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000013016 damping Methods 0.000 claims abstract description 18
- 239000004033 plastic Substances 0.000 claims abstract description 9
- 230000035939 shock Effects 0.000 claims description 16
- 238000010521 absorption reaction Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/66—Containers specially adapted for masks, mask blanks or pellicles; Preparation thereof
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
- B65D—CONTAINERS FOR STORAGE OR TRANSPORT OF ARTICLES OR MATERIALS, e.g. BAGS, BARRELS, BOTTLES, BOXES, CANS, CARTONS, CRATES, DRUMS, JARS, TANKS, HOPPERS, FORWARDING CONTAINERS; ACCESSORIES, CLOSURES, OR FITTINGS THEREFOR; PACKAGING ELEMENTS; PACKAGES
- B65D81/00—Containers, packaging elements, or packages, for contents presenting particular transport or storage problems, or adapted to be used for non-packaging purposes after removal of contents
- B65D81/02—Containers, packaging elements, or packages, for contents presenting particular transport or storage problems, or adapted to be used for non-packaging purposes after removal of contents specially adapted to protect contents from mechanical damage
- B65D81/05—Containers, packaging elements, or packages, for contents presenting particular transport or storage problems, or adapted to be used for non-packaging purposes after removal of contents specially adapted to protect contents from mechanical damage maintaining contents at spaced relation from package walls, or from other contents
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Packaging Frangible Articles (AREA)
Abstract
The invention discloses a novel multi-chip box for an integrated circuit mask, which comprises a box body, a box cover and damping strips, wherein two opposite sides of the box body are respectively and fixedly connected with a clamping head, two opposite sides of the box cover are respectively and fixedly connected with a bayonet, the inner side of the box body is fixedly connected with four limiting blocks, a plastic pad is fixedly arranged between the four limiting blocks, a plurality of limiting strips are uniformly distributed on the inner wall of the box cover, the top of the box cover is provided with the damping strips, two ends of the damping strips are respectively provided with two rectangular grooves, the middle part of each damping strip is provided with a plurality of circular grooves, the two opposite sides of each damping strip are respectively and fixedly connected with a plurality of first tilting parts and a plurality of second tilting parts, and the rectangular grooves are sleeved on rectangular clamping columns.
Description
Technical Field
The invention relates to a multi-wafer box, in particular to a novel multi-wafer box for an integrated circuit mask, and belongs to the technical field of integrated circuit storage equipment.
Background
In the manufacturing process of electronic products such as semiconductors, integrated circuits, photovoltaic products and the like, various substrates represented by semiconductor wafers and photomasks are required to be subjected to photoetching treatment, and the photoetching technology of masks is to write pattern files of clients onto photoresist of the masks and then develop and etch the pattern files, because the photoetching technology is sensitive to pollution, the cleanliness of the photoetching process needs to be strictly controlled, and usually, the mask plates are stored in a plurality of boxes so as to avoid damage and pollution in the transmission process, while the existing multi-box adopts clamping grooves made of hard plastic as damping materials, and the clamping grooves made of hard plastic cannot effectively ensure the safety of the mask plates, so that the mask plates are extremely easy to scratch and damage.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a novel multi-wafer box for an integrated circuit mask.
In order to solve the technical problems, the invention provides the following technical scheme:
The invention relates to a novel multi-wafer box for an integrated circuit mask, which comprises a box body, a box cover and damping strips, wherein two opposite sides of the box body are respectively and fixedly connected with a clamping head, two opposite sides of the box cover are respectively and fixedly connected with a bayonet, the inner side of the box body is fixedly connected with four limiting blocks, plastic mats are fixedly arranged between the limiting blocks, a plurality of limiting strips are uniformly distributed on the inner wall of the box cover, the top of the box cover is provided with the damping strips, two ends of the damping strips are respectively provided with two rectangular grooves, the middle part of the damping strips is provided with a plurality of circular grooves, two opposite sides of the damping strips are respectively and fixedly connected with a plurality of first tilting parts and a plurality of second tilting parts, the rectangular grooves are sleeved on the rectangular clamping columns, the circular grooves are sleeved on the circular clamping columns, the rectangular clamping columns and the circular clamping columns are fixedly connected with the box cover, a plurality of bulges are fixedly arranged on the upper sides of the first tilting parts, positioning columns and the lower sides of the second tilting parts are respectively provided with positioning columns, the positioning columns are fixedly arranged on the top of the box cover, the two sides of the positioning columns are fixedly connected with the positioning columns, and the two sides of the positioning columns are fixedly connected with the connecting rods.
As a preferable technical scheme of the invention, the damping strip is made of rubber materials.
As a preferable technical scheme of the invention, the height of the limiting plate is lower than the height of the bearing.
As a preferable technical scheme of the invention, the two shock absorption strips are symmetrically distributed at the top of the box cover.
As a preferable technical scheme of the invention, the sliding sleeve is in sliding connection with the positioning column.
The beneficial effects achieved by the invention are as follows: the novel multi-wafer box for the integrated circuit mask plate changes the original hard plastic material of the box body clamping groove into the rubber material, so that the integrated circuit mask plate is not easy to be bumped during transportation, the damping structure is arranged on the upper side of the damping strip of the integrated circuit mask plate, the damping strip can be mutually matched with the rubber damping strip structure, and the vibration force can be effectively buffered, thereby avoiding the damage and pollution of the circuit mask plate during transportation, improving the product quality.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a schematic diagram of the structure of the present invention;
Figure 2 is a side cross-sectional view of the lid of the present invention.
In the figure: 1. a case body; 2. a box cover; 3. a shock absorbing strip; 4. a bayonet; 5. a chuck; 6. a limiting block; 7. a plastic pad; 8. a limit bar; 9. rectangular clamping columns; 10. a round clamping column; 11. rectangular grooves; 12. a circular groove; 13. a first tilting portion; 14. a second tilting part; 15. a protrusion; 16. positioning columns; 17. a limiting plate; 18. a sliding sleeve; 19. a connecting rod; 20. bearing; 21. and (3) a spring.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
Examples
As shown in fig. 1-2, a novel multi-wafer box for integrated circuit mask comprises a box body 1, a box cover 2 and a shock absorption strip 3, wherein a clamping head 5 is fixedly connected to two opposite sides of the box body 1 respectively, a bayonet 4 is fixedly connected to two opposite sides of the box cover 2 respectively, four limiting blocks 6 are fixedly connected to the inner side of the box body 1, a plastic pad 7 is fixedly installed between the four limiting blocks 6, a plurality of limiting strips 8 are uniformly distributed on the inner wall of the box cover 2, the shock absorption strip 3 is arranged at the top of the box cover 2, two rectangular grooves 11 are respectively arranged at two ends of the shock absorption strip 3, a plurality of circular grooves 12 are arranged in the middle of the shock absorption strip 3, a plurality of first tilting parts 13 and a plurality of second tilting parts 14 are fixedly connected to two opposite sides of the shock absorption strip 3 respectively, the circular grooves 11 are sleeved on the rectangular clamping columns 9, the circular grooves 12 are sleeved on the circular clamping columns 10, the rectangular clamping columns 9 and the circular clamping columns 10 are fixedly connected with the box cover 2, a plurality of protrusions 15 are fixedly installed between the four limiting blocks 6, a plurality of positioning columns 16 are fixedly arranged on the upper sides of the first tilting parts 13 and the second tilting parts 14, a plurality of positioning columns 16 are fixedly connected to the positioning columns 16, two sides of the positioning columns 16 are fixedly connected to the positioning columns 18 are fixedly connected to the two sides of the positioning columns 18, and the positioning columns are fixedly connected to the positioning columns 18, and are fixedly connected to the two sides of the positioning columns 18.
The shock attenuation strip 3 is made for rubber materials for be difficult for bumping during the transportation of integrated circuit mask, the height of limiting plate 17 is higher than the height of bearing 20, ensures that shock-absorbing structure's cushioning effect can be realized, and two shock attenuation strips 3 symmetric distribution are at the top of lid 2, conveniently place integrated circuit mask, sliding sleeve 18 and reference column 16 sliding connection, ensure that shock-absorbing structure can effectively shock attenuation.
Specifically, when the circuit mask is used, a plurality of circuit masks are horizontally placed in the box cover 2, the plurality of limiting strips 8 are arranged to be attached to the side edges of the circuit masks, the circuit masks can be effectively prevented from being shifted, the plurality of circular clamping columns 10 are arranged to be capable of effectively fixing the damping strips 3 made of rubber materials, after the box body 1 and the box cover 2 are clamped, the plastic pad 7 can be used for tightly pressing the circuit masks, further the circuit masks are effectively fixed, if jolt occurs in the circuit mask transportation process, the support 20 is tightly attached to the first tilting part 13 and the second tilting part 14, so that the vibration of the circuit masks can push the support 20 to move upwards, the sliding sleeve 18 can further move upwards, the spring 21 above the sliding sleeve 18 can be compressed, the effect of buffering the vibration force can be achieved, and the spring 21 below the sliding sleeve 18 can effectively lighten the vibration force.
Finally, it should be noted that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. The utility model provides a novel multi-chip box for integrated circuit mask, includes box body (1), lid (2) and shock attenuation strip (3), its characterized in that, fixedly connected with dop (5) respectively on two opposite sides of box body (1), a bayonet socket (4) of fixedly connected with respectively on two opposite sides of lid (2), four stopper (6) of inboard fixedly connected with of box body (1), four fixedly mounted with plastic mat (7) between stopper (6), evenly distributed has a plurality of spacing strip (8) on the inner wall of lid (2), lid (2) top is equipped with shock attenuation strip (3), the both ends of shock attenuation strip (3) all are equipped with two rectangle grooves (11), the middle part of shock attenuation strip (3) is equipped with a plurality of circular groove (12), a plurality of first perk portion (13) and a plurality of second perk portion (14) of fixedly connected with respectively on two opposite sides of shock attenuation strip (3), rectangle groove (11) cup joint on rectangle post (9), rectangle groove (12) cup joint on rectangle post (10) and a plurality of circular post (10) are equipped with on circle post (10), the utility model discloses a box cover, including first perk portion (13) and second perk portion (14), locating column (16) are all equipped with below, locating column (16) fixed mounting is at the top of lid (2), the upper end fixedly connected with limiting plate (17) of locating column (16), sliding sleeve (18) have been cup jointed on the curved surface of locating column (16), both sides of sliding sleeve (18) all are equipped with spring (21), both sides of sliding sleeve (18) all fixedly connected with connecting rod (19), the upper end fixedly connected with bearing (20) of connecting rod (19);
the damping strip (3) is made of rubber materials;
the height of the limiting plate (17) is lower than that of the bearing (20).
2. The novel multi-wafer cassette for integrated circuit reticles of claim 1, wherein: the two shock absorption strips (3) are symmetrically distributed at the top of the box cover (2).
3. The novel multi-wafer cassette for integrated circuit reticles of claim 1, wherein: the sliding sleeve (18) is in sliding connection with the positioning column (16).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811050521.2A CN108919603B (en) | 2018-09-07 | 2018-09-07 | Novel multi-wafer box for integrated circuit mask plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811050521.2A CN108919603B (en) | 2018-09-07 | 2018-09-07 | Novel multi-wafer box for integrated circuit mask plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108919603A CN108919603A (en) | 2018-11-30 |
| CN108919603B true CN108919603B (en) | 2024-08-13 |
Family
ID=64407413
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811050521.2A Active CN108919603B (en) | 2018-09-07 | 2018-09-07 | Novel multi-wafer box for integrated circuit mask plate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108919603B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4830182A (en) * | 1986-12-27 | 1989-05-16 | Canon Kabushiki Kaisha | Reticle cassette |
| CN107934158A (en) * | 2017-12-11 | 2018-04-20 | 重庆百瑞德生物科技有限公司 | A kind of bradyseism formula kit of external diagnosis reagent |
| US9958772B1 (en) * | 2017-01-26 | 2018-05-01 | Gudeng Precision Industrial Co., Ltd. | Reticle pod |
| CN208796015U (en) * | 2018-09-07 | 2019-04-26 | 无锡中微掩模电子有限公司 | A kind of novel multi-disc box of integrated circuit mask version |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5727685A (en) * | 1995-10-19 | 1998-03-17 | Svg Lithography Systems, Inc. | Reticle container with corner holding |
| KR200212351Y1 (en) * | 1998-08-11 | 2001-03-02 | 조승열 | Reticle storage case |
| US7325685B2 (en) * | 2003-11-25 | 2008-02-05 | International Business Machines Corporation | Secondary latchkey mechanism and method for reticle SMIF pods |
| KR20080035902A (en) * | 2006-10-20 | 2008-04-24 | 삼성전자주식회사 | Reticle store box for semiconductor manufacturing equipment |
| TWI378887B (en) * | 2009-12-29 | 2012-12-11 | Gudeng Prec Industral Co Ltd | Reticle pod and supporting components therebetween |
-
2018
- 2018-09-07 CN CN201811050521.2A patent/CN108919603B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4830182A (en) * | 1986-12-27 | 1989-05-16 | Canon Kabushiki Kaisha | Reticle cassette |
| US9958772B1 (en) * | 2017-01-26 | 2018-05-01 | Gudeng Precision Industrial Co., Ltd. | Reticle pod |
| CN107934158A (en) * | 2017-12-11 | 2018-04-20 | 重庆百瑞德生物科技有限公司 | A kind of bradyseism formula kit of external diagnosis reagent |
| CN208796015U (en) * | 2018-09-07 | 2019-04-26 | 无锡中微掩模电子有限公司 | A kind of novel multi-disc box of integrated circuit mask version |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108919603A (en) | 2018-11-30 |
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| SE01 | Entry into force of request for substantive examination | ||
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