CN108806624B - Display device and driving circuit thereof - Google Patents
Display device and driving circuit thereof Download PDFInfo
- Publication number
- CN108806624B CN108806624B CN201810385349.XA CN201810385349A CN108806624B CN 108806624 B CN108806624 B CN 108806624B CN 201810385349 A CN201810385349 A CN 201810385349A CN 108806624 B CN108806624 B CN 108806624B
- Authority
- CN
- China
- Prior art keywords
- driving
- circuit
- enabling
- coupled
- units
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
Abstract
The invention provides a display device and a driving circuit thereof, the display device comprises a display panel and a driving circuit, the driving circuit comprises a source electrode driving circuit and an energy consistent circuit, the source electrode driving circuit is provided with a plurality of driving units, and the driving units are coupled with the display panel and respectively output a driving signal to the display panel; the enabling circuit is coupled with the driving units and respectively enables at least one driving unit of the driving units at different time to output the driving signal.
Description
Technical Field
The present invention relates to a display device, and more particularly, to a display device and a driving circuit thereof capable of reducing electromagnetic interference.
Background
Liquid Crystal Display (LCD) devices have the advantages of light and thin profile, small size, low radiation and low power consumption, so that LCD devices have gradually replaced conventional Cathode Ray Tube (Cathode Ray Tube) Display devices and are widely used in various electronic products. The liquid crystal display device generally includes a gate driving circuit, a source driving circuit and a display panel, wherein the gate driving circuit is used for scanning a plurality of row gate lines of the display panel, when the gate lines are scanned by the gate driving circuit, all pixel structures located on the gate lines are all turned on, and a plurality of driving units of the source driving circuit simultaneously transmit driving signals to all pixel structures located on the scanned gate lines to charge the pixel structures, i.e. drive the pixel structures, so as to display a picture. Therefore, when the driving units of the source driving circuit transmit driving signals to all the pixel structures on the scanned gate line, the source driving circuit draws a larger current, which causes a larger electromagnetic Interference (EMI). Many solutions for reducing the electromagnetic interference are proposed, such as the publication No. CN101256753B issued by the national intellectual property office of the people's republic of china, the publication No. I336463 issued by the taiwan intellectual property office of china, and the publication No. US6,937,233B2 issued by the united states patent and trademark office, however, these solutions do not improve the electromagnetic interference caused by the operation of a plurality of driving units in a source driving circuit.
In view of the foregoing, the present invention provides a display device and a driving circuit thereof to improve electromagnetic interference caused by operations of a plurality of driving units in a source driving circuit.
Disclosure of Invention
The present invention is directed to a display device and a driving circuit thereof, which can reduce electromagnetic interference caused by the operation of a plurality of driving units of a source driving circuit.
The invention discloses a display device, which comprises a display panel, a source electrode driving circuit and an enabling circuit, wherein the source electrode driving circuit is provided with a plurality of driving units, and the driving units are coupled with the display panel and respectively output a driving signal to the display panel. The enabling circuit is coupled with the driving units and respectively enables at least one driving unit of the driving units at different time to output the driving signal.
The invention discloses a driving circuit of a display device, which comprises a source electrode driving circuit and an enabling circuit. The source driving circuit is provided with a plurality of driving units which are coupled with the display panel and respectively output a driving signal to the display panel. The enabling circuit is coupled with the driving units and respectively enables at least one driving unit of the driving units at different time to output the driving signal.
Drawings
FIG. 1: which is a schematic view of a first embodiment of a display device of the present invention;
FIG. 2: which is a schematic view of a second embodiment of a display device of the present invention;
FIG. 3: which is a schematic diagram of an embodiment of a driving circuit of the present invention;
FIG. 4A: it is a waveform diagram of a first embodiment of the driving signal of the source driving circuit of the present invention; and FIG. 4B: which is a waveform diagram of a driving signal of a source driving circuit according to a second embodiment of the present invention.
[ brief description of the drawings ]
10 display panel
12 gate line
14 source line
20 gate driving circuit
30 source electrode driving circuit
32 drive unit
34. DAC digital-analog conversion circuit
40 enable circuit
41 delay circuit
42 delay circuit
50 power supply circuit
321 drive unit
322 drive unit
323 drive unit
324 drive unit
325 drive unit
326 drive unit
327 drive unit
328 drive unit
DATA input pixel DATA
DLY delay circuit
G0 gate signal
G1 gate signal
Gn gate signal
S0 Source signal
S1 Source signal
S2 Source signal
S3 Source signal
S4 Source signal
S5 Source signal
S6 Source signal
S7 Source signal
TS1 enabling period
TS2 disable enable period
VP supply power
Detailed Description
In order to provide a further understanding and appreciation for the structural features and advantages achieved by the present invention, the following detailed description of the presently preferred embodiments is provided:
although certain terms are used herein to refer to particular elements, those skilled in the art will understand that various terms are used herein to describe the same element, either individually or collectively, and not by way of limitation. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Furthermore, the term "coupled" is intended to include any direct or indirect connection. Thus, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect connection via other devices and other connections.
In order to provide a better understanding and appreciation for the inventive features and advantages achieved by the present invention, reference should be made to the accompanying drawings, which are set forth in the following, and in which:
please refer to fig. 1, which is a diagram illustrating a display device according to a first embodiment of the present invention. As shown, the display device includes a display panel 10, a plurality of gate lines 12 and a plurality of source lines 14 of the display panel 10 are interlaced to form a plurality of pixels, and the pixels may include a thin film transistor, a liquid crystal capacitor and a storage capacitor. The gate driving circuit 20 of the display panel 10 is coupled to the gate lines 12, and outputs a plurality of gate signals G0, G1 Gn to the gate lines 12 to scan the display panel 10. The source driver 30 of the display panel 10 is coupled to the source lines 14, and outputs a plurality of driving signals (or called source signals) S0, S1, S2, S3, S4, S5, S6, and S7 to the source lines 14 to drive the display panel 10. Furthermore, the display device comprises a power circuit 50, which generates a supply voltage VP to the source driving circuit 30, however, the power circuit 50 can also be used as the power source for the gate driving circuit 20; alternatively, the display device may be provided with a plurality of power circuits to supply power required by the source driving circuit 30/gate driving circuit 20, which is not limited by the invention.
Referring to fig. 1, the driving circuit of the display device may further include an enabling circuit 40 in addition to the gate driving circuit 20, the source driving circuit 30 and the power circuit 50, the enabling circuit 40 is coupled to the source driving circuit 30 to control the source driving circuit 30 to output the driving signals S0 to S7, the enabling circuit 40 includes a plurality of delay circuits DLY, and the enabling circuit 40 is capable of generating or receiving an enabling signal Enable. The delay circuits DLY can receive and delay the Enable signal Enable, so that the delay circuits DLY delay the received Enable signal Enable according to respective set delay times, wherein the delay circuits DLY can have the same or different delay times. The source driving circuit 30 may include (or include) a plurality of driving units 32 and a plurality of Digital-to-Analog converters (DACs) 34, wherein the Enable terminals of the driving units 32 are respectively coupled to the enabling circuit 40 to receive the enabling signal Enable, and are controlled by the undelayed enabling signal Enable and the delayed enabling signal Enable after being delayed by the delay circuit DLY.
In other words, the driving units 32 respectively (time-divisionally) output the driving signals S0-S7 to the coupled source line 14 due to the enabling (control) of the enabling circuit 40. For example: the undelayed Enable signal Enable controls the source driving circuit 30 to output the driving signal S0 and the driving signal S4, and controls the source driving circuit 30 to output the driving signal S1 and the driving signal S5 after being delayed by the delay circuits DLY, so that the source driving circuit 30 outputs the driving signals S0 and S4 and outputs the driving signals S1 and S5 after a delay time. The digital-to-analog conversion circuits 34 are respectively coupled to the driving units 32 and respectively receive an input pixel DATA, and respectively output a pixel signal to the driving units 32, so that the enabling circuit 40 enables the driving units 32 in a time-sharing manner according to an enabling signal Enable, so that the driving units 32 output the driving signals S0-S7 in a time-sharing manner according to the pixel signals, wherein the enabling signal Enable may be generated by a Timing Controller (Tcon) or other control circuits of the display device, or may be generated by the enabling circuit 40.
Furthermore, the source driving circuit 30 outputs the driving signals S0 to S7 according to the supply power VP output by the power circuit 50, so when the driving units 32 of the source driving circuit 30 output the driving signals S0 to S7 in a time-sharing manner, the driving units 32 complete the operation of outputting the driving signals S0 to S7 by using the supply power VP in a time-sharing manner, and thus, the power circuit 50 only needs to supply the power required by some driving units 32 of the driving units 32 at the same time point, and does not need to supply the power required by all the driving units 32 at the same time point. In other words, the enabling circuit 40 enables the driving units 32 to output the driving signals S0-S7 at different times, so that the Peak Current (Peak Current) of the power supply VP is greatly reduced within a unit time (e.g., 1 second). Therefore, the present invention can reduce the electromagnetic interference caused by the operation of the source driving circuit 30 (the driving units 32). In addition, based on the embodiment shown in fig. 1, the enabling circuit 40 may be disposed in the source driving circuit 30 in addition to the source driving circuit 30, and the driving units 32 may be disposed in the source driving circuit 30 in addition to the source driving circuit 30.
Please refer to fig. 2, which is a diagram illustrating a display device according to a second embodiment of the present invention. As shown, the enabling circuit 40 includes a plurality of delay circuits DLY, and the driving unit 321 and the driving unit 325 are directly coupled (receiving) the enabling signal Enable without being coupled to the enabling signal Enable through the delay circuits DLY. A first delay circuit 41 of the Enable circuit 40 is coupled (receives) the Enable signal Enable and the driving units 322, 326, and the first delay circuit 41 outputs the Enable signal Enable to the driving units 322, 326 after a first delay time. A second delay circuit 42 of the Enable circuit 40 is coupled to the first delay circuit 41 and the driving units 323 and 327, the second delay circuit 42 receives the Enable signal Enable output by the first delay circuit 41, and the second delay circuit 42 outputs the received Enable signal Enable to the driving units 323 and 327 after a second delay time. Therefore, the difference between the embodiment in fig. 1 and the embodiment in fig. 2 is that the delay circuits DLY in fig. 1 respectively output the Enable signals Enable to the single driving units 32, while the delay circuits DLY in fig. 2 respectively output the Enable signals Enable to the plurality of driving units 32, that is, the first delay circuit 41 can be coupled to at least one driving unit 322 of the driving units 32, and can output the Enable signals Enable to the at least one driving unit 322 after the first delay time; the second delay circuit 42 may be coupled to at least one driving unit 323 of the driving units 32, and may output the Enable signal Enable to the at least one driving unit 323 coupled thereto after the second delay time.
It should be noted that in the first and second embodiments, the delay circuits DLY (e.g., the first delay circuit 41 and the second delay circuit 42) of the enabling circuit 40 can be connected in series, so that the delay circuit DLY (the second delay circuit 42) at the rear stage can be used to delay the enabling signal Enable delayed by the delay circuit DLY (the first delay circuit 41) at the front stage, and the enabling signal Enable output by the delay circuit DLY at each stage has different delay times (phases). However, the present invention is not limited thereto, and in some embodiments of the present invention, by providing a plurality of delay circuits DLY with different delay times in the Enable circuit 40, the delay circuits DLY can output the Enable signals Enable with different delay times (phases) without being connected in series.
Furthermore, the driving unit 32 in the embodiment may be an operational amplifier and may include a differential portion and an output portion, so that the enabling signal Enable may Enable only the output portion of the driving unit 32 in addition to the whole driving unit 32 described in the above embodiment, wherein the differential portion may include circuits with smaller working currents, such as a differential circuit, and the output portion may include circuits with larger working currents, such as a gain stage or an output stage, in other words, the enabling signal Enable may only control the circuits with larger working currents, such as the output portion, to control the output portion to output the driving signal, and may also achieve the effect of reducing the Peak Current (Peak Current) of the power supply VP. In addition, the present invention is not limited to the method of controlling whether the driving unit 32 outputs the driving signal by the Enable signal Enable, for example, the Enable signal Enable may control the switch of the whole circuit of the driving unit 32 to operate, may turn on or off the generating path of the driving signal, and may also turn on or off the power path of the driving unit 32 to determine whether to output the driving signal.
Referring back to fig. 2, the driving units 32 may be divided into a plurality of driving groups, each driving group may include more than two driving units, for example: the driving units 321-324 are a first driving group, and the driving units 325-328 are a second driving group. Therefore, the first delay circuit 41 of the enabling circuit 40 may be coupled to at least one driving unit 322, 326 of each driving group (the first driving group and the second driving group), and may output an enabling signal Enable to the at least one driving unit 322, 326 of each driving group coupled to the first delay circuit 41 after the first delay time, so as to Enable the at least one driving unit 322, 326 of each driving group coupled to the first delay circuit 41. Moreover, the second delay circuit 42 may be coupled to the at least one driving unit 323 and 327 of each driving group, receive the Enable signal Enable output by the first delay circuit 41, and output the received Enable signal Enable to the at least one driving unit 323 and 327 of each driving group coupled to the second delay circuit 42 after a second delay time, so as to Enable the at least one driving unit 323 and 327 of each driving group coupled to the second delay circuit 42.
Please refer to fig. 3, which is a diagram illustrating a driving circuit according to an embodiment of the present invention. As shown in the figure, by providing a plurality of power circuits 50, the power circuits 50 respectively provide the supply power VP to the driving units 32, so that on the basis of the embodiment shown in fig. 3, the embodiments shown in fig. 1 and 2 can be changed from the embodiment including a single power circuit 50 to the embodiment including the power circuits 50, so that the digital-to-analog conversion circuits 34 can also respectively provide the supply power VP from different power circuits 50, and further, the digital-to-analog conversion circuits 34 and the driving units 32 can provide the supply power VP from the same power circuit 50 or from different power circuits 50. Furthermore, the equivalent circuit of the display panel 10 of fig. 1 and 2 may be as the circuit 11 of fig. 3.
Please refer to fig. 4A, which is a waveform diagram of driving signals of a source driving circuit according to a first embodiment of the present invention. As shown, an enable period TS1 begins with the gate signal G0 scanning the gate lines 12, and the enable period TS1 can be set to 1/10 cycles, 2/10 cycles, or any cycles between 1/10 and 2/10 cycles of the scanning cycle of the gate signal G0, so that the enable circuit 40 can enable all the driving units 32 in the previous 1/10 cycle of the scanning cycle and output the driving signals S0 and S7. Referring to fig. 2 and fig. 4A again, the enabling circuit 40 in fig. 2 enables the two driving units 321, 325 simultaneously to output the driving signals S0, S4 in a time-sharing manner, however, the number of the driving units 32 enabled by the enabling circuit 40 at the same time needs to take into consideration the characteristics of the display panel, the quality of the display image, the frequency of the display image and the output power of the power circuit 50, for example: when the display panel 10 with a lower display frequency (e.g., 1Hz) and a lower resolution is used, the embodiment of FIG. 4A can be used to enable a smaller number of driving units 32 at different times, whereas when the display panel 10 with a higher display frequency and a higher resolution is used, a larger number of driving units 32 can be enabled at different times.
Referring to fig. 2 and 4A, after the gate signal G0 changes from the high level to the low level, the gate line 12 is stopped being scanned, and the enabling circuit 40 stops enabling the driving units 321 to 324 at the same time, so that the driving signals S0, S1, S2 and S3 do not change to the low level in time division, but synchronously change to the low level. However, after the driving units 32 output the driving signals S0, S1, S2, S3 to the display panel, the enabling circuit 40 may stop enabling the driving units 321-324 at a time division during a stop enabling period TS2 and control the driving signals S0, S1, S2, S3 to transit to a low level at a time division as shown in the embodiment of fig. 4B, so that the embodiment of fig. 4B may also reduce the electromagnetic interference when applied to a driving circuit having a Pre-driver (Pre-driver) mechanism and an equalization (Equalize) driving mechanism.
In summary, the present invention discloses a display apparatus, which includes a display panel, a source driving circuit and an enable circuit, wherein the source driving circuit has a plurality of driving units, and the driving units are coupled to the display panel and respectively output a driving signal to the display panel. The enabling circuit is coupled with the driving units and respectively enables at least one driving unit of the driving units at different time to output the driving signal.
The invention discloses a driving circuit of a display device, which comprises a source electrode driving circuit and an enabling circuit. The source driving circuit is provided with a plurality of driving units which are coupled with the display panel and respectively output a driving signal to the display panel. The enabling circuit is coupled with the driving units and respectively enables at least one driving unit of the driving units at different time to output the driving signal.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, which is defined by the appended claims.
Claims (16)
1. A display device, comprising:
a display panel;
a source driving circuit, which is provided with a plurality of driving units, wherein the driving units are coupled with the display panel and respectively output a driving signal to the display panel; and
an enabling circuit, coupled to the driving units, for enabling at least one of the driving units at different times to output the driving signal;
wherein, these drive units divide into a plurality of drive groups, and this enable circuit includes:
a first delay circuit, receiving an enable signal and coupled to at least one driving unit of each driving group, outputting the enable signal to the at least one driving unit of each driving group coupled to the first delay circuit after a first delay time, and enabling the at least one driving unit of each driving group coupled to the first delay circuit; and
a second delay circuit, coupled to the first delay circuit and the at least one driving unit of each driving group, for receiving the enable signal output by the first delay circuit, and outputting the received enable signal to the at least one driving unit of each driving group coupled to the second delay circuit after a second delay time, so as to enable the at least one driving unit of each driving group coupled to the second delay circuit.
2. The display apparatus according to claim 1, wherein the enabling circuit stops enabling the at least one driving unit of the driving units at different times after the driving units output the driving signals to the display panel.
3. The display device of claim 1, comprising:
the plurality of digital-to-analog conversion circuits are respectively coupled with the driving units, and respectively receive input pixel data and respectively output a pixel signal to the driving units.
4. The display device of claim 1, comprising:
a gate driving circuit outputting a plurality of gate signals to scan a plurality of gate lines of the display panel, respectively, the enabling circuit enabling the driving units in a time-sharing manner during an enabling period.
5. The display device according to claim 4, wherein the enable period starts from the start of scanning each gate line, and the enable period is 1/10 to 2/10 cycles of a scan period of the gate signal.
6. The display device of claim 1, comprising:
and the enabling circuit stops enabling the at least one driving unit of the driving units at different time after each gate line is scanned.
7. The display device of claim 1, comprising:
and the power circuit is coupled with the driving units and generates a supply power to be provided for the driving units.
8. The display device of claim 1, comprising:
the power circuits are coupled with the driving units and generate a plurality of supply power sources to be provided for the driving units.
9. A driving circuit of a display device, comprising:
the source electrode driving circuit is provided with a plurality of driving units, and the driving units are coupled with a display panel and respectively output a driving signal to the display panel; and
an enabling circuit, coupled to the driving units, for enabling at least one of the driving units at different times to output the driving signal;
wherein, these drive units divide into a plurality of drive groups, and this enable circuit includes:
a first delay circuit, receiving an enable signal and coupled to at least one driving unit of each driving group, outputting the enable signal to the at least one driving unit of each driving group coupled to the first delay circuit after a first delay time, and enabling the at least one driving unit of each driving group coupled to the first delay circuit; and
a second delay circuit, coupled to the first delay circuit and the at least one driving unit of each driving group, for receiving the enable signal output by the first delay circuit, and outputting the received enable signal to the at least one driving unit of each driving group coupled to the second delay circuit after a second delay time, so as to enable the at least one driving unit of each driving group coupled to the second delay circuit.
10. The driving circuit as claimed in claim 9, wherein the enabling circuit stops enabling the at least one driving unit of the driving units at different times after the driving units output the driving signals to the display panel.
11. The driving circuit of claim 9, comprising:
the plurality of digital-to-analog conversion circuits are respectively coupled with the driving units, and respectively receive input pixel data and respectively output a pixel signal to the driving units.
12. The driving circuit of claim 9, comprising:
a gate driving circuit outputting a plurality of gate signals to scan a plurality of gate lines of the display panel, respectively, the enabling circuit enabling the driving units in a time-sharing manner during an enabling period.
13. The driving circuit as claimed in claim 12, wherein the enabling period starts from the beginning of scanning each gate line, and the enabling period is 1/10-2/10 cycles of a scanning period of the gate signal.
14. The driving circuit of claim 9, comprising:
and the enabling circuit stops enabling the at least one driving unit of the driving units at different time after each gate line is scanned.
15. The driving circuit of claim 9, comprising:
and the power circuit is coupled with the driving units and generates a supply power to be provided for the driving units.
16. The driving circuit of claim 9, comprising:
the power circuits are coupled with the driving units and generate a plurality of supply power sources to be provided for the driving units.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762490169P | 2017-04-26 | 2017-04-26 | |
| US62/490,169 | 2017-04-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108806624A CN108806624A (en) | 2018-11-13 |
| CN108806624B true CN108806624B (en) | 2021-08-06 |
Family
ID=64093947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810385349.XA Active CN108806624B (en) | 2017-04-26 | 2018-04-26 | Display device and driving circuit thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108806624B (en) |
| TW (1) | TWI673702B (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101739961A (en) * | 2008-11-06 | 2010-06-16 | 瑞鼎科技股份有限公司 | Source driving device |
| TW201222521A (en) * | 2010-11-29 | 2012-06-01 | Sitronix Technology Corp | Driving circuit of display panel for reducing circuit area |
| CN103151003A (en) * | 2011-12-06 | 2013-06-12 | 瑞萨电子株式会社 | Data driver, display panel driving device, and display device |
| CN103165095A (en) * | 2013-03-29 | 2013-06-19 | 深圳市华星光电技术有限公司 | Liquid crystal display panel driving circuit, liquid crystal display panel and driving method |
| TW201327523A (en) * | 2011-12-30 | 2013-07-01 | Himax Tech Ltd | Source driver |
| CN103733245A (en) * | 2011-07-01 | 2014-04-16 | 矽创电子股份有限公司 | Driver circuit of display panel for saving circuit area |
| CN104036735A (en) * | 2013-03-05 | 2014-09-10 | 联咏科技股份有限公司 | Display driving apparatus, and driving method of display panel |
| TWI550589B (en) * | 2015-05-22 | 2016-09-21 | 天鈺科技股份有限公司 | Driving method of data driver and driving method of display panel |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005338421A (en) * | 2004-05-27 | 2005-12-08 | Renesas Technology Corp | Liquid crystal display driving device and liquid crystal display system |
-
2018
- 2018-04-26 TW TW107114261A patent/TWI673702B/en active
- 2018-04-26 CN CN201810385349.XA patent/CN108806624B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101739961A (en) * | 2008-11-06 | 2010-06-16 | 瑞鼎科技股份有限公司 | Source driving device |
| TW201222521A (en) * | 2010-11-29 | 2012-06-01 | Sitronix Technology Corp | Driving circuit of display panel for reducing circuit area |
| CN103733245A (en) * | 2011-07-01 | 2014-04-16 | 矽创电子股份有限公司 | Driver circuit of display panel for saving circuit area |
| CN103151003A (en) * | 2011-12-06 | 2013-06-12 | 瑞萨电子株式会社 | Data driver, display panel driving device, and display device |
| TW201327523A (en) * | 2011-12-30 | 2013-07-01 | Himax Tech Ltd | Source driver |
| CN104036735A (en) * | 2013-03-05 | 2014-09-10 | 联咏科技股份有限公司 | Display driving apparatus, and driving method of display panel |
| CN103165095A (en) * | 2013-03-29 | 2013-06-19 | 深圳市华星光电技术有限公司 | Liquid crystal display panel driving circuit, liquid crystal display panel and driving method |
| TWI550589B (en) * | 2015-05-22 | 2016-09-21 | 天鈺科技股份有限公司 | Driving method of data driver and driving method of display panel |
| TW201642241A (en) * | 2015-05-22 | 2016-12-01 | 天鈺科技股份有限公司 | Driving method of data driver and driving method of display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI673702B (en) | 2019-10-01 |
| CN108806624A (en) | 2018-11-13 |
| TW201839748A (en) | 2018-11-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8581827B2 (en) | Backlight unit and liquid crystal display having the same | |
| US10262566B2 (en) | Shift register, gate driving circuit and display apparatus | |
| US10636375B2 (en) | Display apparatus and a method of driving the same | |
| KR101258900B1 (en) | Liquid crystal display device and data driving circuit therof | |
| US7940242B2 (en) | Driving circuit for driving liquid crystal display device and method thereof | |
| JP2007034305A (en) | Display device | |
| US7580018B2 (en) | Liquid crystal display apparatus and method of driving LCD panel | |
| KR20040008915A (en) | A liquid crystal display apparatus | |
| JP2005326461A (en) | Display device and driving control method of the same | |
| US10192515B2 (en) | Display device and data driver | |
| KR20150000807A (en) | Method of driving a display panel, display panel driving apparatus for performing the method and display apparatus having the display panel driving apparatus | |
| JP2004054292A (en) | Liquid crystal display device | |
| JP2010039061A (en) | Display device and signal driver | |
| JP2001296845A (en) | Flat-panel display driving device | |
| KR102063642B1 (en) | Display panel and display apparatus having the same | |
| CN111383570B (en) | Method for avoiding ghost image on display panel | |
| CN108806624B (en) | Display device and driving circuit thereof | |
| JP2011150241A (en) | Display device, display panel drive, and method for driving display panel | |
| CN109584825B (en) | Display driving assembly and display device | |
| JP2004240428A (en) | Liquid crystal display, device and method for driving liquid crystal display | |
| JP5095183B2 (en) | Liquid crystal display device and driving method | |
| CN114038388B (en) | Output control circuit of source electrode driving chip and display panel | |
| CN109949733A (en) | Data driving equipment and display equipment including it | |
| WO2023045169A1 (en) | Display apparatus, control method therefor and display system | |
| KR102304807B1 (en) | Liquid crystal display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |