CN108777606A - Coding/decoding method, equipment and readable storage medium storing program for executing - Google Patents
Coding/decoding method, equipment and readable storage medium storing program for executing Download PDFInfo
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- CN108777606A CN108777606A CN201810539654.XA CN201810539654A CN108777606A CN 108777606 A CN108777606 A CN 108777606A CN 201810539654 A CN201810539654 A CN 201810539654A CN 108777606 A CN108777606 A CN 108777606A
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- bit stream
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0033—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the transmitter
Abstract
The invention discloses a kind of coding/decoding method, this method includes：To in the first bit stream certain bits and flag carry out XOR logic operation to judge whether original bit stream have passed through Mass adjust- ment；If operation result indicates that original bit stream have passed through Mass adjust- ment, the first bit stream is converted into third bit stream, if operation result indicates that original bit stream without Mass adjust- ment, directly exports the first bit stream；Flag in first bit stream of output or third bit stream is ignored to form the second bit stream.The invention also discloses a kind of decoding apparatus and readable storage medium storing program for executing.By the above-mentioned means, the present invention can reduce the bit error rate and eliminate the memory of storage code table.
Description
Technical field
The present invention relates to field of data transmission, more particularly to a kind of coding/decoding method, equipment and readable storage medium storing program for executing.
Background technology
In serial data transmission, the data of transmission can be encoded into include clock frequency component code stream so that
Receiving terminal can extract clock synchronization information from code stream, clock synchronization information can ensure receiving terminal according to correct sequential from
Initial data is regenerated in the signal received, that is, is successfully decoded.
4B5B is commonly to encode, and is exported after 4 data of input are converted to 5.It is generally designed using searching
Code table completes coding and decoding work, therefore transmitting terminal and receiving terminal are required for additional memory to store code table.4B5B
Coding is also possible to reduce coding quality, i.e. the identical continuous bit quantity of logical value is excessive, such as is using 4B5B coding transmissions 8
When data.Low-quality coding is unfavorable for receiving terminal extraction clock synchronization information, and brings larger DC component, improves and misses
Code check.
Invention content
The invention mainly solves the technical problem of providing a kind of coding/decoding method, equipment and readable storage medium storing program for executing, can solve
The problem of coding certainly in the prior art may be decreased coding quality.
In order to solve the above technical problem, the present invention provides a kind of coding/decoding method, this method includes：To the first bit stream
In certain bits and flag carry out XOR logic operation to judge whether original bit stream have passed through Mass adjust- ment；If operation knot
Fruit indicates that original bit stream have passed through Mass adjust- ment, then the first bit stream is converted into third bit stream, if operation result indicates
Original bit stream then directly exports the first bit stream without Mass adjust- ment；By the first bit stream or third bit stream of output
In flag ignore to form the second bit stream.
In order to solve the above technical problem, the present invention provides a kind of decoding apparatus, which includes processor, processor
For executing instruction to realize method above-mentioned.
In order to solve the above technical problem, the present invention provides a kind of readable storage medium storing program for executing, are stored with instruction, and instruction is held
Method above-mentioned is realized when row.
The beneficial effects of the invention are as follows：To in the first bit stream certain bits and flag carry out XOR logic operation to sentence
Whether disconnected original bit stream have passed through Mass adjust- ment；If operation result indicates that original bit stream have passed through Mass adjust- ment, by the
One bit stream is converted into third bit stream, if operation result indicates original bit stream without Mass adjust- ment, directly exports the
One bit stream；Flag in first bit stream of output or third bit stream is ignored to form the second bit stream.First ratio
Special stream is the bit stream after the decoding received, needs to judge whether original bit stream have passed through quality tune in decoding process
It is whole, illustrate to have carried out Mass adjust- ment to the undesirable original bit stream of coding quality in an encoding process to ensure the first ratio
The quality of spy's stream, to reduce the bit error rate；Code table is not needed to complete to decode simultaneously, eliminates the memory of storage code table.
Description of the drawings
Fig. 1 is the flow diagram of one embodiment of coding/decoding method of the present invention；
Fig. 2 is the idiographic flow schematic diagram of S2 in Fig. 1 in one specific embodiment of coding/decoding method of the present invention；
Fig. 3 is the flow diagram of coding/decoding method still another embodiment of the present invention；
Fig. 4 is the flow diagram of coding/decoding method still another embodiment of the present invention；
Fig. 5 is the structural schematic diagram of one embodiment of decoding device of the present invention；
Fig. 6 is the structural schematic diagram of one embodiment of readable storage medium storing program for executing of the present invention.
Specific implementation mode
The present invention is described in detail with reference to the accompanying drawings and examples.What is do not conflicted in following embodiment can phase
Mutually combine.
As shown in Figure 1, one embodiment of coding/decoding method of the present invention includes：
S1：To in the first bit stream certain bits and flag carry out XOR logic operation whether to judge original bit stream
It has passed through Mass adjust- ment.
First bit stream can be without decoded data, digit can depending on actual transmissions demand, such as 9
Position, 17 etc..The digit of first bit stream is more than the digit of original bit stream.In an encoding process, it needs to judge original bit
Whether the quality of stream meets quality standard, needs to carry out Mass adjust- ment to original bit stream if being unsatisfactory for.The quality standard
Can continuous position identical with logical value in original bit stream it is related.In general, meet in the original bit stream of quality standard
The identical continuous digit of logical value be no more than a threshold value, the size of the threshold value can be related to the digit of original bit stream, example
As the half of the digit of original bit stream adds a positive integer.
First bit stream includes flag and certain bits, for distinguishing whether original bit stream have passed through Mass adjust- ment.Mark
Knowing the digit of position and certain bits and position in the first bit stream, there is no restriction.For example, the first bit stream is 9 bits
Stream, certain bits can be the 1st, and flag can be the 0th.Can in the first bit stream certain bits and flag carry out
XOR logic operation obtains operation result, then judges whether original bit stream have passed through Mass adjust- ment according to operation result.
Specifically, if operation result is not equal to 1 (being equal to 0), it is meant that certain bits are identical with flag, then judge original
Bit stream have passed through Mass adjust- ment, if operation result is equal to 1, it is meant that certain bits and flag difference then judge original bit
Stream is without Mass adjust- ment.
Can certainly in turn, even operation result is equal to 1, then judges that original bit stream have passed through Mass adjust- ment, if
Operation result is not equal to 1, then judges original bit stream without Mass adjust- ment.
In practical application, which kind of operation result is selected and whether by the correspondence between the judging result of Mass adjust- ment
It can be determined by the assignment mode for the flag that transmitting terminal selects in an encoding process.
If operation result indicates that original bit stream have passed through Mass adjust- ment, S2 is jumped to；If operation result indicates original
Bit stream then jumps to S3 without Mass adjust- ment.
S2：First bit stream is converted into third bit stream.
In general, transfer process is corresponding with the Mass adjust- ment process in transmitting terminal cataloged procedure, thus by quality tune
The part bit recovery in the first bit stream after whole is original bit stream.
As shown in Fig. 2, in a specific embodiment of the invention, this step can specifically include：
S21：First is carried out to the first bit stream and is converted to the first transformation result.
First conversion may include being negated to first collection in the first bit stream.
S22：Judge whether the first transformation result meets data conversion standard.
If the first transformation result meets data conversion standard, S23 is jumped to；Turn if the first transformation result is unsatisfactory for data
Dehorn is accurate, then jumps to S24.
S23：Directly exported the first transformation result as third bit stream.
S24：Second is carried out to the first transformation result and is converted to the second transformation result, and using the second transformation result as the
Three bit streams export.
Second conversion may include being negated to the second collection in the first transformation result, first collection and second collection
It is different.First collection different with second collection refers to an at least difference in the position that the two includes.Then branch to S4.
Illustrate specific transfer process.First bit stream is 9 bit streams, to first collection in the first bit stream
It is negated to obtain the first transformation result, first collection includes the 5th, 6 and 8.Then judge whether the first transformation result meets
Data conversion standard.
Specifically, if the first transformation result meets at least one of the following conditions, judge that the first transformation result meets
Data conversion standard：
A. the 5th to the 8th logical value in the first transformation result is identical；
B. the 2nd to the 7th logical value in the first transformation result is identical；
C. the 1st to the 6th logical value in the first transformation result is identical.
Optionally, above-mentioned judgment mode can be converted to the judgement to following logical expression result of calculation：
NAND (NAND (bn [5~8]), NAND (bn [2~7]), NAND (bn [1~6]), OR (bn [5~8]), OR (bn
[2~7]), OR (bn [1~6]))
Wherein, NAND is NOT-AND operation, and OR is or operates, and bn [i-j] is the i-th bit of the first transformation result to jth position.
In formula (1), when being 1 for the 5th to the 8th of the first transformation result, NAND (bn [5~8]) is 0.
When being 1 for the 2nd to the 7th of the first transformation result, NAND (bn [2~7]) is 0.
When being 1 for the 1st to the 6th of the first transformation result, NAND (bn [1~6]) is 0.
When being 0 for the 5th to the 8th of the first transformation result, OR (bn [5~8]) is 0.
When being 0 for the 2nd to the 7th of the first transformation result, OR (bn [2~7]) is 0.
When being 0 for the 1st to the 6th of the first transformation result, OR (bn [1~6]) is 0.
If the result of calculation of formula (1) is 1, it is meant that NAND (bn [5~8]), NAND (bn [2~7]), NAND (bn [1~
6]), (bn [5~8]) OR, OR (bn [2~7]), at least one of OR (bn [1~6]) are 0, in conjunction with each logic above
The condition that formula is 0, can obtain the first transformation result and meet at least one of condition a, b, c and d, then the first transformation result is full
Sufficient data conversion standard.If the result of calculation of formula (1) is 0, the first transformation result is unsatisfactory for data conversion standard.
It can also be judged using other equivalent logical formulas, such as judge AND (XOR (bn [5~8], XOR (bn
Whether the operation result of [2~7], XOR (bn [1~6]) is 1, and data conversion standard is unsatisfactory for if 1 first transformation result,
If 0, then the first transformation result meets data conversion standard.
It is directly defeated using the first transformation result as third bit stream if the first transformation result meets data conversion standard
Go out；If the first transformation result meets data conversion standard, the second collection in the first transformation result is negated to obtain
Two transformation results, second collection include the 1st, 4,5,7 and 8, and are exported the second transformation result as third bit stream.Third
Bit stream is still 9 bit streams, and flag is still the 0th.
S3：Directly export the first bit stream.
Jump to S4.
S4：Flag in first bit stream of output or third bit stream is ignored to form the second bit stream.
If the first bit stream that original bit stream without Mass adjust- ment, directly exports is the group of original bit stream and flag
It closes；If original bit stream have passed through Mass adjust- ment, it is original that the third bit stream exported later is converted to the first bit stream
The combination of beginning bit stream and flag.Flag in first bit stream of output or third bit stream, which is ignored, can form
Two bit streams, i.e. original bit stream, to complete to decode.
By the implementation of the present embodiment, in the first bit stream certain bits and flag carry out XOR logic operation to sentence
Whether disconnected original bit stream have passed through Mass adjust- ment；If operation result indicates that original bit stream have passed through Mass adjust- ment, by the
One bit stream is converted into third bit stream, if operation result indicates original bit stream without Mass adjust- ment, directly exports the
One bit stream；Flag in first bit stream of output or third bit stream is ignored to form the second bit stream.First ratio
Special stream is the bit stream after the coding received, needs to judge whether original bit stream have passed through quality tune in decoding process
It is whole, illustrate to have carried out Mass adjust- ment to the undesirable original bit stream of coding quality in an encoding process to ensure the first ratio
The quality of spy's stream, to reduce the bit error rate；Code table is not needed to complete to decode simultaneously, eliminates the memory of storage code table.
Complete decoding process is illustrated below in conjunction with the accompanying drawings.
As shown in figure 3, in still another embodiment of the present invention, coding/decoding method includes：
S101：Obtain the first bit stream bn [0~8].
S102：Judge the XOR logic operation result of the 0th (flag) and the 1st (certain bits) in the first bit stream
Whether it is 1.
==in figure indicates to be equal to ,=indicate assignment.
If operation result is 0, S103 is jumped to；If operation result is 1, S106 is jumped to.
S103：Bn [5], bn [6] and bn [8] are negated.
Before bn []~indicate to negate.Obtain the first transformation result.
S104：Whether the result of calculation of decision logic expression formula (1) is 1.
If the result of calculation of logical expression (1) is 1, exports, redirect using the first transformation result as third bit stream
To S106；If the result of calculation of logical expression (1) is 0, S105 is jumped to.
S105：Bn [1], bn [4], bn [5], bn [7] and bn [8] are negated.
Remaining invariant position obtains the second transformation result and is exported as third bit stream, jumps to S106.
S106：Ignore bn [0] (flag), bn [1-8] is assigned to the second bit stream bm [0~7].
The second obtained bit stream bm [0~7] is original bit stream, completes decoding.
As shown in figure 4, in still another embodiment of the present invention, coding/decoding method includes：
S201：Obtain the first bit stream bn [0~8].
S202：Judge the XOR logic operation result of the 0th (flag) and the 1st (certain bits) in the first bit stream
Whether it is 1.
==in figure indicates to be equal to ,=indicate assignment.
If operation result is 1, S203 is jumped to；If operation result is 0, S206 is jumped to.
S203：Bn [5], bn [6] and bn [8] are negated.
Before bn []~indicate to negate.Obtain the first transformation result.
S204：Whether the result of calculation of decision logic expression formula (1) is 1.
If the result of calculation of logical expression (1) is 1, exports, redirect using the first transformation result as third bit stream
To S206；If the result of calculation of logical expression (1) is 0, S205 is jumped to.
S205：Bn [1], bn [4], bn [5], bn [7] and bn [8] are negated.
Remaining invariant position obtains the second transformation result and is exported as third bit stream, jumps to S206.
S206：Ignore bn [0] (flag), bn [1-8] is assigned to the second bit stream bm [0~7].
The second obtained bit stream bm [0~7] is original bit stream, completes decoding.
As shown in figure 5, one embodiment of decoding device of the present invention includes：Processor 110.In addition to this, decoding device may be used also
To include memory (being not drawn into figure).
Processor 110 controls the operation of decoding device, and processor 110 can also be known as CPU (Central Processing
Unit, central processing unit).Processor 110 may be a kind of IC chip, the processing capacity with signal sequence.Place
Reason device 110 can also be general processor, digital signal sequences processor (DSP), application-specific integrated circuit (ASIC), ready-made compile
Journey gate array (FPGA) either other programmable logic device, discrete gate or transistor logic, discrete hardware components.It is logical
With processor can be microprocessor or the processor can also be any conventional processor etc..
Processor 110 is for executing instruction to realize that coding/decoding method any embodiment of the present invention and possible combination are provided
Method.
As shown in fig. 6, one embodiment of readable storage medium storing program for executing of the present invention includes memory 210, memory 210 is stored with finger
It enables, which, which is performed, realizes coding/decoding method any embodiment of the present invention and possible combine provided method.
Memory 210 may include read-only memory (ROM, Read-Only Memory), random access memory (RAM,
Random Access Memory), flash memory (Flash Memory), hard disk, CD etc..
In several embodiments provided by the present invention, it should be understood that disclosed method and apparatus can pass through it
Its mode is realized.For example, device embodiments described above are only schematical, for example, the module or unit
Division, only a kind of division of logic function, formula that in actual implementation, there may be another division manner, such as multiple units or group
Part can be combined or can be integrated into another system, or some features can be ignored or not executed.Another point, it is shown
Or the mutual coupling, direct-coupling or communication connection discussed can be by some interfaces, device or unit it is indirect
Coupling or communication connection can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, you can be located at a place, or may be distributed over multiple
In network element.Some or all of unit therein can be selected according to the actual needs to realize present embodiment scheme
Purpose.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, it can also
It is that the independent physics of each unit includes, it can also be during two or more units be integrated in one unit.Above-mentioned integrated list
The form that hardware had both may be used in member is realized, can also be realized in the form of SFU software functional unit.
If the integrated unit is realized in the form of SFU software functional unit and sells or use as independent product
When, it can be stored in a computer read/write memory medium.Based on this understanding, technical scheme of the present invention is substantially
The all or part of the part that contributes to existing technology or the technical solution can be in the form of software products in other words
It embodies, which is stored in a storage medium, including some instructions are used so that a computer
It is each that equipment (can be personal computer, server or the network equipment etc.) or processor (processor) execute the present invention
The all or part of step of embodiment the method.And storage medium above-mentioned includes：USB flash disk, mobile hard disk, read-only memory
(ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD
Etc. the various media that can store program code.
Mode the above is only the implementation of the present invention is not intended to limit the scope of the invention, every to utilize this
Equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it is relevant to be applied directly or indirectly in other
Technical field is included within the scope of the present invention.
Claims (11)
1. a kind of coding/decoding method, which is characterized in that the method includes：
To in the first bit stream certain bits and flag carry out XOR logic operation to judge whether original bit stream have passed through
Mass adjust- ment；
If operation result indicates that the original bit stream have passed through the Mass adjust- ment, first bit stream is converted into the
Three bit streams directly export described the if the operation result indicates the original bit stream without the Mass adjust- ment
One bit stream；
The flag in first bit stream of output or the third bit stream is ignored to form the second bit stream.
2. according to the method described in claim 1, it is characterized in that, the certain bits and flag in the first bit stream into
The operation of row XOR logic includes to judge whether original bit stream have passed through Mass adjust- ment：
To in first bit stream the certain bits and the flag carry out the XOR logic operation and obtain the fortune
Calculate result；
If the operation result is not equal to 1, judge that the original bit stream have passed through the Mass adjust- ment, if the operation knot
Fruit is equal to 1, then judges the original bit stream without the Mass adjust- ment.
3. according to the method described in claim 1, it is characterized in that, the certain bits and flag in the first bit stream into
The operation of row XOR logic includes to judge whether original bit stream have passed through Mass adjust- ment：
To in first bit stream the certain bits and the flag carry out the XOR logic operation and obtain the fortune
Calculate result；
If the operation result is equal to 1, judge that the original bit stream have passed through the Mass adjust- ment, if the operation result
Not equal to 1, then judge the original bit stream without the Mass adjust- ment.
4. according to the method described in claim 1, it is characterized in that, described be converted into third bit stream by first bit stream
Including：
First is carried out to first bit stream and is converted to the first transformation result；
Judge whether first transformation result meets data conversion standard；
If meeting the data conversion standard, directly exported first transformation result as the third bit stream, if
It is unsatisfactory for the data conversion standard, then carrying out second to first transformation result is converted to the second transformation result, and will
Second transformation result is exported as the third bit stream.
5. according to the method described in claim 4, it is characterized in that,
First conversion includes being negated to first collection in first bit stream, and second conversion includes to institute
The second collection stated in the first transformation result is negated, and first collection is different from the second collection.
6. according to the method described in claim 5, it is characterized in that, the position of first bit stream and first transformation result
Number is 9, and first collection includes the 5th, 6 and 8, and the second collection includes the 1st, 4,5,7 and 8.
7. according to the method described in claim 4, it is characterized in that, the digit of first transformation result be 9, the judgement institute
It states the first transformation result and whether meets data conversion standard and include：
If first transformation result meets at least one of the following conditions, judge described in the first transformation result satisfaction
Data conversion standard：
The 5th to the 8th logical value in first transformation result is identical；
The 2nd to the 7th logical value in first transformation result is identical；
The 1st to the 6th logical value in first transformation result is identical.
8. according to the method described in claim 4, it is characterized in that, the digit of first transformation result be 9, the judgement institute
It states the first transformation result and whether meets data conversion standard and include：
If the result of calculation of following logical expression is equal to 1, judge that first transformation result meets the data conversion mark
It is accurate：
NAND (NAND (bn [5~8]), NAND (bn [2~7]), NAND (bn [1~6]), OR (bn [5~8]), OR (bn [2~
), 7] (bn [1~6]) OR)
Wherein, NAND is NOT-AND operation, and OR is or operates, and bn [i-j] is the i-th bit of first transformation result to jth position.
9. according to the method described in claim 1, it is characterized in that, first bit stream and the third bit stream are 9
Position bit stream, the certain bits in first bit stream are the 1st, in first bit stream and the third bit stream
The flag be the 0th.
10. a kind of decoding device, which is characterized in that including processor, the processor is for executing instruction to realize such as right
It is required that the method described in any one of 1-9.
11. a kind of readable storage medium storing program for executing is stored with instruction, which is characterized in that described instruction is performed realization such as claim
Method described in any one of 1-9.
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| CN110087080A (en) * | 2019-04-03 | 2019-08-02 | 深圳市华星光电技术有限公司 | Coding/decoding method, equipment and readable storage medium storing program for executing |
| CN110087080B (en) * | 2019-04-03 | 2021-03-23 | Tcl华星光电技术有限公司 | Decoding method, apparatus and readable storage medium |
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| WO2022156113A1 (en) * | 2021-01-19 | 2022-07-28 | Tcl华星光电技术有限公司 | Decoding method, decoding device and readable storage medium |
| CN112953681A (en) * | 2021-02-20 | 2021-06-11 | Tcl华星光电技术有限公司 | Decoding method, decoding apparatus, and computer-readable storage medium |
| CN113447051A (en) * | 2021-09-02 | 2021-09-28 | 北京精雕科技集团有限公司 | Single code channel absolute position measuring device |
| WO2023028966A1 (en) * | 2021-09-02 | 2023-03-09 | 北京精雕科技集团有限公司 | Single-code channel absolute position measurement apparatus |
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