CN108768314A - A kind of circuit that amplifier negative port is protected with discrete component - Google Patents
A kind of circuit that amplifier negative port is protected with discrete component Download PDFInfo
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- CN108768314A CN108768314A CN201810792548.2A CN201810792548A CN108768314A CN 108768314 A CN108768314 A CN 108768314A CN 201810792548 A CN201810792548 A CN 201810792548A CN 108768314 A CN108768314 A CN 108768314A
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- triode
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
- H03F1/523—Circuit arrangements for protecting such amplifiers for amplifiers using field-effect devices
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
The present invention relates to a kind of circuits protected to amplifier negative port with discrete component, including：The ends power cathode VSS are connected on by two divider resistance R3 and R4 ground connection, the cathode voltage V- of amplifier between two institutes divider resistance R3 and R4；The ends power cathode VSS are connect with zener diode U1, and are connect with positive pole VDD by pull-up resistor R1, and regulator circuit is formed；The second port of zener diode U1 with first order NPN type triode U2 is connected to by third divider resistance R2, this triode functions as a NOT gate；Enable Pin EN is connect with the first order with door U7, and influence caused by prevent Enable Pin signal fluctuation big, the connection of triode U2 and triode U3 forms OR-NOT circuit.The present invention has the function of protecting negative pressure.
Description
Technical field
The invention belongs to the fields of radio frequency, are a kind of voltage end progress circuit designs by amplifier, to putting
The negative pressure of big device carries out protective effect.
Background technology
The pin of metal-oxide-semiconductor cannot be hanging, this is determined by the characteristic of metal-oxide-semiconductor, metal-oxide-semiconductor input impedance it is very big (grid with
Have layer of oxide layer between source electrode), input impedance is big, just very strong (simply interference source etc. to the capturing ability of small-signal
Effect is the series connection of an ideal voltage source and an internal resistance, and bigger according to voltage divider principle input resistance, the partial pressure of input is got over
Greatly), it is easy to be interfered by ambient signals when so hanging.Under normal circumstances, it needs low level port being connected to ground.
Present almost all of amplifier is all made of metal-oxide-semiconductor, therefore these amplifiers also have metal-oxide-semiconductor pin cannot
Hanging characteristic.But in some cases, the low level port of metal-oxide-semiconductor is not connected to the ground, but needs to add negative electricity.At this point,
These amplifiers are controlled by two kinds of voltages, and one is negative voltage, another kind is positive voltage, and is only born to device
When pressure side mouth is powered, positive pressure power-up could be carried out to device.So designing a circuit to realize this function, that is, bear
Voltage protection circuit.
Invention content
The purpose of this patent is to provide a kind of circuit that can be protected to the negative port of amplifier, is only amplifying
Cathode voltage could be added after cathode voltage is added in device interface.Technical solution is as follows：
A kind of circuit that amplifier negative port is protected with discrete component, including：
The ends power cathode VSS are connected on two institutes by two divider resistance R3 and R4 ground connection, the cathode voltage V- of amplifier
Between divider resistance R3 and R4；The ends power cathode VSS are connect with zener diode U1, and pass through pull-up resistor R1 and positive pole
VDD connections form regulator circuit；The second port of zener diode U1 with the first order is connected to by third divider resistance R2
NPN type triode U2, this triode function as a NOT gate；
Enable Pin EN is connect with the first order with door U7, influence, the first order caused by prevent Enable Pin signal fluctuation big
It is connect again with second level NPN type triode U6 by resistance R11 with the output end of door U7, the collector of triode U6 passes through pull-up
Resistance R10 is connect with VDD, and the collector of triode U6 is connected by resistance R9 with third level NPN type triode U3 simultaneously,
The connection of triode U2 and triode U3 forms OR-NOT circuit；
The collector that triode U2 and triode U3 are connected with power vd D be connected to by pull-up resistor R5 connect；Three poles
The collector of pipe U2 by the 4th divider resistance R6 is connected to quadrupole NPN type triode after being connected with triode U3 collectors
The collector of the base stage of U4, triode U4 is connected to by pull-up resistor R7 on power vd D；All triode U2, U3, U4,
The emitter of U6 is all connected to ground；
The collector of triode U4 is connected by divider resistance R8 with the grid of PMOS tube U5, and there are one capacitance C1 herein will
The grid of PMOS tube U5 is connected with source electrode, and PMOS tube U5 source electrodes are connect with power vd D, work as VGS<0V and when meeting cut-in voltage,
This PMOS tube is connected, and the high level for the output that drains is connected to the cathode voltage V+ of amplifier.
Description of the drawings
Fig. 1 circuit model figures
Fig. 2 negative pressure protects circuit diagram
Fig. 3 negative pressure protects circuit node label figure
Specific implementation mode
The present invention will be described with reference to the accompanying drawings and examples.
For circuit model as shown in Figure 1, being made of two parts, first part is negative voltage protection circuit, and second part is amplification
Device, wherein negative voltage protection circuit is the important technology feature of this patent.
For the schematic diagram of negative voltage protection circuit as shown in Fig. 2, the component of this figure is detailed as shown in table 1, experiment is in frequency
For the application in 4GHz-6GHz frequency ranges.
1 device of table is detailed
In circuit diagram, the ends cathode voltage VSS are connect with resistance (R3) first port, resistance (R3) second port and resistance
(R4) first port connection, the second port of wherein resistance (R4) is connected to ground, and resistance (R3) and resistance (R4) constitute point
Piezoresistance can export the cathode voltage (V-) needed by adjusting the resistance value of two resistance at resistance (R3) second port.
The ends cathode voltage VSS are connect with the first zener diode (U1), and pass through pull-up resistor (R1) and cathode voltage VDD
Connection forms regulator circuit.The second port of zener diode (U1) is connect with a divider resistance (R2), then with the first order
NPN type triode (U2) is connected, this triode functions as a NOT gate.
Enable Pin (EN) is connect with the first order with door (U7), and effect is to work as a buffer, because of the voltage of Enable Pin (EN)
It is unstable, by with door, can prevent Enable Pin signal fluctuation from being impacted to circuit below greatly.Pass through resistance with door (U7)
(R11) connect again with second level NPN type triode (U6), at this time the collector of triode (U6) by pull-up resistor (R10) with
VDD connections.And the collector of triode (U6) is connected by resistance (R9) and third level NPN type triode (U3) simultaneously.Three
Pole pipe (U2) and the connection of triode (U3) form OR-NOT circuit.
Triode (U2) is connect with the connected collector of triode (U3) with a pull-up resistor (R5), is passed through resistance (R5)
It is connect with power vd D, plays the role of upper pull-up voltage.The collector and divider resistance that triode (U2) is connected with triode (U3)
(R6) it connects, is then connected with NPN type triode (U4).The collector of triode (U4) is connected to electricity by pull-up resistor (R7)
On the VDD of source.The emitter of all triodes (U2, U3, U4, U6) is all connected to the ground.
The collector of last triode (U4) is connected by divider resistance (R8) with the grid of PMOS tube (U5), there is one herein
The grid of PMOS tube (U5) is connected by a capacitance (C1) with source electrode, and PMOS tube (U5) source electrode is connect with power vd D, works as VGS<0V
And when meeting cut-in voltage, the conducting of this PMOS tube, drain electrode output high level (V+).
Negative pressure protects circuit node label figure as shown in figure 3, truth table when this circuit works is as shown in table 2.If input
End：When EN adds positive electricity, when A1 logic levels are 1, EN not powered, A1 logic levels are 0；When A2 adds negative electricity, A2 logic levels are
1, A2 it is not powered when, A2 logic levels be 0；When A3 adds positive electricity, when A3 logic levels are 1, A3 not powered, A3 logic levels are 0.
If output end：When the ends G export negative voltage, when G logic levels, which are the ends 1, G, does not have voltage, G logic levels are 0；Remaining port is all
When exporting positive electricity, logic level 1, when there is no voltage, logic level 0.
Truth table when 2 circuit of table works
From truth table it can be found that when A3=0, entire truth table shows as the symbol of " * ", this is because voltage herein
For 0V when, entire circuit cannot work, at this time study circuit it is nonsensical.Only when cathode voltage VDD is added, entire circuit
It could work.When negative voltage VSS is added, there are negative pressure output in the ports G.Only negative voltage VSS and Enable Pin EN adds simultaneously
When upper, just there is positive voltage output at the ends H.
In the entire circuit course of work, the ends G are not delayed, it is synchronous with the ends A1.But there is delay at the ends H, this is
Because it has multi-level pmultistage circuit between the ports input terminal A1 and the ports A2, cause to be delayed.This design further ensures the ends G elder generation
Negative voltage is exported, the ends H could export positive voltage, to achieve the effect that protect negative pressure.
The ends G of protection circuit are connected with the ends input terminal V- of amplifier, protect the ends H and the input terminal of amplifier of circuit
The ends V+ are connected.After negative voltage adds, positive voltage could add, and ensure that normal amplifier operation.
The advantages of by designing a negative voltage protection circuit with discrete component：
(1) at low cost, discrete component is cheap；
(2) if intergrade has device failure, facilitate and changed；
(3) easy to use, in engineering, there are many these discrete component stocks, conveniently build circuit；
(4) circuit structure is apparent, is apparent that the cabling of circuit, and applicability is extensive, when voltage changes
When, it is only necessary to change the value of corresponding device.
Claims (1)
1. a kind of circuit that amplifier negative port is protected with discrete component, including：
The ends power cathode VSS are connected on two and are divided by two divider resistance R3 and R4 ground connection, the cathode voltage V- of amplifier
Between resistance R3 and R4；The ends power cathode VSS are connect with zener diode U1, and pass through pull-up resistor R1 and positive pole VDD
Connection forms regulator circuit；The second port of zener diode U1 with first order NPN is connected to by third divider resistance R2
Type triode U2, this triode function as a NOT gate；
Enable Pin EN is connect with the first order with door U7, influence, the first order and door caused by prevent Enable Pin signal fluctuation big
The output end of U7 is connect with second level NPN type triode U6 again by resistance R11, and the collector of triode U6 passes through pull-up resistor
R10 is connect with VDD, and the collector of triode U6 is connected by resistance R9 with third level NPN type triode U3 simultaneously, three poles
The connection of pipe U2 and triode U3 forms OR-NOT circuit；
The collector that triode U2 and triode U3 are connected with power vd D be connected to by pull-up resistor R5 connect；Triode U2
Collector be connected with triode U3 collectors after by the 4th divider resistance R6 be connected to quadrupole NPN type triode U4's
The collector of base stage, triode U4 is connected to by pull-up resistor R7 on power vd D；All triode U2, U3, U4, U6's
Emitter is all connected to ground；
The collector of triode U4 is connected by divider resistance R8 with the grid of PMOS tube U5, and there are one capacitance C1 by PMOS herein
The grid of pipe U5 is connected with source electrode, and PMOS tube U5 source electrodes are connect with power vd D, work as VGS<0V and when meeting cut-in voltage, this
PMOS tube is connected, and the high level for the output that drains is connected to the cathode voltage V+ of amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810792548.2A CN108768314A (en) | 2018-07-18 | 2018-07-18 | A kind of circuit that amplifier negative port is protected with discrete component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810792548.2A CN108768314A (en) | 2018-07-18 | 2018-07-18 | A kind of circuit that amplifier negative port is protected with discrete component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108768314A true CN108768314A (en) | 2018-11-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810792548.2A Pending CN108768314A (en) | 2018-07-18 | 2018-07-18 | A kind of circuit that amplifier negative port is protected with discrete component |
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001284982A (en) * | 2000-03-31 | 2001-10-12 | Aiwa Co Ltd | Protection circuit for power amplifier |
| JP2002270766A (en) * | 2001-03-06 | 2002-09-20 | Ricoh Co Ltd | Esd protecting circuit |
| CN101814726A (en) * | 2010-04-14 | 2010-08-25 | 罗康林 | Battery discharge prevention circuit |
| CN201821079U (en) * | 2010-06-02 | 2011-05-04 | 宁波中荣声学科技有限公司 | Load protective circuit for TDA (Tunnel Diode Amplifier) 89XX series power amplifiers |
| CN102412793A (en) * | 2010-09-21 | 2012-04-11 | 飞虹高科股份有限公司 | Protective circuit |
| CN204013413U (en) * | 2014-05-30 | 2014-12-10 | 绵阳科创园区精机电子有限公司 | A kind of amplifier current foldback circuit |
| CN104393559A (en) * | 2014-12-12 | 2015-03-04 | 高晶 | Load overcurrent protection circuit for electric power |
| CN104779577A (en) * | 2014-01-10 | 2015-07-15 | 海洋王（东莞）照明科技有限公司 | Over-current protection circuit |
| CN205693641U (en) * | 2016-06-14 | 2016-11-16 | 盐城市惠众新能源科技有限公司 | A kind of positive voltage square-wave signal is become a full member the circuit of negative voltage square-wave signal |
| CN206195729U (en) * | 2016-11-30 | 2017-05-24 | 无锡华测电子系统有限公司 | High power amplifier chip protection circuit |
| CN206432960U (en) * | 2016-12-27 | 2017-08-22 | 江苏博普电子科技有限责任公司 | A kind of GaN microwave power amplifiers protection circuit |
| CN208581212U (en) * | 2018-07-18 | 2019-03-05 | 天津大学 | A amplifier negative port protects circuit |
-
2018
- 2018-07-18 CN CN201810792548.2A patent/CN108768314A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001284982A (en) * | 2000-03-31 | 2001-10-12 | Aiwa Co Ltd | Protection circuit for power amplifier |
| JP2002270766A (en) * | 2001-03-06 | 2002-09-20 | Ricoh Co Ltd | Esd protecting circuit |
| CN101814726A (en) * | 2010-04-14 | 2010-08-25 | 罗康林 | Battery discharge prevention circuit |
| CN201821079U (en) * | 2010-06-02 | 2011-05-04 | 宁波中荣声学科技有限公司 | Load protective circuit for TDA (Tunnel Diode Amplifier) 89XX series power amplifiers |
| CN102412793A (en) * | 2010-09-21 | 2012-04-11 | 飞虹高科股份有限公司 | Protective circuit |
| CN104779577A (en) * | 2014-01-10 | 2015-07-15 | 海洋王（东莞）照明科技有限公司 | Over-current protection circuit |
| CN204013413U (en) * | 2014-05-30 | 2014-12-10 | 绵阳科创园区精机电子有限公司 | A kind of amplifier current foldback circuit |
| CN104393559A (en) * | 2014-12-12 | 2015-03-04 | 高晶 | Load overcurrent protection circuit for electric power |
| CN205693641U (en) * | 2016-06-14 | 2016-11-16 | 盐城市惠众新能源科技有限公司 | A kind of positive voltage square-wave signal is become a full member the circuit of negative voltage square-wave signal |
| CN206195729U (en) * | 2016-11-30 | 2017-05-24 | 无锡华测电子系统有限公司 | High power amplifier chip protection circuit |
| CN206432960U (en) * | 2016-12-27 | 2017-08-22 | 江苏博普电子科技有限责任公司 | A kind of GaN microwave power amplifiers protection circuit |
| CN208581212U (en) * | 2018-07-18 | 2019-03-05 | 天津大学 | A amplifier negative port protects circuit |
Non-Patent Citations (1)
| Title |
|---|
| 吴生虎, 马秀丽: "集成运算放大器的使用可靠性", 电子产品可靠性与环境试验, no. 02 * |
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