CN108768176B

CN108768176B - Three-level Boost circuit and inverter system

Info

Publication number: CN108768176B
Application number: CN201810726495.4A
Authority: CN
Inventors: 王鹏; 别伟; 张兵; 文鹏; 李春
Original assignee: Sungrow Power Supply Co Ltd
Current assignee: Sungrow Power Supply Co Ltd
Priority date: 2018-07-04
Filing date: 2018-07-04
Publication date: 2020-01-21
Anticipated expiration: 2038-07-04
Also published as: CN108768176A

Abstract

The invention provides a three-level Boost circuit and an inverter system, wherein the Boost circuit comprises a third switching tube, the first end of the third switching tube is connected with the anode of a power supply, and the second end of the third switching tube is connected with a first node through a fifth capacitor; the third switching tube comprises an anti-parallel diode; when the Boost circuit works, the third switching tube is complementary with the first switching tube in shape; and when the Boost circuit does not work, the third switching tube is closed. The circuit realizes the voltage boosting of the input voltage of the circuit through the switching on or off of the first switch tube and the second switch tube, and the circuit also connects the second capacitor and the fifth capacitor with equivalent capacitance values in series, so that the voltage equalizing of the series connection of the second capacitor and the fifth capacitor is realized.

Description

Three-level Boost circuit and inverter system

Technical Field

The invention relates to the technical field of power electronics, in particular to a three-level Boost circuit and an inverter system.

Background

With the increase of energy consumption, the deterioration of ecological environment and the improvement of human environmental awareness, solar energy is increasingly regarded as a green energy source which can be continuously developed, is efficient and has no pollution. A technology with a high development prospect among the application of solar technology is photovoltaic technology. Photovoltaic technology is a technology that directly converts solar energy into electrical energy.

The photovoltaic cell can convert solar energy into direct current electric energy by utilizing the photovoltaic effect, but because the current provided by a single photovoltaic cell is limited, a plurality of photovoltaic cells are generally connected to form a photovoltaic array in practical application. Direct current generated by the photovoltaic array requires an inverter to convert the direct current into alternating current for load use or grid connection.

In order to increase the operating range of the input voltage of the inverter and increase the Maximum Power Point Tracking (MPPT) efficiency, a Boost circuit is generally used in the inverter, and the Boost circuit is used to increase the output voltage of the photovoltaic array and then provide the increased output voltage to the inverter.

However, when the input voltage of the Boost circuit is high, the voltage stress of a single switching tube in the Boost circuit is limited, so that two switching tubes need to be connected in series, but when the Boost circuit works, how to realize voltage sharing of the two switching tubes is a technical problem faced by the Boost circuit.

Disclosure of Invention

In order to solve the problems in the prior art, the invention provides a three-level Boost circuit and an inverter system, which can enable two switch tubes in the three-level Boost circuit to bear voltage and realize voltage sharing.

In order to achieve the purpose, the invention adopts the following technical scheme:

a three-level Boost circuit, comprising: the circuit comprises a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor;

the input end of the Boost circuit is connected with a first capacitor; the first capacitor is connected in parallel at two ends of the power supply;

the first end of the first switch tube is connected with the anode of the power supply, and the second end of the first switch tube is connected with a first node; the first end of the second switch tube is connected with the first node, and the second end of the second switch tube is connected with the negative electrode of the power supply through the first inductor;

a first end of the third capacitor is connected with the anode of the power supply, and a second end of the third capacitor is connected with a second node; a first end of the fourth capacitor is connected with the second node, and a second end of the fourth capacitor is connected with the output cathode of the Boost circuit;

a first end of the second capacitor is connected with the first node, and a second end of the second capacitor is connected with a third node;

the anode of the first diode is connected with the third node, and the cathode of the first diode is connected with the second end of the second switch tube; the anode of the second diode is connected with the output cathode of the Boost circuit, and the cathode of the second diode is connected with the third node;

the first end of the third switching tube is connected with the anode of the power supply, and the second end of the third switching tube is connected with the first node through the fifth capacitor; the third switching tube comprises an anti-parallel diode;

when the Boost circuit works, the third switching tube is complementary with the first switching tube in shape; when the Boost circuit does not work, the third switching tube is closed.

Optionally, the third switching tube is a controllable switching tube, the controllable switching tube is connected with a diode in anti-parallel, and the controllable switching tube is: IGBT, MOSFET, JFET or relay.

Optionally, in the three-level Boost circuit, when the first switching tube is closed, the second switching tube is opened, and the third switching tube is opened, the current path is: the positive pole of the power supply, the first switch tube, the second capacitor, the first diode and the first inductor;

when the first switch tube is disconnected, the second switch tube is disconnected, the third switch tube is closed, and the sum of the voltages of the fifth capacitor and the second capacitor is greater than the sum of the voltages of the third capacitor and the fourth capacitor, the two corresponding current paths are respectively as follows: the positive pole of the power supply-the third capacitor-the fourth capacitor-the second diode-the first inductor; a second capacitor, a fifth capacitor, a third switching tube, a third capacitor, a fourth capacitor and a second diode;

when the first switch tube is disconnected, the second switch tube is disconnected, the third switch tube is closed, and the sum of the voltages of the fifth capacitor and the second capacitor is less than the sum of the voltages of the third capacitor and the fourth capacitor, the current path is as follows: the positive pole of the power supply, the third switching tube, the fifth capacitor, the second capacitor, the first diode and the first inductor;

when the first switch tube is disconnected, the second switch tube is disconnected, and the third switch tube is disconnected, the current path is as follows: the positive pole of the power supply-the third capacitor-the fourth capacitor-the second diode-the first inductor;

when the first switch tube is disconnected, the second switch tube is closed, the third switch tube is closed, and the sum of the voltages of the fifth capacitor and the second capacitor is greater than the sum of the voltages of the third capacitor and the fourth capacitor, the two corresponding current paths are respectively as follows: the positive pole of the power supply, the third capacitor, the fourth capacitor, the second diode, the second capacitor, the second switching tube and the first inductor; a second capacitor, a fifth capacitor, a third switching tube, a third capacitor, a fourth capacitor and a second diode;

when the first switch tube is disconnected, the second switch tube is closed, the third switch tube is closed, and the sum of the voltages of the fifth capacitor and the second capacitor is less than the sum of the voltages of the third capacitor and the fourth capacitor, the current path is as follows: the positive pole of the power supply, the third switch tube, the fifth capacitor, the second switch tube and the first inductor;

when the first switch tube is opened, the second switch tube is closed, and the third switch tube is opened, the current path is as follows: the positive pole of the power supply, the third capacitor, the fourth capacitor, the second diode, the second capacitor, the second switching tube and the first inductor;

when the first switch tube is closed, the second switch tube is closed, the third switch tube is opened, and the current path is as follows: the positive pole of the power supply, the first switch tube, the second switch tube and the first inductor.

Optionally, the three-level Boost circuit further includes: a fourth diode;

the positive electrode of the fourth diode is connected with the output negative electrode of the Boost circuit, and the negative electrode of the fourth diode is connected with the negative electrode of the power supply.

The invention also provides another technical scheme:

the input end of the Boost circuit is connected with a power supply; the first capacitor is connected in parallel at two ends of the power supply;

the first end of the first switch tube is connected with the anode of the power supply through the first inductor, and the second end of the first switch tube is connected with a first node; the first end of the second switching tube is connected with the first node, and the second end of the second switching tube is connected with the negative electrode of the power supply;

the first end of the third capacitor is connected with the output anode of the Boost circuit, and the second end of the third capacitor is connected with the second node; a first end of the fourth capacitor is connected with the second node, and a second end of the fourth capacitor is connected with the output cathode of the Boost circuit;

the first end of the second capacitor is connected with the fourth node, and the second end of the second capacitor is connected with the first node;

the anode of the first diode is connected with the first end of the first switching tube, and the cathode of the first diode is connected with the fourth node; the anode of the second diode is connected with the fourth node, and the cathode of the second diode is connected with the output anode of the Boost circuit;

the first end of the third switching tube is connected with the first node, and the second end of the third switching tube is connected with the negative electrode of the power supply through the fifth capacitor; the third switching tube comprises an anti-parallel diode;

Optionally, in the three-level Boost circuit, when the first switch tube is closed, the second switch tube is opened, the third switch tube is closed, and the sum of the voltages of the second capacitor and the fifth capacitor is greater than the sum of the voltages of the third capacitor and the fourth capacitor, the two corresponding current paths respectively are: the positive pole of the power supply, the first inductor, the first switching tube, the second capacitor, the second diode, the third capacitor and the fourth capacitor; a fifth capacitor, a third switching tube, a second capacitor, a second diode, a third capacitor and a fourth capacitor;

when the first switch tube is closed, the second switch tube is opened, the third switch tube is closed, and the sum of the voltages of the second capacitor and the fifth capacitor is less than the sum of the voltages of the third capacitor and the fourth capacitor, the current path is as follows: the positive pole of the power supply, the first inductor, the first switch tube, the third switch tube and the fifth capacitor;

when the first switch tube is closed, the second switch tube is opened, and the third switch tube is opened, the current path is as follows: the positive pole of the power supply, the first inductor, the first switching tube, the second capacitor, the second diode, the third capacitor and the fourth capacitor;

when the first switch tube is disconnected, the second switch tube is disconnected, the third switch tube is closed, and the sum of the voltages of the second capacitor and the fifth capacitor is greater than the sum of the voltages of the third capacitor and the fourth capacitor, the two corresponding current paths are as follows: the positive pole of the power supply, the first inductor, the first diode, the second diode, the third capacitor and the fourth capacitor; a fifth capacitor, a third switching tube, a second capacitor, a second diode, a third capacitor and a fourth capacitor;

when the first switch tube is disconnected, the second switch tube is disconnected, the third switch tube is closed, and the sum of the voltages of the second capacitor and the fifth capacitor is less than the sum of the voltages of the third capacitor and the fourth capacitor, the current path is as follows: the positive pole of the power supply, the first inductor, the first diode, the second capacitor, the third switch tube and the fifth capacitor;

when the first switch tube is disconnected, the second switch tube is disconnected, and the third switch tube is disconnected, the current path is as follows: the positive pole of the power supply, the first inductor, the first diode, the second diode, the third capacitor and the fourth capacitor;

when the first switch tube is opened, the second switch tube is closed, and the third switch tube is opened, the current path is as follows: the positive pole of the power supply, a first inductor, a first diode, a second capacitor and a second switch tube;

when the first switch tube is closed, the second switch tube is closed and the third switch tube is opened, the current path is as follows: the positive pole of the power supply, the first inductor, the first switch tube, the second switch tube and the negative pole of the power supply.

Optionally, the three-level Boost circuit further includes: a fourth diode;

the anode of the fourth diode is connected with the anode of the power supply, and the cathode of the fourth diode is connected with the output anode of the Boost circuit.

The invention also provides an inverter system, which comprises the three-level Boost circuit and further comprises: a photovoltaic array and an inverter;

the photovoltaic array is used as a power supply, and the output end of the photovoltaic array is connected with the input end of the three-level Boost circuit;

the output end of the three-level Boost circuit is connected with the input end of the inverter;

the three-level Boost circuit is used for boosting the voltage output by the photovoltaic array;

and the inverter is used for inverting the direct current output by the three-level Boost circuit into alternating current to supply to a power grid or a load.

Compared with the prior art, the invention has at least the following advantages:

the invention provides a three-level Boost circuit, which comprises: the circuit comprises a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor; the input end of the Boost circuit is connected with a first capacitor; the first capacitor is connected in parallel at two ends of the power supply; the first end of the first switch tube is connected with the anode of the power supply, and the second end of the first switch tube is connected with a first node; the first end of the second switch tube is connected with the first node, and the second end of the second switch tube is connected with the negative electrode of the power supply through the first inductor; a first end of the third capacitor is connected with the anode of the power supply, and a second end of the third capacitor is connected with a second node; a first end of the fourth capacitor is connected with the second node, and a second end of the fourth capacitor is connected with the output cathode of the Boost circuit; a first end of the second capacitor is connected with the first node, and a second end of the second capacitor is connected with a third node; the anode of the first diode is connected with the third node, and the cathode of the first diode is connected with the second end of the second switch tube; the anode of the second diode is connected with the output cathode of the Boost circuit, and the cathode of the second diode is connected with the third node; the first end of the third switching tube is connected with the anode of the power supply, and the second end of the third switching tube is connected with the first node through the fifth capacitor; the third switching tube comprises an anti-parallel diode; when the BOOST circuit works, the third switch tube is complementary to the first switch tube in shape; when the BOOST circuit does not work, the third switching tube is closed. The circuit realizes the voltage boosting of the input voltage of the circuit through the switching on or off of the first switch tube and the second switch tube, and the circuit also connects the second capacitor and the fifth capacitor with equivalent capacitance values in series, so that the voltage equalizing of the series connection of the second capacitor and the fifth capacitor is realized.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.

Fig. 1 is a schematic diagram of a conventional Boost circuit structure provided in the present application;

fig. 2 is a schematic structural diagram of a three-level Boost circuit according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a first operating state current path according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram of a first sub-operating state current path of a second operating state according to an embodiment of the present application;

fig. 5 is a schematic diagram of a second sub-operating state current path of a second operating state according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a current path in a third operating state according to an embodiment of the present disclosure;

fig. 7 is a schematic diagram of a first sub-operating state current path of a fourth operating state according to an embodiment of the present application;

fig. 8 is a schematic diagram of a current path in a second sub-operating state in a fourth operating state according to an embodiment of the present application;

FIG. 9 is a schematic diagram of a fifth operating state current path according to an embodiment of the present application;

FIG. 10 is a schematic diagram of a current path in a sixth operating state according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a three-level Boost circuit according to a second embodiment of the present disclosure;

fig. 12 is a schematic structural diagram of a three-level Boost circuit according to a third embodiment of the present application;

fig. 13 is a schematic view of a first sub-operating state current path of a first operating state according to a third embodiment of the present application;

fig. 14 is a schematic diagram of a current path of a second sub-operating state of the first operating state according to the third embodiment of the present application;

fig. 15 is a schematic diagram of a current path in a second operation state according to the third embodiment of the present application;

fig. 16 is a schematic diagram of a first sub-operating state current path of a third operating state according to the third embodiment of the present application;

fig. 17 is a schematic diagram of a current path in a second sub-operating state in a third operating state according to the third embodiment of the present application;

fig. 18 is a schematic view of a current path in a fourth operating state according to the third embodiment of the present application;

fig. 19 is a schematic view of a fifth operating state current path according to the third embodiment of the present application;

fig. 20 is a schematic view of a current path in a sixth operation state according to the third embodiment of the present application;

fig. 21 is a schematic structural diagram of a three-level Boost circuit according to a fourth embodiment of the present disclosure;

fig. 22 is a schematic structural diagram of an inverter system according to an embodiment of the present application.

Detailed Description

Referring to fig. 1, a schematic diagram of a conventional Boost circuit structure provided in the present application is shown.

The Boost circuit of fig. 1 includes an inductor L, MOS, a diode D, and a capacitor C.

The working principle of the Boost circuit is as follows: firstly, enabling an MOS tube M to be in an on state, charging an inductor L by a power supply V, and charging a capacitor C and supplying power to a load by the power supply V; then, the MOS transistor M is disconnected, and due to the current holding characteristic of the inductor, the power supply V and the inductor L simultaneously charge the capacitor C and supply power to the load, so that the voltage at two ends of the capacitor can be increased; and finally, repeating the on-off process of the MOS transistor M, so that the voltage at two ends of the capacitor is increased to the input voltage of the inverter.

However, when the input voltage of the Boost circuit is high, the voltage stress of a single switching tube in the Boost circuit is limited, and therefore, two switching tubes may be adopted in the Boost circuit. However, when the Boost circuit works, how to realize voltage sharing of the two switching tubes is a technical problem faced by the Boost circuit.

In order to solve the problems of the Boost circuit, an embodiment of the present application provides a three-level Boost circuit, including: the circuit comprises a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor; the input end of the Boost circuit is connected with a first capacitor; the first capacitor is connected in parallel at two ends of the power supply; the first end of the first switch tube is connected with the anode of the power supply, and the second end of the first switch tube is connected with a first node; the first end of the second switch tube is connected with the first node, and the second end of the second switch tube is connected with the negative electrode of the power supply through the first inductor; a first end of the third capacitor is connected with the anode of the power supply, and a second end of the third capacitor is connected with a second node; a first end of the fourth capacitor is connected with the second node, and a second end of the fourth capacitor is connected with the output cathode of the Boost circuit; a first end of the second capacitor is connected with the first node, and a second end of the second capacitor is connected with a third node; the anode of the first diode is connected with the third node, and the cathode of the first diode is connected with the second end of the second switch tube; the anode of the second diode is connected with the output cathode of the Boost circuit, and the cathode of the second diode is connected with the third node; the first end of the third switching tube is connected with the anode of the power supply, and the second end of the third switching tube is connected with the first node through the fifth capacitor; the third switching tube comprises an anti-parallel diode; when the Boost circuit works, the third switching tube is complementary with the first switching tube in shape; when the Boost circuit does not work, the third switching tube is closed.

The application provides a three-level Boost circuit includes: the first switch tube, the second switch tube, the first inductor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor, the first diode, the second diode and the third switch tube. The circuit realizes the voltage boosting of the input voltage of the circuit through the switching on or off of the first switch tube and the second switch tube, and the circuit also connects the second capacitor and the fifth capacitor with equivalent capacitance values in series, so that the voltage balancing of the second capacitor and the fifth capacitor is realized, and the voltage balancing of the first switch tube and the second switch tube is realized because the first switch tube and the fifth capacitor are connected in parallel and the second switch tube and the second capacitor are connected in parallel.

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The first embodiment is as follows:

referring to fig. 2, the schematic diagram of a three-level Boost circuit structure provided in an embodiment of the present application is shown.

The three-level Boost circuit provided by the embodiment of the application is characterized by comprising: the circuit comprises a first switch tube Q1, a second switch tube Q2, a first inductor L, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first diode D1, a second diode D2 and a third switch tube Q3; the capacitance value of the second capacitor C2 is equal to that of the fifth capacitor C5;

the input end of the Boost circuit is connected with a first capacitor C1; the first capacitor C1 is connected in parallel to two ends of a power supply;

a first terminal of the first switch tube Q1 is connected to the positive electrode of the power supply, and a second terminal of the first switch tube Q1 is connected to a first node; a first terminal of the second switch transistor Q2 is connected to the first node, and a second terminal of the second switch transistor Q2 is connected to the negative terminal of the power supply through the first inductor L;

a first end of the third capacitor C3 is connected with the positive electrode of the power supply, and a second end of the third capacitor C3 is connected with a second node; a first end of the fourth capacitor C4 is connected to the second node, and a second end of the fourth capacitor C4 is connected to the output cathode of the Boost circuit;

a first terminal of the second capacitor C2 is connected to the first node, and a second terminal of the second capacitor C2 is connected to a third node;

the anode of the first diode D1 is connected to the third node, and the cathode of the first diode D1 is connected to the second end of the second switch tube Q2; the anode of the second diode D2 is connected with the output cathode of the Boost circuit, and the cathode of the second diode D2 is connected with the third node;

a first terminal of the third transistor Q3 is connected to the positive electrode of the power supply, and a second terminal of the third transistor Q3 is connected to the first node through the fifth capacitor C5; the third switching tube Q3 comprises an anti-parallel diode;

when the Boost circuit works, the state of the third switching tube Q3 is complementary to that of the first switching tube Q1; when the Boost circuit does not work, the third switching tube Q3 is closed.

Since the second capacitor C2 and the fifth capacitor C5 are connected in series and have the same capacitance value, the first switch tube Q1 is connected in parallel with the second capacitor C2, and the second switch tube Q2 is connected in parallel with the fifth capacitor C5, when the first switch tube Q1 and the second switch tube Q2 are both off, the voltage of the first switch tube Q1 and the voltage of the second switch tube Q2 are equalized.

The third switch tube Q3 is a controllable switch tube, the controllable switch tube is connected with a diode in anti-parallel, and the controllable switch tube is: IGBT, MOSFET, JFET or relay.

For example, the third switching transistor Q3 in fig. 2 may be an IGBT, and needs to be connected in anti-parallel with the third diode D3.

The three-level Boost circuit provided by the embodiment of the application has six working states, wherein the first working state is that the first switching tube Q1 is closed, the second switching tube Q2 is opened, and the third switching tube Q3 is opened; the second working state is that the first switch tube Q1 is opened, the second switch tube Q2 is opened and the third switch tube Q3 is closed; the third working state is that the first switching tube Q1 is disconnected, the second switching tube Q2 is disconnected and the third switching tube Q3 is disconnected; the fourth working state is that the first switching tube Q1 is opened, the second switching tube Q2 is closed and the third switching tube Q3 is closed; the fifth working state is that the first switch tube Q1 is opened, the second switch tube Q2 is closed and the third switch tube Q3 is opened; the sixth working state is that the first switch tube Q1 is closed, the second switch tube Q2 is closed and the third switch tube Q3 is open.

In order to facilitate understanding of different operating states of the three-level Boost circuit provided in the embodiments of the present application, the first operating state to the sixth operating state will be sequentially described in detail below.

The first working state: the first switch tube Q1 is closed, the second switch tube Q2 is open, and the third switch tube Q3 is open.

Referring to fig. 3, the first operating state current path diagram provided in the embodiment of the present application is shown.

When the first switch Q1 is closed, the first switch Q1 is equivalent to a conducting wire, and a circuit is conducted between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is broken; when the third switch Q3 is turned off, the third switch Q3 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is opened.

Therefore, when the first switch Q1 is closed, the second switch Q2 is opened, and the third switch Q3 is opened, the current path is: the positive pole of the power supply, the first switch Q1, the second capacitor C2, the first diode D1, and the first inductor L.

The second working state: the first switch tube Q1 is open, the second switch tube Q2 is open, and the third switch tube Q3 is closed.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is broken; when the third switch Q3 is closed, the third switch Q3 is equivalent to a conductive wire, and a circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is turned on.

In the working state, the three-level Boost circuit further comprises two sub-working states according to the relative magnitude of the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 and the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, wherein the first sub-working state of the second working state is that the first switch tube Q1 is opened, the second switch tube Q2 is opened, and the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4; the second sub-operation state of the second operation state is that the first switch Q1 is open, the second switch Q2 is open, and the third switch Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4.

First sub-operating state of the second operating state:

referring to fig. 4, the first sub-operating state current path diagram of the second operating state provided in the first embodiment of the present application is shown.

Since the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the second capacitor C2 and the fifth capacitor C5 will discharge to the third capacitor C3 and the fourth capacitor C4. Since the power supply in this circuit also charges the third capacitor C3 and the fourth capacitor C4, in this state this circuit comprises two current paths.

Therefore, when the first switch tube Q1 is open, the second switch tube Q2 is open, the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the corresponding two current paths are: the anode of the power supply, the third capacitor C3, the fourth capacitor C4, the second diode D2, the first diode D1 and the first inductor L; the second capacitor C2, the fifth capacitor C5, the third switching tube Q3, the third capacitor C3, the fourth capacitor C4 and the second diode D2.

A second sub-operating state of the second operating state:

referring to fig. 5, the second sub-operating state current path diagram of the second operating state provided in the first embodiment of the present application is shown.

Since the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the second capacitor C2 and the fifth capacitor C5 need to be charged, and the power supply charges the second capacitor C2 and the fifth capacitor C5.

Therefore, when the first switch tube Q1 is opened, the second switch tube Q2 is opened, the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the current path is: the positive pole of the power supply, the third switching tube Q3, the fifth capacitor C5, the second capacitor C2, the first diode D1 and the first inductor L.

The third working state: the first switch tube Q1 is turned off, the second switch tube Q2 is turned off, and the third switch tube Q3 is turned off.

Referring to fig. 6, the current path diagram of the third operation state provided in the first embodiment of the present application is shown.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is broken; when the third switch Q3 is turned off, the third switch Q3 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is opened.

Therefore, when the first switch Q1 is turned off, the second switch Q2 is turned off, and the third switch Q3 is turned off, the current path is: the positive pole of the power supply, the third capacitor C3, the fourth capacitor C4, the second diode D2, the first diode D1, and the first inductor L.

The fourth working state: the first switch tube Q1 is open, the second switch tube Q2 is closed, and the third switch tube Q3 is closed.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is closed, the second switch Q2 is equivalent to a conducting wire, and a circuit between a first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is conducted; when the third switch Q3 is closed, the third switch Q3 is equivalent to a conductive wire, and a circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is turned on.

In the working state, the three-level Boost circuit further comprises two sub-working states according to the relative magnitude of the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 and the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, wherein the first sub-working state of the second working state is that the first switch tube Q1 is opened, the second switch tube Q2 is closed and the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4; the second sub-operation state of the second operation state is that the first switch Q1 is open, the second switch Q2 is closed, and the third switch Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4.

A first sub-operating state of the fourth operating state:

referring to fig. 7, the first sub-operating state current path diagram of the fourth operating state provided in the first embodiment of the present application is shown.

Therefore, when the first switch tube Q1 is opened, the second switch tube Q2 is closed, the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the corresponding two current paths are: the positive pole of the power supply, a third capacitor C3, a fourth capacitor C4, a second diode D2, a second capacitor C2, a second switching tube Q2 and a first inductor L; the second capacitor C2, the fifth capacitor C5, the third switching tube Q3, the third capacitor C3, the fourth capacitor C4 and the second diode D2.

A second sub-operating state of the fourth operating state:

referring to fig. 8, this figure is a schematic diagram of a current path in a second sub-operation state of a fourth operation state provided in the first embodiment of the present application.

Therefore, when the first switch tube Q1 is opened, the second switch tube Q2 is closed, the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the current path is: the positive pole of the power supply, the third switching tube Q3, the fifth capacitor C5, the second switching tube Q2 and the first inductor L.

The fifth working state: the first switch tube Q1 is open, the second switch tube Q2 is closed, and the third switch tube Q3 is open.

Referring to fig. 9, the current path diagram of the fifth operation state provided in the first embodiment of the present application is shown.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is closed, the second switch Q2 is equivalent to a conducting wire, and a circuit between a first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is conducted; when the third switch Q3 is turned off, the third switch Q3 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is opened.

Therefore, when the first switch Q1 is open, the second switch Q2 is closed, and the third switch Q3 is open, the current path is: the anode of the power supply, the third capacitor C3, the fourth capacitor C4, the second diode D2, the second capacitor C2, the second switch tube Q2 and the first inductor L.

The sixth working state: the first switch tube Q1 is closed, the second switch tube Q2 is closed, and the third switch tube Q3 is open.

Referring to fig. 10, the current path diagram of the sixth operation state provided in the first embodiment of the present application is shown.

When the first switch Q1 is closed, the first switch Q1 is equivalent to a conducting wire, and a circuit is conducted between the positive electrode of the power source connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1; when the second switch Q2 is closed, the second switch Q2 is equivalent to a conducting wire, and a circuit between a first node connected to the first end of the second switch Q2 and the first inductor L connected to the second end of the second switch Q2 is conducted; when the third switch Q3 is turned off, the third switch Q3 is equivalent to an open circuit, and the circuit between the positive electrode of the power source connected to the first end of the third switch Q3 and the fifth capacitor C5 connected to the second end of the third switch Q3 is opened.

Therefore, when the first switch Q1 is closed, the second switch Q2 is closed, the third switch Q3 is open, and the current path is: the positive pole of the power supply-the first switch tube Q1-the second switch tube Q2-the first inductor L.

According to the analysis of the working state of the three-level Boost circuit, the following results are obtained: when the three-level Boost circuit works, current flows through the first inductor LL, different operations are carried out according to the magnitude of induced electromotive force on the first inductor LL, and the three-level Boost circuit can discharge, can accumulate the induced electromotive force and can also have no action. In addition, when the three-level Boost circuit operates and the third switching tube Q3 is closed, if the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the fifth capacitor C5 and the second capacitor C2 discharge to the third capacitor C3 and the fourth capacitor C4; if the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is less than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the power supply charges the fifth capacitor C5 and the second capacitor C2. However, the voltage of the second capacitor C2 is controlled by the on/off of the first switch Q1 and the on/off of the second switch Q2, and since the second capacitor C2 and the fifth capacitor C5 are connected in parallel with the power supply, the voltage of the fifth capacitor C5 is controllable when the voltage of the second capacitor C2 is controllable.

The three-level Boost circuit provided by the embodiment of the application comprises a first switch tube Q1, a second switch tube Q2, a first inductor L, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first diode D1, a second diode D2 and a third switch tube Q3, wherein the capacitance value of the second capacitor C2 is equal to that of the fifth capacitor C5. The input voltage of the circuit is boosted by switching on or off the first switch tube Q1 and the second switch tube Q2, in addition, the circuit also connects the second capacitor C2 and the fifth capacitor C5 which have the same capacitance value in series, so that the voltage sharing of the second capacitor C2 and the voltage sharing of the fifth capacitor C5 are realized, and the voltage sharing of the first switch tube Q1 and the second switch tube Q2 is realized because the first switch tube Q1 and the fifth capacitor C5 are connected in parallel, and the second switch tube Q2 and the second capacitor C2 are connected in parallel.

Based on the three-level Boost circuit provided by the above embodiments, the circuit is also suitable for an application scenario in which the Boost circuit performs low-loss transmission on the input voltage.

Example two:

referring to fig. 11, the diagram is a schematic diagram of a structure of a three-level Boost circuit according to a second embodiment of the present application.

The three-level Boost circuit provided by the application comprises the structure of the three-level Boost circuit provided by the first embodiment, and further comprises: a fourth diode D4;

the anode of the fourth diode D4 is connected to the output cathode of the Boost circuit, and the cathode of the fourth diode D4 is connected to the cathode of the power supply.

The working states of the three-level Boost circuit provided by the embodiment of the application include a seventh working state in addition to the six working states provided by the first embodiment.

The seventh operating mode is characterized in that: the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are all open, and the current path of the circuit is as follows: the anode of the power supply, a third capacitor C3, a fourth capacitor C4 and a fourth diode D4.

The application scenario of the seventh working state is as follows: the input voltage of the Boost circuit is higher, and the requirement of the input voltage of the inverter is met, so that the voltage of the power supply does not need to be boosted, and only needs to be input into the inverter through the fourth diode D4 of the Boost circuit.

The three-level Boost circuit provided by the embodiment of the application further comprises a fourth diode D4, when the input voltage of the Boost circuit reaches the height of the input voltage of the inverter and the circuit is in a seventh working state, the current output by the power supply flows through the fourth diode D4 of the circuit to reach the inverter, so that the loss is effectively reduced, the efficiency of the inverter is improved, and the power generation amount of the inverter is improved.

Based on the above embodiments, a common-anode three-level Boost circuit is provided, and embodiments of the present application also provide a common-cathode three-level Boost circuit, which is described in detail below with reference to the accompanying drawings.

Example three:

referring to fig. 12, the figure is a schematic diagram of a three-level Boost circuit structure provided in the third embodiment of the present application.

The application provides a three-level Boost circuit includes: the circuit comprises a first switch tube Q1, a second switch tube Q2, a first inductor L, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first diode D1, a second diode D2 and a third switch tube Q3; the capacitance value of the second capacitor C2 is equal to that of the fifth capacitor C5;

the input end of the Boost circuit is connected with a power supply; a first capacitor C1 is connected in parallel at two ends of the power supply;

a first terminal of the first switch transistor Q1 is connected to the positive electrode of the power supply through the first inductor L, and a second terminal of the first switch transistor Q1 is connected to a first node; a first end of the second switch tube Q2 is connected to the first node, and a second end of the second switch tube Q2 is connected to the negative pole of the power supply;

a first end of the third capacitor C3 is connected with the output anode of the Boost circuit, and a second end of the third capacitor C3 is connected with a second node; a first end of the fourth capacitor C4 is connected to the second node, and a second end of the fourth capacitor C4 is connected to the output cathode of the Boost circuit;

a first end of the second capacitor C2 is connected to the fourth node, and a second end of the second capacitor C2 is connected to the first node;

the anode of the first diode D1 is connected to the first end of the first switch tube Q1, and the cathode of the first diode D1 is connected to the fourth node; the anode of the second diode D2 is connected to the fourth node, and the cathode of the second diode D2 is connected to the output anode of the Boost circuit;

a first terminal of the third switch tube Q3 is connected to the first node, and a second terminal of the third switch tube Q3 is connected to the negative electrode of the power supply through the fifth capacitor C5; the third switching tube Q3 comprises an anti-parallel diode;

when the BOOST circuit is in operation, the third switching tube Q3 is complementary to the state of the first switching tube Q1; when the BOOST circuit does not work, the third switching tube Q3 is closed.

For example, the third switching transistor Q3 in fig. 12 may be an IGBT, and needs to be connected in anti-parallel with the third diode D3.

The three-level Boost circuit provided by the embodiment of the application has six working states, wherein the first working state is that the first switching tube Q1 is closed, the second switching tube Q2 is opened, and the third switching tube Q3 is closed; the second working state is that the first switch tube Q1 is closed, the second switch tube Q2 is opened and the third switch tube Q3 is opened; the third working state is that the first switching tube Q1 is opened, the second switching tube Q2 is opened and the third switching tube Q3 is closed; the fourth working state is that the first switching tube Q1 is disconnected, the second switching tube Q2 is disconnected and the third switching tube Q3 is disconnected; the fifth working state is that the first switch tube Q1 is opened, the second switch tube Q2 is closed and the third switch tube Q3 is opened; the sixth working state is that the first switch tube Q1 is closed, the second switch tube Q2 is closed and the third switch tube Q3 is open.

The first operating state is that the first switch tube Q1 is closed, the second switch tube Q2 is open, and the third switch tube Q3 is closed.

When the first switch Q1 is closed, the first switch Q1 is equivalent to a conducting wire, and a circuit is conducted between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the negative electrode of the power supply connected to the second end of the second switch Q2 is broken; when the third transistor Q3 is closed, the third transistor Q3 is equivalent to a conductive line, and a circuit between a first node connected to the first end of the third transistor Q3 and the fifth capacitor C5 connected to the second end of the third transistor Q3 is turned on.

In the working state, the three-level Boost circuit further comprises two sub-working states according to the relative magnitude of the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 and the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, wherein the first sub-working state of the first working state is that the first switch tube Q1 is closed, the second switch tube Q2 is open, and the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4; the second sub-operation state of the first operation state is that the first switch tube Q1 is closed, the second switch tube Q2 is open, and the third switch tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4.

First sub-operating state of the first operating state:

referring to fig. 13, it is a schematic view of a first sub-operating state current path of the first operating state provided in the third embodiment of the present application.

Therefore, when the first switch tube Q1 is closed, the second switch tube Q2 is opened, the third switch tube Q3 is closed, and the sum of the voltages of the second capacitor C2 and the fifth capacitor C5 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the corresponding two current paths are: the positive pole of the power supply, a first inductor L, a first switching tube Q1, a second capacitor C2, a second diode D2, a third capacitor C3 and a fourth capacitor C4; the fifth capacitor C5, the third switching tube Q3, the second capacitor C2, the second diode D2, the third capacitor C3 and the fourth capacitor C4.

Second sub-operating state of the first operating state:

referring to fig. 14, it is a schematic view of a current path of a second sub-operation state of the first operation state provided in the third embodiment of the present application.

Therefore, when the first switch tube Q1 is closed, the second switch tube Q2 is opened, the third switch tube Q3 is closed, and the sum of the voltages of the second capacitor C2 and the fifth capacitor C5 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the current path is: the positive pole of the power supply, the first inductor L, the first switch tube Q1, the third switch tube Q3 and the fifth capacitor C5.

The second operating state is that the first switch tube Q1 is closed, the second switch tube Q2 is open, and the third switch tube Q3 is open.

Referring to fig. 15, the current path diagram of the second operation state provided in the third embodiment of the present application is shown.

When the first switch Q1 is closed, the first switch Q1 is equivalent to a conducting wire, and a circuit is conducted between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the negative electrode of the power supply connected to the second end of the second switch Q2 is broken; when the third switching tube Q3 is turned off, the third switching tube Q3 is equivalent to open circuit, and the circuit between the first node connected to the first end of the third switching tube Q3 and the fifth capacitor C5 connected to the second end of the third switching tube Q3 is opened.

Therefore, when the first switch Q1 is closed, the second switch Q2 is opened, and the third switch Q3 is opened, the current path is: the positive pole of the power supply, a first inductor L, a first switching tube Q1, a second capacitor C2, a second diode D2, a third capacitor C3 and a fourth capacitor C4;

the third working state is that the first switch tube Q1 is opened, the second switch tube Q2 is opened and the third switch tube Q3 is closed.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the negative electrode of the power supply connected to the second end of the second switch Q2 is broken; when the third transistor Q3 is closed, the third transistor Q3 is equivalent to a conductive line, and a circuit between a first node connected to the first end of the third transistor Q3 and the fifth capacitor C5 connected to the second end of the third transistor Q3 is turned on.

In the working state, the three-level Boost circuit further comprises two sub-working states according to the relative magnitude of the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 and the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, wherein the first sub-working state of the third working state is that the first switching tube Q1 is opened, the second switching tube Q2 is opened, and the third switching tube Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4; the second sub-operation state of the third operation state is that the first switch Q1 is open, the second switch Q2 is open, and the third switch Q3 is closed, and the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4.

A first sub-operating state of the third operating state:

referring to fig. 16, it is a schematic view of a first sub-operating state current path of a third operating state provided in the third embodiment of the present application.

Therefore, when the first switch tube Q1 is open, the second switch tube Q2 is open, the third switch tube Q3 is closed, and the sum of the voltages of the second capacitor C2 and the fifth capacitor C5 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the corresponding two current paths are: the positive pole of the power supply, the first inductor L, the first diode D1, the second diode D2, the third capacitor C3 and the fourth capacitor C4; the fifth capacitor C5, the third switching tube Q3, the second capacitor C2, the second diode D2, the third capacitor C3 and the fourth capacitor C4.

A second sub-operating state of the third operating state:

referring to fig. 17, the second sub-operating state current path diagram of the third operating state provided in the third embodiment of the present application is shown.

Therefore, when the first switch tube Q1 is opened, the second switch tube Q2 is opened, the third switch tube Q3 is closed, and the sum of the voltages of the second capacitor C2 and the fifth capacitor C5 is smaller than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the current path is: the positive pole of the power supply, the first inductor L, the first diode D1, the second capacitor C2, the third switch tube Q3 and the fifth capacitor C5.

The fourth working state is that the first switching tube Q1 is turned off, the second switching tube Q2 is turned off and the third switching tube Q3 is turned off.

Referring to fig. 18, the diagram is a schematic diagram of a current path in a fourth operation state according to the third embodiment of the present application.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is turned off, the second switch Q2 is equivalent to an open circuit, and the circuit between the first node connected to the first end of the second switch Q2 and the negative electrode of the power supply connected to the second end of the second switch Q2 is broken; when the third switching tube Q3 is turned off, the third switching tube Q3 is equivalent to open circuit, and the circuit between the first node connected to the first end of the third switching tube Q3 and the fifth capacitor C5 connected to the second end of the third switching tube Q3 is opened.

Therefore, when the first switch Q1 is turned off, the second switch Q2 is turned off, and the third switch Q3 is turned off, the current path is: the positive pole of the power supply, the first inductor L, the first diode D1, the second diode D2, the third capacitor C3, and the fourth capacitor C4.

The fifth working state is that the first switch tube Q1 is opened, the second switch tube Q2 is closed and the third switch tube Q3 is opened.

Referring to fig. 19, the current path diagram of the fifth operation state provided in the third embodiment of the present application is shown.

When the first switch Q1 is turned off, the first switch Q1 is equivalent to an open circuit, and the circuit between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1 is broken; when the second switch Q2 is closed, the second switch Q2 is equivalent to a conducting wire, and a circuit between a first node connected to a first end of the second switch Q2 and a negative electrode of a power supply connected to a second end of the second switch Q2 is conducted; when the third switching tube Q3 is turned off, the third switching tube Q3 is equivalent to open circuit, and the circuit between the first node connected to the first end of the third switching tube Q3 and the fifth capacitor C5 connected to the second end of the third switching tube Q3 is opened.

Therefore, when the first switch Q1 is open, the second switch Q2 is closed, and the third switch Q3 is open, the current path is: the positive pole of the power supply, the first inductor L, the first diode D1, the second capacitor C2, and the second switch tube Q2.

The sixth working state is that the first switch tube Q1 is closed, the second switch tube Q2 is closed and the third switch tube Q3 is open.

Referring to fig. 20, the current path diagram of the sixth operation state provided in the third embodiment of the present application is shown.

When the first switch Q1 is closed, the first switch Q1 is equivalent to a conducting wire, and a circuit is conducted between the first inductor L connected to the first end of the first switch Q1 and the first node connected to the second end of the first switch Q1; when the second switch Q2 is closed, the second switch Q2 is equivalent to a conducting wire, and a circuit between a first node connected to a first end of the second switch Q2 and a negative electrode of a power supply connected to a second end of the second switch Q2 is conducted; when the third switching tube Q3 is turned off, the third switching tube Q3 is equivalent to open circuit, and the circuit between the first node connected to the first end of the third switching tube Q3 and the fifth capacitor C5 connected to the second end of the third switching tube Q3 is opened.

Therefore, when the first switch Q1 is closed, the second switch Q2 is closed, and the third switch Q3 is open, the current path is: the positive pole of the power supply, the first inductor L, the first switch tube Q1, the second switch tube Q2, and the negative pole of the power supply.

According to the analysis of the working state of the three-level Boost circuit, the following results are obtained: when the three-level Boost circuit works, current flows through the first inductor L, different operations are performed according to the magnitude of induced electromotive force on the first inductor L, and the three-level Boost circuit can discharge electricity, can accumulate the induced electromotive force and can be free of action. In addition, when the three-level Boost circuit operates and the third switching tube Q3 is closed, if the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is greater than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the fifth capacitor C5 and the second capacitor C2 discharge to the third capacitor C3 and the fourth capacitor C4; if the sum of the voltages of the fifth capacitor C5 and the second capacitor C2 is less than the sum of the voltages of the third capacitor C3 and the fourth capacitor C4, the power supply charges the fifth capacitor C5 and the second capacitor C2. However, the voltage of the second capacitor C2 is controlled by the on/off of the first switch Q1 and the on/off of the second switch Q2, and since the second capacitor C2 and the fifth capacitor C5 are connected in parallel with the power supply, the voltage of the fifth capacitor C5 is controllable when the voltage of the second capacitor C2 is controllable.

The three-level Boost circuit provided by the embodiment of the application comprises a first switch tube Q1, a second switch tube Q2, a first inductor L, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first diode D1, a second diode D2 and a third switch tube Q3, wherein the capacitance value of the second capacitor C2 is equal to that of the fifth capacitor C5. The input voltage of the circuit is boosted by the on/off of the first switch tube Q1 and the second switch tube Q2, the circuit also connects the second capacitor C2 and the fifth capacitor C5 which have the same capacitance value in series, so that the second capacitor C2 and the fifth capacitor C5 realize voltage sharing, and the voltage sharing is realized by the first switch tube Q1 and the second capacitor C2 which are connected in parallel, and the second switch tube Q2 and the fifth capacitor C5 which are connected in parallel, so that the voltage sharing is realized by the first switch tube Q1 and the second switch tube Q2.

Based on the three-level Boost circuit provided by the third embodiment, the circuit is also suitable for an application scenario that the Boost circuit performs low-loss transmission on the input voltage.

Example four:

referring to fig. 21, the diagram is a schematic diagram of a three-level Boost circuit structure according to a fourth embodiment of the present application.

The three-level Boost circuit provided by the application comprises the structure of the three-level Boost circuit provided by the third embodiment, and further comprises: a fourth diode D4;

the positive electrode of the fourth diode D4 is connected with the positive electrode of the power supply, and the negative electrode of the fourth diode D4 is connected with the output positive electrode of the Boost circuit.

The working states of the three-level Boost circuit provided by the embodiment of the application include a seventh working state in addition to the six working states provided by the third embodiment.

The seventh operating mode is characterized in that: the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are all open, and the current path of the circuit is as follows: the positive electrode of the power supply, a fourth diode D4, a third capacitor C3 and a fourth capacitor C4.

Based on the three-level Boost circuit provided by the above embodiment, an inverter system is further provided by the embodiment of the present application, which is described in detail below with reference to the accompanying drawings.

Example five:

referring to fig. 22, the figure is a schematic structural diagram of an inverter system according to an embodiment of the present application.

The inverter system provided by the embodiment of the present application includes the three-level Boost circuit 2201 provided by the above embodiment, and further includes: photovoltaic array 2202 and inverter 2203;

the photovoltaic array 2202 serves as a power supply, and the output end of the photovoltaic array 2202 is connected with the input end of the three-level Boost circuit 2201;

the output end of the three-level Boost circuit 2201 is connected with the input end of the inverter 2203;

the three-level Boost circuit 2201 is used for boosting the voltage output by the photovoltaic array 2202;

the inverter 2203 is configured to invert the direct current output by the three-level Boost circuit 2201 into an alternating current, and provide the alternating current to a power grid or a load 2204.

It should be noted that the photovoltaic array 2202 can output direct current, and the voltage of the direct current is low; the input voltage of inverter 2203 is high.

The inverter system that this application embodiment provided includes: photovoltaic array 2202, three-level Boost circuit 2201, and inverter 2203. The photovoltaic array 2202 is used as a power supply, solar energy is firstly converted into direct current electric energy, the direct current electric energy is then input into a three-level Boost circuit 2201, the voltage of direct current input by the input end of the three-level Boost circuit 2201 is boosted, the boosted direct current is then input into an inverter 2203, and the inverter 2203 inverts the direct current output by the three-level Boost circuit 2201 into alternating current to be provided for a power grid or a load 2204.

The inverter system provided by the embodiment of the application comprises a photovoltaic array 2202, a three-level Boost circuit 2201 and an inverter 2203. The photovoltaic array 2202 serves as a power supply, and the output end of the photovoltaic array 2202 is connected with the input end of the three-level Boost circuit 2201; the output end of the three-level Boost circuit 2201 is connected with the input end of the inverter 2203; the three-level Boost circuit 2201 is used for boosting the voltage output by the photovoltaic array 2202; the inverter 2203 is configured to invert the direct current output by the three-level Boost circuit 2201 into an alternating current, and provide the alternating current to a power grid or a load 2204. The three-level Boost circuit 2201 adopted by the inverter system can Boost low-voltage direct current with high efficiency and low loss, so that the working range and MPPT of the input voltage of the inverter 2203 are improved, and the power generation capacity of the inverter 2203 is improved.

It should be understood that in the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" for describing an association relationship of associated objects, indicating that there may be three relationships, e.g., "a and/or B" may indicate: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single item(s) or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.

The foregoing is merely a preferred embodiment of the invention and is not intended to limit the invention in any manner. Although the present invention has been described with reference to the preferred embodiments, it is not intended to be limited thereto. Those skilled in the art can make numerous possible variations and modifications to the present teachings, or modify equivalent embodiments to equivalent variations, without departing from the scope of the present teachings, using the methods and techniques disclosed above. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.

Claims

1. A three-level Boost circuit, comprising: the circuit comprises a controller, a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor;

the controller is used for controlling the third switching tube to be complementary to the first switching tube in state when the Boost circuit works; and when the Boost circuit does not work, the third switching tube is controlled to be closed.

2. The three-level Boost circuit of claim 1, wherein the third switching transistor is a controllable switching transistor, the controllable switching transistor is an anti-parallel diode, and the controllable switching transistor is: IGBT, MOSFET, JFET or relay.

3. A three-level Boost circuit according to claim 1 or 2, further comprising: a fourth diode;

4. A three-level Boost circuit, comprising: the circuit comprises a controller, a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor;

the controller is used for controlling:

when the first switch tube is closed, the second switch tube is opened, and the third switch tube is opened, the current path is as follows: the positive pole of the power supply, the first switch tube, the second capacitor, the first diode and the first inductor;

5. A three-level Boost circuit, comprising: the circuit comprises a controller, a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor;

6. The three-level Boost circuit of claim 5, wherein the third switch tube is a controllable switch tube, the controllable switch tube is connected with a diode in anti-parallel, and the controllable switch tube is: IGBT, MOSFET, JFET or relay.

7. The three-level Boost circuit of claim 5 or 6, further comprising: a fourth diode;

8. A three-level Boost circuit, comprising: the circuit comprises a controller, a first switch tube, a second switch tube, a first inductor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode and a third switch tube; the capacitance value of the second capacitor is equal to that of the fifth capacitor;

the controller is used for controlling:

when the first switch tube is closed, the second switch tube is opened, the third switch tube is closed, and the sum of the voltages of the second capacitor and the fifth capacitor is greater than the sum of the voltages of the third capacitor and the fourth capacitor, the two corresponding current paths are respectively as follows: the positive pole of the power supply, the first inductor, the first switching tube, the second capacitor, the second diode, the third capacitor and the fourth capacitor; a fifth capacitor, a third switching tube, a second capacitor, a second diode, a third capacitor and a fourth capacitor;

9. An inverter system comprising the three-level Boost circuit of any of claims 1-8, further comprising: a photovoltaic array and an inverter;