CN108767000A - A kind of insulated gate bipolar semiconductor devices and its manufacturing method - Google Patents
A kind of insulated gate bipolar semiconductor devices and its manufacturing method Download PDFInfo
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- CN108767000A CN108767000A CN201810933483.9A CN201810933483A CN108767000A CN 108767000 A CN108767000 A CN 108767000A CN 201810933483 A CN201810933483 A CN 201810933483A CN 108767000 A CN108767000 A CN 108767000A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
Abstract
The invention belongs to the manufacturing technology fields of semiconductor devices, it is related to a kind of insulated gate bipolar semiconductor devices and its manufacturing method, in the first conduction type high concentration region, it is provided with the second conductivity type columns area of regular distribution, the first conduction type high concentration region and low concentration region intersection are extended to from the first interarea；Adjacent second conductive type column section is provided with the second conductivity type body region and trench gate electrode, the second conductivity type columns area and the second conductivity type body region are not connected to electrically mutually in any direction respectively close to trench gate electrode both sides；Trench gate electrode bottom is wrapped up close to the second conductivity type columns area side in the second conductivity type columns area；It is provided with emitter metal on the first interarea, is isolated by the second insulating medium layer between the second conductivity type columns area and emitter metal, and is not connected to electrically mutually in any direction；Device of the present invention can effectively improve product pressure resistance, reduce short circuit current, and break-over of device loss can be greatly reduced.
Description
Technical field
The present invention relates to a kind of power semiconductor and its manufacturing method, especially a kind of groove with super-junction structure
Grid IGBT device and its manufacturing method belong to the manufacturing technology field of semiconductor devices.
Background technology
Insulated gate bipolar transistor IGBT (Insulated Gate Bipolar Transistor) is aoxidized in metal
A kind of NEW TYPE OF COMPOSITE power device to grow up on the basis of object field effect transistor (MOSFET) and bipolar transistor (Bipolar)
Part is suggested in the 1980s and promotes rapidly.IGBT has the function of MOS inputs, bipolar output.IGBT collection
Bipolar device on-state voltage drops are small, current carrying density is big, high pressure and power MOSFET driving powers are small, switching speed is fast, input
The advantage that impedance is high, thermal stability is good is.IGBT as a kind of voltage control device, can be with lower power attenuation at
Higher power is managed, and can operate in the circuit of high frequency, is IGBT the most prominent feature and advantage.From IGBT
Since commercial applications, as the principal mode device of novel power semiconductor, frequency application ranges of the IGBT in 1-100kHz
It inside play an important role, is widely used in industry, 4C (communication, computer, consumer electronics, automotive electronics), aerospace, national defence
The strategic emerging industries neck such as the conventional industries such as military project field and rail traffic, new energy, intelligent grid, new-energy automobile
Domain.
IGBT device experienced the development in several stages, and the development of the body structure-design technique of IGBT mainly experienced from wearing
Flow-through (Punch Through, PT) IGBT is to non-punch (Non Punch Through, NPT) IGBT, then cut-off type of showing up
（Field Stop）The process of IGBT.The positive MOS structure of IGBT includes grid and emitter region.Gate structure have planar gate with
Raceway groove from laterally becoming longitudinal, is eliminated the influence of the JFET of device, can also improve member by two kinds of trench gate, trench gate structure
Born of the same parents' density, to advantageously reduce power consumption.Trench gate IGBT has become the main flow direction of 3000V or less IGBT technologies at present,
Typical trench gate IGBT device structure is as shown in Fig. 1.
The saturation voltage drop of IGBT（Vcesat）It is the several important of measurement IGBT device with impact resistance and voltage endurance
Index.Saturation voltage drop is the important parameter for weighing IGBT product conduction losses, and reducing IGBT saturation voltage drops can effectively reduce
IGBT power attenuations reduce product fever, improve power conversion efficiency；Voltage endurance is one of most important parameters of product, resistance to
Pressure deficiency may cause IGBT device using when there is the risk burnt of breakdown, due to being bent depletion layer, trench gate
IGBT is typically all to puncture in trench gate bottom position.One of the major embodiment of IGBT product impact resistances be exactly product resist it is short
Road ability is the important parameter index for embodying product reliability.
Invention content
The purpose of the present invention is overcome the deficiencies in the prior art, it is proposed that a kind of trench gate with super-junction structure
IGBT device and its manufacturing method can effectively improve product pressure resistance, reduce short circuit current, and device can be greatly lowered
The conduction loss of part.
To realize the above technical purpose, the technical scheme is that：A kind of insulated gate bipolar semiconductor devices, including
Active area, the active area include several device cellular units parallel with one another,
In the device cellular unit cross-wise direction, including semiconductor substrate, there are two opposite for the semiconductor substrate tool
Interarea, the interarea include the first interarea and the second interarea, and second is disposed on the second interarea of the semiconductor substrate
Conduction type collecting zone and collector electrode metal, and the second conduction type collecting zone and collector electrode metal Ohmic contact；It is special
Sign is that the semiconductor substrate includes being led close to the first conduction type high concentration region of the first interarea and its immediate first
Electric type low concentration region；In first conduction type high concentration region, it is provided with the second conductivity type columns area of regular distribution,
Second conductivity type columns area extends to the first conduction type height from the first interarea of semiconductor substrate along semiconductor-based plate thickness direction
Near concentration area and the first conduction type low concentration region intersection；Second conductivity type columns area width having the same, phase
With spacing and identical impurity concentration；The first interarea of semiconductor substrate between two adjacent the second conductivity type columns areas,
The trench gate electrode for being provided with the second conductivity type body region and being surrounded by the first insulating medium layer, the second conductivity type columns area and
Two conductivity type body regions are respectively close to the trench gate electrode both sides surrounded by the first insulating medium layer, and second conduction type
Column area is not connected to electrically mutually in any direction with the second conductivity type body region；Second conductivity type columns area close to by first absolutely
The trench gate electrode that edge dielectric layer surrounds, and package is led by the trench gate electrode bottom that the first insulating medium layer surrounds close to second
Electric type column area side；
It is provided on the first interarea of the semiconductor substrate and second conductivity type body region, the first conduction type emitter
The emitter metal of Ohmic contact, between second conductivity type columns area and emitter metal by the second insulating medium layer every
From, and the second conductivity type columns area is not connected to electrically mutually in any direction with emitter metal.
Further, the impurity concentration of first conduction type high concentration region is more than the first conduction type low concentration region
Impurity concentration.
Further, the second conduction type collecting zone may be configured as continuously or discontinuously.
Further, it is provided with first between first conduction type low concentration region and the second conduction type collecting zone
Conductive type buffer layer.
Further, the material of the semiconductor substrate includes silicon.
To realize that the above technical purpose, the present invention also propose a kind of manufacturing method of insulated gate bipolar semiconductor devices,
It is characterised in that it includes following steps：
1）Tool is provided there are two the semiconductor substrate of opposing main faces, described two interareas include the first interarea and the second interarea；Half
Include the first conduction type drift region, first conduction type drift region packet between the first interarea and the second interarea of conductor substrate
It includes close to the first conduction type high concentration region of the first interarea and the first its immediate conduction type low concentration region；
2）The first hard mask layer is deposited on the first interarea of the semiconductor substrate, selectively shelters and etches first and cover firmly
Film layer, to form the multiple first hard mask opens；
3）By the described first hard mask open, and utilize anisotropic etching method shape in the first conduction type high concentration region
At multiple first grooves, the first groove extends downward into the first conduction type high concentration region and the first conduction from the first interarea
Near the intersection of type low concentration region；
4）The second conductive type semiconductor material, second conduction type are deposited on the first interarea of the semiconductor substrate
Material is filled in the first groove, is planarized to the first interarea, and removes first hard mask layer, forms second
Conductivity type columns area；
5）The second hard mask layer is deposited on the first interarea of the semiconductor substrate, selectively shelters and etches second and cover firmly
Film layer, to form multiple the second hard mask opens for trench gate etching；
6）By the opening of second hard mask layer, and using anisotropic etching method on the first interarea of semiconductor substrate
Multiple second grooves are formed, and remove the second hard mask layer；
7）The first insulating medium layer and trench gate electrode are formed in the first interarea of the semiconductor substrate；
8）Selective impurity injection is carried out on the first interarea of the semiconductor substrate, and carries out high temperature knot, is formed second and is led
Electric type body region；
9）By conventional semiconductor process, other front knots of IGBT device are obtained on the first interarea of the semiconductor substrate
Structure obtains the second conduction type collecting zone, collector electrode metal on the second interarea of the semiconductor substrate.
Further, the first hard mask opening all has identical width and spacing, the second hard mask opening
Width having the same, and it is across the second conductivity type columns area and the first conduction type high concentration region intersection.
Further, second conductivity type columns area and the second conductivity type body region be not in any direction mutually electrically
Connection, second conductivity type columns area is not connected to electrically mutually in any direction with emitter metal.
Further, for N-type IGBT device, first conduction type is that N-type is conductive, and second conduction type is
P-type conduction；For p-type IGBT device, first conduction type is P-type conduction, and second conduction type is that N-type is conductive.
Compared with conventional trench gate IGBT device, the present invention has the following advantages：
1）The second conductivity type columns area is arranged in the first conduction type high concentration region of drift region in the present invention so that second is conductive
Type column area constitutes super-junction structure with the first adjacent conduction type high concentration region, and when device reversely ends, super-junction structure can
With having lateral depletion, transverse electric field is generated, longitudinally exhausts institute in conjunction with the first conduction type high concentration region and the second conductivity type body region
The longitudinal electric field of generation forms two dimensional electric field depletion region, can effectively improve device voltage endurance capability；
2）Due to the presence in the second conductivity type columns area in the first conduction type high concentration region of drift region, when break-over of device,
The second conduction type minority carrier of device emitter is flowed to from device collector to enter the first conduction type high concentration
It is circulated near the first interarea of semiconductor substrate along the second conductivity type columns area behind area, reduces the second conduction type minority carrier
Compositely proportional of the son in drift region；Simultaneously as the presence of super-junction structure so that power IGBT device of the present invention meet with
Under the premise of the identical pressure-resistant demand of trench gate IGBT device of uniting, the resistivity of drift region can be reduced, to which device be greatly reduced
Conducting resistance improves the ducting capacity of device, and therefore, IGBT device of the invention can be substantially reduced conduction loss；
3）Due to the presence in the second conductivity type columns area, and the second conductivity type columns area package gate groove bottom is led close to second
Electric type column area side can effectively reduce the short circuit current of IGBT device in this way, promote short-circuit capacity.
Description of the drawings
Fig. 1 show conventional trench gate IGBT device diagrammatic cross-section.
Fig. 2 show device profile schematic diagram of the embodiment of the present invention.
Fig. 3 show the diagrammatic cross-section that the embodiment of the present invention forms hard mask opening in the first interarea of semiconductor substrate.
Fig. 4 show the diagrammatic cross-section that the embodiment of the present invention forms first groove in the first interarea of semiconductor substrate.
Fig. 5 show the embodiment of the present invention and forms the diagrammatic cross-section behind the second conductivity type columns area.
Fig. 6 show the second hard mask layer of formation of the embodiment of the present invention and forms the diagrammatic cross-section after multiple openings.
Fig. 7 show the embodiment of the present invention and forms second groove and remove the diagrammatic cross-section after hard mask layer.
Fig. 8 show the embodiment of the present invention and forms the diagrammatic cross-section after the first insulating medium layer and gate electrode.
Fig. 9 show the embodiment of the present invention and forms the diagrammatic cross-section behind the second conductivity type body region.
Figure 10 is shown the embodiment of the present invention and is completed the diagrammatic cross-section after device Facad structure using common process.
Reference sign：01-N types high concentration region, 02-N- types low concentration region, the areas 11-P Xing Zhu, the areas 12-P+ Xing Ti,
13- N+ types emitter, the first insulating medium layers of 14-, 15- trench gate electrodes, the second insulating medium layers of 16-, 17- emitter gold
Category, 18-N+ buffer layers, 19- P+ types collecting zone, 20- collector electrode metals, the first hard mask layers of 21-, 22- first grooves, 23-
Two hard mask layers, the first interareas of 001-, the second interareas of 002-.
Specific implementation mode
The present invention is made into one by taking the cut-off type trench gate IGBT of N-channel field as an example with reference to specific drawings and examples
Walk explanation；
As shown in Fig. 2, a kind of N-channel field cut-off type trench gate IGBT, including active area, the active area include several phases
Mutually device cellular unit in parallel,
In the device cellular unit cross-wise direction, including semiconductor substrate（That is N-type drift region）, the semiconductor substrate tool
There are two opposite interarea, the interarea includes the first interarea 001 and the second interarea 002, is led in the semiconductor substrate second
P+ type collecting zone 19 and collector electrode metal 20, and the P+ type collecting zone 19 and collector electrode metal 20 are disposed on face 002
Ohmic contact；
In the device cellular unit cross-wise direction, semiconductor substrate includes close to the N-type high concentration region of the first interarea 001
01 and its immediate N-type low concentration region 02；In N-type high concentration region 01, it is provided with the areas PXing Zhu 11, P of regular distribution
The areas Xing Zhu 11 extend to N-type high concentration region 01 and N-type from the first interarea of semiconductor substrate 001 along semiconductor-based plate thickness direction
Near 02 intersection of low concentration region；11 width having the same of the areas PXing Zhu, identical spacing and identical impurity concentration；Adjacent
The areas Liang GePXing Zhu 11 between the first interarea of semiconductor substrate 001 on, be provided with P+ type body area 12 and by the first dielectric
The trench gate electrode 15 that layer 14 surrounds, the first insulating medium layer 14 are generally formed as gate oxide, the areas PXing Zhu 11 and P+ type body area
12 exist close to 15 both sides of trench gate electrode surrounded by the first insulating medium layer 14, the areas QiePXing Zhu 11 and P+ type body area 12 respectively
It is not connected to electrically mutually in any direction；The areas PXing Zhu 11 close to the trench gate electrode 15 surrounded by the first insulating medium layer 14, and
15 bottom of trench gate electrode surrounded by the first insulating medium layer 14 is wrapped up close to 11 side of the areas PXing Zhu.
On the first interarea of semiconductor substrate 001, it is provided with the hair with P+ type body area 12,13 Ohmic contact of N+ types emitter
Emitter-base bandgap grading metal 17 is isolated between the areas PXing Zhu 11 and emitter metal 17 by the second insulating medium layer 16, and P+ type body area 12 and hair
Emitter-base bandgap grading metal 17 is not connected to electrically mutually in any direction.
Since the present embodiment is field cut-off type IGBT, optionally N-type low concentration region 02 and P+ type collecting zone 19 it
Between be equipped with N+ buffer layers 18.
The present invention by control PXing Zhu areas 11 and and by the impurity concentration and width of the N-type high concentration region 01 at its interval, can
So that the areas PXing Zhu 11 and reaching charge balance by the super-junction structure that the N-type high concentration region 01 at its interval is formed.
In the present embodiment IGBT, the impurity concentration of N-type high concentration region 01 is higher than the impurity concentration of N-type low concentration region 02；
In the present embodiment IGBT, P+ type collecting zone 19 can be continuous, and can also be discontinuous；
In the present embodiment IGBT, the material of semiconductor substrate includes but not limited to silicon；
The manufacturing method of the trench gate IGBT device with super-junction structure, includes the following steps in above-described embodiment：
1）Tool is provided there are two the semiconductor substrate of the N-type of opposing main faces, described two interareas include the first interarea 001 and second
Interarea 002；It is provided in semiconductor substrate low close to the N-type high concentration region 01 of the first interarea 001 and its immediate N-type
Concentration area 02；
2）As shown in Fig. 3, the first hard mask layer 21 is deposited on the first interarea 001 of semiconductor substrate, selectively sheltered
With the first hard mask layer 21 of etching, to form the multiple first hard mask opens, first hard mask is open width having the same
Degree and spacing；
3）As shown in Fig. 4, by the described first hard mask open, using anisotropic etching method to N-type high concentration region 01
It performs etching, forms multiple first grooves 22 in N-type high concentration region 01, the first groove 22 is downward from the first interarea 001
It extends near N-type high concentration region 01 and 02 intersection of N-type low concentration region；
4）As shown in Fig. 5, P-type semiconductor is deposited on the first interarea 001 of the semiconductor substrate and in first groove 22
Material, the p-type semiconductor material are filled in the first groove 22；It is flat using chemistry well-known to those skilled in the art
Smooth the first interarea of chemical industry skill pair 001 planarizes, and removes the p-type semiconductor material on the first interarea 001, and it is hard to remove first
Mask layer 21 forms the areas PXing Zhu 11 in N-type high concentration region 01；
5）As shown in Fig. 6, the second hard mask layer 23 is deposited on the first interarea 001 of semiconductor substrate, selectively sheltered
With etching the second hard mask layer 23, with formed it is multiple for trench gate etching the second hard mask opens, the second hard mask
The width all same of opening, and it is across 001 areas ShangPXing Zhu 11 of the first interarea and 01 intersection of N-type high concentration region；
6）As shown in Fig. 7, highly concentrated to N-type using anisotropic etching method by the opening of second hard mask layer 23
Degree area 01 performs etching, and multiple second grooves 24 is formed on the first interarea of semiconductor substrate 001, and remove the second hard mask layer
23；
7）As shown in Fig. 8, it using conventional semiconductor process such as oxidation, deposit, photoetching, etchings, is led in semiconductor substrate first
Face 001 forms the first insulating medium layer 14 and trench gate electrode 15, and the first insulating medium layer 14 is used to form gate oxidation here
Layer, what this was well known to those skilled in the art, it repeats no more；
8）As shown in Fig. 9, on the first interarea of semiconductor substrate 001, selective implanting p-type impurity, and carry out high temperature and push away
Knot forms P+ type body area 12, and P+ type body area 12 and the areas PXing Zhu 11 are respectively close to the ditch surrounded by the first insulating medium layer 14
15 both sides of slot gate electrode, the areas QiePXing Zhu 11 and P+ type body area 12 are not connected to electrically mutually in any direction；
9）As shown in Fig. 10, other conventional face structures of IGBT device are obtained by conventional semiconductor process（N+ types emit
Pole 13, the second insulating medium layer 16 and N+ types emitter 13）And backside structure（P+ type collecting zone 19, collector electrode metal 20）,
What this was well known to those skilled in the art, it repeats no more.
When device of the present invention ends pressure resistance, 01 having lateral depletion of N-type high concentration region adjacent thereto of the areas PXing Zhu 11 forms sky
Between charged region, which can undertake reversed high voltage, can be still ensured that ensureing device when having high concentration drift region
Voltage endurance capability；
When device forward conduction of the present invention, due to the presence in 01 areas NeiPXing Zhu 11 of N-type high concentration region of drift region, work as device
When conducting, the hole that device emitter is flowed to from device collector 20 can be flowed entering 01 areas Hou YanPXing Zhu 11 of N-type high concentration region
It passes near the first interarea of semiconductor substrate 001, reduces compositely proportional of the hole in drift region；Simultaneously as superjunction knot
The resistivity of N-type high concentration region 01 can be greatly reduced without reducing device pressure resistance, it is possible thereby to greatly improve in the presence of structure
The ducting capacity of electronics；Therefore, IGBT device of the invention can be substantially reduced conduction loss.
Further, since the presence in the areas PXing Zhu 11, device of the present invention can effectively reduce the short circuit electricity of IGBT device
Stream promotes short-circuit capacity.
The present invention and its embodiments have been described above, description is not limiting, shown in attached drawing also only
It is one of embodiments of the present invention, practical structures are not limited thereto.All in all if those skilled in the art
It is enlightened by it, without departing from the spirit of the invention, is not inventively designed similar with the technical solution
Frame mode and embodiment, are within the scope of protection of the invention.
Claims (9)
1. a kind of insulated gate bipolar semiconductor devices, including active area, the active area includes several devices parallel with one another
Part cellular unit,
In the device cellular unit cross-wise direction, including semiconductor substrate, there are two opposite for the semiconductor substrate tool
Interarea, the interarea include the first interarea and the second interarea, and second is disposed on the second interarea of the semiconductor substrate
Conduction type collecting zone and collector electrode metal, and the second conduction type collecting zone and collector electrode metal Ohmic contact；It is special
Sign is that the semiconductor substrate includes being led close to the first conduction type high concentration region of the first interarea and its immediate first
Electric type low concentration region；In first conduction type high concentration region, it is provided with the second conductivity type columns area of regular distribution,
Second conductivity type columns area extends to the first conduction type height from the first interarea of semiconductor substrate along semiconductor-based plate thickness direction
Near concentration area and the first conduction type low concentration region intersection；Second conductivity type columns area width having the same, phase
With spacing and identical impurity concentration；The first interarea of semiconductor substrate between two adjacent the second conductivity type columns areas,
The trench gate electrode for being provided with the second conductivity type body region and being surrounded by the first insulating medium layer, the second conductivity type columns area and
Two conductivity type body regions are respectively close to the trench gate electrode both sides surrounded by the first insulating medium layer, and second conduction type
Column area is not connected to electrically mutually in any direction with the second conductivity type body region；Second conductivity type columns area close to by first absolutely
The trench gate electrode that edge dielectric layer surrounds, and package is led by the trench gate electrode bottom that the first insulating medium layer surrounds close to second
Electric type column area side；
It is provided on the first interarea of the semiconductor substrate and second conductivity type body region, the first conduction type emitter
The emitter metal of Ohmic contact, between second conductivity type columns area and emitter metal by the second insulating medium layer every
From, and the second conductivity type columns area is not connected to electrically mutually in any direction with emitter metal.
2. a kind of insulated gate bipolar semiconductor devices according to claim 1, which is characterized in that first conductive-type
The impurity concentration of type high concentration region is more than the impurity concentration of the first conduction type low concentration region.
3. a kind of insulated gate bipolar semiconductor devices according to claim 1, which is characterized in that second conductive-type
Type collecting zone may be configured as continuously or discontinuously.
4. a kind of insulated gate bipolar semiconductor devices according to claim 1, which is characterized in that conductive described first
It is provided with the first conductive type buffer layer between type low concentration region and the second conduction type collecting zone.
5. a kind of insulated gate bipolar semiconductor devices according to claim 1, which is characterized in that the semiconductor substrate
Material include silicon.
6. a kind of manufacturing method of insulated gate bipolar semiconductor devices, which is characterized in that include the following steps：
1）Tool is provided there are two the semiconductor substrate of opposing main faces, described two interareas include the first interarea and the second interarea；Half
Include the first conduction type drift region, first conduction type drift region packet between the first interarea and the second interarea of conductor substrate
It includes close to the first conduction type high concentration region of the first interarea and the first its immediate conduction type low concentration region；
2）The first hard mask layer is deposited on the first interarea of the semiconductor substrate, selectively shelters and etches first and cover firmly
Film layer, to form the multiple first hard mask opens；
3）By the described first hard mask open, and utilize anisotropic etching method shape in the first conduction type high concentration region
At multiple first grooves, the first groove extends downward into the first conduction type high concentration region and the first conduction from the first interarea
Near the intersection of type low concentration region；
4）The second conductive type semiconductor material, second conduction type are deposited on the first interarea of the semiconductor substrate
Material is filled in the first groove, is planarized to the first interarea, and removes first hard mask layer, forms second
Conductivity type columns area；
5）The second hard mask layer is deposited on the first interarea of the semiconductor substrate, selectively shelters and etches second and cover firmly
Film layer, to form multiple the second hard mask opens for trench gate etching；
6）By the opening of second hard mask layer, and using anisotropic etching method on the first interarea of semiconductor substrate
Multiple second grooves are formed, and remove the second hard mask layer；
7）The first insulating medium layer and trench gate electrode are formed in the first interarea of the semiconductor substrate；
8）Selective impurity injection is carried out on the first interarea of the semiconductor substrate, and carries out high temperature knot, is formed second and is led
Electric type body region；
9）By conventional semiconductor process, other front knots of IGBT device are obtained on the first interarea of the semiconductor substrate
Structure obtains the second conduction type collecting zone, collector electrode metal on the second interarea of the semiconductor substrate.
7. a kind of manufacturing method of insulated gate bipolar semiconductor devices according to claim 6, which is characterized in that described
First hard mask, which is open, all has identical width and spacing, the second hard mask opening width having the same, and across
In the second conductivity type columns area and the first conduction type high concentration region intersection.
8. a kind of manufacturing method of insulated gate bipolar semiconductor devices according to claim 6, which is characterized in that described
Second conductivity type columns area is not connected to electrically mutually in any direction with the second conductivity type body region, second conduction type
Column area is not connected to electrically mutually in any direction with emitter metal.
9. a kind of insulated gate bipolar semiconductor devices and its manufacturing method, feature according to claim 1 or 6 exists
In for N-type IGBT device, first conduction type is that N-type is conductive, and second conduction type is P-type conduction；For P
Type IGBT device, first conduction type are P-type conduction, and second conduction type is that N-type is conductive.
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