CN108766333B - Improved silicon-based micro display and driving circuit thereof - Google Patents
Improved silicon-based micro display and driving circuit thereof Download PDFInfo
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- CN108766333B CN108766333B CN201810345072.8A CN201810345072A CN108766333B CN 108766333 B CN108766333 B CN 108766333B CN 201810345072 A CN201810345072 A CN 201810345072A CN 108766333 B CN108766333 B CN 108766333B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The invention discloses an improved drive circuit of a silicon-based micro display, which comprises a pixel array circuit formed by pixel circuits arranged in an array, one or more groups of column drive circuits with the same or similar structures, and one or more groups of row drive circuits. The pixel circuit generates a micro current or a micro voltage according to a selection signal connected to a row line of the pixel array circuit and a data signal connected to a column line of the pixel array circuit, thereby driving a micro light emitting device connected to the pixel circuit. The driving circuit provided by the invention adopts a digital comparison mode to perform analog-to-digital conversion on the video signal, so that the conversion speed, precision and display resolution are greatly improved. The driving circuit provided by the invention supports various light-emitting devices, supports full-color display, enhances the flexibility and adaptability of the silicon-based micro display, supports various novel driving modes such as sequential scanning and random line scanning, and supports a higher display resolution and a more flexible data shifting mode.
Description
Technical Field
The invention relates to the technical field of flat panel displays, in particular to an improved silicon-based micro display and a driving circuit thereof.
Background
The silicon-based microdisplay is a special display based on silicon semiconductor technology, which has small physical size and forms a large field of view through optical amplification. In existing driving techniques for silicon-based microdisplays, the luminance of a pixel is proportional to the current through the pixel or the voltage across the device. While the current through the pixel or the voltage across the device is provided by the drive circuit. The driving circuit converts the input digital video signal into the analog voltage or current signal required by the pixel through the digital-to-analog converter. Most of the existing driving circuit schemes are sample-and-hold circuit schemes or ramp digital-to-analog converter schemes, in these schemes, the conversion speed and the conversion precision of a sample-and-hold switch and a digital-to-analog converter often restrict the further development of the characteristics of the display, and when the resolution of the display is further increased and the requirements of gray scale and contrast are further raised, the traditional scheme is limited.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, the technical problem to be solved by the present invention is how to further improve the performance of silicon-based microdisplays and simplify the design. To achieve the above object, a digital comparator mode can be used to realize fast digital-to-analog conversion of video signals. Specifically, the invention provides a driving circuit of a silicon-based display, which comprises a micro light-emitting device, wherein the driving circuit (1) comprises a pixel array circuit formed by pixel circuits arranged in an array, one or more groups of column driving circuits with the same or similar structures, and one or more groups of row driving circuits; (2) the pixel circuit generates a micro-current or a micro-voltage for driving a micro-light emitting device connected to the pixel circuit according to a selection signal connected to a row line of the pixel array circuit and a data signal connected to a column line of the pixel array circuit; (3) the column driving circuit comprises a shift register array for receiving display data, a cycle counter for generating cycle counting signals, a comparator array for finishing data comparison, a digital-to-analog converter for converting the cycle counting signals into analog signals in real time, and a transmission circuit for transmitting the voltage output by the digital-to-analog converter to column lines; and the comparators in the comparator array compare the cycle count signals with the register groups in the shift register array in real time, and when the comparison results are equal, the analog signals output by the digital-to-analog converter in real time are reflected to the pixel array circuit column lines corresponding to the comparators through the transmission circuit. (4) The row driver circuit includes circuitry for driving row lines of the pixel array circuitry.
Further, each group of column driving circuits in the column driving circuits respectively drives pixel circuits of different color components, and the color components include a red component, a green component, a blue component or a white component emitted by the micro light emitting device.
Further, the pixel circuits of the different color components are repeatedly arranged in sequence.
Further, the micro light emitting device is an organic electroluminescent device, a semiconductor light emitting device or a liquid crystal display device, one end of the micro light emitting device is connected to the pixel circuit, the other end of the micro light emitting device is connected to a common terminal, and the common terminal is connected to a positive power supply, a ground or a negative power supply.
Further, the shift register arrays are connected in groups, the data bit width of each group of registers is equal to the bit width of the pixel data, and the shift register arrays are connected to the comparator through latches which can be controlled to latch the output values of the shift registers.
Further, the shift register array has a bidirectional shift function and/or a function of starting a shift from a certain specific register which can be controlled by an offset controller.
Further, the shift register array comprises clock buffers in a tree structure, and the clock buffers in the tree structure enable the time of a clock line reaching each trigger to be within the range of the setup time and the hold time of the trigger.
Further, a single count period of the cycle counter does not exceed any row line for a certain continuous on time, and the cycle counter cycles up or down.
Further, the counting direction is inverted after the loop counter counts to the minimum value or the maximum value.
Further, a mapping circuit is further included between the cycle counter and the digital-to-analog converter, the mapping circuit maps the count value of the cycle counter to a second value, and the digital-to-analog converter converts the second value into an analog voltage.
Further, the mapping is an input and output correspondence that can be fitted with a function, which is an exponential function, a fourier function, a gaussian function, a polynomial function, a power function, or a rational function.
Further, when the comparison results of the comparators are not equal, the transmission circuit enables the column lines of the pixel array circuit to be kept in a high-impedance state or kept in an output-forbidding state or outputs a forbidding opening signal to the pixel circuits of the corresponding columns.
Further, the column driving circuit further includes signal amplifiers, the signal amplifiers amplify the output signals of the digital-to-analog converters to an acceptable range of the pixel circuits and drive the column lines, and the signal amplifiers are located around the digital-to-analog converters or distributed among the column lines.
Further, the column driving circuit further includes a function of immediately driving all column lines of the pixel array circuit to a voltage required when the micro-light emitting devices are turned off when the clear screen signal is active, and a function of immediately driving all column lines of the pixel array circuit to a voltage required when the micro-light emitting devices are turned on when the full screen signal is active.
Further, the row driving circuit generates the row selection signals to be active in a sequential order determined by a shift register and/or a decoding circuit included in the row driving circuit or in a random order determined by an external input and/or an internal control circuit.
Further, a level shift circuit is included which shifts an output signal of the comparator in the column driving circuit to a higher level and/or shifts a selection signal in the row driving circuit to a higher level.
Further, the column driving circuit is divided into an odd column driving circuit and an even column driving circuit, the odd column driving circuit is used for driving the column lines of the odd columns, and the even column driving circuit is used for driving the column lines of the even columns.
Further, the column driving circuit is divided into an upper driving circuit and a lower driving circuit, and/or a left driving circuit and a right driving circuit, the upper driving circuit is used for driving the row lines and the column lines of the upper half screen, the lower driving circuit is used for driving the row lines and the column lines of the lower half screen, the left driving circuit is used for driving the row lines and the column lines of the left half screen, and the right driving circuit is used for driving the row lines and the column lines of the lower half screen.
Furthermore, the pixel data is shifted from right to left in the left driving circuit, the pixel data is shifted from left to right in the right driving circuit, the data quantity of each row is increased progressively on the upper half screen and decreased progressively on the lower half screen according to the rule of a trigonometric function or a square function, and a display area in a perfect circle shape, an oval shape or a trapezoid shape is formed.
Further, at least one of the following modules is also included: the device comprises a video data interface, a data processor, a temperature sensor, an analog-to-digital converter, a DC-DC controller, a low dropout linear regulator, a phase-locked loop, a serial configuration interface, a configuration register and an embedded microprocessor; the data processor implements at least one of the following functions: image data format conversion, brightness adjustment, contrast adjustment, color saturation adjustment, gray level dithering algorithm, image scaling and test image generation.
The invention also provides a silicon-based display, which at least comprises the drive circuit of the silicon-based display, and the light-emitting device of the display is positioned above or vertically above the pixel circuit.
Compared with the prior art, the invention has the following obvious substantive characteristics and remarkable progress:
(1) the invention provides a mode for performing analog-to-digital conversion on a video signal by adopting a digital comparison mode, which greatly improves the conversion speed and precision and supports higher display resolution.
(2) The invention provides a full-color display scheme.
(3) The invention supports a variety of micro-light emitting devices.
(4) The column driving circuit provided by the invention supports multiple functions of bidirectional shift, pixel shift, cache amplification, gray scale correction, quick screen clearing, full screen display and the like, and enhances the flexibility and adaptability of the micro display.
(5) The invention supports various novel scanning modes such as sequential scanning mode, random line scanning mode and the like, and can support digital-analog fusion driving.
(6) The invention optimally designs the driving circuit in an expansion mode, and can support higher display resolution and more flexible data shifting modes, for example, support special forms such as circular and elliptical display areas.
Drawings
FIG. 1 is a top level block diagram of a preferred embodiment of the present invention;
FIG. 2 is another preferred embodiment of a top level block diagram of the present invention;
FIG. 3 is a preferred embodiment of the present invention supporting color display;
FIG. 4 is a preferred embodiment of the clock tree of the present invention;
FIG. 5 shows a preferred embodiment of the shift register set according to the present invention;
FIG. 6 is another preferred embodiment of the offset controller of the present invention;
FIG. 7 shows a shift register set according to another embodiment of the present invention;
FIG. 8 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 9 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 10 is two preferred embodiments of the row select signal of the present invention;
FIG. 11 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 12 is a preferred embodiment of the serial binary code stream encoded signal of the present invention;
FIG. 13 is a preferred embodiment of the column driver circuit and row driver circuit timing scheme of the present invention;
FIG. 14 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 15 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 16 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 17 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 18 is yet another preferred embodiment of a top level block diagram of the present invention;
FIG. 19 is a diagram of a particular embodiment of a display area;
FIG. 20 is a schematic diagram of another exemplary embodiment of a special-shaped display area.
Detailed Description
The technical contents of the preferred embodiments of the present invention will be more clearly and easily understood by referring to the drawings attached to the specification. The present invention may be embodied in many different forms of embodiments and the scope of the invention is not limited to the embodiments set forth herein.
In the drawings, modules or components having the same structure are denoted by the same reference numerals, and modules or components having similar structure or function are denoted by similar reference numerals throughout. The size and thickness of each component shown in the drawings are arbitrarily illustrated, and the size of each component is not limited in the drawings. The dimensions of the elements in the figures may be exaggerated where appropriate to improve clarity.
The first embodiment is set forth below:
referring to fig. 1, the driving circuit of the silicon-based microdisplay provided by the present invention includes a pixel array circuit 101, a column driving circuit 102, and a row driving circuit 103. The pixel array circuit 101 includes pixel circuits 100 (column number N and row number M) arranged in an array, each pixel circuit 100 having a selection signal and a data signal, the selection line of each pixel circuit being connected to a row line 112 of the pixel array circuit 101, and the data signal of each pixel being connected to a column line 111 of the pixel array circuit 101. The column driver circuit 102 is used for controlling and driving the column lines 111 of the pixel circuit 101, and the row driver circuit 103 is used for controlling and driving the row lines 112 of the pixel circuit 100. The pixel circuit 100 is used to generate a micro-current or micro-voltage for driving a micro-light emitting device connected to the pixel circuit according to a selection signal connected to the row line 112 and a data signal connected to the column line 111.
The column driving circuit 102 includes a shift register array 202 for receiving display data, a cycle counter 205 for generating a cycle count signal, a comparator array 203 for performing data comparison, a digital-to-analog converter 206 for converting the cycle count signal generated by the cycle counter 205 into an analog signal in real time, and a transmission circuit 204 for transmitting an analog voltage output from the digital-to-analog converter 206 to a column line of the pixel array circuit 101.
A row driver 401 for driving the row lines of the pixel array circuitry is included in the row driver circuit 103.
Fig. 2 shows a further detailed scheme, in which the shift register array 202 includes a plurality of shift registers 211 connected end to end, the comparator array 203 includes a plurality of digital comparators 212, and the transmission circuit 204 includes a plurality of analog voltage switches 213. The digital-to-analog converter 206 is used for converting the digital count value of the cycle counter 205 into an analog voltage in real time. Each digital comparator 212 compares the output value of the shift register 211 connected to it with the count value of the cycle counter 205 in real time, the comparison result is output to the control end of the analog voltage switch 213 connected to the comparator 212, the comparison result can be represented as equal or unequal by the comparator output being low level or high level, when the comparison result is equal, the analog voltage switch 213 outputs the real-time conversion voltage of the digital-to-analog converter 206 to the column line 111 of the corresponding pixel array circuit, when the comparison result is unequal, the corresponding analog voltage switch maintains the high-impedance state, the column line 111 of the corresponding pixel array circuit also maintains the high-impedance state, so that the column line no longer affects the pixel circuit of the column.
In a more specific embodiment, the pixel circuit 100 comprises a plurality of transistors and at least one capacitor, the transistors are metal-oxide semiconductor field effect transistors, and the capacitor retains the value of the micro-current or micro-voltage generated by the pixel circuit before the capacitor is charged or discharged next time, so that the transistors in the pixel circuit drive the micro-light emitting devices to emit light. The pixel circuit 100 includes at least a selection signal and a data signal. In another more specific embodiment, the pixel circuit 100 further includes an enable signal, a control signal, a charge signal, and/or a clear signal.
The second embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first embodiment, and is characterized in that, as shown in fig. 3, the driving circuit comprises more than one set of column driving circuits having the same structure, and each set of column driving circuits is used for driving pixel circuits of different color components, including red, green, blue or white light emitted by the micro light emitting devices. The column driving circuits of each group are sequentially and repeatedly arranged on the electrical diagram layout, so that the micro-light emitting devices emitting red light, green light, blue light or white light are also sequentially and repeatedly arranged. In particular, all the different sets of column driver circuits share the same set of row driver circuits.
In a more specific embodiment, the driving circuit comprises three sets of column driving circuits having the same or similar structure, each set of column driving circuits being respectively used for driving pixel circuits of color components of red, green and blue light emitting devices, and column lines output by the three sets of column driving circuits are respectively repeatedly arranged in sequence, for example, in red, green, blue or blue, green, red or other possible combinations. In another more specific embodiment, the driving circuit includes four sets of column driving circuits having the same or similar structure, each set of column driving circuits is respectively used for driving pixel circuits of color components of red, green, blue and white light emitting devices, and column lines output by the four sets of column driving circuits are respectively repeatedly arranged in sequence, for example, red, green, blue, white or white, blue, green, red or other possible combinations. In yet a more specific version, the drive circuit comprises only one set of column drive circuits for driving the pixel circuits for the color components of the red, green, blue or white light emitting devices.
The third embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, with the particularity that the micro light emitting device is an organic electroluminescent device, a semiconductor light emitting device or a liquid crystal display device, one end of the micro light emitting device is connected to the pixel circuit, the other end is connected to a common terminal, and the common terminal is connected to a positive power supply, ground or a negative power supply.
The fourth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, and is characterized in that, further, in a single set of column driving circuits 102, the shift register set 202 comprises N sets of L-bit shift registers 211, N digital comparators 212 and N analog voltage switches 213, each digital comparator 212 compares the L-bit shift register 211 with the L-bit cycle counter 205, and the comparison result is connected to a corresponding analog voltage switch 213 as the output of the digital comparator 212.
Further, the shift register group 202 also includes a clock tree consisting of tree-linked buffers 860, an embodiment of which is shown in fig. 4, where the output 861 of the clock tree causes the clock line 302 to arrive at each shift register 211 within the setup time and hold time of the register.
Further, the shift register group 202 also has a bidirectional shift function. The pixel data 301 is a group of L-bit parallel data, each group of L-bit shift registers in the shift register group 202 are sequentially connected end to end, and the first group and the last group are connected to the pixel data 301. In the embodiment shown in fig. 5, each of the adjacent shift registers 211 includes a multiplexer 220 in the middle, one selection terminal of the multiplexer 220 is connected to the output of the shift register 211 of the previous stage and the other selection terminal is connected to the output of the shift register 211 of the next stage, and the pixel data is shifted from left to right or from right to left in parallel according to the selection of the multiplexer 220. In other schemes, the shift register 211 may perform a left-to-right, top-to-bottom, right-to-left, or bottom-to-top shift function.
Further, the shift register group 202 also has a function of controlling shifting from a specific shift register. In the embodiment shown in fig. 5, an offset controller 207 is employed for controlling the shift start point of the shift register. Further, the scheme of the offset controller 207 may be generated by digital logic. Fig. 6 illustrates a preferred embodiment of the offset controller 207. the offset controller 207 comprises a decoder 230, L-bit multiplexers 231, L two-bit selectors 233. 232 denotes a first set of shift registers and 234 denotes a second set of shift registers. The decoder 230 is configured to generate L-bit control signals 871, each of the L-bit control signals 871 is input to a selection input terminal of a separate L-bit multiplexer 231, the multiplexer 231 selects one-bit data from the input pixel data 301 as an input of the first group of shift registers 232, and is characterized in that a corresponding one-bit data is selected from the pixel data 301 for shifting according to a start point position of the shift register group 202, the two-bit selector 233 selects an output signal of the first group of shift registers 232 when the bit belongs to a start point or a pixel after the start point, the two-bit selector 233 selects an output signal of the multiplexer 231 when the bit belongs to a pixel before the start point, and outputs of pixels before the start point are maintained at a level at which the pixel data is invalidated. The input signals to the second set of shift registers 234 are the outputs of respective two-bit selectors 233. Further, the start point position is specified by a configuration register or is updated at regular time, and the time and sequence of updating are specified by a driving circuit or a configuration register. Further, a similar right-to-left shifting scheme may be used, and this example is not described in detail.
Further, in the embodiment shown in fig. 7, the outputs of the L groups of shift registers also pass through the latch 221, and the latch 211 can be controlled to latch the output values of all the shift registers 211, so that the shift register group 202 continues to complete the shift function. The value of the latch 211 is output to each digital comparator 212, and is compared with the count value of the loop counter 205.
The fifth embodiment is illustrated below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, with the particularity that the cycle counter 205 does not have to count a single cycle of the cycle counter for more than a certain consecutive on time for any row line, thereby completing a complete traversal count within a row time. Further, the loop counter 205 counts in a loop manner in an increasing or decreasing manner, or in different steps, and the number of counts and the count value are in a mapping relationship. In a more specific arrangement, the number of valid count bits of the repetition counter 205 is equal to the number of valid count bits of each set of shift registers 211, e.g., 4, 6, 7, 8, 9, 10, 12 bits, etc. The step size by which the count value of the loop counter 205 is incremented or decremented can be configured, e.g., 1, 2, 4, 8, etc. In another more specific embodiment, the number of times the cycle counter 205 counts in one cycle, etc., is shown at the maximum value of the number of gray levels, but the count step does not have to be the same every time, and the relationship between the number of times counted and the count value is functionally increased or decreased, for example, an exponential function, a fourier function, a gaussian function, a polynomial function, a power function, a rational function, etc., which maintains a linear or substantially linear relationship with the value of the product of the light emitting device current and luminance forming function. In yet another more specific aspect, the count direction is inverted after the loop counter 205 counts to a minimum or maximum value.
Further, as shown in fig. 8, a mapping circuit 208 is further included between the cycle counter 205 and the digital-to-analog converter 206, and the mapping circuit is configured to map the count value of the cycle counter 205 to a second value and output the second value to the digital-to-analog converter 206 for digital-to-analog conversion. The mapping is a relationship that can be fitted with a function, such as an exponential function, a fourier function, a gaussian function, a polynomial function, a power function, a rational function, etc., that maintains a linear or substantially linear relationship with the value of the product of the light emitting device current and luminance forming function.
The sixth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, and is characterized in that, as shown in fig. 9, the analog voltage output by the digital-to-analog converter 206 also passes through the signal amplifier 209, and the signal amplifier 209 converts the output voltage output by the digital-to-analog converter 206 into a voltage range accepted by the pixel circuit and drives the column lines of the pixel array circuit. More specifically, the voltage range is between 0 and 12V. The signal amplifier 209 may be disposed around the dac 206 as a centralized component or further formed as a plurality of distributed components 210 dispersed on different column lines 111.
The seventh embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, with the exception that the column driving circuit 102 further comprises a function to drive all column lines 111 of the pixel array circuit 101 immediately to the voltage required to turn off the micro-light emitting devices, typically the lowest level (or highest level), when the clear signal is active, and a function to drive all column lines 111 of the pixel array circuit immediately to the voltage required to turn on the micro-light emitting devices, typically the highest level (or lowest level), when the full screen signal is active. The screen clearing signal and the full screen signal come from an external controller of the driving circuit or an internal timing generator. More specifically, the functions performed by the clear and full screen signals may be provided by the shift register array 202, the comparator array 203, or the transmission circuit 204. Further, the analog voltage switch 213 is formed by an N-type transistor and/or a P-type transistor, and may be implemented by a transmission gate in which the N-type transistor and the P-type transistor are connected in parallel.
The eighth embodiment is set forth below:
in this embodiment the silicon-based microdisplay driving circuit is substantially the same as in the first or second embodiment, with the particularity that the row driver 401 generates row selection signals 501 in a sequential order. Fig. 10(a) illustrates an example from the first row to the M-th row. In another arrangement, row M may be asserted, followed by row M-1, row M-2, … …, row 2, and row 1 in that order.
The ninth embodiment is set forth below:
in this embodiment the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, with the special feature that the row driver 401 also comprises a row decoder which generates row selection signals 501 that are active in a random order. Fig. 10(b) illustrates an example in which the row selection signal 501 is randomly effective between the first row to the mth row.
In a preferred embodiment of the row decoder, a row sequence is pre-stored in the row decoder, and the row selection signal 501 is turned on in sequence according to the row sequence. Further, the row sequence can be written into the row decoder by a read-only memory, a random access memory, a flash memory, or a one-time programming manner. Further, the row decoder 401 sequentially reads out row sequences according to a built-in counter, and resets the counter according to a frame start signal.
In another preferred embodiment of the row decoder, as shown in fig. 11, the random order is determined by the external input 310, and the external input 310 comprises a coded signal of a serial binary code stream, the serial binary code stream comprising at least a coded start signal, coded data, and a coded valid signal. Fig. 12 illustrates a preferred binary stream timing, and three different stream timing embodiments are set forth below:
in a first code stream timing scheme, the serial binary code stream is represented by a bit data line and a bit clock line, and the encoding start signal is represented as: when the clock line is at a fixed level, the data line changes from 0 to 1 or from 1 to 0, and the configurable row decoder is ready to start decoding; the encoded data indicates that the row selection signal 501 of a certain row or a plurality of rows is valid, when the clock line changes from 0 to 1 or from 1 to 0, the level on the encoded data is serially latched into the row driving circuit, and the serial data can indicate that the row selection signal 501 of a certain row or a plurality of rows is valid; the coded valid signal is represented as: when the clock line is at a fixed level, the data line changes from 0 to 1 or from 1 to 0, or when the encoded data is specified as a fixed length, the encoded valid signal is valid. When the coding valid signal is valid, the configurable row decoder completes decoding, so that the row selection signals 501 of one or more rows specified by the coding data are switched to be valid, and the selection signals of the rest rows are switched to be invalid. Furthermore, the duration of the coding effective signal at least enables the column data to be written into the pixel data control circuit of the corresponding row. Further, the encoding start signal may be implicitly specified, e.g., valid for a number of clock cycles or times specified after the last encoded data. Further, the encoding valid signal may be implicitly specified, e.g., valid for a specified number of clock cycles or times after the encoding data.
In a second code stream timing scheme, the serial binary code stream is represented by one bit data line, and the encoding start signal is represented as: when the data line has a certain first characteristic code stream, such as 01111, 011111, 0111111, 01111111 or the like, the configurable row decoder is ready to start decoding; the level on the coded data is serially latched into a row driving circuit, and the series of data can be represented as effective row selection signals 501 of one row or a plurality of rows, fixed length or specified by a configuration register; the encoded valid signal is represented as: the coding valid signal is valid when the data line has a second characteristic code stream of some kind, for example, 1000, 100000, 1000000, 10000000, or the like. When the coding valid signal is valid, the configurable row decoder completes decoding, so that the row selection signals 501 of one or more rows specified by the coding data are switched to be valid, and the selection signals of the rest rows are switched to be invalid. When the first characteristic code stream or the second characteristic code stream appears in the encoded data, the serial data with fixed length behind the first characteristic code stream or the second characteristic code stream is decoded into an effective row selection signal 501. Furthermore, the duration of the coding effective signal at least enables the column data to be written into the pixel data control circuit of the corresponding row. Further, the encoding start signal may be implicitly specified, e.g., valid for a number of clock cycles or times specified after the last encoded data. Further, the encoding valid signal may be implicitly specified, e.g., valid for a specified number of clock cycles or times after the encoding data.
In other code stream timing schemes, other different protocols are adopted to transmit the encoded data to the configurable row decoder through one or more signal lines, where the encoded data indicate that the row selection signal 501 of one or more rows is valid in a number of clock cycles or time after the encoded data is transmitted to the row driving circuit.
The tenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, except that the row driving circuit 103 and the column driving circuit 102 are cycled alternately. Fig. 13 illustrates a preferred timing scheme, after the shift register set 202 completes the shift output, the analog voltage switch 213 outputs the real-time result of the digital-to-analog converter 206 to the column line 111 of the corresponding pixel array circuit. The digital-to-analog converter 206 converts the count value of the cycle counter 205 into a corresponding analog voltage in real time and drives the column line 111. The data of row M is held on column line 111. The shift register starts shifting of the M +1 th line of data. At this time, row decoder 401 outputs an active row select signal 501 for the mth row on row line 112. A row select signal 501 and a voltage signal on a column line 111 are input to the pixel circuit.
The eleventh embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as that of the first or second embodiment, and is characterized by further comprising a column level converting circuit 214 and a row level converting circuit 402, wherein the column level converting circuit 214 converts the output signal of the comparator 212 in the column driving circuit 102 to a higher level, so as to drive the analog electronic switch 213 to output a higher level to the column line 111, and the row level converting circuit 402 converts the selection signal in the row driving circuit to a higher level to output to the row line 112.
The twelfth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, with the particularity that, as shown in fig. 15, the column driving circuit comprises an odd column driving circuit 122 and an even column driving circuit 123 respectively located at both sides of the driving circuit, the odd column driving circuit 122 being used for driving all odd columns, and the even column driving circuit 123 being used for driving all even columns. The odd column driving circuit 122 includes an odd column shift register group 222, an odd column digital comparator 223, an odd column analog voltage switch 224, an odd column cycle counter 226, and an odd column analog-to-digital converter 228, and the even column driving circuit 123 includes an even column shift register group 232, an even column digital comparator 233, an even column analog voltage switch 234, an even column cycle counter 248, and an even column analog-to-digital converter 246. The odd column driving circuit 122 and the even column driving circuit 123 operate in the same manner as the first embodiment or the second embodiment, except that the number of odd columns and even columns is N/2, which will not be described in detail in this embodiment.
Further, the odd column drive circuit 122 and the even column drive circuit 123 share one row drive circuit 103.
Further, the odd column drive circuit 122 and the even column drive circuit 123 may exchange positions.
The thirteenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, and is characterized in that, as shown in fig. 16, it is divided into an upper driving circuit and a lower driving circuit: the upper driving circuit comprises an upper column driving circuit 134 and an upper row driving circuit 132, wherein the upper column driving circuit 134 is used for controlling and driving the column lines of the upper half pixel circuits in the pixel array 101, and the upper row driving circuit 132 is used for controlling and driving the row lines of the upper half pixel circuits in the pixel array 101; the lower driving circuit includes a lower driving circuit 135 and a lower driving circuit 133, the lower driving circuit 135 is used for controlling and driving the column lines of the lower half of the pixel circuits in the pixel array 101, and the lower driving circuit 133 is used for controlling and driving the row lines of the lower half of the pixel circuits in the pixel array 101.
Further, the upper column driver circuit 134 is located on the upper side of the pixel array, and the lower column driver circuit 135 is located on the lower side of the pixel array 101. The upper line driving circuit 132 and the lower line driving circuit 133 are located on the left or right side of the pixel array 101. The operation of the upper column driving circuit 114, the upper row driving circuit 132, the lower column driving circuit 115, and the lower row driving circuit 133 is the same as that of the first embodiment or the second embodiment, except that the number of rows of the upper row driving circuit 132 and the lower row driving circuit 133 is M/2, and the detailed description of this embodiment is omitted.
A fourteenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first or second embodiment, and is characterized in that, as shown in fig. 17, it is divided into a left driving circuit and a right driving circuit: the left driving circuit comprises a left column driving circuit 141 and a left row driving circuit 143, the left column driving circuit 141 is used for controlling and driving the column lines of the left half part of the pixel circuits in the pixel array 101, and the left row driving circuit 143 is used for controlling and driving the row lines of the left half part of the pixel circuits in the pixel array 101; the right driving circuit includes a right column driving circuit 142 and a right row driving circuit 144, the right column driving circuit 142 is used for controlling and driving the column lines of the right half of the pixel circuits in the pixel array 101, and the right row driving circuit 144 is used for controlling and driving the row lines of the right half of the pixel circuits in the pixel array 101.
Further, the left row driver circuit 143 is located on the left side of the pixel array, and the right row driver circuit 144 is located on the right side of the pixel array. The left column driving circuit 141 and the right column driving circuit 142 are located on the upper or lower side of the pixel array 101. The operation of the left column driving circuit 141, the left row driving circuit 143, the right column driving circuit 142, and the right row driving circuit 144 is the same as that of the first embodiment or the second embodiment, except that the number of columns of the left column driving circuit 116 and the right column driving circuit 117 is N/2, which is not described in detail in this embodiment.
In particular, the pixel data is shifted from right to left in the left drive circuit and from left to right in the right drive circuit, and the number of shifts per row need not be the same. Specifically, the number of shifts per row is based on various trigonometric or quadratic functions (e.g., y R sinx, y R cosx, y Sqrt (R) 2 -x 2 ) Where R is the total number of rows or the total number of columns of the display, the independent variable is the serial number of the rows, and the function value is the shift data of each row) is increased progressively in the upper half of the screen and decreased progressively in the lower half of the screen, thereby forming a circular or elliptical display area.
Specifically, the pixel data is shifted from right to left in the left column driving circuit 141 and from left to right in the right column driving circuit 142, and the number of shifts per row is not necessarily the same. Specifically, the number of shifts per row is based on various trigonometric or quadratic functions (e.g., y R sinx, y R cosx, y Sqrt (R) 2 -x 2 ) Or x 2 /a 2 +y 2 /b 2 Where R is the total number of rows or columns of the display, a or b is a parameter of the ellipse, and the argument x is the serial number of the rows, the functionThe value y is the shift data of each line) is increased in the upper half screen and decreased in the lower half screen, and a display area of a perfect circle, an ellipse, or a trapezoid is formed, as shown by the shaded portion in fig. 19.
The fifteenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as that of the first or second embodiment, and is characterized by being divided into a left upper column driving circuit 151, a left upper column driving circuit 155, a right upper column driving circuit 152, a right upper column driving circuit 157, a left lower column driving circuit 153, a left lower column driving circuit 156, a right lower column driving circuit 154, and a right lower column driving circuit 158, as shown in fig. 18. The left upper column driving circuit 151 is used for controlling and driving column lines of the left upper half pixel circuit in the pixel array 101, the left upper column driving circuit 155 is used for controlling and driving row lines of the left upper half pixel circuit in the pixel array 101, the right upper column driving circuit 152 is used for controlling and driving column lines of the right upper half pixel circuit in the pixel array 101, the right upper column driving circuit 157 is used for controlling and driving row lines of the right upper half pixel circuit in the pixel array 101, the left lower column driving circuit 153 is used for controlling and driving column lines of the left lower half pixel circuit in the pixel array 101, the left lower column driving circuit 156 is used for controlling and driving row lines of the left lower half pixel circuit in the pixel array 101, the right lower column driving circuit 154 is used for controlling and driving column lines of the right lower half pixel circuit in the pixel array 101, and the right lower column driving circuit 158 is used for controlling and driving row lines of the right lower half pixel circuit in the pixel array 101.
Further, the upper left column driving circuit 151 and the upper left row driving circuit 155 are located on the upper left side of the pixel array 101, the upper right column driving circuit 152 and the upper right row driving circuit 157 are located on the upper right side of the pixel array 101, the lower left column driving circuit 153 and the lower left row driving circuit 156 are located on the lower left side of the pixel array 101, and the lower right column driving circuit 154 and the lower right row driving circuit 158 are located on the lower right side of the pixel array 101. The left upper column driving circuit 151, left upper column driving circuit 155, right upper column driving circuit 152, right upper column driving circuit 157, left lower column driving circuit 153, left lower column driving circuit 156, right lower column driving circuit 154, and right lower column driving circuit 158 operate in the same manner as the first embodiment or the second embodiment, except that the number of columns of the left upper column driving circuit 151, right upper column driving circuit 152, left lower column driving circuit 153, and right lower column driving circuit 154 is N/2, and the number of rows of the left upper column driving circuit 155, right upper column driving circuit 157, left lower column driving circuit 156, and right lower column driving circuit 158 is M/2, and details thereof are omitted in this embodiment.
Specifically, the pixel data is shifted from right to left in the upper left driving circuit 151 and the lower left driving circuit 153, and the pixel data is shifted from left to right in the upper right driving circuit 152 and the lower right driving circuit 154, and the number of shifts per line is not necessarily the same. Specifically, the number of shifts per row is based on various trigonometric or quadratic functions (e.g., y R sinx, y R cosx, y Sqrt (R) 2 -x 2 ) Where R is the total number of rows or the total number of columns of the display, the independent variable is the serial number of the rows, and the function value is the displacement data of each row) is increased progressively in the upper half of the screen and decreased progressively in the lower half of the screen, so as to form a circular, elliptical or trapezoid display area, as shown by the shaded portion in fig. 20.
The sixteenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first through fifteenth embodiments, particularly in that the row and column locations can be placed to the left or right of the pixel circuit 101.
The seventeenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay drive circuit is substantially the same as the first through fifteenth embodiments, except that the row and column positions can be interchanged, thereby rotating the display 90 degrees or 270 degrees.
The eighteenth embodiment is set forth below:
in this embodiment, the silicon-based microdisplay driving circuit is substantially the same as the first through seventeenth embodiments, and is characterized by further comprising at least one of the following modules: the device comprises a video data interface, a data processor, a temperature sensor, an analog-to-digital converter, a DC-DC controller, a low dropout linear regulator, a phase-locked loop, a serial configuration interface, a configuration register and an embedded microprocessor, wherein the data processor at least realizes one of the following functions: image data format conversion, brightness adjustment, contrast adjustment, color saturation adjustment, gray dithering algorithm, image scaling and test image generation.
Furthermore, the video data interface comprises a function of transmitting video data according to a sequential order or a random order, and transmits the video data in a level mode or a differential mode; the temperature sensor is used for converting the internal temperature of the driving circuit into a voltage signal; the analog-digital transmitter converts a voltage signal output by the temperature sensor into a digital signal; the DC-DC controller is used for generating negative voltage; the low dropout linear regulator is used for generating working voltage of the driving circuit; the phase-locked loop is used for generating a high-frequency clock signal; the serial configuration interface is used for receiving configuration data in a serial mode or reading out internal data of the driving circuit, the configuration register is used for storing configuration parameters, and the embedded microprocessor is used for controlling the driving circuit.
Further, the video data interface is a CMOS level and/or an LVDS level, and includes a function of transmitting video data in a top-down or bottom-up order or in a random order. In the prior art, commonly used interfaces for transmitting video include VGA, AV, DVI, HDMI, LVDS, MIPI, DP/EDP. These interfaces transmit video data to the silicon-based microdisplay drive circuit through an FPGA or dedicated chip.
Furthermore, the LVDS interface is a differential signal with a low swing, the swing is not more than 800mV, the transmission speed of a single pair of wires is greater than 1Gbps, the low-voltage differential interface is used for demodulating the differential signal with the low swing into a level signal, a high-frequency serial signal can be transferred into a low-frequency parallel signal through a serial-to-parallel transfer module in the low-voltage differential interface, and the low-voltage differential interface further comprises a phase-locked loop and a synchronization signal.
The nineteenth embodiment is set forth below:
this embodiment illustrates a display comprising at least the driving circuit of any of the silicon-based displays of the first to seventeenth embodiments, and the micro-light emitting devices of the display are located above or vertically above the pixel circuits.
Further, the micro-light emitting device is led out through a metal electrode of the driving circuit, and the metal electrode is an anode or a cathode. The other end of the micro-light emitting device is led out through the common terminal in the third embodiment, and the common terminal is connected to a positive power supply, a ground or a negative power supply.
Further, the dot pitch of the micro light emitting device is not more than 15 micrometers.
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (14)
1. An improved driving circuit of a silicon-based display, comprising a micro-light emitting device, characterized in that:
the pixel array circuit comprises a pixel array circuit consisting of pixel circuits arranged in an array, more than one group of column driving circuits and more than one group of row driving circuits;
the pixel circuit generates a micro-current or a micro-voltage for driving a micro-light emitting device connected to the pixel circuit according to a selection signal connected to a row line of the pixel array circuit and a data signal connected to a column line of the pixel array circuit;
the column driving circuit comprises a shift register array for receiving display data, a cycle counter for generating cycle counting signals, a comparator array for finishing data comparison, a digital-to-analog converter for converting the cycle counting signals into analog signals in real time, and a transmission circuit for transmitting voltages output by the digital-to-analog converter to column lines; a mapping circuit is arranged between the cycle counter and the digital-to-analog converter, the mapping circuit maps the count value of the cycle counter into a second numerical value, the digital-to-analog converter converts the second numerical value into an analog voltage, the comparator in the comparator array compares the cycle count signal with the output value in the shift register array in real time, and when the comparison result is equal, the analog signal output by the digital-to-analog converter in real time is reflected to the pixel array circuit column line corresponding to the comparator through the transmission circuit; when the comparison results of the comparators are not equal, the transmission circuit enables the column lines of the pixel array circuit to be kept in a high-resistance state or kept in an output prohibition state or outputs a prohibition opening signal to the pixel circuits of the corresponding columns;
the shift register array comprises clock buffers in a tree structure, and the clock buffers in the tree structure enable the time of a clock line reaching each trigger to be within the range of the setup time and the holding time of the trigger; the shift register array has a bidirectional shift function, each group of shift registers in the shift register array are sequentially connected end to end, and the first group of shift registers and the last group of shift registers are respectively connected with pixel data; the middle of the adjacent shift registers comprises a multiplexer, the first selection end of the multiplexer is connected with the output of the shift register of the upper stage, and the second selection end of the multiplexer is connected with the output of the shift register of the lower stage; the shift register arrays are connected according to groups, the data bit width of each group of registers is equal to the bit width of pixel data, the shift register arrays are connected to the comparator through latches, and the latches can be controlled to latch the output values of the shift register arrays so that the shift register groups can continuously complete the shift function;
the shift register array has a function of shifting from a certain specific register which can be controlled by an offset controller; the offset controller comprises a decoder, a multiplexer and a two-bit selector; the decoder is used for generating a control signal, the control signal is input to a selection input end of the multiplexer, the multiplexer selects one-bit data from input pixel data as the input of a first group of shift registers, and the selection is characterized in that the corresponding one-bit data is selected from the pixel data for shifting according to the starting point position of the shift register group, when the bit data belongs to the starting point or a pixel behind the starting point, the two-bit selector selects the output signal of the first group of shift registers, when the bit data belongs to a pixel before the starting point, the two-bit selector selects the output signal of the multiplexer, and the output of the pixel before the starting point is kept at a level for invalidating the pixel data; the starting point position is specified by a configuration register or is updated at regular time, and the updating time and sequence are specified by a driving circuit or the configuration register;
the row driver circuit comprises a row driver for driving row lines of the pixel array circuit; the row driver includes a row decoder that generates row selection signals that are valid in a random order;
the row driving circuit and the column driving circuit work alternately and circularly, when the shift register array finishes shift output, the transmission circuit outputs a real-time result of the digital-to-analog converter to the corresponding pixel array circuit column line, the pixel array circuit column line keeps data of an M-th row, the shift register array starts the shift of an M + 1-th row of data, and the row decoder outputs an effective row selection signal of the M-th row on the pixel array circuit row line;
a single count period of the cycle counter does not exceed a certain continuous on time for any row line, and the cycle counter cycles up or down; the counting direction is inverted after the circulation counter counts to the minimum value or the maximum value; the circulation counter carries out circulation counting according to different step lengths, and the counting times and the counting value are in a mapping relation; the number of times counted in one cycle by the cycle counter is equal to the maximum value of the number of gray levels, the relationship between the number of times counted and the count value is functionally increased or decreased, and the linear relationship between the function and the product value of the function formed by the current of the light emitting device and the brightness is maintained.
2. A drive circuit as claimed in claim 1 wherein each of the sets of column drive circuits separately drives pixel circuits of a different colour component, the colour component comprising a red, green, blue or white component emitted by the micro-light emitting devices.
3. The drive circuit according to claim 2, wherein the pixel circuits of different color components are repeatedly arranged in sequence.
4. The driving circuit according to claim 1, wherein the micro light emitting device is an organic electroluminescent device, a semiconductor light emitting device, or a liquid crystal display device, and one end of the micro light emitting device is connected to a pixel circuit and the other end is connected to a common terminal, and the common terminal is connected to a positive power supply, a ground, or a negative power supply.
5. A driver circuit as claimed in claim 1, wherein the mapping is an input and output correspondence fitted with a function which is an exponential, fourier, gaussian, power or rational function.
6. The driving circuit of claim 1, wherein the column driving circuit further comprises signal amplifiers that amplify the output signals of the digital-to-analog converters to a range acceptable by the pixel circuit and drive column lines, and the signal amplifiers are located around the digital-to-analog converters or distributed between column lines.
7. The driving circuit according to claim 1, wherein the column driving circuit further comprises a function of immediately driving all column lines of the pixel array circuit to a voltage required to turn off the micro-light emitting devices when a clear signal is active, and a function of immediately driving all column lines of the pixel array circuit to a voltage required to turn on the micro-light emitting devices when a full-screen signal is active.
8. A drive circuit as claimed in claim 1, characterized in that the row drive circuit generates the row selection signals to be active in a sequential order determined by a shift register and/or a decoding circuit comprised in the row drive circuit or in a random order determined by an external input and/or an internal control circuit.
9. A drive circuit as claimed in claim 1, further comprising a level shift circuit which shifts the output signal of the comparator in the column drive circuit to a higher level and/or shifts the selection signal in the row drive circuit to a higher level.
10. The driving circuit of claim 1, wherein the column driving circuit is divided into an odd column driving circuit and an even column driving circuit, the odd column driving circuit being configured to drive column lines of odd columns, the even column driving circuit being configured to drive column lines of even columns.
11. The driving circuit according to claim 1, wherein the column driving circuit is divided into an upper driving circuit and a lower driving circuit, and/or a left driving circuit and a right driving circuit, the upper driving circuit is used for driving the row lines and the column lines of the upper half screen, the lower driving circuit is used for driving the row lines and the column lines of the lower half screen, the left driving circuit is used for driving the row lines and the column lines of the left half screen, and the right driving circuit is used for driving the row lines and the column lines of the lower half screen.
12. The driving circuit according to claim 11, wherein the pixel data is shifted from right to left in the left driving circuit, and the pixel data is shifted from left to right in the right driving circuit, and the amount of data shifted in each row is increased in the upper half screen and decreased in the lower half screen according to a trigonometric function or a quadratic function, thereby forming a display area in a perfect circle, an ellipse, or a trapezoid.
13. The driving circuit of claim 1, further comprising at least one of: the device comprises a video data interface, a data processor, a temperature sensor, an analog-to-digital converter, a DC-DC controller, a low dropout linear regulator, a phase-locked loop, a serial configuration interface, a configuration register and an embedded microprocessor; the data processor performs at least one of the following functions: image data format conversion, brightness adjustment, contrast adjustment, color saturation adjustment, gray dithering algorithm, image scaling and test image generation.
14. A silicon-based microdisplay comprising at least the driving circuit of any of claims 1-13 with the light emitting device of the display located above the pixel circuit.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1809865A (en) * | 2003-04-29 | 2006-07-26 | 剑桥显示技术公司 | Pwm driver for a passive matrix display and corresponding method |
| CN102360539A (en) * | 2011-10-10 | 2012-02-22 | 上海大学 | Drive circuit of silicon-based organic light emitting diode micro-display |
| CN105185331A (en) * | 2015-09-08 | 2015-12-23 | 深圳市华星光电技术有限公司 | Source drive circuit, liquid crystal display panel and drive method thereof |
| CN105355169A (en) * | 2015-11-24 | 2016-02-24 | 中国电子科技集团公司第五十五研究所 | Novel silicon-based OLED micro-display driving control circuit |
| CN106205453A (en) * | 2016-07-06 | 2016-12-07 | 昀光微电子（上海）有限公司 | A kind of microdisplay on silicon |
| WO2017084398A1 (en) * | 2015-11-17 | 2017-05-26 | 深圳典邦科技有限公司 | Silicon-based cmos driven oled image display device and manufacturing method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009037165A (en) * | 2007-08-03 | 2009-02-19 | Sony Corp | Display device and method |
| CN106205481B (en) * | 2016-07-06 | 2019-01-11 | 昀光微电子（上海）有限公司 | A kind of microdisplay on silicon |
-
2018
- 2018-04-17 CN CN201810345072.8A patent/CN108766333B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1809865A (en) * | 2003-04-29 | 2006-07-26 | 剑桥显示技术公司 | Pwm driver for a passive matrix display and corresponding method |
| CN102360539A (en) * | 2011-10-10 | 2012-02-22 | 上海大学 | Drive circuit of silicon-based organic light emitting diode micro-display |
| CN105185331A (en) * | 2015-09-08 | 2015-12-23 | 深圳市华星光电技术有限公司 | Source drive circuit, liquid crystal display panel and drive method thereof |
| WO2017084398A1 (en) * | 2015-11-17 | 2017-05-26 | 深圳典邦科技有限公司 | Silicon-based cmos driven oled image display device and manufacturing method |
| CN105355169A (en) * | 2015-11-24 | 2016-02-24 | 中国电子科技集团公司第五十五研究所 | Novel silicon-based OLED micro-display driving control circuit |
| CN106205453A (en) * | 2016-07-06 | 2016-12-07 | 昀光微电子（上海）有限公司 | A kind of microdisplay on silicon |
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