CN108764147B - Display panel and display device - Google Patents
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- CN108764147B CN108764147B CN201810534211.1A CN201810534211A CN108764147B CN 108764147 B CN108764147 B CN 108764147B CN 201810534211 A CN201810534211 A CN 201810534211A CN 108764147 B CN108764147 B CN 108764147B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
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Abstract
The invention provides a display panel, a preparation method thereof and a display device, relates to the technical field of display, and aims to improve the fingerprint identification precision. The planarization layer of the display panel is provided with an opening area and a non-opening area, the projection of the opening area on the plane of the substrate base plate is a first projection, the projection of the non-opening area on the plane of the substrate base plate is a second projection, and the first projection and the second projection are not overlapped; the planarization layer comprises a sunken part and a connecting through hole which are positioned in the opening area, and the sunken part and the connecting through hole are of a communicating structure; the planarization layer in the non-open area has a first thickness and the planarization layer in the open area has a second thickness, wherein the first thickness is greater than the second thickness; the display panel also comprises a first electrode positioned in the opening area and a light-emitting layer positioned on one side of the first electrode far away from the planarization layer; the projection of the light-emitting layer on the plane of the substrate base plate is a third projection, and the third projection covers the first projection. The display panel is used for realizing picture display.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel and a display device.
[ background of the invention ]
In recent years, with the development of display technologies, more and more display devices are used for protecting user privacy by fingerprint recognition. When a user operates the display device with the fingerprint identification function, the authority verification can be realized only by touching the display screen with a finger, and the operation is simple.
When the existing display panel with the fingerprint identification function performs fingerprint identification, light emitted by a light source enters a fingerprint identification unit through finger reflection, and the fingerprint identification unit reflects different fingerprints according to the ridges of the fingerprints. However, based on current display panel's structure, the light quantity that the light reflected through the fingerprint pierces through display module group and reachs the fingerprint identification unit is less, influences fingerprint identification's precision.
[ summary of the invention ]
In view of this, an embodiment of the present invention provides a display panel to solve the problem of low fingerprint recognition accuracy in the prior art.
In one aspect, an embodiment of the present invention provides a display panel, including:
a substrate base plate;
a driving circuit located at one side of the substrate base plate;
the planarization layer is positioned on one side of the driving circuit, which is far away from the substrate base plate; the planarization layer is provided with an opening area and a non-opening area, the projection of the opening area on the plane of the substrate base plate is a first projection, the projection of the non-opening area on the plane of the substrate base plate is a second projection, and the first projection and the second projection are not overlapped; the planarization layer further comprises a sunken part and a connecting through hole which are positioned in the opening area, and the sunken part and the connecting through hole are of a communicating structure; the planarization layer in the non-open area has a first thickness and the planarization layer in the open area has a second thickness, wherein the first thickness is greater than the second thickness;
A first electrode located at the opening region; the first electrode is electrically connected with the driving circuit through the connecting through hole;
the light-emitting layer is positioned on one side of the first electrode, which is far away from the planarization layer;
and the second electrode is positioned on one side of the light-emitting layer far away from the first electrode.
In another aspect, an embodiment of the present invention provides a method for manufacturing a display panel, including:
providing a substrate base plate;
forming a driving circuit on one side of the substrate base plate;
forming a planarization layer on one side of the driving circuit, which is far away from the substrate base plate;
patterning the planarization layer to form an opening area and a non-opening area on the planarization layer, wherein the planarization layer in the non-opening area has a first thickness, and the planarization layer in the opening area has a second thickness, and the first thickness is greater than the second thickness; the projection of the opening area on the plane of the substrate base plate is a first projection, the projection of the non-opening area on the plane of the substrate base plate is a second projection, and the first projection and the second projection are not overlapped; forming a concave part and a connecting via hole in an opening area of the planarization layer, wherein the concave part and the connecting via hole are of a communicating structure;
Forming a first electrode at the opening region;
forming a light-emitting layer on one side of the first electrode far away from the planarization layer; the projection of the light emitting layer on the plane of the substrate base plate is a third projection, and the third projection covers the first projection;
and forming a second electrode on the side of the light-emitting layer far away from the first electrode.
In another aspect, an embodiment of the present invention further provides a display device, where the display device includes the display panel.
In this embodiment, the opening region and the non-opening region are provided on the planarization layer, and the first electrode and the connection via are provided in the opening region, so that the first electrode and the driving circuit are electrically connected through the connection via. In addition, the light emitting layer is further arranged on the side, far away from the planarization layer, of the first electrode, so that the projection of the light emitting layer on the plane of the substrate covers the projection of the opening area on the surface of the substrate, that is, a part of the light emitting layer is located in the opening area included in the planarization layer, and thus, the planarization layer is equivalently multiplexed into the pixel definition layer, and the position of the light emitting layer is defined by the opening area on the planarization layer, so that the situation that the pixel definition layer and the planarization layer are simultaneously arranged in the display panel is avoided, and further, when fingerprint identification is performed, light reflected by the touch main body can pass through fewer film layers in the transmission process to the fingerprint identification unit, so that the intensity of the light received by the fingerprint identification unit is improved, and the accuracy of the fingerprint identification is improved.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of a prior art display panel;
FIG. 2 is a schematic cross-sectional view of a display panel provided in accordance with an embodiment of the present invention;
FIG. 3 is a diagram illustrating a light-sensing fingerprint recognition module according to an embodiment of the present invention;
FIG. 4 is an equivalent circuit diagram of the light sensing fingerprint identification module according to the embodiment of the present invention;
FIG. 5 is a schematic diagram of a film layer of a light-sensing fingerprint identification module according to an embodiment of the invention
Fig. 6 is a schematic top view of a display panel according to an embodiment of the present invention;
fig. 7 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 8 is a schematic structural flow chart of a method for manufacturing a display panel corresponding to FIG. 7
FIG. 9 is a schematic diagram illustrating a method of forming a recess and a connecting via in a planarization layer according to an embodiment of the present invention;
FIG. 10 is a schematic view of another method for forming a recess and a connecting via in a planarization layer according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a display device according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that although the terms first, second, etc. may be used to describe electrodes in embodiments of the invention, these electrodes should not be limited by these terms. These terms are only used to distinguish the individual electrodes from each other. For example, a first electrode may also be referred to as a second electrode, and similarly, a second electrode may also be referred to as a first electrode, without departing from the scope of embodiments of the present invention.
As shown in fig. 1, fig. 1 is a schematic cross-sectional view of a display panel in the prior art. The display panel comprises a flattening layer 1 'and a pixel definition layer 2', therefore, after light rays emitted by a light source 3 'are reflected by fingerprints 5', the light rays can reach a fingerprint identification unit 4 'only by sequentially passing through a plurality of film layers in the display panel, including the pixel definition layer 2' and the flattening layer 1 ', the light rays are greatly lost in the transmission process, the light intensity entering the fingerprint identification unit 4' is low, and the fingerprint identification precision is influenced.
Accordingly, the present embodiment provides a display panel, as shown in fig. 2, fig. 2 is a schematic cross-sectional view of the display panel provided in the present embodiment; the display panel includes: a substrate 1, a driving circuit 2, a planarization layer 3, a first electrode 41, a light-emitting layer 42, and a second electrode 43.
As shown in fig. 2, the driving circuit 2 is located on one side of the substrate 1, the planarization layer 3 is located on one side of the driving circuit 2 away from the substrate 1, and the planarization layer 3 has an opening area 31 and a non-opening area 32, a projection of the opening area 31 on a plane where the substrate 1 is located is a first projection, a projection of the non-opening area 32 on the plane where the substrate 1 is located is a second projection, and the first projection and the second projection do not overlap. Specifically, the planarization layer 3 further includes a recess 311 and a connection via 312 located in the opening region 31, and the recess 311 and the connection via 312 are in a communicating structure. The planarization layer 3 at the non-opening region 32 has a first thickness d1 and the planarization layer 3 at the recess 311 has a second thickness d2 in a direction perpendicular to the base substrate 1, wherein the first thickness d1 is greater than the second thickness d 2. The connecting via 312 penetrates the planarization layer 3.
It should be noted that, for the concave portion 311, the cross-sectional shape thereof may be a trapezoid, a rectangle, a triangle, and other shapes, which is not limited in this embodiment. Accordingly, when the cross-sectional shape of the recess 311 is trapezoidal, triangular, or the like, the planarization layer 3 at different positions corresponding to the recess 311 may have different thicknesses, but each of the thicknesses is smaller than the first thickness d 1. Exemplarily, in fig. 2, the cross-sectional shape of the recess 311 is a trapezoid, and taking a position m and a position n as an example, at the position m, the planarization layer 3 has a third thickness d3, and at the position n, the planarization layer 3 has a second thickness d2, wherein the first thickness d1 is greater than the third thickness d3, and the third thickness d3 is greater than the second thickness d 2.
The first electrode 41 is located in the opening area 31, and the first electrode 41 is electrically connected to the driving circuit 2 through the connection via 312. The light-emitting layer 42 is located on a side of the first electrode 41 away from the planarization layer 3, and a projection of the light-emitting layer 42 on the plane of the substrate 1 is a third projection, and the third projection covers the first projection. The second electrode 43 is located on the side of the light-emitting layer 42 away from the first electrode 41.
In the present embodiment, the opening region 31 and the non-opening region 32 are provided on the planarization layer 3, wherein the projection of the opening region 31 on the plane of the substrate 1 is the first projection, and the first electrode 41 and the connection via 312 are provided in the opening region 31, so that the first electrode 41 and the driving circuit 2 are electrically connected through the connection via 312. In addition, in the embodiment, the light emitting layer 42 is further disposed on the side of the first electrode 41 away from the planarization layer 3, so that the projection of the light emitting layer 42 on the plane of the substrate 1 covers the first projection, that is, a part of the light emitting layer 42 is located in the opening area 31 included in the planarization layer 3, which is equivalent to multiplexing the planarization layer 3 as a pixel definition layer, and the position of the light emitting layer 42 is defined by the opening area 31 on the planarization layer 3, so that it is avoided that the pixel definition layer and the planarization layer are simultaneously disposed in the display panel, and when fingerprint identification is performed, as shown in fig. 2, light reflected by the touch main body 8 can pass through fewer film layers in the process of propagating to the fingerprint identification unit, so as to improve the intensity of light received by the fingerprint identification unit, and further improve the accuracy of fingerprint identification.
In the manufacturing process of the display panel, since the light-emitting layer 42 is generally prepared by a vapor deposition process, the light-emitting layer 42 may be diffused to some extent outside the target region (i.e., the opening region 31 shown in fig. 2), and the diffusion region is referred to as a shadow region. On the premise of ensuring that the displays between two adjacent light-emitting layers 42 are not interfered with each other, the embodiment does not limit the portion of the light-emitting layers 42 outside the opening area 31, but only needs to ensure that most of the light-emitting layers 42 are located in the opening area 31.
For example, as shown in fig. 2, the planarization layer 3 has a single-layer structure, so that the number of film layers included in the display panel is as small as possible, and thus light reflected by the touch main body 8 can pass through fewer film layers in the process of propagating to the fingerprint identification unit, thereby improving the intensity of light received by the fingerprint identification unit, and further improving the accuracy of fingerprint identification.
Illustratively, the display panel further includes a plurality of sub-pixels 4 defined by the opening areas 31, each sub-pixel 4 includes the first electrode 41, the light emitting layer 42, and the second electrode 43 as described above, and each sub-pixel 4 is disposed corresponding to the driving circuit 2. The driving circuit 2 includes a capacitor 21 and a plurality of thin film transistors 22 (illustrated in fig. 2 by taking one thin film transistor as an example), each thin film transistor 22 includes a gate 220, a source 221, and a drain 222, and the first electrode 41 is electrically connected to the source 221 or the drain 222 of one of the thin film transistors 22.
Alternatively, as shown in fig. 2, the first electrode 41 includes a first main electrode 411 and a first connection electrode 412 that are directly connected, one end of the first connection electrode 412 is electrically connected to the first main electrode 411, and the other end of the first connection electrode 412 is electrically connected to the source 221 or the drain 222 of the thin film transistor 22; the first main electrode 411 covers the recess 311, and the first connecting electrode 412 is disposed in the connecting via 312.
Illustratively, the first thickness d1 is between 2 μm and 3 μm; the second thickness d2 is between 1.0 μm and 1.7 μm, so that a recessed portion 311 is formed in a portion of the planarization layer 3 corresponding to the opening region 31, and a first electrode 41 and a light-emitting layer 42 are formed on a side of the recessed portion 311 facing away from the substrate in a subsequent manufacturing process, so that the planarization layer 3 functions to define the position of the sub-pixel, that is, the planarization layer 3 functions as a pixel defining layer, and the number of film layers in the display panel is reduced, so that the loss of light reflected by the touch main body 8 in the transmission process to the fingerprint identification unit is small, and the intensity of light received by the fingerprint identification unit is increased, and the accuracy of fingerprint identification is increased.
Alternatively, the planarization layer 3 may be made of an organic photoresist. In the present embodiment, the planarization layer 3 is made of an organic photoresist, and the opening region 31 can be formed on the planarization layer 3 by exposure, development, and other processes.
Exemplarily, as shown in fig. 2, the display panel further includes a light sensing fingerprint identification module 5, and the light sensing fingerprint identification module 5 is located on a side of the substrate 1 close to the light emitting layer 42. When fingerprint identification is performed, the light emitting layer 42 is reused as a light source of the light sensation fingerprint identification module 5. Light that luminescent layer 42 sent reaches fingerprint identification module 5 through other retes in planarization layer 3 and the display panel after 8 reflections of touch main part, and fingerprint identification module 5 carries out analysis and judgment to the light received to carry out fingerprint identification. It can be seen from this that, this embodiment can reduce the loss of the in-process of the light ray directive fingerprint identification module 5 reflected by the touch main body 8 through reducing the quantity of the membranous layer in the display panel by multiplexing the planarization layer 3 as the pixel definition layer to improve the accuracy of fingerprint identification.
As shown in fig. 3, fig. 3 is a schematic diagram of the light sensing fingerprint identification module in the present embodiment, wherein the light sensing fingerprint identification module 5 includes a light sensing module 51, an identification module 52 and a feedback module 53. Specifically, the light sensing module 51 is configured to sense the intensity of the received light when performing fingerprint identification; the identification module 52 is used for identifying the valleys and ridges of the fingerprint according to the intensity of the light received by the light sensing module 51; the feedback module 53 is used for feeding back the fingerprint result identified by the identification module 52 to a driving chip (not shown).
Optionally, as shown in fig. 4 and 5, fig. 4 is an equivalent circuit diagram of the optical fingerprint identification module in this embodiment, and fig. 5 is a schematic diagram of a film layer of the optical fingerprint identification module in this embodiment. The light sensing fingerprint identification module 5 comprises a photosensitive diode D, a storage capacitor C and a thin film transistor T; the anode D1 of the photodiode D is electrically connected with the first electrode of the storage capacitor C, and the cathode D2 of the photodiode D is electrically connected with the second electrode of the storage capacitor C and the source Ts of the thin film transistor T; the Gate Tg of the thin film transistor T is electrically connected to the switch control line Gate, and the drain Td is electrically connected to the signal detection line Data.
Specifically, the photodiode D is used to convert the received light signal into a current signal.
Alternatively, as shown in fig. 5, the photodiode D includes a PIN junction D3 between the anode D1 and the cathode D2, wherein the PIN junction D3 is composed of a P-type semiconductor, an N-type semiconductor, and an intrinsic semiconductor (I-type layer) between the P-type semiconductor and the N-type semiconductor. PIN junction D3 has photosensitive properties and one-way conductivity. When there is no illumination, the PIN junction D3 has little saturation reverse leakage current, i.e., dark current, when the photodiode D is off. When exposed to light, the saturation reverse leakage current of the PIN junction D3 greatly increases, forming a photocurrent, and the photocurrent varies with the variation of the light intensity.
The principle of fingerprint recognition is explained in detail below with reference to fig. 4 and 5. The whole fingerprint identification stage comprises a preparation stage, a fingerprint signal acquisition stage and a fingerprint signal detection stage. In fingerprint recognition, a low voltage signal (e.g., -5V constant voltage signal) is input to the node H1, and a high voltage signal (e.g., 1.5V constant voltage signal) is input to the signal detection line Data.
In the preparation stage, a driving chip (not shown) controls the thin film transistor T of the light sensing fingerprint identification module 5 to be turned on through a switch control line Gate, and the storage capacitor C is charged until the storage capacitor C is charged.
In the fingerprint signal collection stage, a driving chip (not shown) controls the thin film transistor T to be turned off through a switch control line Gate, and when a user presses a finger on the display panel, light emitted by the fingerprint identification light source irradiates the finger and is reflected on the surface of the fingerprint to form reflected light. The reflected light reflected by the fingerprint is incident into the light sensing fingerprint identification module 5 and is received by the photodiode D of the light sensing fingerprint identification module 5 to form a photocurrent, and the photocurrent flows from the node H2 to the node H1, so that the potential of the node H2 changes.
In the fingerprint signal detection stage, the magnitude of the photocurrent is determined by directly detecting the potential variation of the node H2. Optionally, in the fingerprint signal detection stage, the switch control line Gate may be further used to control the thin film transistor T of the light sensing fingerprint identification module 5 to be turned on, at this time, a potential difference exists between two electrodes of the storage capacitor C, and the storage capacitor C is in a charging state, so as to determine the magnitude of the photocurrent by detecting the amount of charge charged by the storage capacitor C.
With reference to fig. 2, since the ridge 81 pressed in the finger fingerprint of the display panel is in contact with the light-emitting surface of the display panel and the valley 82 is not in contact with the light-emitting surface of the display panel, so that the intensity of the reflected light received by the light-sensing fingerprint identification module 5 and formed at the positions of the ridge 81 and the valley 82 is different, the magnitudes of the photocurrents converted from the reflected light formed at the position of the ridge 81 and the reflected light formed at the position of the valley 82 are different, and the fingerprint identification can be performed by determining the magnitudes of the photocurrents at different positions.
The display panel provided by this embodiment, by multiplexing the above planarization layer 3 as the pixel definition layer, after the position of the light emitting layer 42 is defined by the planarization layer 3, through testing, the amount of light received by the light sensing module 51 can be increased to 70% -80% of the amount of light emitted by the light source, and for the display panel including two film layers of the planarization layer and the pixel definition layer in the prior art, the value is only 50% -60%, so it can be seen that, by using the display panel provided by this embodiment, the intensity of light received by the light sensing module 51 can be increased, thereby increasing the fingerprint identification precision.
Optionally, as shown in fig. 6, fig. 6 is a schematic top view of the display panel provided in this embodiment; the display panel includes a fingerprint identification area 9, and in this embodiment, the planarization layer may be multiplexed as a pixel definition layer in the fingerprint identification area 9, or may be multiplexed as a pixel definition layer in another area of the display panel except for the fingerprint identification area 9, which is not limited in this embodiment.
Fig. 7 and 8 show that fig. 7 is a schematic flow chart of the manufacturing method of the display panel provided in this embodiment, and fig. 8 is a schematic structural flow chart of the manufacturing method of the display panel corresponding to fig. 7.
The preparation method comprises the following steps:
s1: providing a substrate 1; the substrate 1 may be a flexible substrate, and the material of the flexible substrate is not limited in the present invention, and the flexible substrate may be any one of Polyimide (PI), Polyamide (PA), and Polycarbonate (PC), for example.
S2: forming a driving circuit 2 on one side of a base substrate 1; illustratively, as shown in fig. 7, the driving circuit 2 is formed on one side of the substrate 1, and includes forming a plurality of storage capacitors 21 and a plurality of thin film transistors 22 (illustrated as one thin film transistor 22 in fig. 8) on one side of the substrate 1, where each thin film transistor 22 includes a gate electrode 220, a source electrode 221, a drain electrode 222, and an active layer 223. It is understood that, in the manufacturing process, various interlayer insulating layers are further included between the films where the elements included in the driving circuit 2 are located, for example, between the gate 220 and the source 221 or the drain 222 of the thin film transistor 22, between the two plates of the storage capacitor 21, and the manufacturing method of the interlayer insulating layer is the same as that in the prior art, and is not described herein again.
S3: forming a planarization layer 3 on the side of the drive circuit 2 away from the base substrate 1; illustratively, the material of the planarization layer 3 is an organic photoresist material.
S4: the planarization layer 3 is subjected to patterning processing. Specifically, the patterning process of the planarization layer 3 includes: forming the planarization layer 3 into an opening area 31 and a non-opening area 32, wherein the projection of the opening area 31 on the plane of the substrate 1 is a first projection, the projection of the non-opening area on the plane of the substrate 1 is a second projection, and the first projection and the second projection are not overlapped; a recess 311 and a connection via 312 are formed in the opening region 31 of the planarization layer 3, wherein the recess 311 and the connection via 312 are connected. The planarization layer 3 located in the non-opening region 32 has a first thickness d1, the planarization layer 3 located in the recess 311 has a second thickness d2, wherein the first thickness d1 is greater than the second thickness d 2; the connecting via 312 penetrates the planarization layer 3.
S5: the first electrode 41 is formed in the opening area 31.
S6: forming a light-emitting layer 42 on the side of the first electrode 41 away from the planarization layer 3; the projection of the light-emitting layer 42 on the plane of the substrate 1 is a third projection, and the third projection covers the first projection.
S7: a second electrode 43 is formed on the side of the light-emitting layer 42 remote from the first electrode 41.
In the present embodiment, the opening region 31 and the non-opening region 32 are provided on the planarization layer 3, wherein the projection of the opening region 31 on the plane of the substrate 1 is the first projection, and the first electrode 41 and the connection via 312 are provided in the opening region 31, so that the first electrode 41 and the driving circuit 2 are electrically connected through the connection via 312. In addition, in the embodiment, the light emitting layer 42 is further disposed on the side of the first electrode 41 away from the planarization layer 3, so that the projection of the light emitting layer 42 on the plane of the substrate 1 covers the first projection, that is, a part of the light emitting layer 42 is located in the opening area 31 included in the planarization layer 3, which is equivalent to multiplexing the planarization layer 3 as a pixel definition layer, and the position of the light emitting layer 42 is defined by the opening area 31 on the planarization layer 3, so that the pixel definition layer and the planarization layer are not simultaneously disposed in the display panel, and further, when fingerprint identification is performed, light reflected by the touch main body can pass through fewer film layers in the transmission process to the fingerprint identification unit, so that the intensity of light received by the fingerprint identification unit is improved, and further, the accuracy of fingerprint identification is improved.
For example, the patterning process of the planarization layer 3 in step S4 is performed to form the opening region 31 and the non-opening region 32 in the planarization layer, and the recessed portion 311 and the connecting via 312 are formed in the opening region 31 of the planarization layer 3, which are described below:
As shown in fig. 9, fig. 9 is a schematic view of a method for forming a recess and a connecting via in a planarization layer according to the present embodiment; the planarization layer 3 is subjected to patterning processing using the half-tone mask 6 so that the planarization layer forms an opening region 31 and a non-opening region 32, and a recess 311 and a connecting via 312 are formed in the opening region 31 of the planarization layer 3.
Specifically, as shown in fig. 9, the half gray scale mask 6 includes a first light transmission region 61, a second light transmission region 62 and a third light transmission region 63, and the light transmittance of the first light transmission region 61, the light transmittance of the second light transmission region 62 and the light transmittance of the third light transmission region 63 are different from each other.
It will be appreciated that because the exposed portions of the positive photoresist are removed during the subsequent development process, the unexposed portions are not removed. Negative photoresist, in contrast, is not removed during subsequent development, but is removed from unexposed portions. Therefore, if the planarization layer 3 is made of a positive photoresist material, the transmittance of the first light-transmitting region 61 of the half-gray-scale mask 6 can be smaller than that of the second light-transmitting region 62, and the transmittance of the second light-transmitting region 62 can be smaller than that of the third light-transmitting region 63. Thus, after exposure and development, the removed thickness of the portion of the planarization layer 3 corresponding to the first light-transmitting region 61 is the smallest, the removed thickness of the portion corresponding to the third light-transmitting region 63 is the largest, and the removed thickness of the portion corresponding to the second light-transmitting region 62 is between the two, and accordingly, the remaining thickness d1 of the portion of the planarization layer 3 corresponding to the first light-transmitting region 61 is greater than the thickness d2 corresponding to the second light-transmitting region 62, and the thickness d3 corresponding to the second light-transmitting region 62 is greater than the thickness corresponding to the third light-transmitting region 63. Moreover, since the light transmittance of the light transmission region of the half-gray-scale mask plate can be adjusted according to actual needs, in this embodiment, the light transmittances of the first light transmission region 61, the second light transmission region 62 and the third light transmission region 63 of the half-gray-scale mask plate 6 can be adjusted, so that the portion of the planarization layer 3 corresponding to the third light transmission region 63 is completely removed after exposure and development, so that the portion of the planarization layer 3 corresponding to the third region 63 forms a connecting via hole 312, the portion corresponding to the second light transmission region 62 forms a recessed portion 311, and the portion corresponding to the first light transmission region 61 forms a non-opening region 32.
Similarly, if the planarization layer 3 is made of a negative photoresist material, the transmittance of the first light-transmitting region 61 of the half-gray-scale mask 6 is greater than that of the second light-transmitting region 62, and the transmittance of the second light-transmitting region 62 is greater than that of the third light-transmitting region 63. Thus, after exposure and development, the removed thickness of the portion of the planarization layer 3 corresponding to the first light-transmitting region 61 is smaller, the removed thickness of the portion corresponding to the third light-transmitting region 63 is the largest, and the removed thickness of the portion corresponding to the second light-transmitting region 62 is between the two, accordingly, the remaining thickness d1 of the portion of the planarization layer 3 corresponding to the first light-transmitting region 61 is greater than the thickness d2 corresponding to the second light-transmitting region 62, and the remaining thickness d3 of the portion corresponding to the second light-transmitting region 62 is greater than the thickness corresponding to the third light-transmitting region 63. In addition, in the present embodiment, the light transmittance of different light transmission regions of the half-gray-scale mask 6 can also be adjusted, so that the portion of the planarization layer 3 corresponding to the third light transmission region 63 is completely removed after exposure and development, so that the portion of the planarization layer 3 corresponding to the third light transmission region 63 forms the connecting via 312, the portion corresponding to the second light transmission region 62 forms the recess 311, and the portion corresponding to the first light transmission region 61 forms the non-opening region 32.
It can be seen from the above analysis that, in the present embodiment, by selecting the half-gray-scale mask 6, the opening region 31 and the non-opening region 32 can be formed in the planarization layer 3 through only one process, and the recess 311 and the connection via 312 are formed in the opening region 31, thereby simplifying the process flow.
Specifically, the process of patterning the planarization layer 3 by using the half-gray-scale mask 6 includes: sequentially exposing and developing the planarization layer 3 by using a half-gray-scale mask 6 to obtain a connecting through hole 312, a recessed part 311 and a non-opening area 32; wherein the connection via 312 is in contact with the recess 311 and the driving circuit 2, respectively. Illustratively, the exposure time of the planarization layer 3 by using the half-gray-scale mask is 2min to 3min, and the development time is 40s to 50 s.
In addition to the method of patterning the planarization layer 3 by using the half-gray scale mask 6, as shown in fig. 10, fig. 10 is a schematic view of another preparation method for forming the recess and the connecting via hole in the planarization layer according to this embodiment; the embodiment may also perform patterning processing on the planarization layer 3 by sequentially using the first mask plate 71 and the second mask plate 72.
Specifically, as shown in fig. 10, first, a first region 81 of the planarization layer 3 is patterned by using a first mask 71, so that a portion of the planarization layer 3 corresponding to the first region 81 is removed by a certain thickness, for example, as shown in fig. 10, the first mask 71 has an opening 710, the opening 710 corresponds to the first region 81, after the patterning of the first mask 71, the planarization layer 3 corresponding to the first region 81 has a second thickness d2, the rest of the planarization layer 3 has a first thickness d1, and the first thickness d1 is greater than the second thickness d2, so as to form an opening region 31 at the position of the planarization layer 3 corresponding to the first region 81, and form a non-opening region 32 at the rest of the planarization layer.
Then, the second region 82 of the planarization layer 3 is subjected to patterning processing using the second mask 72. The second mask 72 has an opening 720, the opening 710 of the first mask 71 is larger than the opening 720 of the second mask 72, and the second region 82 is located in the first region 81. Specifically, as shown in fig. 9, after the patterning process of the second mask 72, a connection via 312 penetrating the planarization layer 3 is formed at a position corresponding to the second region 82 in the opening region 31 of the planarization layer 3, and a recess 311 is formed at another position in the opening region 31 of the planarization layer 3.
Optionally, the performing, by using the first mask 71, the patterning process on the first region 81 of the planarization layer 3 includes:
exposing and developing the first region 81 of the planarization layer 3 by using a first mask plate 71 to obtain a recessed portion 311;
the second region 82 of the planarization layer 3 is subjected to patterning processing using the second mask 72, including:
the second region 82 of the planarization layer 3 is exposed and processed by using the second mask 72, resulting in a connection via 312.
Optionally, the time for exposing the first region of the planarization layer 3 by using the first mask is 2min to 3min, and the time for developing is 40s to 50 s; and exposing the second area of the planarization layer by using a second mask for 2-3 min, and developing for 40-50 s.
After the recess 311 and the connection via 312 are formed in the above two ways, as shown in fig. 8, the above step S5 forms the first electrode 41 in the opening area 31, including: forming a first connection electrode 412 at the connection via 312 and a first main electrode 411 at the recess 311; one end of the first connection electrode 412 contacts the first main electrode 412, and the other end of the first connection electrode 412 contacts the driving circuit 2.
As shown in fig. 11, fig. 11 is a schematic view of the display device provided in this embodiment. The present embodiment further provides a display device, which includes the display panel 100 described above, and the display panel 100 includes the fingerprint identification area 9. The specific structure of the display panel 100 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 11 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
In the display device provided by this embodiment, the opening region and the non-opening region are disposed on the planarization layer, where a projection of the opening region on a plane where the substrate is located is a first projection, and the first electrode and the connection via hole are disposed in the opening region, so that the first electrode is electrically connected to the driving circuit through the connection via hole. In addition, in the embodiment, the light emitting layer is further disposed on the side of the first electrode away from the planarization layer, so that the projection of the light emitting layer on the plane of the substrate 1 covers the first projection, that is, a part of the light emitting layer is disposed in the opening area included in the planarization layer, which is equivalent to multiplexing the planarization layer into the pixel definition layer, and the position of the light emitting layer is defined by the opening area on the planarization layer, thereby avoiding simultaneously disposing the pixel definition layer and the planarization layer in the display panel, and further, when fingerprint identification is performed, the light reflected by the touch main body can pass through fewer film layers in the process of propagating to the fingerprint identification unit, so that the intensity of the light received by the fingerprint identification unit is improved, and further, the accuracy of the fingerprint identification is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (15)
1. A display panel, comprising:
a substrate base plate;
a driving circuit located at one side of the substrate base plate;
the planarization layer is positioned on one side of the driving circuit, which is far away from the substrate base plate; the planarization layer is provided with an opening area and a non-opening area, the projection of the opening area on the plane of the substrate base plate is a first projection, the projection of the non-opening area on the plane of the substrate base plate is a second projection, and the first projection and the second projection are not overlapped; the planarization layer further comprises a sunken part and a connecting through hole which are positioned in the opening area, and the sunken part and the connecting through hole are of a communicating structure; the planarization layer at the non-open area has a first thickness and the planarization layer at the recess has a second thickness, wherein the first thickness is greater than the second thickness;
a first electrode located at the opening region; the first electrode is electrically connected with the driving circuit through the connecting through hole;
The light-emitting layer is positioned on one side of the first electrode, which is far away from the planarization layer; the projection of the light-emitting layer on the plane of the substrate base plate is a third projection, and the third projection covers the first projection;
a second electrode on a side of the light-emitting layer away from the first electrode, a portion of the second electrode not contacting the light-emitting layer being formed on the planarization layer;
the planarization layer is of a single-layer structure;
the first thickness is in the range of 2-3 μm, the second thickness is in the range of 1.0-1.7 μm, and the first electrode and the light emitting layer are formed on the side of the recess portion facing away from the substrate base plate.
2. The display panel according to claim 1, further comprising a plurality of sub-pixels defined by the opening area; the sub-pixels are arranged corresponding to the drive circuit; wherein,
the driving circuit comprises a capacitor and a plurality of thin film transistors, each thin film transistor comprises a grid electrode, a source electrode and a drain electrode, and the first electrode is electrically connected with the source electrode or the drain electrode of one thin film transistor.
3. The display panel according to claim 2, wherein the first electrode comprises a first main electrode and a first connection electrode directly connected, one end of the first connection electrode is electrically connected to the first main electrode, and the other end of the first connection electrode is electrically connected to a source or a drain of the thin film transistor;
Wherein the first main electrode covers the recess; the first connection electrode is disposed in the connection via hole.
4. The display panel according to any one of claims 1 to 3, wherein the planarization layer is an organic photoresist.
5. The display panel of any one of claims 1-3, further comprising a light-sensitive fingerprint identification module; the light emitting layer is reused as a light source of the light sensation fingerprint identification module;
the light sensation fingerprint identification module comprises a light ray induction module, an identification module and a feedback module;
the light sensing module is used for sensing the intensity of received light;
the identification module is used for identifying the valleys and ridges of the fingerprint according to the intensity of the light received by the light sensing module;
the feedback module is used for feeding back the fingerprint result identified by the identification module to the driving chip.
6. The display panel according to claim 5, wherein the amount of light received by the light sensing module is 70% to 80% of the amount of light emitted by the light source.
7. A method for manufacturing a display panel, the method comprising:
providing a substrate base plate;
Forming a driving circuit on one side of the substrate base plate;
forming a planarization layer on one side of the driving circuit, which is far away from the substrate base plate;
patterning the planarization layer to enable the planarization layer to form an opening area and a non-opening area, wherein the projection of the opening area on the plane of the substrate base plate is a first projection, the projection of the non-opening area on the plane of the substrate base plate is a second projection, and the first projection and the second projection are not overlapped; forming a concave part and a connecting via hole in an opening area of the planarization layer, wherein the concave part and the connecting via hole are of a communicating structure; the planarization layer located in the non-opening area has a first thickness, and the planarization layer located in the recessed portion has a second thickness, wherein the first thickness is greater than the second thickness;
forming a first electrode at the opening region;
forming a light-emitting layer on one side of the first electrode far away from the planarization layer; the projection of the light emitting layer on the plane of the substrate base plate is a third projection, and the third projection covers the first projection;
forming a second electrode on a side of the light-emitting layer away from the first electrode, a portion of the second electrode not contacting the light-emitting layer being formed on the planarization layer;
Wherein the planarization layer is a single-layer structure;
the first thickness is in the range of 2-3 μm, the second thickness is in the range of 1.0-1.7 μm, and the first electrode and the light emitting layer are formed on the side of the recess portion facing away from the substrate base plate.
8. The method for preparing according to claim 7, wherein the patterning the planarization layer to form the recess and the connecting via in the opening region of the planarization layer comprises:
patterning the planarization layer by using a half-gray-scale mask plate; the half-gray-scale mask plate comprises a first light transmission area, a second light transmission area and a third light transmission area, wherein the light transmittance of the first light transmission area, the light transmittance of the second light transmission area and the light transmittance of the third light transmission area are different from each other.
9. The preparation method of claim 8, wherein the patterning the planarization layer by using a half-gray-scale mask comprises:
exposing and developing the opening area of the planarization layer by using the half-gray scale mask plate to obtain the connecting through hole and the concave part; the connection via hole is respectively contacted with the depressed part and the driving circuit.
10. The method according to claim 9, wherein the exposure time of the opening region of the planarization layer using the half-gray scale mask is 2min to 3min, and the development time is 40s to 50 s.
11. The method according to claim 7, wherein the patterning the planarization layer comprises:
patterning the first region of the planarization layer by using a first mask plate;
patterning the second region of the planarization layer by using a second mask plate;
the second region is located within the first region;
the opening of the first mask plate is larger than the opening of the second mask plate.
12. The method according to claim 11, wherein the patterning the first region of the planarization layer with the first mask comprises:
exposing and developing the first area of the planarization layer by using the first mask plate to obtain the concave part;
and patterning the second region of the planarization layer by using a second mask, including:
and exposing and processing the second area of the planarization layer by adopting the second mask plate to obtain the connecting through hole.
13. The manufacturing method according to claim 12, wherein the first area of the planarization layer is exposed for 2min to 3min by using the first mask, and the developing time is 40s to 50 s;
and the time for exposing the second area of the planarization layer by adopting the second mask plate is 2min-3min, and the time for developing is 40s-50 s.
14. The production method according to claim 9 or 12, wherein the first electrode includes a first main electrode and a first connecting electrode;
forming the first electrode at the opening area, including: forming the first connection electrode at the connection via hole and the first main electrode at the recess portion; one end of the first connection electrode is in contact with the first main electrode, and the other end of the first connection electrode is in contact with the driving circuit.
15. A display device characterized in that it comprises a display panel according to any one of claims 1 to 6.
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| CN110137385A (en) * | 2019-04-09 | 2019-08-16 | 深圳市华星光电半导体显示技术有限公司 | Organic LED display panel and its manufacturing method |
| CN110781848B (en) * | 2019-10-30 | 2022-05-20 | Oppo广东移动通信有限公司 | Screen fingerprint identification device and electronic equipment |
| CN111276499B (en) * | 2020-03-26 | 2023-04-07 | 合肥鑫晟光电科技有限公司 | Display substrate, preparation method thereof and display device |
| CN111785854A (en) * | 2020-08-10 | 2020-10-16 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN114446185B (en) * | 2020-10-30 | 2023-07-18 | 合肥鑫晟光电科技有限公司 | Driving backboard, manufacturing method thereof and display panel |
| CN112420617A (en) * | 2020-11-10 | 2021-02-26 | 武汉华星光电半导体显示技术有限公司 | Preparation method of display panel and display panel |
| CN113469079B (en) * | 2021-07-07 | 2024-09-13 | 上海天马微电子有限公司 | Display panel and display device |
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