CN108717846B - Shift register circuit and display device - Google Patents
Shift register circuit and display device Download PDFInfo
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- CN108717846B CN108717846B CN201810920995.1A CN201810920995A CN108717846B CN 108717846 B CN108717846 B CN 108717846B CN 201810920995 A CN201810920995 A CN 201810920995A CN 108717846 B CN108717846 B CN 108717846B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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Abstract
The invention discloses a shift register circuit and a display device. The shift temporary storage circuit comprises a cascade-connected multi-stage shift temporary storage unit, the shift temporary storage unit comprises a charging module, a pre-charging signal input end of the charging module is electrically connected with a pull-up point of a preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, the pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state. The technical scheme of the invention is beneficial to reducing the pre-charging time required in the shift register circuit and optimizing the waveform of the scanning signal, thereby improving the display effect of the display device.
Description
Technical Field
The invention relates to the technical field of display, in particular to a shift register circuit and a display device.
Background
In order to adapt to the development of light weight, thin frame and low cost of the display device, Gate Drive on Array (GOA) is generally adopted to output the line scanning signals, and specifically, the shift register circuit is integrated on the Array substrate of the display device. The shift temporary storage circuit comprises a plurality of stages of shift temporary storage units which are arranged in a cascade mode, and each stage of shift temporary storage unit is precharged under the action of a scanning signal output by a preceding stage of shift temporary storage unit. However, since the high level of the scan signal outputted from the previous stage shift register unit is limited, the precharge time required by the previous stage shift register unit is often long, the precharge is insufficient, the waveform of the generated scan signal is also poor, and the display effect of the display device is poor.
Disclosure of Invention
The present invention is directed to a shift register circuit, which is used to solve the technical problem of long precharge time required in the shift register circuit, optimize the waveform of the generated scan signal, and improve the display effect of the display device.
In order to achieve the above object, the shift register circuit provided by the present invention includes a plurality of cascaded shift register units, each of the shift register units includes a charging module, a precharge signal input terminal of the charging module is electrically connected to a pull-up point of a preceding shift register unit, and when the pull-up point of the current shift register unit is precharged, a pull-up signal of the pull-up point of the preceding shift register unit is in a high level state.
Optionally, the charging module includes a first switch device, a gate of the first switch device is electrically connected to the pre-charge signal input terminal, a drain of the first switch device is electrically connected to the scan signal output terminal or the high level signal source of the pre-stage shift register unit, and a source of the first switch device is electrically connected to the pull-up point of the pre-stage shift register unit.
Optionally, the charging module includes a second switching device and a third switching device, a gate of the second switching device is electrically connected to a scan signal output end of the pre-stage shift register unit or a pull-up point of the pre-stage shift register unit, and a drain of the second switching device is electrically connected to a scan signal output end of the pre-stage shift register unit or a high-level signal source; the grid electrode of the third switching device is electrically connected with the pre-charging signal input end, the drain electrode of the third switching device is electrically connected with the source electrode of the second switching device, and the source electrode of the third switching device is electrically connected with the pull-up point of the shift temporary storage unit at the current stage; when the pull-up point of the current stage shift register unit is precharged, the scanning signal output by the scanning signal output end of the previous stage shift register unit is in a high level state.
Optionally, the shift register circuit further includes an output module, the output module includes a fourth switching device, a gate of the fourth switching device is electrically connected to the pull-up point of the shift register unit of the current stage, a drain of the fourth switching device is electrically connected to the clock signal source, and a source of the fourth switching device is electrically connected to the scan signal output terminal of the shift register unit of the current stage.
Optionally, the shift temporary storage circuit further includes a reset module, where the reset module includes a fifth switching device and a sixth switching device, a gate of the fifth switching device is electrically connected to a pull-down point of the shift temporary storage unit of the current stage, a drain of the fifth switching device is electrically connected to a scan signal output end of the shift temporary storage unit of the current stage, and a source of the fifth switching device is electrically connected to the low-level signal source; the grid electrode of the sixth switching device is electrically connected with the pull-down point of the current-stage shift temporary storage unit, the drain electrode of the sixth switching device is electrically connected with the pull-up point of the current-stage shift temporary storage unit, and the source electrode of the sixth switching device is electrically connected with the low-level signal source.
Optionally, the pull-down point of the shift register unit is electrically connected to the scan signal output end of the next-stage shift register unit; or the pull-down point of the shift temporary storage unit is electrically connected with the pull-up point of the post-stage shift temporary storage unit.
Optionally, the shift register unit further includes a coupling capacitor, and the coupling capacitor is connected between the pull-up point of the shift register unit and the scan signal output end.
Optionally, the shift temporary storage unit further includes a voltage stabilizing module, a first end of the voltage stabilizing module is electrically connected to the voltage stabilizing signal source, a second end of the voltage stabilizing module is electrically connected to the scanning signal output end of the shift temporary storage unit of the current stage, a third end of the voltage stabilizing module is electrically connected to the pull-up point of the shift temporary storage unit of the current stage, a fourth segment of the voltage stabilizing module is electrically connected to the low level signal source, and the voltage stabilizing module pulls down the scanning signal output end and the pull-up point to the low level state under the control of the voltage stabilizing signal.
In order to achieve the above object, the present invention further provides a shift register circuit, where the shift register circuit includes cascaded multiple stages of shift register units, and the shift register unit includes a charging module, an output module, a reset module, and a voltage stabilizing module, where: the pre-charging signal input end of the charging module is electrically connected with the pull-up point of the preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, the pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state.
In order to achieve the above object, the present invention further provides a display device, where the display device includes a display panel and a driving unit, the driving unit includes a shift register circuit, the shift register circuit includes multiple stages of shift register units arranged in a cascade manner, the shift register unit includes a charging module, a precharge signal input end of the charging module is electrically connected to a pull-up point of a preceding stage shift register unit, when the pull-up point of the current stage shift register unit is precharged, a pull-up signal of the pull-up point of the preceding stage shift register unit is in a high level state, and the shift register circuit is an array substrate gate drive integrated circuit; or the shift temporary storage circuit comprises a plurality of cascade-arranged shift temporary storage units, and each shift temporary storage unit comprises a charging module, an output module, a reset module and a voltage stabilizing module, wherein: the pre-charging signal input end of the charging module is electrically connected with the pull-up point of the preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, the pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state.
In the technical scheme of the invention, the shift temporary storage circuit comprises a plurality of stages of shift temporary storage units which are arranged in a cascade mode, and each shift temporary storage unit comprises a charging module which is used for pre-charging a pull-up point of the shift temporary storage unit of the stage. The pre-charging signal input end of the charging module is electrically connected with the pull-up point of the preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, the pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state. The high level of the pull-up signal of the preceding stage shift register unit is about twice the high level of the pull-up signal or the high level of the scan signal, so that the pull-up signal of the preceding stage shift register unit is used as the pre-charge signal of the present stage shift register unit, which is beneficial to improving the conductivity of the charge module in a conducting state, thereby reducing the pre-charge time required in the display device, fully pre-charging the pull-up point of the present stage shift register unit, further optimizing the waveform of the scan signal generated by the present stage shift register unit, and improving the display effect of the display device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a circuit diagram illustrating an exemplary nth shift register unit of a shift register circuit;
FIG. 2 is a timing diagram of an exemplary 4CK shift register circuit;
FIG. 3 is a schematic structural diagram of a display device according to an embodiment of the present invention;
FIG. 4 is a block diagram of an nth shift register unit according to an embodiment of the shift register circuit of the present invention;
FIG. 5 is a schematic circuit diagram of an nth shift register unit according to another embodiment of the shift register circuit of the present invention;
FIG. 6 is a timing diagram of the 4CK shift register circuit of the present invention;
fig. 7 is a circuit diagram of an nth shift register unit according to another embodiment of the shift register circuit of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
Fig. 1 is a schematic circuit structure diagram of an nth stage shift register unit of an exemplary shift register circuit, where the shift register unit includes a charging module 111 ', an output module 112', and a reset module 113 ', where the charging module 111' includes a switching device T1 ', a gate of the switching device T1' is electrically connected to a scan signal output terminal of a previous stage shift register unit, when a previous stage scan signal G '(n-i) is in a high level state, the switching device T1' is in a conducting state, the previous stage scan signal G '(n-i) precharges a pull-up point of the current stage shift register unit, and the pull-up signal corresponding to the pull-up point is PU' (n), where i is a positive integer, and a specific value of i is related to a timing sequence in the shift register circuit. FIG. 2 is a timing diagram of the 4CK shift register circuit. Taking the case of generating the second-stage scan signal G ' (2) as an example, when the first-stage scan signal G ' (1) is in a high state, the switching device T1 ' is turned on, and the first-stage scan signal G ' (1) simultaneously precharges the pull-up point of the second-stage shift register unit, so that the pull-up signal PU ' (2) of the second-stage shift register unit reaches a second-highest level. The output module 112 'of the shift register unit receives the second-stage clock signal CK' (2), when the second-stage clock signal CK '(2) is in a high level state, the second-stage clock signal CK' (2) is coupled to the pull-up point of the second-stage shift register unit under the action of the parasitic capacitance or the coupling capacitance of the output module 112 ', at this time, the pull-up signal PU' (2) is further raised to a high level, the output module 112 'is turned on under the control of the pull-up signal PU' (2), and generates a high level of the second-stage scanning signal G '(2) under the action of the second-stage clock signal CK' (2). The reset module 113 'controls the pull-up point and the scan signal output terminal of the second stage shift register unit to reset to a low state after generating a high level of the second stage scan signal G' (2) to generate a scan signal capable of realizing a progressive driving of the display device. However, since the high level of the previous stage scan signal G '(n-i) is limited, the pre-charge time required for the pull-up point is often long, the pre-charge of the pull-up point is insufficient, and accordingly, the conduction performance of the output module 112' is poor, the waveform of the generated scan signal is also poor, and the display effect of the display device is poor.
The invention provides a shift register circuit, which aims to solve the problem of long pre-charging time required in a display device, optimize the waveform of a generated scanning signal and improve the display effect of the display device. In an embodiment of the present invention, as shown in fig. 3 and 4, the shift register circuit includes a plurality of cascaded shift register units, each of the shift register units includes a charging module 111, a precharge signal input terminal of the charging module 111 is electrically connected to a pull-up point of a previous stage shift register unit, and when the pull-up point of the current stage shift register unit is precharged, a pull-up signal PU (n-j) of the pull-up point of the previous stage shift register unit is in a high state.
Hereinafter, a liquid crystal display device will be taken as an example to describe the embodiments of the present invention in detail. As shown in fig. 3, the display device includes a display panel including an array substrate 100, a color filter substrate 200, and liquid crystal (not shown) filled between the array substrate 100 and the color filter substrate 200. The display panel is provided with a plurality of pixels arranged in a rectangular array, each pixel generally includes a plurality of sub-pixels, the array substrate 100 is provided with a switching device corresponding to each sub-pixel, and the color filter substrate 200 is provided with a color filter block corresponding to each sub-pixel. Under the control of the switching device on the array substrate 100, the liquid crystal in the region corresponding to each sub-pixel is deflected at a certain angle to realize the display of a specific image. In the display device with the GOA architecture, a shift register circuit 110 is further disposed on the array substrate 100 for driving each row of sub-pixels. The shift register circuit 110 is directly integrated on the array substrate 100 through a micro-processing process, so that an external shift register circuit is omitted, the material cost and the process cost of the display device are reduced, and the light, thin and narrow frame design of the display device is facilitated. The switching devices on the array substrate 100 and the switching devices in the shift register circuit 110 may be n-type thin film transistors, which will be described as an example later.
The shift register circuit 110 is developed based on the thompson circuit, and includes a plurality of stages of shift register units arranged in a cascade manner, wherein a first feedback signal output by a preceding stage of shift register unit can be used as a pre-charge signal of the present stage of shift register unit, a second feedback signal output by a following stage of shift register unit can be used as a reset signal of the present stage of shift register unit, and a cascade relationship between the shift register units of each stage is related to a time sequence in the shift register circuit, which is not described herein again. In particular, for the first stage of shift register unit, the separately provided start signal may be used as its precharge signal, and for the last stage of shift register unit, a redundant shift register unit may be provided to provide it with a reset signal.
In each stage of shift register unit, as shown in fig. 4, the first end of the charging module 111 receives the precharge signal, the second end of the charging module 111 is connected to the first end of the output module 112, and a pull-up point of the shift register unit is located between the charging module 111 and the output module 112, and a pull-up signal corresponding to the pull-up point is denoted by pu (n). The second end of the output module 112 receives the clock signal ck (n), and it should be noted that in the shift register circuit, the same clock signal is often used to control multiple stages of shift register units, for example, for a TCK shift register circuit, the T-th stage clock signal will control the T + Tm stage of shift register units, where m is an integer greater than or equal to zero, and T is the total number of clock signal sources. The third terminal of the output module 112 outputs a scan signal g (n), wherein the scan signal g (n) is used to drive the corresponding sub-pixel row. The first end of the reset module 113 is connected to the pull-up point of the current stage of the shift register unit, the second end of the reset module 113 is connected to the third end of the output module 112, the third end of the reset module 113 is connected to the low level signal source, and the fourth end of the reset module 113 receives the reset signal pd (n) of the current stage of the shift register unit. Under the control of the reset signal pd (n), the reset module 113 is turned on or off, and when the reset module 113 is in an on state, the low level signal VSS output by the low level signal source pulls down the pull-up point and the scan signal output end to be reset to a low level state, so that the scan signal is reset to an off state after being turned on, thereby implementing the progressive scan driving.
In order to reduce the precharge time required for precharging the pull-up point of the shift register unit of the current stage, the pull-up signal PU (n-j) of the pull-up point of the previous stage shift register unit is used as the first feedback signal, i.e., the precharge signal st (n) of the shift register unit of the current stage. When the pull-up signal PU (n-j) is in a high level state, the charging module is turned on, and the pull-up point of the shift register unit of the current stage is precharged. Accordingly, the higher the high level of the precharge signal, the faster the precharge, and the less precharge time is required. Since the high level of the pull-up signal PU (n-j) is usually twice as high as the second high level of the pull-up signal or the high level of the scan signal, the use of the pull-up signal PU (n-j) as the pre-charge signal is beneficial to reducing the required pre-charge time, thereby optimizing the waveform of the generated scan signal and improving the display effect of the display device.
In this embodiment, the shift register circuit includes a plurality of cascaded shift register units, and each shift register unit includes a charging module 111, so as to pre-charge a pull-up point of the shift register unit. The pre-charge signal input terminal of the charge module 111 is electrically connected to the pull-up point of the pre-stage shift register unit, and when the pull-up point of the pre-stage shift register unit is pre-charged, the pull-up signal of the pull-up point of the pre-stage shift register unit is at a high level state. Because the high level of the pull-up signal of the preceding stage shift register unit is about twice as large as the second high level of the pull-up signal or the high level of the scan signal, the pull-up signal of the preceding stage shift register unit is used as the pre-charge signal of the present stage shift register unit, which is beneficial to reducing the required pre-charge time, optimizing the waveform of the scan signal generated by the present stage shift register unit, and improving the display effect of the display device.
Based on the above embodiments, in another embodiment of the present invention, as shown in fig. 5, the charging module includes a first switch device T1, a gate of the first switch device T1 is electrically connected to the precharge signal input terminal, a drain of the first switch device T1 is electrically connected to the scan signal output terminal of the previous stage shift register unit or the high level signal source, and a source of the first switch device T1 is electrically connected to the pull-up point of the present stage shift register unit.
Fig. 6 is a timing diagram of a specific example of a 4CK shift register circuit, where j is 1, that is, the pull-up signal of the previous stage shift register unit is used as the pre-charge signal of the present stage shift register unit. Taking the case of generating the second-stage scanning signal G (2) as an example, when the pull-up point of the second-stage shift register unit is precharged, the first-stage pull-up signal PU (1) is in a high level state, and at this time, the first switch device T1 is turned on, and correspondingly, the source and drain electrodes of the first switch device are communicated, so that the pull-up point of the second-stage shift register unit is precharged by the first-stage scanning signal G (1) or the high level signal VDD, and the pull-up signal PU (2) of the second-stage pull-up point reaches a second high level state. In particular, when the drain of the first switching device T1 is electrically connected to the high level signal source, the precharge effect on the pull-up point of the second stage tends to be better because the waveform of the high level signal VDD is easier to control than the waveform of the first stage scan signal G (1). The output module 112 of the second stage shift register unit receives the second stage clock signal CK (2), and when the second stage clock signal CK (2) is in a high level state, the second stage clock signal CK is coupled to the pull-up point of the second stage shift register unit under the action of the parasitic capacitor or the coupling capacitor, so that the level of the pull-up signal PU (2) of the second stage shift register unit is further raised to a high level, and at this time, the output module 112 of the second stage shift register unit is turned on, and generates a high level of the second stage scanning signal G (2) under the action of the second stage clock signal CK (2). Then, the second stage scan signal G (2) is reset to a low level state by the reset module 113 of the second stage shift register unit. When the pull-up signal is in the high level state, the level of the pull-up signal is about twice the level of the next high level state of the pull-up signal or the high level state of the scan signal, so that the first switching device T1 is more fully opened, and the turn-on performance of the charging module 111 is better, so as to reduce the pre-charging time required for pre-charging the pull-up point, further improve the waveform of the generated scan signal, and optimize the display effect of the display device.
In another embodiment of the present invention, as shown in fig. 7, the charging module includes a second switching device T2 and a third switching device T3, a gate of the second switching device T2 is electrically connected to a scan signal output terminal of the pre-stage shift register unit or a pull-up point of the pre-stage shift register unit, and a drain of the second switching device T2 is electrically connected to a scan signal output terminal of the pre-stage shift register unit or a high-level signal source; the grid electrode of the third switching device T3 is electrically connected with the pre-charging signal input end, the drain electrode of the third switching device T3 is electrically connected with the source electrode of the second switching device T2, and the source electrode of the third switching device T3 is electrically connected with the pull-up point of the shift temporary storage unit at the current stage; when the pull-up point of the current stage shift register unit is precharged, the scanning signal output by the scanning signal output end of the previous stage shift register unit is in a high level state.
In this embodiment, the charging module includes a second switch device T2 and a third switch device T3, where a specific value of j is related to a timing sequence in the shift register circuit, when the previous stage pull-up signal PU (n-j) is in a high level state, the third switch device T3 is in a conducting state, meanwhile, the second switch device T2 is also in a conducting state under the high level of the previous stage scan signal G (n-j) or the high level of the previous stage pull-up signal PU (n-j), and a drain of the second switch device T2 is connected to a pull-up point of the current stage shift register unit, so as to pre-charge the pull-up point under the action of the previous stage scan signal G (n-j) or the high level signal VDD. Since the third switching device T3 is opened more thoroughly by the pull-up signal of the preceding stage, its turn-on performance is better, which is beneficial to reducing the required charging time, improving the waveform of the generated scan signal, and further improving the display effect of the display apparatus.
In the above embodiments of the present invention, as shown in fig. 4, fig. 5 and fig. 7, the shift register circuit further includes an output module 112, the output module 112 includes a fourth switching device T4, a gate of the fourth switching device T4 is electrically connected to the pull-up point of the shift register unit of the present stage, a drain of the fourth switching device T4 is electrically connected to the clock signal source, and a source of the fourth switching device T4 is electrically connected to the scan signal output terminal of the shift register unit of the present stage. When the fourth switching device T4 is turned on by the coupling action of the pull-up signal pu (n) and the clock signal ck (n), the source and drain of the fourth switching device T4 are connected, so as to generate the high level of the scan signal g (n) by the high level of the clock signal ck (n).
In addition, as shown in fig. 5 and 7, the shift register unit further includes a coupling capacitor C connected between the pull-up point of the shift register unit and the scan signal output terminal. By providing the coupling capacitor C, the clock signal ck (n) is better coupled to the pull-up point of the shift register unit of the current stage, so as to further increase the level of the high level state of the pull-up signal pu (n), so that the turn-on performance of the fourth switching device T4 is better, and the waveform of the generated scan signal g (n) is optimized.
As shown in fig. 4, 5 and 7, in the above embodiment of the present invention, the shift register circuit further includes a reset module 113, where the reset module 113 includes a fifth switching device T5 and a sixth switching device T6, a gate of the fifth switching device T5 is electrically connected to a pull-down point of the shift register unit of the current stage, a drain of the fifth switching device T5 is electrically connected to a scan signal output terminal of the shift register unit of the current stage, and a source of the fifth switching device T5 is electrically connected to a low-level signal source; the gate of the sixth switching device T6 is electrically connected to the pull-down point of the shift register unit of the current stage, the drain of the sixth switching device T6 is electrically connected to the pull-up point of the shift register unit of the current stage, and the source of the sixth switching device T6 is electrically connected to the low level signal source. Under the action of the reset signal pd (n) at the pull-down point of the shift register unit of the present stage, the fifth switching device T5 and the sixth switching device T6 are controlled to be turned on and off. Specifically, when the reset signal pd (n) is in a high level state, the fifth switching device T5 and the sixth switching device T6 are both in a conducting state, so that the pull-up point and the scanning signal output end are reset to a low level state under the action of the low level signal VSS respectively, so as to implement progressive scanning of the display device.
In one embodiment, the pull-down point of the shift register unit is electrically connected to the scan signal output terminal of the next shift register unit. That is, the scanning signal G (n + p) of the next stage of shift register unit is used as the second feedback signal as the reset signal of the present stage of shift register unit. The specific value of p is related to the timing sequence in the shift register circuit, and is not described herein again.
In another specific example, the pull-down point of the shift register unit is electrically connected to the pull-up point of the next-stage shift register unit, that is, the pull-up signal PU (n + q) of the next-stage shift register unit is used as the second feedback signal, which is used as the reset signal of the present-stage shift register unit, because the high level of the pull-up signal PU (n + q) is usually greater than the high level of the scan signal G (n + p), it is beneficial to quickly reset the pull-up point and the scan signal output end of the present-stage shift register unit to the low level state, so as to avoid the tailing of the scan signal, and further improve the display effect of the display device. The specific value of q is related to the timing sequence in the shift register circuit, and is not described herein again.
As shown in fig. 5 and fig. 7, in the above embodiment of the present invention, the shift register unit further includes a voltage stabilizing module 114, a first end of the voltage stabilizing module 114 is electrically connected to the voltage stabilizing signal source, a second end of the voltage stabilizing module 114 is electrically connected to the scan signal output end of the shift register unit of the current stage, a third end of the voltage stabilizing module 114 is electrically connected to the pull-up point of the shift register unit of the current stage, a fourth end of the voltage stabilizing module 114 is electrically connected to the low level signal source, and the voltage stabilizing module 114 resets the scan signal output end and the pull-up point to the low level state under the control of the voltage stabilizing signal, so as to eliminate the interference of the timing noise caused by the multi-clock.
Specifically, the voltage stabilizing module 114 includes a pull-down sub-module and a pull-down control sub-module, the pull-down sub-module is configured to maintain the pull-up point of the shift register unit and the scan signal output end at a low level state at a preset time, and the pull-down control sub-module is configured to control the operation of the pull-down sub-module. The entire voltage stabilizing module 114 can operate under the control of the low frequency voltage stabilizing signal to eliminate timing noise and improve the display effect of the display device.
Of course, the voltage regulation module 114 may also include a first voltage regulation sub-module and a second voltage regulation sub-module. The first end of the first voltage stabilizing submodule is electrically connected with a low-frequency voltage stabilizing signal source so as to receive a low-frequency voltage stabilizing signal P1 (n); the second end of the first voltage stabilizing submodule is electrically connected with the scanning signal output end of the current-stage shift temporary storage unit and pulls the scanning signal output end down to a low level; the third end of the first voltage stabilizing submodule is electrically connected with a pull-up point of the current-stage shift temporary storage unit so as to pull down the pull-up point to a low level; and the fourth end of the first voltage stabilizing sub-module is electrically connected with a low-level signal source so as to receive a low-level signal VSS. When a low-frequency voltage-stabilizing signal P1(n) generated by the low-frequency voltage-stabilizing signal source is at a high level, the first voltage-stabilizing submodule is communicated with the pull-up point, the scanning signal output end and the low-level signal source so as to eliminate timing noise of the pull-up point and the scanning signal output end. Similarly, the first end of the second voltage-stabilizing submodule is electrically connected with the high-frequency voltage-stabilizing signal source to receive a high-frequency voltage-stabilizing signal P2 (n); the second end of the second voltage stabilizing submodule is electrically connected with the scanning signal output end of the current-stage shift temporary storage unit and pulls the scanning signal output end down to a low level; the third end of the second voltage stabilizing submodule is electrically connected with the pull-up point of the current-stage shift temporary storage unit so as to pull down the pull-up point to a low level; and the fourth end of the second voltage stabilizing sub-module is electrically connected with the low-level signal source so as to receive the low-level signal VSS. When a high-frequency voltage-stabilizing signal P2(n) generated by the high-frequency voltage-stabilizing signal source is at a high level, the second voltage-stabilizing submodule is communicated with the pull-up point, the scanning signal output end and the low-level signal source so as to eliminate timing noise of the pull-up point and the scanning signal output end. By designing the corresponding time sequences of the low-frequency voltage-stabilizing signal P1(n) and the high-frequency voltage-stabilizing signal P2(n), the low-frequency voltage-stabilizing signal P1(n) and the high-frequency voltage-stabilizing signal P2(n) are both in a high level state at the moment when timing noise possibly occurs in the shift register unit, so that the scanning signal output end and the pull-up point are pulled down to a low level state, rapid discharge of the scanning signal output end and the pull-up point is realized, the timing noise is thoroughly eliminated, and the normal operation of the display device is guaranteed.
The present invention further provides a display device, as shown in fig. 3, the display device includes a display panel and a driving unit, the driving unit is configured to drive the display of the display panel, the driving unit includes a shift register circuit 110, and the specific structure of the shift register circuit 110 refers to the above embodiments. The shift register circuit is a gate drive integrated circuit on the array substrate, so that material cost and process cost are reduced, and meanwhile, the light and thin and narrow frame of the display device are realized.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (8)
1. A shift temporary storage circuit is characterized by comprising a plurality of stages of shift temporary storage units which are arranged in a cascade mode, wherein each shift temporary storage unit comprises a charging module, a pre-charging signal input end of the charging module is electrically connected with a pull-up point of a preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, a pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state;
the charging module includes:
a gate of the second switching device is electrically connected with a scanning signal output end of the preceding stage shift temporary storage unit or a pull-up point of the preceding stage shift temporary storage unit, and a drain of the second switching device is electrically connected with a scanning signal output end of the preceding stage shift temporary storage unit or a high-level signal source;
a grid electrode of the third switching device is electrically connected with the pre-charging signal input end, a drain electrode of the third switching device is electrically connected with a source electrode of the second switching device, and a source electrode of the third switching device is electrically connected with a pull-up point of the shift temporary storage unit at the current stage;
when the pull-up point of the current stage shift register unit is precharged, the scanning signal output by the scanning signal output end of the previous stage shift register unit is in a high level state.
2. The shift register circuit of claim 1, further comprising an output module, said output module comprising:
and the grid electrode of the fourth switching device is electrically connected with the pull-up point of the shift temporary storage unit at the current stage, the drain electrode of the fourth switching device is electrically connected with a clock signal source, and the source electrode of the fourth switching device is electrically connected with the scanning signal output end of the shift temporary storage unit at the current stage.
3. The shift register circuit of claim 1, further comprising a reset module, the reset module comprising:
a grid electrode of the fifth switching device is electrically connected with a pull-down point of the shift temporary storage unit of the current stage, a drain electrode of the fifth switching device is electrically connected with a scanning signal output end of the shift temporary storage unit of the current stage, and a source electrode of the fifth switching device is electrically connected with a low level signal source;
and the grid electrode of the sixth switching device is electrically connected with the pull-down point of the current-stage shift temporary storage unit, the drain electrode of the sixth switching device is electrically connected with the pull-up point of the current-stage shift temporary storage unit, and the source electrode of the sixth switching device is electrically connected with the low-level signal source.
4. The shift register circuit of claim 3, wherein the pull-down point of the shift register unit is electrically connected to the scan signal output terminal of the next shift register unit; or the pull-down point of the shift temporary storage unit is electrically connected with the pull-up point of the post-stage shift temporary storage unit.
5. The shift register circuit of claim 1, wherein said shift register unit further comprises:
and the coupling capacitor is connected between the pull-up point of the shift temporary storage unit at the current stage and the scanning signal output end.
6. The shift register circuit of any of claims 1-5, wherein the shift register unit further comprises:
the first end of the voltage stabilizing module is electrically connected with a voltage stabilizing signal source, the second end of the voltage stabilizing module is electrically connected with the scanning signal output end of the current-stage shift temporary storage unit, the third end of the voltage stabilizing module is electrically connected with the pull-up point of the current-stage shift temporary storage unit, the fourth section of the voltage stabilizing module is electrically connected with a low level signal source, and the voltage stabilizing module pulls down the scanning signal output end and the pull-up point to a low level state under the control of a voltage stabilizing signal.
7. The utility model provides a shift temporary storage circuit, its characterized in that, shift temporary storage circuit is including the multistage shift temporary storage unit that cascades the setting, shift temporary storage unit is including charging module, output module, module and voltage stabilizing module reset, wherein:
the pre-charging signal input end of the charging module is electrically connected with the pull-up point of the preceding stage shift temporary storage unit, and when the pull-up point of the current stage shift temporary storage unit is pre-charged, the pull-up signal of the pull-up point of the preceding stage shift temporary storage unit is in a high level state;
the charging module includes:
a gate of the second switching device is electrically connected with a scanning signal output end of the preceding stage shift temporary storage unit or a pull-up point of the preceding stage shift temporary storage unit, and a drain of the second switching device is electrically connected with a scanning signal output end of the preceding stage shift temporary storage unit or a high-level signal source;
a grid electrode of the third switching device is electrically connected with the pre-charging signal input end, a drain electrode of the third switching device is electrically connected with a source electrode of the second switching device, and a source electrode of the third switching device is electrically connected with a pull-up point of the shift temporary storage unit at the current stage;
when the pull-up point of the current stage shift register unit is precharged, the scanning signal output by the scanning signal output end of the previous stage shift register unit is in a high level state.
8. A display device, characterized in that the display device comprises:
a display panel; and
the driving unit comprises the shift register circuit as claimed in any one of claims 1 to 7, wherein the shift register circuit is a gate driver integrated circuit on an array substrate.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105528988A (en) * | 2016-02-15 | 2016-04-27 | 京东方科技集团股份有限公司 | Gate driving circuit, touch control display panel and display device |
| CN205595037U (en) * | 2016-05-13 | 2016-09-21 | 合肥鑫晟光电科技有限公司 | Shifting register, grid driving circuit and display device |
Family Cites Families (6)
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| CN104167192B (en) * | 2014-07-22 | 2017-01-18 | 京东方科技集团股份有限公司 | Shift register unit, gate drive circuit and display device |
| CN105427824B (en) * | 2016-01-05 | 2016-11-30 | 京东方科技集团股份有限公司 | There is GOA circuit, array base palte and the display floater of electric leakage compensating module |
| CN205582492U (en) * | 2016-04-08 | 2016-09-14 | 京东方科技集团股份有限公司 | Shift register , display substrates and display device |
| CN107833552B (en) * | 2017-11-17 | 2020-09-25 | 合肥鑫晟光电科技有限公司 | Gate driving unit, gate driving circuit, driving method of gate driving circuit and display device |
| CN107945759B (en) * | 2018-01-02 | 2021-01-22 | 京东方科技集团股份有限公司 | Shifting register unit, grid driving circuit and display device |
| CN108470535A (en) * | 2018-06-11 | 2018-08-31 | 京东方科技集团股份有限公司 | A kind of shift register, its driving method and gate driving circuit, display device |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105528988A (en) * | 2016-02-15 | 2016-04-27 | 京东方科技集团股份有限公司 | Gate driving circuit, touch control display panel and display device |
| CN205595037U (en) * | 2016-05-13 | 2016-09-21 | 合肥鑫晟光电科技有限公司 | Shifting register, grid driving circuit and display device |
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