CN108710404A - A kind of mixed signal generator - Google Patents
A kind of mixed signal generator Download PDFInfo
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- CN108710404A CN108710404A CN201810500621.4A CN201810500621A CN108710404A CN 108710404 A CN108710404 A CN 108710404A CN 201810500621 A CN201810500621 A CN 201810500621A CN 108710404 A CN108710404 A CN 108710404A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/022—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
Abstract
This application discloses a kind of mixed signal generators, including：Module occurs for Clock management module, bus control module, Wave data memory module and mixed signal, Clock management module occurs module with bus control module and mixed signal respectively and is connected, receive reference clock, work clock needed for the high-frequency clock and work clock and bus control module and Wave data memory module of generation mixed signal generation module；For host computer and mixed signal the communication between module occurs for bus control module, and real time parsing simultaneously handles instruction, address and Wave data that host computer is sent to mixed signal generation module；Wave data memory module is connected with bus control module, the data information of stored waveform signal；Mixed signal occurs module and is connected with Wave data memory module, and the data information of the waveform signal based on the storage of Wave data memory module exports mixed signal.The application can effectively export mixed signal.
Description
Technical field
The application belongs to signal generator technical field more particularly to a kind of mixed signal generator.
Background technology
Signal generator plays important role in daily life, in fields such as wireless communication, radar, quantum calculations
It has a wide range of applications.The frequency for controlling and receiving and sending in wireless communications, realizes the generation of various modulated signals；In radar
Field needs the Frequency Hopping Signal for generating strong antijamming capability；In quantum calculation field, the manipulation of quantum bit is needed using frequency
The adjustable signal of rate high resolution, frequency.
Common signal generator includes the signal generator for being based on PLL (Phase Locked Loop, phaselocked loop), adopts
With signal generator, the arbitrary waveform generator etc. of DDS (Direct Digital Synthesis, direct digital synthesizers) chip
Deng.Based on the signal generator of PLL by the negative feedback control of closed loop, in conjunction with frequency multiplication, frequency splitting technology so that output signal frequency
There are determining mathematical relationship, the phase of output signal and reference signal to have determining relationship with reference signal frequency, it can be with
The simple signal that stability is high, phase noise is small is generated, but there is also can not accurately and fast adjust rate-adaptive pacemaker.
DDS chips construct the digital waveform of output signal in real time, through DAC (Digital-to-Analog Converter, number
Analog converter) output analog signal, output signal frequency switch speed is fast, frequency modulation band is roomy, but generates complicated wave form more
The frequency number of difficult, storage switching is few.Common arbitrary waveform generator uses Direct Model, by the digital wave of storage
Shape is output to DAC and obtains analog signal point by point, can generate the signal of substantially any waveform, but waveform length is limited to storage and holds
Amount, by 2.8GHz sample rates, 14bit resolution ratio AD9129 for, the DDR3 memory capacity of 4GB is only capable of storage about 2.285G
Sampling point can play 0.816s.Nowadays, with the development of technology, some arbitrary waveform generator have been also equipped with real using DDS
When generate the abilities of some simple wave forms.
Currently, the AD9914 for the DDS chip 3.5GHz sample rates that Analog Devices companies release, provides single-tone mould
Formula, modulating mode, linear scan pattern, frequency-hopping mode, internal register meet 8 kinds of frequency/phase configurations, support universal serial bus
Or high-speed parallel port is realized more to the frequency register write frequency word of chip interior, then by I/O_UPDATE pin set
Newly.Integrated DDS chips, the switch speed of frequency is fast, and waveform is continuous.But in the type of output signal, it is limited to have mould
The type of formula is more difficult when exporting complicated wave form.In addition, under arbitrary waveform generator framework disclosed in the prior art
Signal generator, by SRAM (Static Random-Access Memory, static RAM) stored waveform,
The output for realizing random waveform, can export a variety of user-defined signals, but waveform length is limited to the capacity of memory.
Invention content
In view of this, this application provides a kind of mixed signal generator, the parameter of fixed storage space can be used to carve
Waveform is drawn, Wave data word is decoded in real time and generates hybrid waveform, and then export mixed signal, the corresponding number of storage can be compressed
Space needed for character waveform, waveform length is limited to asking for memory capacity when evading arbitrary waveform generator output as much as possible
Topic.
This application provides a kind of mixed signal generators, including：Clock management module, bus control module, waveform number
Module occurs according to memory module and mixed signal, wherein：
The Clock management module occurs module with the bus control module and mixed signal respectively and is connected, for receiving
Reference clock, generate the mixed signal occur module high-frequency clock and work clock and the bus control module and
Work clock needed for the Wave data memory module；
The bus control module occurs module with host computer and mixed signal respectively and is connected, and is mixed with described for host computer
The communication between signal generating module is closed, real time parsing simultaneously handles the finger that host computer is sent to the mixed signal generation module
It enables, address and Wave data；
The Wave data memory module is connected with the bus control module, and the data for stored waveform signal are believed
Breath；
The mixed signal occurs module and is connected with the Wave data memory module, is deposited for being based on the Wave data
The data information for storing up the waveform signal of module storage exports mixed signal.
Preferably, the mixed signal generation module includes：The digital-to-analogue conversion of hybrid waveform generation module and high speed
Module；Wherein：
The hybrid waveform generation module and the bus control module, the digital mould of Wave data memory module and high speed
Quasi- conversion module is connected, and the data information for the waveform signal to being stored in the Wave data memory module is decoded reality
The waveform of Shi Shengcheng mixed signals；
The digital-to-analogue conversion module of the high speed, the wave of the mixed signal for being generated based on hybrid waveform generation module
Shape exports mixed signal.
Preferably, the digital-to-analogue conversion module of the high speed includes：Parallel serial conversion module and digital analog converter,
In：
The parallel serial conversion module, for the waveform coding of the mixed signal to be sent to the number to higher frequency
Word analog converter；
The digital analog converter exports mixed signal for the waveform based on the mixed signal received.
Preferably, the Wave data memory module is that the data based on BRAM inside FPGA and outside DDR3 store mould
Block.
Preferably, the hybrid waveform generation module includes：The adjustable single-frequency waveform life of multiple amplitudes, frequency, phase
At module.
Preferably, the single-frequency waveform generating module includes：DDS units and DSP multiplication units.
Preferably, the DDS units include：Phase accumulator, phase addition device and phase-magnitude look-up table.
In conclusion this application discloses a kind of mixed signal generators, including：Clock management module, bus marco mould
Module occurs for block, Wave data memory module and mixed signal, wherein：Clock management module respectively with bus control module and mixed
Signal generating module is closed to be connected, for receiving reference clock, the high-frequency clock and work clock of module occur for generation mixed signal,
And the work clock needed for bus control module and Wave data memory module；Bus control module respectively with host computer and mixed
It closes signal generating module to be connected, the communication between module occurs for host computer and mixed signal, real time parsing is simultaneously handled upper
Machine is sent to instruction, address and the Wave data that module occurs for mixed signal；Wave data memory module and bus control module
Be connected, be used for stored waveform signal data information；Mixed signal occurs module and is connected with Wave data memory module, is used for
The data information of waveform signal based on the storage of Wave data memory module exports mixed signal.Fixed storage space can be used
Parameter portray waveform, in real time decode Wave data generate hybrid waveform, and then export mixed signal, storage phase can be compressed
The space needed for digital waveform answered, waveform length is limited to memory capacity when evading arbitrary waveform generator output as much as possible
The problem of.
Description of the drawings
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is a kind of structural schematic diagram of mixed signal generator embodiment 1 disclosed in the present application；
Fig. 2 is a kind of structural schematic diagram of mixed signal generator embodiment 2 disclosed in the present application；
Fig. 3 is the structural schematic diagram that module occurs for mixed signal disclosed in the present application；
Fig. 4 is the Wave data word schematic diagram of single-frequency waveform disclosed in the present application；
Fig. 5 is the structural schematic diagram of single-frequency waveform generating module disclosed in the present application；
Fig. 6 is the structural schematic diagram that single-frequency waveform disclosed in the present application generates submodule；
Fig. 7 is phase-magnitude look-up table schematic diagram disclosed in the present application.
Specific implementation mode
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
As shown in Figure 1, being a kind of structural schematic diagram of mixed signal generator embodiment 1 disclosed in the present application, this mixing
Signal generator may include that mould occurs for Clock management module, bus control module, Wave data memory module and mixed signal
Block, wherein：
Clock management module occurs module with bus control module and mixed signal respectively and is connected, when for receiving reference
Clock, the high-frequency clock and work clock and bus control module and Wave data of generation mixed signal generation module store mould
Work clock needed for block；
Bus control module occurs module with host computer and mixed signal respectively and is connected, and is sent out for host computer and mixed signal
Communication between raw module, real time parsing simultaneously handle instruction, address and waveform that host computer is sent to mixed signal generation module
Data；
Wave data memory module is connected with bus control module, is used for the data information of stored waveform signal；
Mixed signal occurs module and is connected with Wave data memory module, for what is stored based on Wave data memory module
The data information of waveform signal exports mixed signal.
The operation principle of mixed signal generator disclosed in above-described embodiment is：
When step (1) original state, mixed signal generator is sent without any operation, waiting host computer under this state
Instruction then enters step (2), otherwise rests on step (1)；
Step (2) receives the control command that host computer is sent out, and entry instruction judges, if it is determined that the instruction of mistake is then returned
Step (1) is returned, is judged as that Wave data write instruction then enters step (3), is judged as that playing presetting instruction then enters step
(4), it is judged as that playing waveform then enters step (5)；
The Wave data received from host computer is written to Wave data memory module 13 by step (3), after write-in,
Data are read back inspection, if inspection result is correct, return to step (1) is again introduced into step (3) if mistake；
Step (4) plays out presetting, is divided into two parts, when selection triggering pattern or continuous play mode,
Second is that storing the segmentation of data, the setting of Wave data decoding process in Wave data memory module 13；
Step (5) broadcasting starts, and the broadcasting which can be in automatic read step (4) is presetting, then according to presetting
In decoding process read step (3) in the storage data that have been written into, generate waveform in real time, digital waveform passed through to mix and is believed
Number occur module 14 export mixed signal.If having in playing process, new command enters or broadcasting content is played to be finished, can
Return to step (1).
In conclusion in the above-described embodiments, the parameter of fixed storage space can be used to portray waveform, decoded in real time
Wave data generates hybrid waveform, and then exports mixed signal, can compress the space stored needed for corresponding digital waveform, to the greatest extent
The problem of waveform length is limited to memory capacity when possibly evading arbitrary waveform generator output.
As shown in Fig. 2, being a kind of structural schematic diagram of mixed signal generator embodiment 2 disclosed in the present application, this mixing
Signal generator may include that mould occurs for Clock management module, bus control module, Wave data memory module and mixed signal
Block, wherein：Module occurs for mixed signal：The digital-to-analogue conversion module of hybrid waveform generation module and high speed；High speed
Digital-to-analogue conversion module includes：Parallel serial conversion module and digital analog converter, wherein：
Clock management module occurs module with bus control module and mixed signal respectively and is connected, when for receiving reference
Clock, the high-frequency clock and work clock and bus control module and Wave data of generation mixed signal generation module store mould
Work clock needed for block；
Bus control module occurs module with host computer and mixed signal respectively and is connected, and is sent out for host computer and mixed signal
Communication between raw module, real time parsing simultaneously handle instruction, address and waveform that host computer is sent to mixed signal generation module
Data；
Wave data memory module is connected with bus control module, is used for the data information of stored waveform signal；
Mixed signal occurs module and is connected with Wave data memory module, for what is stored based on Wave data memory module
The data information of waveform signal exports mixed signal；
The digital-to-analogue conversion mould of hybrid waveform generation module and bus control module, Wave data memory module and high speed
Block is connected, and the data information for the waveform signal to being stored in Wave data memory module is decoded generates mixing letter in real time
Number waveform；
The waveform of the digital-to-analogue conversion module of high speed, the mixed signal for being generated based on hybrid waveform generation module is defeated
Go out mixed signal；
Parallel serial conversion module, for the waveform coding of mixed signal to be sent to digital-to-analogue conversion to higher frequency
Device；
Digital analog converter exports mixed signal for the waveform based on the mixed signal received.
Specifically, in the above-described embodiments, bus control module can be：Usb bus control module, pci bus control
Module, PXI bus control modules or network interface bus control module etc..
Specifically, in the above-described embodiments mixed signal occur module one of which structural schematic diagram as shown in figure 3, with
For Virtex-7FPGA, the frequency limit of system work clock is within 400MHz, when DAC sampling rates are to GHz, needs
The Wave data generated under FPGA system clock is passed through into parallel-serial conversion, higher frequency is encoded to and is transmitted again to DAC.
The core technology that module is the application occurs for mixed signal, as shown in figure 3, equal using multiple amplitudes, frequency, phase
Adjustable single-frequency waveform generating module generates single-frequency waveform in real time, is added the hybrid waveform for generating and including multiple frequency components, leads to
It crosses parallel serial conversion module the digital waveform of generation is encoded to higher frequency and be sent to DAC, and then mixing letter is exported by DAC
Number.
Map parameter L, N, K, L is the number of frequency component, and N is the resolution ratio of DAC, and K is the sample rate and system work of DAC
Make the ratio of clock.For parallel serial conversion module, K or K/2 are its conversion ratios, need the framework for considering DAC, when DAC is used
When alternating sampling mode obtains Wave data (such as AD9129), two groups of N bit data inputs are had, at this moment using K/2's
Parallel-serial conversion ratio；When DAC only has the input of one group of N bit data (such as AD9139, AD9161/2), at this moment using K's and
String conversion ratio.In the present implementation, AD9129 is used as DAC, this three parameters are set as：L takes 4, N that 14, K is taken to take
16, parallel-serial conversion ratio is 8.In this application, the frequency of high-frequency clock is 700MHz, and the frequency of system clock is 175MHz.
Specifically, in the above-described embodiments, the schematic diagram of the Wave data word of single-frequency waveform is as shown in figure 4, for single
Frequency component, effective information are：Amplitude, frequency, initial phase, reproduction time, wherein amplitude, frequency and initial phase are waveform
Form parameter, reproduction time are waveform length parameter, this four parameters can be fully described by one section of sine waveform.Monochromatic
Wave data word such as Fig. 4 of shape shows that each frequency component occupies the data of 128bit (i.e. 16B)：The amplitude of 16bit, 32bit
The range of frequency and initial phase, frequency and initial phase is 0 to 2 π indicated with 32bit, for the sine wave in reproduction time
The generation of waveform；The reproduction time lowest order of 48bit corresponds to a clock cycle of DAC sampling clocks, in the reality of the present invention
It is 357ps in existing, therefore reproduction time reaches as high as 54 points of clock cycle i.e. 27 hour of 256T DAC sampling clock.
Specifically, in the above-described embodiments, the structure chart of single-frequency waveform generating module is as shown in figure 5, the data transfer rate of DAC is
DAC sample rates × N bit, it is clear that in the application of high-speed DAC, a clock cycle of the system clock within 400MHz is only
The data for generating a N bit, are the demands for the data transfer rate that cannot meet DAC.Therefore, it is necessary in a system clock cycle
Data that are lower while generating K × N bit could meet.The parallel processing of submodule, which is generated, by K single-frequency waveform realizes one
Clock cycle generates the data of K × N bit.
Specifically, in the above-described embodiments, single-frequency waveform generates the structure chart of submodule as shown in fig. 6, the waveform generated
In data, the time that three reproduction time parameter span of control limit of control, frequency, initial phase parameters come into force, these three parameters only need by
DDS units, the DSP multiplication units of pipeline system can be obtained K N bit digital waveform.The effect of two modules is respectively：
DDS units generate DDS waveforms using frequency, phase；Multiplication unit, which does DDS waveforms with amplitude control words with DSP, to be multiplied, real
The digital waveform of output has been done while now amplitude is adjustable and has been blocked to match the digit of DAC.
Specifically, as shown in fig. 7, for phase-magnitude look-up table disclosed in the present application diagram, inside DDS units, it is divided into phase
Three bit accumulator, phase addition device, phase-magnitude look-up table parts, three parts synergistic effect realize frequency, initial phase to just
The real-time transform of string waveform.Phase accumulator does accumulation operations to frequency control word, generates the accumulation result of frequency；Phase addition
The accumulation result of frequency is added by device with initial phase, generates current phase；If Fig. 7 shows, phase-magnitude look-up table by searching for
Current phse conversion is obtained the range value of the SIN function corresponding to current phase by table, and current phase is in each clock week
Phase is cumulative, and obtained amplitude can also correspond to a tracks of line voltage.In addition, it is necessary to explanation, above-mentioned phase-width
The SIN function that degree look-up table uses is the one of which realization method of the application, and phase-magnitude look-up table can also be it
His functional form, for example, having done the logarithm blocked and exponential function, white Gaussian noise function, triangular wave, sawtooth wave etc..
That is the mixing that phase-magnitude look-up table is not limited to multiple adjustable and quick switchable sine wave when realizing is defeated
Go out.
In conclusion the application realizes a kind of mixed signal generator, Ke Yi on Virtex-7FPGA and AD9129
Multiple applications such as nuclear-magnetism, radar, electrical impedance imaging, quantum calculation.The application by the high-performance of Virtex-7FPGA with
The tupe of parallelization, the high-resolution and high sampling rate of AD9129 high-speed DACs realize the width for generating frequency component in real time
Degree, frequency, phase, reproduction time, which are adjusted hybrid waveform and export, obtains mixed signal.
Compared to common arbitrary waveform generator, the parameter of the mechanism and fixed storage space of waveform is generated in real time,
The space stored needed for corresponding digital waveform can be compressed under normal circumstances, and 4 frequency components are used in the application realization
Mixed signal, under the reproduction time of 48bit, the memory space of 64B can at most generate the data of 448TB, that is,
256T sampling point, can play 27 hours 54 points.Scalability is good, the increase of the frequency component number of mixed signal, waveform number
It can be realized by the flexibility of the repeatable configurations of FPGA according to the increasing for digit of word.The amplitude of frequency component, frequency, phase,
Reproduction time is adjustable.The switch speed of frequency component is fast, and update minimum interval is in sub- ns magnitudes.Between frequency component update is minimum
It is divided into the clock cycle of system clock, is 357ps in the present implementation.The frequency resolution height of frequency component, frequency modulation band
It is roomy.
Each embodiment is described by the way of progressive in this specification, the highlights of each of the examples are with other
The difference of embodiment, just to refer each other for identical similar portion between each embodiment.For device disclosed in embodiment
For, since it is corresponded to the methods disclosed in the examples, so description is fairly simple, related place is said referring to method part
It is bright.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure
And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These
Function is implemented in hardware or software actually, depends on the specific application and design constraint of technical solution.Profession
Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered
Think to exceed scope of the present application.
The step of method described in conjunction with the examples disclosed in this document or algorithm, can directly be held with hardware, processor
The combination of capable software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only deposit
Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technology
In any other form of storage medium well known in field.
The foregoing description of the disclosed embodiments enables professional and technical personnel in the field to realize or use the application.
Various modifications to these embodiments will be apparent to those skilled in the art, as defined herein
General Principle can in other embodiments be realized in the case where not departing from spirit herein or range.Therefore, the application
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest range caused.
Claims (7)
1. a kind of mixed signal generator, which is characterized in that including：Clock management module, bus control module, Wave data are deposited
It stores up module and module occurs for mixed signal, wherein：
The Clock management module occurs module with the bus control module and mixed signal respectively and is connected, for receiving reference
Clock generates module occurs for the mixed signal high-frequency clock and work clock and the bus control module and described
Work clock needed for Wave data memory module；
The bus control module occurs module with host computer and mixed signal respectively and is connected, and letter is mixed with described for host computer
Number occur the communication between module, real time parsing and handle host computer be sent to the mixed signal occur module instruction,
Location and Wave data；
The Wave data memory module is connected with the bus control module, is used for the data information of stored waveform signal；
The mixed signal occurs module and is connected with the Wave data memory module, for storing mould based on the Wave data
The data information of the waveform signal of block storage exports mixed signal.
2. mixed signal generator according to claim 1, which is characterized in that the mixed signal occurs module and includes：
The digital-to-analogue conversion module of hybrid waveform generation module and high speed, wherein：
The digital simulation of the hybrid waveform generation module and the bus control module, Wave data memory module and high speed turns
It changes the mold block to be connected, the data information for the waveform signal to storing in the Wave data memory module is decoded real-time life
At the waveform of mixed signal；
The waveform of the digital-to-analogue conversion module of the high speed, the mixed signal for being generated based on hybrid waveform generation module is defeated
Go out mixed signal.
3. mixed signal generator according to claim 2, which is characterized in that the digital-to-analogue conversion module of the high speed
Including：Parallel serial conversion module and digital analog converter, wherein：
The parallel serial conversion module, for the waveform coding of the mixed signal to higher frequency to be sent to the digital mould
Quasi- converter；
The digital analog converter exports mixed signal for the waveform based on the mixed signal received.
4. mixed signal generator according to claim 3, which is characterized in that the Wave data memory module be based on
The data memory module of BRAM and outside DDR3 inside FPGA.
5. mixed signal generator according to claim 4, which is characterized in that the hybrid waveform generation module includes：
The adjustable single-frequency waveform generating module of multiple amplitudes, frequency, phase.
6. mixed signal generator according to claim 5, which is characterized in that the single-frequency waveform generating module includes：
DDS units and DSP multiplication units.
7. mixed signal generator according to claim 6, which is characterized in that the DDS units include：It is phase-accumulated
Device, phase addition device and phase-magnitude look-up table.
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| CN109800882A (en) * | 2018-12-28 | 2019-05-24 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Extended feedback measurement device for multi-bit superconducting qubits |
| CN110234119A (en) * | 2019-06-06 | 2019-09-13 | 四川九洲电器集团有限责任公司 | Signal source based on DAC chip generates system |
| CN111416596A (en) * | 2020-03-31 | 2020-07-14 | 上海工程技术大学 | Waveform generator based on SoC FPGA |
| CN116048188A (en) * | 2023-02-23 | 2023-05-02 | 苏州浪潮智能科技有限公司 | Chip and system for controlling waveform of superconducting quantum chip |
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| CN110234119B (en) * | 2019-06-06 | 2022-05-06 | 四川九洲电器集团有限责任公司 | Signal source generating system based on DAC chip |
| CN111416596A (en) * | 2020-03-31 | 2020-07-14 | 上海工程技术大学 | Waveform generator based on SoC FPGA |
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| CN116048188A (en) * | 2023-02-23 | 2023-05-02 | 苏州浪潮智能科技有限公司 | Chip and system for controlling waveform of superconducting quantum chip |
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