CN108666366A - A kind of super-junction laterally high tension apparatus with ladder oxygen buried layer - Google Patents
A kind of super-junction laterally high tension apparatus with ladder oxygen buried layer Download PDFInfo
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- CN108666366A CN108666366A CN201810727327.7A CN201810727327A CN108666366A CN 108666366 A CN108666366 A CN 108666366A CN 201810727327 A CN201810727327 A CN 201810727327A CN 108666366 A CN108666366 A CN 108666366A
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- buried layer
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- oxygen buried
- ladder
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims abstract description 29
- 229910052760 oxygen Inorganic materials 0.000 title claims abstract description 29
- 239000001301 oxygen Substances 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 9
- 238000005516 engineering process Methods 0.000 abstract description 9
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 230000005684 electric field Effects 0.000 abstract description 4
- 230000015556 catabolic process Effects 0.000 abstract 2
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 238000011982 device technology Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 230000008901 benefit Effects 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical group [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
Abstract
The present invention relates to semiconductor power device technology fields, are related to a kind of super-junction laterally high tension apparatus with ladder oxygen buried layer.The lateral high-voltage device with ladder oxygen buried layer of the present invention introduces stepped oxygen buried layer between N-type drift region and P type substrate, and it is gradually increased according to from source to leakage, preferably optimize distribution of charges in drift region, substrate-assisted depletion effect is shielded, so that superjunction layer has reached the lateral breakdown voltage that charge balance increases device.In addition stepped oxygen buried layer also plays the effect of fixed cavitation and so that interface hole concentration greatly increases on buried layer, so that buried layer electric field is increased, improves longitudinal breakdown voltage of device.Beneficial effects of the present invention are, have high pressure resistant, while reducing technology difficulty.
Description
Technical field
The invention belongs to power semiconductor technologies fields, are related to a kind of super-junction laterally high-voltage device with ladder oxygen buried layer
Part.
Background technology
Core devices of the power semiconductor as power electronic system are important electricity indispensable in the modern life
Subcomponent.With widening for application range, application field extends to all types of industries equipment, energy from domestic consumer class of electronic devices
The fields such as source and space flight.In recent years, with the rapid development of science and technology so that semiconductor technology gradually forms Liang great branches:
One is to realize the storage, processing and conversion to information using large scale integrated circuit as core;Another is then with power half
Conductor device is core, is applied to power supply and control circuit, realizes processing and transformation to electric energy.
Power device full name is that power semiconductor or semiconductor power device briefly exactly carry out at power
Reason, there is processing high voltage, the semiconductor devices of high current ability.With the development of society, power device is towards high voltage
BV, low compare conducting resistanceR on,spDirection develop.For the silicon materials device studied at present, compare conducting resistanceR on,spAnd pressure resistance
BV is in the relationship of 2.5 powers(" the silicon limit "), high ratio conducting resistance can reduce the performance of device.
The minimizing of power electronic system, the integrated development for turning to power semiconductor propose an important directions:
Smart-power IC.It requires the low-voltage circuits such as protection, control, detection, driving and high voltage power device being integrated in system
On one chip.It is therefore desirable to which the size of power device is smaller and smaller, the performance of device is become better and better.
The Chen Xing academicians that assist propose super junction power device, have advanced optimized pressure resistance and than the relationship between conducting resistance.
Superjunction technology is used in the devices, i.e., the drift region of single doping is substituted with the P items of high-concentration dopant and N items.For N-type
For LDMOS, when device is in ON state, the N items of high-concentration dopant can provide low impedance path, and the ratio for effectively reducing device is led
Be powered resistance.When device is in OFF state, the P items and N items of high-concentration dopant mutually exhaust, and the ionized donor ion in N items terminates
Ionization acceptor ion in the areas P, improves the surface field of device, enhances the pressure resistance of device.But conventional superjunction devices exists
There can be a longitudinal P N knot between substrate-assisted depletion effect, i.e. N-type drift region and P type substrate, destroy the Central-South P items of superjunction layer
Charge balance between N items reduces the pressure resistance of device.Have the characteristics that the super-junction laterally high tension apparatus of ladder oxygen buried layer is p-type lining
Stepped oxygen buried layer between bottom and N-type drift region, it is preferable to optimize distribution of charges in drift region.In addition stepped oxygen buried layer
The effect for also playing fixed cavitation so that interface hole concentration greatly increases on buried layer, so that buried layer electric field is increased
Add, improves longitudinal pressure resistance of device.
Invention content
The purpose of the present patent application is to be added stepped oxygen buried layer between N-type drift region and P type substrate, improves device
The pressure resistance of part is alleviated " the silicon limit " of device.Ladder buries oxygen and drift region is divided into three parts according to depth and according to from source
Pole is gradually increased to drain electrode, and drift region successively increases the compensation of superjunction layer from source electrode to drain electrode, optimised devices distribution of charges, screen
Substrate-assisted depletion effect is covered, realizes superjunction layer charge balance, improves device surface electric field, the laterally pressure resistance of enhancing device.In addition,
Stepped oxygen buried layer can fix the hole at interface on buried layer, increase buried layer electric field, improve the pressure resistance of device.
Technical scheme of the present invention:
A kind of with the super-junction laterally high tension apparatus of ladder oxygen buried layer its structure cell includes P type substrate 1, oxygen buried layer 23, N-type drift
Move area 31, it is characterised in that:The N-type drift region 31 includes P type trap zone 41, superjunction layer 71, the second N-type heavily doped region 34.
Specifically,
The areas PXing Ti 41 include p-type heavily doped region 41 and the first N-type heavily doped region 32, and end face is source electrode 52 thereon.
Specifically,
The areas PXing Ti 41 and polysilicon gate are isolated by medium 21.
Specifically,
Superjunction layer 71 includes N-doped zone 33 and P-doped zone 43.
Specifically,
Second N-type heavily doped region, 34 upper surface is drain terminal electrode 53.
Specifically,
Drain terminal electrode 53 and polysilicon electrode 61 are isolated by medium 22.
Specifically,
22 upper surface of buffer layer is provided with drain electrode field plate 81, and the field plate 81 that drains is connected with drain terminal electrode 53.
Specifically,
23 isolated p substrate 1 of oxygen buried layer and N-type drift region 31, and according to being gradually increased from source to drain terminal ladder depth
Distribution, ladder is to share three layers.
Compared with prior art, above-mentioned technical proposal has the following advantages:
A kind of super-junction laterally high tension apparatus with ladder oxygen buried layer provided by the invention, between N-type drift region and P type substrate
Introduce the oxygen buried layer of ladder pattern distribution.The present invention introduces ladder oxygen buried layer, main advantage compared with traditional technology:(1)Every
From N-type drift region and P type substrate;(2)Stepped distribution, optimization drift region charge distribution so that drift region is to superjunction layer electricity
Lotus compensation is gradually increased from source to drain terminal, shielding device substrate-assisted depletion effect, realizes superjunction layer charge balance;(3)Rank
The oxygen buried layer of ladder type distribution can fix interface hole on buried layer, increase buried layer interface charge concentration, enhance the pressure resistance of device.
Description of the drawings
Fig. 1 is the structural schematic diagram of embodiment 1;
Fig. 2 is the structural schematic diagram of embodiment 2;
Fig. 3 is the structural schematic diagram of embodiment 3;
Fig. 4 is the structural schematic diagram of embodiment 4;
Fig. 5 is the structural schematic diagram of embodiment 5;
Fig. 6 is the structural schematic diagram of embodiment 6;
Fig. 7 is conventional super-junction laterally high-voltage power device structure schematic diagram.
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
Embodiment 1
As shown in Figure 1, a kind of super-junction laterally high tension apparatus with ladder oxygen buried layer, including in P type substrate 1, stepped bury
Oxygen layer 23 and N-type drift region 31 in 23 upper end of oxygen buried layer is set, areas PXing Ti 41, super are provided in the N-type drift region 31
It includes mutually independent first N-type heavily doped region 42 and p-type to tie layer 71 and the second N-type heavy doping 34, the areas PXing Ti 41
Heavily doped region 32,41 upper end of the areas the PXing Ti setting active Metal 52 and gate oxide 21, the setting of 21 upper end of the gate oxide
It includes that n-type doping item 33 and p-type adulterate item 43, the second N-type heavy doping 34 to have polygate electrodes 61, the superjunction layer 71
Upper surface is provided with drain metal 53, is isolated by dielectric layer 22 between the drain metal 53 and gate oxide 21, is given an account of
22 upper surface of matter separation layer is provided with drain electrode field plate 81.
Embodiment 2
As shown in Fig. 2, the present embodiment and embodiment 1 are essentially identical, difference lies in:Between P type substrate 1 and N-type drift region 31
Oxygen buried layer shape becomes partial step.Compared with embodiment 1, the self-heating effect of device is reduced.
Embodiment 3
As shown in figure 3, the present embodiment and embodiment 1 are essentially identical, difference lies in:Superjunction layer 71 is located at device N-type drift region 31
Inside.
Embodiment 4
As shown in figure 4, the present embodiment and embodiment 1 are essentially identical, difference lies in:Superjunction layer becomes part in N-type drift region 31
Superjunction layer is located at left one side of something of drift region.
Embodiment 5
As shown in figure 5, the present embodiment and embodiment 1 are essentially identical, difference lies in:Part superjunction layer 71 is in N-type drift region 31
Inside, and positioned at left one side of something of drift region.
Embodiment 6
As shown in fig. 6, the present embodiment and embodiment 1 are essentially identical, difference lies in:Superjunction layer P items 43 are substituted by hafnium, drop
Low technology difficulty.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, all those of ordinary skill in the art are completed without departing from the spirit and technical ideas disclosed in the present invention
All equivalent modifications or change, should by the present invention claim be covered.
Claims (2)
- A kind of oxygen buried layer 23 1. super-junction laterally high tension apparatus with ladder oxygen buried layer, including in P type substrate 1, stepped with And the N-type drift region 31 in 23 upper end of ladder oxygen buried layer is set, it is provided with the areas PXing Ti 41, superjunction floor in the N-type drift region 31 71 and the second N-type heavy doping 34, the areas PXing Ti 41 include that mutually independent first N-type heavily doped region 42 and p-type are heavily doped Miscellaneous area 32,41 upper end of the areas the PXing Ti setting active Metal 52 and gate oxide 21,21 upper end of the gate oxide are provided with more Crystal silicon gate electrode 61, the superjunction layer 71 include that n-type doping item 33 and p-type adulterate item 43,34 upper end of the second N-type heavy doping Face is provided with drain metal 53, is isolated by dielectric layer 22 between the drain metal 53 and gate oxide 21, the medium every 22 upper surface of absciss layer is provided with drain electrode field plate 81.
- 2. a kind of super-junction laterally high tension apparatus with ladder oxygen buried layer according to claim 1, which is characterized in that described Stepped oxygen buried layer 23, between P type substrate and N-type drift region 31.
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CN201810727327.7A CN108666366A (en) | 2018-07-05 | 2018-07-05 | A kind of super-junction laterally high tension apparatus with ladder oxygen buried layer |
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CN201810727327.7A CN108666366A (en) | 2018-07-05 | 2018-07-05 | A kind of super-junction laterally high tension apparatus with ladder oxygen buried layer |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112436051A (en) * | 2020-11-03 | 2021-03-02 | 西安电子科技大学 | 4H-SiC metal semiconductor field effect transistor with symmetrical stepped oxygen buried layer |
CN113270480A (en) * | 2021-05-19 | 2021-08-17 | 济南大学 | Gallium nitride power device and preparation method thereof |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101916784A (en) * | 2010-08-13 | 2010-12-15 | 四川长虹电器股份有限公司 | SOI (Silicon on Insulator) variable buried oxide layer thickness device and preparation method thereof |
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2018
- 2018-07-05 CN CN201810727327.7A patent/CN108666366A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101916784A (en) * | 2010-08-13 | 2010-12-15 | 四川长虹电器股份有限公司 | SOI (Silicon on Insulator) variable buried oxide layer thickness device and preparation method thereof |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112436051A (en) * | 2020-11-03 | 2021-03-02 | 西安电子科技大学 | 4H-SiC metal semiconductor field effect transistor with symmetrical stepped oxygen buried layer |
CN113270480A (en) * | 2021-05-19 | 2021-08-17 | 济南大学 | Gallium nitride power device and preparation method thereof |
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