CN108628574A - The wide type width of multivalue tune for quantifying logic weighs quantizer - Google Patents

The wide type width of multivalue tune for quantifying logic weighs quantizer Download PDF

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Publication number
CN108628574A
CN108628574A CN201710204967.5A CN201710204967A CN108628574A CN 108628574 A CN108628574 A CN 108628574A CN 201710204967 A CN201710204967 A CN 201710204967A CN 108628574 A CN108628574 A CN 108628574A
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resistance
width
quantizer
wide type
power
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胡五生
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation

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Abstract

The wide type width power quantizer of multivalue tune for quantifying logic is the resistance R0, R1, R2.....Rn and transistor G0, G1, G2......Gn composition by being together in series, it is characterised in that:Resistance R0,R1,All in sequential series connect generates node 0 to R2.....Rn,1,2,3...n,One end ground connection of the Rn resistance,A termination of resistance R0 is met another resistance R,Another negative pole end for terminating to constant-current supply of resistance R,The positive terminal of constant-current source is connect with the positive Vcc of power supply,Transistor G0,G1,The source electrode of G2......Gn is all grounded,Transistor G0,G1,G2......Gn drain electrodes are connected on node 0 caused by resistance concatenation by serial number successively,1,2,3...n on,Transistor G0,G1,G2......Gn grids are drawn by serial number as position power input terminal W0,W1,W2,....Wn,A line and Tq1 are drawn from the tie point of resistance and constant-current source,The base stage of Tq2 connects,Again by Tq1,Tq2,Tq3,It is exported after the width power driving circuit driving of Tq4 compositions.

Description

The wide type width of multivalue tune for quantifying logic weighs quantizer
Technical field
The present invention relates to field of computer technology, specifically realize one of underlying hardware of multivalue computer " quantization logic The wide type width of multivalue tune weigh quantizer "
Technical background
Computers all so far and its relevant digital display circuit are all two-values, and multivalue is calculated in spite of many excellent Point, but because of the key hardware without supporting multi-value operation, so development is extremely slow, it may be said that and multivalue computer is especially The realization of decade computer is almost nil, and in light of this situation, I has proposed a kind of simple and effective multivalue and calculate in fact Circuit is applied to be especially the effective ways of ten values calculating and be especially the adding of ten values with two-value hardware realization multivalue, subtract, multiply, the calculation removed The Key Circuit of art operation and its logical operation is called " quantization logic " and its circuit, referring specifically to patent application (201710023530.1 201710023529.9 201710023528.4 201710024248.5 201710024246.6 201710024247.0), there are two types of information patterns for quantization logic tool itself, and one is positions to weigh information pattern, and one is width power to believe Breath pattern, the physical circuit under two kinds of information patterns also have bigger difference, are then position power information and width power information in real work Convert mutually it is each use the chief, the numerical operation in relation to multilevel information is dependent on position power information, but the performance of natural information is most It is analog information, the position for then obtaining standard is weighed and width power information will be the key that circuit trend is substantially applied, moreover width power is believed The multilevel storage method of breath is also that we are desired.
Invention content
" quantization logic " is that the label information generated after being quantified with analog information carries out logical operation as operator, is deduced, The flogic system of judgement
Quantify the simple understanding of logic
The method that mark value continuous, fuzzy, after chaos information quantization carries out logical operation as input and output is just named Quantization logic is done, realizes that the circuit of its operation is just called quantization logic circuit, then quantifies the input preamble part of logic circuit Most of is quantizer or the weights line being quantized.Postposition output par, c is that quantization weight line or quantization width weigh line.
Quantization logic has used the basic thought of two-valued function and multi valued logic or even fuzzy logic, and with simple and effective Be orientated circuit with two-value and realize the Key Circuit of multivalue and its fuzzy logic so that be only limited to simple two in logic original paper It is same to form multivalue and its fuzzy logical operation circuit in the case of kind state, especially quantify the compatible operation of logic Fundamentally solve the problems, such as multi-value operation, deposit with the method for quantization deposit, to open computing device of new generation Update level road.The bustling various operation method of quantization logic can provide effective hardware support to the development of artificial intelligence.
Quantify logic circuit for two-valued function circuit, structure is more complicated, but I believe that in ultra-large collection At under the support of circuit engineering, the machine that is more than two-value computing device by being continuing effort to may be implemented performance.
Quantifying logic circuit, there are two types of circuit implementing methods, and one is transported as input/output information with amplitude weights " width power type quantifies logic circuit " calculated, another kind are that as input/output information, " position power type quantifies logic with position weight Circuit ",
It can be " width power type " in practice, can also be " position power type ", can also be " mixed type ".
The numerical value representation method of position power type quantization logic
It is called position power table with one group of method that spatially position weight of the line of parallel arranged or point indicates numerical values recited Show that method, position indication have the property that:
1, the quantity of spatial parallelism arranging line is identical with using magnitude carry system, and binary number is indicated with two lines, three into System indicates with three lines ... quinary indicates with five lines ... the decimal systems indicate that N systems are indicated with N line with ten lines.
2, the voltage on line is that high level is effective, and low level or 0 level indicate invalid.Vice versa.
3, uniquely there was only a line in one group of line at any time, remaining line is locked into invalid state for high level.
Width power type quantifies logic value representation method
1, it is that amplitude information is quantized into multiple isolated numerical value with equal difference attribute and indicates to weigh with the value that width, which weighs information, I.e. one arithmetic progression of composition is sized in width weights by the amplitude information of weight
2, the ordered series of numbers maxitem of its Quantitatively Selecting of width power information indicates scale.
3, general natural number 0,1,2 ... it is the optimal selection that weight indicates
Quantifying the essential characteristic of logic is
1:It is that logic " state " and information " power " are detached first to quantify logic, and the combination form of logic ensures that logic is closed Be is complete correct, and the weights of information are attached in logic state and not by logic state restrict, are believed with abundant displaying Colourful combination performance relationship is ceased, this method actually people are using but are being the failure to detach, such as:Pick up certain One analog information first has to detection with or without information (logic detection), then just evaluates and tests metric width weights.Obvious information Whether there is or not being logic judgment, and the magnitude of information is then numerical metric, and the meaning of the two is different.Once presentation of information " having " is patrolled The state of collecting, i.e., to complete logical operation, and the colorful variation of information amplitude later is not limited by logic state " having ".
2:Operation is carried out using " having " "None" Information sign, " having " "None" Information sign is different from the high and low of two value informations Information, most apparent difference is that two value informations take two logical symbols 0 and 1 of height, 0 indicates low, and 1 indicates high, and two kinds of shapes of height State is both logic state and binary number value information, and quantifies logic and indicate logic state, " having " and two with " having " and "None" There is information in corresponding display position of height of value logic, and to show its scale numerical value weights, and "None" then shows that the position does not have Information does not show weights, and information 0 and 1 is to indicate information weights rather than logic state in quantifying logic, and 0 and 1 as with dividend right letter Breath respectively have oneself occupy " weights line " or " range value ", indicate information when 0 with dividend right line is got higher, show the position have weights 0. in It is that 0 bit line is got higher, shows that its information weights is 0, display is without information when which is lower.Weights 0 are not shown, rather than tradition is anticipated Zero or low in justice.
3:The value of information is indicated with range value and position power
With the amplification value of information carrier indicate information state and weighted value method we make width weigh method, when information is any The amplification value at quarter is just called width weights, and information is just called width weighted code in the list of all sample magnitude weights of certain period.
With the position weight of information carrier indicate information state and numerical values recited method we make position weigh method, information The weight of carrier any position is just called a weights, and the spatial information that position weights are rearranged by prescription order is just called position power Code.
4:Quantization logic fetter by logical relation therefore has abundant operation relation and output, can be take greatly, take it is small, Different value with, with value and, different value or together value or compared with, add, subtract, multiplication and division, many way of outputs such as side by side, different output sides Method determines the different function of logic circuit.The different function of same circuit can judge that offer is efficiently various to the evaluation and test of information and sentence Determine tool.
5:The computing circuit of position power type quantization logic does not need dedicated tandem circuit design, is with traditional logic circuit It simple, effective, reliable can realize multi valued logic operation and multi-system arithmetic operator, especially be easy to modular circuit framework Implementation particularly suitable for current large scale integrated circuit.
6:Width power type quantization logic circuit needs the design of tandem circuit, so generating a series of and two-valued function completely not Same basic circuit.
The wide type width power quantizer of multivalue tune of this part invention quantization logic is that position power information is transformed to width to weigh the more of information It is worth arithmetic logic device.
The wide type width power quantizer of multivalue tune for quantifying logic is the resistance R0, R1, R2.....Rn and crystal by being together in series Pipe G0, G1, G2......Gn composition, it is characterised in that:Resistance R0, R1, R2.....Rn are all in sequential series to connect generation Node 0,1,2,3...n is grounded one end of the Rn resistance, a termination of resistance R0 is met another resistance R, resistance R's is another One end is connected to the negative pole end of constant-current supply, and the positive terminal of constant-current source is connect with the positive Vcc of power supply, transistor G0, G1, G2......Gn Source electrode be all grounded, transistor G0, G1, G2......Gn drain electrode is connected on node 0 caused by resistance concatenation by serial number successively, On 1,2,3...n, transistor G0, G1, G2......Gn grid is drawn by serial number and weighs input terminal W0, W1, W2 as position, ... .Wn, the base stage that a line and Tq1, Tq2 are drawn from the tie point of resistance and constant-current source connect, then by Tq1, Tq2, Tq3, Tq4 It is exported after the width power driving circuit driving of composition.
By Tq1, Tq2, Tq3, the width of Tq4 compositions weighs driving circuit, it is characterised in that:The base stage of transistor Tq1, Tq2 are mutual Even, emitter cross-drive next stage power amplifier tube Tq3, Tq4 so that the emitter output level of Tq3, Tq4 are consistently equal to The incoming level of Tq1, Tq2 base stage.
It can increase or delete the logical value structure feature that corresponding unit original paper in queue changes width power quantizer, successively The wide type width of three value tune of composition weighs quantizer, and the wide type width of four value tune weighs quantizer, and the wide type width of five value tune weighs quantizer, and six value tune are wide Type width weighs quantizer, and the wide type width of seven value tune weighs quantizer, and the wide type width of eight value tune weighs quantizer, and the wide type width of nine value tune weighs quantizer, The wide type width power quantizer of ten value tune and the wide type width of N value tune weigh quantizer.
Description of the drawings
Fig. 1 is that the wide type width of three value tune weighs quantizer
Fig. 2 is that the wide type width of four value tune weighs quantizer
Fig. 3 is that the wide type width of five value tune weighs quantizer
Fig. 4 is that the wide type width of six value tune weighs quantizer
Fig. 5 is that the wide type width of seven value tune weighs quantizer
Fig. 6 is that the wide type width of eight value tune weighs quantizer
Fig. 7 is that the wide type width of nine value tune weighs quantizer
Fig. 8 is that the wide type width of ten value tune weighs quantizer
Embodiment
Referring to Fig.1, resistance R0, R1, R2 are connected in series with, one end of the R2 resistance are grounded, one end of resistance R0 A resistance R is met, the positive terminal of another negative pole end for terminating to constant-current supply of resistance R, constant-current source is connect with the positive Vcc of power supply, The drain electrode of transistor G0, G1, G2 are coupled on node 0,1,2, and node 0 is connected to again by Tq1, Tq2, Tq3, the width of Tq4 compositions Weigh the input terminal of driving circuit, i.e. triode Tq1, in the base stage of Tq2, transistor G0, the whole ground connection of the source electrode of G1, G2, grid Pole is drawn weighs input terminal W0, W1, W2 as position, and the emitter tie point of triode Tq3, Tq4 weigh output end as width, thus structure Quantizer is weighed at the wide type width of three value tune, working method is:Power input terminal W0, W1, W2 in place, input bit weighs information, then in width It weighs output end and exports three value width power information.
With reference to Fig. 2, resistance R0, R1, R2, R3 are connected in series with, one end of R3 is grounded, one electricity of a termination of resistance R0 R is hindered, the positive terminal of another negative pole end for terminating to constant-current supply of resistance R, constant-current source is connect with the positive Vcc of power supply, transistor The drain electrode of G0, G1, G2, G3 are coupled on node 0,1,2,3, and node 0 is connected to again by Tq1, Tq2, Tq3, the width power of Tq4 compositions The input terminal of driving circuit, i.e. triode Tq1 in the base stage of Tq2, are all grounded the source electrode of transistor G0, G1, G2, G3, grid Pole is drawn weighs input terminal W0, W1, W2, W3 as position, and the emitter tie point of triode Tq3, Tq4 weigh output end as width, by This constitutes the wide type width of four value tune and weighs quantizer, and working method is:Power input terminal W0, W1, W2, W3 input bit in place weighs information, Then four value width are exported in width power output end weigh information.
With reference to Fig. 3, resistance R0, R1, R2, R3, R4 are connected in series with, one end of R4 is grounded, a termination of resistance R0 The positive terminal of another negative pole end for terminating to constant-current supply of one resistance R, resistance R, constant-current source is connect with the positive Vcc of power supply, crystalline substance The drain electrode of body pipe G0, G1, G2, G3, G4 are coupled on node 0,1,2,3,4, and node 0 is connected to again by Tq1, Tq2, Tq3, Tq4 The input terminal of the width power driving circuit of composition, i.e. triode Tq1, in the base stage of Tq2, transistor G0, G1, G2, the source of G3, G4 Extremely all ground connection, grid are drawn as position power input terminal W0, W1, W2, W3, W4, and the emitter tie point of triode Tq3, Tq4 are done Output end is weighed for width, thus constitutes the wide type power quantizer of five value tune, working method is:Power input terminal W0, W1, W2, W3 in place, W4 input bits weigh information, then exporting five value width in width power output end weighs information.
..............
With reference to Fig. 8, resistance, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9 are connected in series with, and one end of R9 is grounded, A resistance R, another negative pole end for terminating to constant-current supply of resistance R, positive terminal and the electricity of constant-current source are terminated the one of resistance R0 The positive Vcc connections in source, transistor G0, G1, G2, G3, G4, G5, G6, G7, G8, the drain electrode of G9 is coupled with node 0, and 1,2,3,4, On 5,6,7,8,9, node 0 is connected to again by Tq1, Tq2, Tq3, the input terminal of the width power driving circuit of Tq4 compositions, i.e. triode In the base stage of Tq1, Tq2, the source electrode of transistor G0, G1, G2, G3, G4, G5, G6, G7, G8, G9 are all grounded, grid is drawn The emitter tie point of input terminal W0, W1, W2, W3, W4, W5, W6, W7, W8, W9 triode Tq3, Tq4 are weighed as width as position Output end is weighed, the wide type width power quantizer of ten value tune is thus constituted, working method is:Power input terminal W0, W1, W2, W3 in place, W4, W5, W6, W7, W8, W9 input bit weigh information, then exporting ten value width in width power output end weighs information.

Claims (3)

1. the wide type width power quantizer of the multivalue tune for quantifying logic is the resistance R0, R1, R2.....Rn and transistor by being together in series G0, G1, G2......Gn are formed, it is characterised in that:Resistance R0, R1, R2.....Rn are all in sequential series to connect generation section Point 0,1,2,3...n is grounded one end of the Rn resistance, a termination of resistance R0 is met another resistance R, resistance R's is another The negative pole end of constant-current supply is terminated to, the positive terminal of constant-current source is connect with the positive Vcc of power supply, transistor G0, G1, G2......Gn's Source electrode is all grounded, and transistor G0, G1, G2......Gn drain electrode is connected on node 0,1 caused by resistance concatenation by serial number successively, On 2,3...n, transistor G0, G1, G2......Gn grid is drawn by serial number and weighs input terminal W0, W1, W2 as position ... .Wn, The base stage that a line and Tq1, Tq2 are drawn from the tie point of resistance and constant-current source connects, then by Tq1, Tq2, Tq3, the width of Tq4 compositions It is exported after power driving circuit driving.
2. according to claim 1, by Tq1, Tq2, Tq3, the width of Tq4 compositions weighs driving circuit, it is characterised in that:Transistor Tq1, The base stage of Tq2 interconnects, emitter cross-drive next stage power amplifier tube Tq3, Tq4 so that the emitter output electricity of Tq3, Tq4 It is flat to be consistently equal to Tq1, the incoming level of Tq2 base stages.
3. according to claim 1, it is characterised in that:It can increase or delete corresponding unit original paper in queue and change width power quantization The logical value structure feature of device, the wide type width power quantizer of three value tune formed successively, the wide type width of four value tune weigh quantizer, five value width Wide type is adjusted to weigh quantizer, the wide type width of six value tune weighs quantizer, and the wide type width of seven value tune weighs quantizer, the wide type width power quantization of eight value tune Device, the wide type width of nine value tune weigh quantizer, and the wide type width power quantizer of ten value tune and the wide type width of N value tune weigh quantizer.
CN201710204967.5A 2017-03-24 2017-03-24 The wide type width of multivalue tune for quantifying logic weighs quantizer Pending CN108628574A (en)

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Application publication date: 20181009