CN108573882A - System and method for being bonded to semiconductor element - Google Patents
System and method for being bonded to semiconductor element Download PDFInfo
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- CN108573882A CN108573882A CN201810203587.4A CN201810203587A CN108573882A CN 108573882 A CN108573882 A CN 108573882A CN 201810203587 A CN201810203587 A CN 201810203587A CN 108573882 A CN108573882 A CN 108573882A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L2021/60007—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process
- H01L2021/60022—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process using bump connectors, e.g. for flip chip mounting
- H01L2021/60097—Applying energy, e.g. for the soldering or alloying process
- H01L2021/60195—Applying energy, e.g. for the soldering or alloying process using dynamic pressure, e.g. ultrasonic or thermosonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
A method of ultrasonic bond is carried out to semiconductor element, the described method comprises the following steps：(a) surface of multiple first conductive structures of the first semiconductor element is aligned with the respective surfaces of multiple second conductive structures of the second semiconductor element；And (b) by several corresponding conductive structures in several conductive structure ultrasonic bonds to second conductive structure in shown first conductive structure.The bonding surface of at least one of first conductive structure and the second conductive structure conductive structure includes frangible coating.
Description
Cross reference to related applications
The application is that the part of submitted on May 5th, 2016 15/147, No. 015 application continues application, this 15/147,
No. 015 application is the divisional application for 14/822, No. 164 applications submitted for 10th in August in 2015, this 14/822, No. 164 applications
It is the continuity application of submitted on October 3rd, 2014 14/505, No. 609 applications (now for United States Patent (USP) 9,136,240), it should
14/505, No. 609 application requires the equity for the provisional application 61/888,203 submitted for 8th in August in 2013, in these applications
Each of content be incorporated herein by reference.
Technical field
The present invention relates to the formation of semiconductor packages, more particularly, to by semiconductor device bonded together improved
System and method.
Background technology
Traditional semiconductor packages generally includes die attached technique and lead key closing process.It is advanced in this industry
Semiconductor packaging (for example, flip-chip bonding, thermocompression bonding etc.) is just obtaining more concerns.For example, in thermocompression bonding
In, multiple interconnections are formed using heat and pressure between semiconductor element.
Although the application of Advanced Packaging increasingly increases, there are many limitations in these techniques, these limitations
Including such as related limitation with the relative infancy of some Advanced Packagings (relative infancy).Therefore, it is desirable to carry
For for by semiconductor device bonded improvement system and method together.
Invention content
Exemplary embodiment according to the present invention provides a kind of method carrying out ultrasonic bond to semiconductor element.It should
Method includes the following steps：(a) by the surface of multiple first conductive structures of the first semiconductor element and the second semiconductor element
Multiple second conductive structures respective surfaces alignment；And (b) by several first conductions in first conductive structure
Several corresponding second conductive structures in structure ultrasonic bond to second conductive structure.Before step (b), described
The bonding surface of at least one of one conductive structure and second conductive structure conductive structure includes frangible coating.
For example, frangible on the conductive structure of at least one of the first semiconductor element and the second semiconductor element
Coating can apply before flip-chip is bonded, to protect the bonding surface of conductive structure from oxidation (for example, in conductive structure
Can be formed by copper or including copper in the case of).Coating can be by silicon nitride, silica or silicon carbide or their mixing
The superficial layer that object is constituted, which has the thickness suitable for bonding without being handled (fluxing) with flux, and the coating exists
It is frangible enough under the action of ultrasonic bond, to be obtained between the first semiconductor element and the conductive structure of the second semiconductor element
Metal is contacted to metal.The exemplary range of the thickness of the coating is between 10 angstroms to 500 angstroms, and another exemplary range is at 15 angstroms
To between 250 angstroms.The coating can be such as titanium, tantalum, indium, aluminium, tin, zinc, zirconium, vanadium, chromium, the nitride of nickel, oxide or carbon
Compound.
Ceramic coating frangible enough can be used, with the key in corresponding conductive structure during ultrasonic flip-chip is bonded
Acquisition metal is contacted to metal between closing surface, and is obtained and be suitable for being bonded the surface without being handled with flux.
That is, provide a method with protect conductive structure (for example, copper conductive structure) for include ultrasound connect
The bonding surface of flip-chip bonding removes pollutant from pollutant (such as copper oxide) or from the bonding surface.This method
Including making bonding surface be coated with ceramic material layer, which, which has, is suitable for bonding without flux processing and gives
This layer provides frangible enough with acquisition metal connects to metal between the bonding surface of conductive structure during flip-chip is bonded
The thickness of tactile hardness.
The coating of conductive structure can be applied by the surface layer that the rare earth metal for forming complex (complexes) with copper is constituted
Layer (for example, if the conductive structure including coating is copper).Coating can have a thickness that so that form copper complex
When (for example, being exposed to the reducing environment containing hydrogen), ceramic hydride coatings are formed (for example, being selected from copper-rare earth metal complex
Metal hydride and formed metal hydride not with the metal hydride compound of the metal hydride of copper fused metal
Layer), which has the thickness suitable for being bonded and handling without flux and provided aforementioned hardness to this layer.
Description of the drawings
From the following detailed description when read with the accompanying drawing figures, the present invention will be best understood.It is emphasized that according to logical
Normal practice, what the various features of attached drawing were not drawn to scale.On the contrary, for clarity, the size of various features is arbitrary
Expand or reduces.Attached drawing includes following picture：
Figure 1A to Fig. 1 C is the block diagram of the part of ultrasonic bonding machine, they show that property is real according to an example of the present invention
Apply example by the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 2A is the block diagram of the part of ultrasonic bonding machine, and it illustrates another exemplary embodiments according to the present invention
By the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 2 B are the enlarged drawings of the part Fig. 2A " Fig. 2 B "；
Fig. 2 C are views of Fig. 2 B after ultrasonic bond；
Fig. 3 is the block diagram of the part of ultrasonic bonding machine, and it illustrates another exemplary embodiments according to the present invention
By the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 4 A are the block diagrams of the part of ultrasonic bonding machine, and it illustrates another exemplary embodiments according to the present invention
By the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 4 B are the enlarged drawings of the part Fig. 4 A " Fig. 4 B "；
Fig. 4 C are views of Fig. 4 B after ultrasonic bond；
Fig. 5 A are the block diagrams of the part of ultrasonic bonding machine, and it illustrates another exemplary embodiments according to the present invention
By the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 5 B are the enlarged drawings of the part Fig. 5 A " Fig. 5 B "；
Fig. 5 C are views of Fig. 5 B after ultrasonic bond；
Fig. 6 A are the block diagrams of the part of ultrasonic bonding machine, and it illustrates another exemplary embodiments according to the present invention
By the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 6 B are the enlarged drawings of the part Fig. 6 A " Fig. 6 B "；
Fig. 6 C are the views after a part of Fig. 6 A contacts between conductive structure；
Fig. 7 shows the method for carrying out ultrasonic bond to semiconductor element of property embodiment according to an example of the present invention
Flow chart；
Fig. 8 A to Fig. 8 C are the block diagrams of the part of ultrasonic bonding machine, they show that property is real according to an example of the present invention
Apply example by the device bonded structure and method to lower semiconductor element of upper semiconductor；
Fig. 9 is the side that ultrasonic bond is carried out to semiconductor element for showing property embodiment according to an example of the present invention
The flow chart of method；
Figure 10 A to Figure 10 C are the block diagrams of the part of ultrasonic bonding machine, they show another example according to the present invention
Property embodiment by device bonded another structure and method to lower semiconductor element of upper semiconductor；
Figure 11 be show another exemplary embodiment according to the present invention to semiconductor element carry out ultrasonic bond
Another method flow chart；
Figure 12 A to figure 12 C is the block diagram of the part of ultrasonic bonding machine, they show another example according to the present invention
Property embodiment by device bonded another structure and method to lower semiconductor element of upper semiconductor；
Figure 13 be show another exemplary embodiment according to the present invention to semiconductor element carry out ultrasonic bond
Another method flow chart.
Specific implementation mode
As it is used herein, term " semiconductor element " means to include (or be configured to include) in subsequent step
Any structure of semiconductor chip or bare die.Illustrative semiconductor element includes exposed semiconductor bare chip, is located at substrate (example
Such as, lead frame, PCB, carrier etc.) on semiconductor bare chip, encapsulation semiconductor devices, flip-chip semiconductor device, insertion
Bare die in substrate, the stacking etc. being made of semiconductor bare chip.In addition, semiconductor element may include be configured to be bonded or
The element that person is included in other ways in semiconductor packages is (for example, be bonded to the spacer in stacked die configuration, lining
Bottom etc.).
Certain exemplary embodiments according to the present invention are provided for assembling such as stacked package (that is, PoP) structure
Semiconductor devices innovative technology (and structure).For example, multiple semiconductor elements (can be encapsulation) can be in stacking configuration
Arrangement.Each element in these elements preferably include by ultrasonic bond together aluminium (aluminium alloy or part be aluminium
(partially aluminum)) conductive structure.This technology have the advantages that it is certain, including for example：With other interconnection technique (examples
Such as, the PoP technologies based on solder) it compares, density reduces；With other interconnection techniques on the contrary, flowing back without using solder bump；And
It makes it possible to carry out room temperature ultrasonic bond by using aluminium-aluminium interconnection in certain applications.
Figure 1A shows the part of ultrasonic bonding machine 100, which includes bonding tool 124 and support
Structure 150.Arrive as will be understood by those skilled, thermocompression bonding machine (such as machine 100 or it is described herein it is any its
The embodiment of its machine) it may include for simplicity and many elements not shown in figures.Illustratively element includes
Such as：Input element is used to provide and wait for and other semiconductor device bonded input workpiece；Output element is used to receive
Include the processed workpiece of other semiconductor elements at this time；Conveyer system for travelling workpiece；For being imaged to workpiece
With the imaging system of alignment；Carry the bondhead assembly of bonding tool；Kinematic system for moving bondhead assembly；Including with
In the computer system of the software of operation machine；And other elements.
Referring again to Figure 1A, upper semiconductor element 108 is by the holding part 110 of bonding tool 124 (for example, by true
Sky, the vacuum ports such as limited by the holding surface by holding part 110) it keeps.Upper semiconductor element 108 includes
Top conductive structure 112a and 112b on its lower surface.Lower semiconductor element 160 includes being bonded to substrate 104
The semiconductor bare chip 102 of (or being supported in other ways by substrate 104).Conductive structure 106a and 106b are arranged on for lower part
On the upper surface of lower semiconductor bare die 102.Substrate 104 is again by support construction 150 (for example, the heat block of machine 100, machine
100 anvil block or any other desired support construction) support.In the configuration shown in Figure 1A (being ready for being bonded), on
Each of portion conductive structure 112a and 112b are substantially aligned with opposite respective lower conductive structure 106a and 106b.Pass through key
The movement of conjunction tool 124 makes semiconductor element 108 move down (as shown in the arrow 126 in Figure 1A).After this movement,
Figure 1B shows corresponding conductive structure 106a contacts between 112a and 106b and 112b.(do not shown using ultrasonic transducer
Go out, but be represented as " USG ", i.e. ultrasonic generator in the accompanying drawings) ultrasonic energy 114 is applied to by bonding tool 124
Portion's semiconductor element 108 and top conductive structure 112a and 112b.For example, the ultrasonic transducer of carrying bonding tool 124 is again
It can be carried by the bondhead assembly of machine 100.
During ultrasonic bond, lower part conductive structure 106a and 106b can be by being supplied to lower part half by support construction 150
The support of conductor element 160 is (for example, the support surface of support construction 150 may include one or more vacuum ports, to be bonded
Substrate 104 is fastened to support construction 150 by period) keep opposing stationary.Ultrasonic energy 114 (with optional bonding force and/or
Heat is together) it can make conductive structure local deformation.For example, in fig. 1 c, conductive structure 106a and 106b and 112a and
112b is shown as partly deforming.In fig. 1 c, ultrasonic bond portion is formed between the conductive structure of corresponding pairs.Example
Such as, ultrasonic bond portion 128a is formed between conductive structure 112a'/106a' of deformation, and ultrasonic bond portion 128b quilts
It is formed between conductive structure 112b'/106b' of deformation.Conductive structure 106a and 106b and 112a and 112b can be by aluminium
Or aluminium alloy formed or can include at their bonding surface aluminium, etc..
The conducting element 106a and 112a and 106b of corresponding pairs and 112b can be at room temperature (during bonding technologies
Without adding heat) it is bonded together.It is alternatively possible to apply additional heat, such as：(1) during bonding technology, lead to
Cross bonding tool 124 and apply additional heat to upper semiconductor element 108, thus heat upper conductive element 112a and
112b；And/or (2) give lower semiconductor element during bonding technology by support construction 150 (for example, heat block 150)
160 apply additional heat, thus heat lower part conductive structure 106a and 106b.This optional heating is (for example, pass through key
Conjunction tool and/or support construction etc.) it is suitable for any embodiment of the present invention illustrated and described herein.
Semiconductor element 160 shown in Figure 1A to Fig. 1 C and 108 can be configured for being bonded together multiple partly lead
Any one of volume elements part.In an especially specific example, (it is also suitable for other realities illustrated and described herein
Apply example) in, semiconductor element 160 is processor (for example, at the mobile phone of also referred to as APU (application processor unit)
Manage device), and semiconductor element 108 is configured for being bonded to the storage device of processor as shown in Figure 1A to Fig. 1 C.
Conductive structure shown in Figure 1A to Fig. 1 C (that is, 112a, 112b, 106a, 106b) is shown as universal architecture.These
Structure can take a number of different forms, such as conductive column, column-shaped projection (for example, being formed using column-shaped projection machine), plating
Conductive structure, sputtering conductive structure, conductor part, bonding welding pad, contact pad and other forms.It is provided herein it is various its
Its attached drawing shows the specific example of these structures.Some embodiments according to the present invention, conductive structure is at the position will
The contact area (that is, bonding surface) for being bonded to other conductive structures includes aluminium.In these embodiments, conductive structure can be with
It is formed by aluminum or aluminum alloy (for example, aluminium is melt into alloy, aluminium and silicon with copper and copper is melt into alloy etc.).In other examples, conductive
Structure may include base conductor material (for example, copper) in addition to aluminum and the aluminium (or aluminium alloy) positioned at contact area.At this
In application, if conductive structure is referred to as " aluminium ", it will be appreciated that, which can be aluminium, can be aluminium alloy, or can be with
Include aluminium (or aluminium alloy) in the contact area of this conductive structure.
Fig. 2A shows the part of ultrasonic bonding machine 200, which includes bonding tool 224 and support
Structure 250.Upper semiconductor element 208 is kept by the holding part 210 (for example, passing through vacuum) of bonding tool 224, and
Including top the conductive structure 222a and 222b (that is, conductive aluminum pad 222a and 222b) being arranged at its lower surface.Lower part half
Conductor element 260 includes the semiconductor bare chip 202 for being bonded to substrate 204 (or being supported in other ways by substrate 204).Under
Conductive structure 206a and 206b are arranged on the upper surface of lower semiconductor bare die 202 in portion.Substrate 204 is again by support construction
250 supports.In the configuration shown in Fig. 2A, under each of top conductive structure 222a and 222b are substantially corresponding to opposite
Portion conductive structure 206a and 206b alignment (and be configured to ultrasonic bond to opposite respective lower conductive structure 206a and
206b).Lower part conductive structure 206a includes copper (Cu) column 230 on the upper surface being arranged on lower semiconductor bare die 202
And the top aluminium contact structures 216 on the upper surface of Cu columns 230.Top aluminium contact structures 216 can be for example plated
Or it is splashed on the upper surface of lower part copper post 230.Fig. 2 B are the enlarged drawing of the part Fig. 2A " B ", and show lower part conduction
Structure 206a's is in the top contacted with upper conductive element 222a.
Ultrasonic energy is applied to by upper semiconductor element by bonding tool 224 using ultrasonic transducer (not shown)
208.As shown in Figure 2 C, ultrasonic energy can make conductive structure local deformation.That is, ultrasonic bond portion 228 is formed on deformation
Between top conductive structure 222a' and the contact structures 216' of deformation (as shown in Figure 2 C).
It arrives as will be understood by those skilled, Cu columns 230 (including the aluminium contact structures/part for being electroplated or sputtering
216) be only the conductive structure for including aluminium an example.Fig. 2A also shows another illustrative conductive structure 206b.Under
Portion conductive structure 206b be a part of aluminum steel (can be bonded using lead key closing process), aluminium column etc. constructed of aluminium (or
Aluminium alloy structure).
Fig. 3 shows the part of ultrasonic bonding machine 300, which includes bonding tool 324 and support
Structure 350.Upper semiconductor element 308 is kept by the holding part 310 (for example, passing through vacuum) of bonding tool 324, and
Including top conductive structure 322a and 322b (that is, conductive aluminum pad 322a and 322b).Fig. 3 shows encapsulation semiconductor devices
360 (that is, lower semiconductor elements 360) arrive the bonding of upper semiconductor element 308.Lower semiconductor element 360 includes bonding
To the semiconductor bare chip 302 of substrate 304 (or being supported in other ways by substrate 304).Lower part conductive structure 306a and 306b quilt
It is arranged on the upper surface of substrate 304.Substrate 304 is supported by support construction 350 again.Feed-through collar 320a and 320b are bonded on
(although not shown in FIG. 3, bare die 302 can be bonded to lining with flip-chip between semiconductor bare chip 302 and substrate 304
Bottom 304, this is different from or with feed-through collar interconnection to its supplement).Applied on bare die 302 and feed-through collar 320a and 320b
Add coating/encapsulation 334 (for example, epoxy molding material).As shown, the top portion of lower part conductive structure 306a and 306b
Divide and be exposed to 334 top of coating/encapsulation, to allow to be electrically connected to upper semiconductor element 308.
In configuration shown in Fig. 3, each of top conductive structure 322a and 322b substantially with opposite respective lower
Conductive structure 306a and 306b alignment (and be configured to ultrasonic bond to opposite respective lower conductive structure 306a and
306b).As shown in figure 3, each of lower part conductive structure 306a and 306b include the phase on the upper surface of substrate 304
Answer Cu column 330a and 330b and respective upper aluminium contact structures 316a on the upper surface of Cu columns 330a and 330b and
316b.Aluminium contact structures 316a and 316b can be plated or are splashed in the respective upper surfaces of Cu columns 330a and 330b on top.
As shown, so that semiconductor element 308 is moved down by the movement (as shown by the arrow in Figure 3) of bonding tool 324,
Fig. 3 shows conductive structure 306a contacts between 322a and 306b and 322b.Using ultrasonic transducer (for example, logical
Cross bonding tool 324) ultrasonic energy is applied to upper semiconductor element (together with optional heat and/or bonding force)
308, to form ultrasonic bond portion between aluminium conductive structure 322a and 322b and corresponding aluminium contact structures 316a and 316b.
Fig. 4 A show the part of ultrasonic bonding machine 400, which includes bonding tool 424 and support
Structure 450.Upper semiconductor element 408 is kept by the holding part 410 (for example, passing through vacuum) of bonding tool 424, and
Top conductive structure 412a and 412b including setting on the lower surface thereof is (that is, such as sputtered aluminum protrusion, aluminium column-shaped projection
Deng).Lower semiconductor element 460 include be bonded to support construction 404 (for example, FR4 support constructions) (or otherwise by
Support construction 404 support) semiconductor bare chip 402.Lower part conductive structure 406a and 406b are (that is, such as sputtered aluminum protrusion, aluminium
Column-shaped projection etc.) it is arranged on the upper surface of lower semiconductor bare die 402.Substrate 404 is supported by support construction 450 again.
In configuration shown in Fig. 4 A, each of top conductive structure 412a and 412b substantially with opposite respective lower conductive structure
406a and 406b alignments (and being configured to ultrasonic bond to opposite respective lower conductive structure 406a and 406b).Fig. 4 B show
The details of structure 412a and 406a (before ultrasonic bond) are gone out.Referring again to Fig. 4 A, pass through the fortune of bonding tool 424
Dynamic so that semiconductor element 408 is moved down (as shown in the arrow in Fig. 4 A), contact is illustrated in conductive structure 406a and 412a
And between 406 and 412b.Using ultrasonic transducer (for example, passing through bonding tool 424) by ultrasonic energy 414 (with it is optional
Heat and/or bonding force together) be applied to upper semiconductor element 408, in the top aluminium conductive structure of deformation and deformation
Respective lower aluminium contact structures between form ultrasonic bond portion 428a and 428b and (be formed see, e.g. as shown in Figure 4 C
Complete ultrasound bonding part 428a' between the structure 412a' of deformation and the structure 406a' of deformation).
Fig. 5 A show the part of ultrasonic bonding machine 500, which includes bonding tool 524 and support
Structure 550.Upper semiconductor element 508 is kept by the holding part 510 (for example, passing through vacuum) of bonding tool 524, and
Including top conductive structure 522a and 522b (that is, conductive aluminum pad 522a and 522b).Lower semiconductor element 560 includes by key
It is bonded to the semiconductor bare chip 502 of substrate 504 (for example, FR4 support constructions) (or being supported in other ways by substrate 504).Under
Portion conductive structure 506a and 506b (that is, such as sputtered aluminum protrusion, aluminium column-shaped projection) are arranged on lower semiconductor bare die 502
Upper surface on.Substrate 504 is supported by support construction 550 again.In the configuration shown in Fig. 5 A, top conductive structure 522a and
Each of 522b, which is substantially aligned with opposite respective lower conductive structure 506a and 506b, (and is configured to ultrasonic bond extremely
Opposite respective lower conductive structure 506a and 506b).Fig. 5 B show structure 522a's and 506a (before ultrasonic bond)
Details.As shown, made (as shown in the arrow in Fig. 5 A) by the movement of bonding tool 524 semiconductor element 508 to
Lower movement, Fig. 5 A show the contact between conductive structure 506a and 522a.Using ultrasonic transducer (for example, passing through bonding
Tool 524) ultrasonic energy is applied to upper semiconductor element 508 (together with optional heat and/or bonding force), to become
Ultrasonic bond portion 528a and 528b (ginseng is formed between the top aluminium conductive structure of shape and the respective lower aluminium contact structures of deformation
See, such as the complete ultrasound key between the structure 522a' for being formed on deformation as shown in Figure 5 C and the structure 506a' of deformation
Conjunction portion 528a').
Fig. 6 A show the part of ultrasonic bonding machine 600, which includes bonding tool 624 and support
Structure 650.In figure 6, introduction according to the present invention, multiple semiconductor elements are bonded together in stacking configuration.Specifically
For, semiconductor element 660a includes being bonded to partly leading for substrate 604a (or being supported in other ways by substrate 604a)
Body bare die 602a, wherein conductive structure 606a and 606b (that is, such as sputtered aluminum protrusion, aluminium column-shaped projection) are arranged on and partly lead
On the upper surface of body bare die 602a.Semiconductor element 660a is supported by support construction 650.
Another semiconductor element 660b (including be bonded to substrate 604b or supported in other ways by substrate 604b
Corresponding semiconductor bare die 602b, and include be located at substrate 604b on conductive structure 612a and 612b) in advance by key
It is bonded to semiconductor element 660a.Specifically, bonding tool 624 is in advance by element 660b bondings (for example, ultrasonic bond) to member
Part 660a so that ultrasonic bond portion is formed between the aluminium conductive structure 612a and 606a and 612b and 606b of corresponding pairs
628a and 628b.Element 660b further includes conductive structure 606a' and 606b', they are in steps described below by key
It is bonded to the conductive structure of element 660c.Fig. 6 B show the ultrasonic bond portion of conductive structure 612a and 606a including deformation
The detailed view of 628a.
Similarly, another semiconductor element 660c (including is bonded to substrate 604c or in other ways by substrate
The corresponding semiconductor bare die 602c of 604c supports, and include the conductive structure 612a' and 612b' being located on substrate 604c)
Through being bonded to semiconductor element 660b in advance.Specifically, bonding tool 624 is in advance by element 660c bondings (for example, ultrasound
Bonding) to element 660b so that the shape between the aluminium conductive structure 612a' and 606a' and 612b' and 606b' of corresponding pairs
At ultrasonic bond portion 628a' and 628b'.Element 660c further includes conductive structure 606a " and 606b ", they will be described below
The step of in be bonded to the conductive structure of element 660d.
As shown in Figure 6A, upper semiconductor element 660d by the holding part 610 of bonding tool 624 (for example, by true
It is empty) it keeps, and include the semiconductor bare chip for being bonded to substrate 604d (or being supported in other ways by substrate 604d)
602d.Conductive structure 612a " and 612b " (that is, such as sputtered aluminum protrusion, aluminium column-shaped projection) are arranged under substrate 604d
On surface.Conductive structure 612a " and 612b " conductive structure 606a " and 606b " substantially corresponding with opposite are aligned (and by structure
Cause ultrasonic bond to opposite corresponding conductive structure 606a " and 606b ").By the movement of bonding tool 624 (in such as Fig. 6 A
Arrow shown in) so that semiconductor element 660d is moved down.After this is moved downward, in the conductive structure of corresponding pairs
It is in contact between 612a " and 606a " and 612b " and 606b " (see, e.g. between the structure 612a " and 606a " of Fig. 6 C
The detailed view of contact before being deformed by ultrasonic bond).It will by bonding tool 624 using ultrasonic transducer (not shown)
Ultrasonic energy is applied to upper semiconductor element 604d, in the conductive structure 612a " and 606a " and 612b " of corresponding pairs
With formation ultrasonic bond portion between 606b ".
Although having been illustrated with specific Exemplary upper aluminium conductive structure and lower part aluminium conductive structure, this field skill
Art personnel will be appreciated that, allow have variously-shaped and design top aluminium conductive structure and lower part aluminium to lead in the teachings of the present invention
Electric structure.
Fig. 7 is the stream for showing the method by bonding semiconductor together of property embodiment according to an example of the present invention
Cheng Tu.It arrives as understood by those skilled in the art, it is convenient to omit be included in certain steps of flow chart；It can increase
Additional step；And the sequence of step can change relative to shown sequence.In step 700, the first semiconductor element
(e.g., including the semiconductor bare chip being located on substrate) it is supported in the support construction of bonder.First semiconductor element (example
Such as, the upper surface of semiconductor structure) include multiple first conductive structures for being made of at least partly aluminium (see, e.g. Figure 1A
In element 160 structure 106a and 106b；The structure 206a and 206b of element 260 in Fig. 2A；Element 360 in Fig. 3
Structure 306a and 306b；The structure 406a and 406b of element 460 in Fig. 4 A；The structure 506a of element 560 in Fig. 5 A and
506b；And the structure 606a " and 606b " of the element 660c in Fig. 6 A).In a step 702, the second semiconductor element is by being bonded
The holding part of the bonding tool of machine keep (see, e.g. in respective drawings element 108,208,308,408,508 and
660d).Second semiconductor element includes multiple second conductive structures for being made of at least partly aluminium (for example, positioned at the second half
On the lower surface of conductor element).In step 704, the first conductive structure and the second conductive structure by aligned with each other (referring to example
Such as Figure 1A and Fig. 6 A), then them is made to be in contact with each other.It, will be multiple with the bonding force of predefined size in optional step 706
The first conductive structure and the second conductive structure being aligned force together.The bonding force of predefined size can be single bonding force
Value, or actual bond power changes wherein during being bonding operation bonding force curve (profile).Optionally walking
In rapid 708, by applying heat to multiple the first conductive structures and/or the second conductive structure being aligned.It is, for example, possible to use branch
The support construction of the first semiconductor element is supportted by applying heat to the first conductive structure.Similarly, it can use and keep second
The bonding tool of semiconductor element is by applying heat to the second conductive structure.In step 720, multiple first conductive structures and
Second conductive structure by ultrasonic bond together, to form ultrasonic bond portion between them.
It arrives as will be understood by those skilled, since aluminum material is bonded to aluminum material by the present invention, this can be easy
Ground is completed using ultrasonic energy and/or bonding force, and is not usually required to heat, therefore when desired environment temperature/lower temperature
Bonding operation when, the present invention it is particularly useful.
The present invention has shown and described by the two pairs of conductive structures of ultrasonic bond together although having related generally to,
The present invention is certainly not limited to this.In fact, can be had according to the semiconductor packages (for example, Advanced Packaging) that the present invention assembles
Any number of conductive structure, and can have and conduction is tied by hundreds of (or even thousands of) of ultrasonic bond together
Structure.In addition, conductive structure need not be at para-linkage.For example, a structure can be bonded to two or more opposite knots
Structure.Therefore, any number of conductive structure from a semiconductor element can be by ultrasonic bond to another semiconductor
Any number of conductive structure.
Although the present invention mainly describe (and showing) ultrasonic energy by bonding tool (for example, bonding tool with it is super
Sonic transducer engagement position) application, but the invention is not restricted to this.More precisely, any desired knot can be passed through
Structure transmits ultrasonic energy, such as support construction.
It arrives as will be understood by those skilled, according to concrete application, the details of ultrasonic bond can be widely varied.Although
In this way, some unrestricted exemplary details will now be described.For example, can be in conjunction with conductive structure (for example, rod structure etc.)
It designs to be designed to the frequency of ultrasonic transducer so that energy converter resonant frequency is substantially humorous with given semiconductor element
Vibration frequency is consistent, and in this case, conductive structure can dynamically work as cantilever beam.It exemplary replaces at another
For in scheme, energy converter can be run relative to semiconductor element at non-resonant condition in a manner of simple " driven " type.
It is applied to showing for the energy of ultrasonic transducer (for example, being applied to piezo-electric crystal/ceramics in transducer driver)
Example property range can be in the ranges such as 0.1kHz to 160kHz, 10kHz to 120kHz, 20kHz to 60kHz.During bonding,
Single frequency can be applied, can either apply multiple frequencies (for example, in order, simultaneously or sequentially and simultaneously).It is right
The scouring (that is, being applied to the vibrational energy of the semiconductor element kept by bonding tool) of semiconductor element can be in multiple phases
It is applied on any direction hoped in direction, and can be by keeping the bonding tool of semiconductor element (as shown in this article
Go out), the support construction by supporting semiconductor element and other configurations apply.With specific reference to implementation shown in this article
Example (wherein ultrasonic energy, which passes through, keeps the bonding tool of semiconductor element to apply), scouring can be roughly parallel to or substantially
On the direction of the longitudinal axis of bonding tool (or in other directions) apply.
The vibrational energy applied by ultrasonic transducer for example can apply (example with the peak-to-peak amplitude range of 0.1um to 10um
Such as, the alternating control of feedback control or including but not limited to slope current, ramp voltage to constant voltage, constant current is utilized
Scheme processed or the proportional feedback control inputted based on one or more).
As described herein, bonding force can also be applied during at least part in ultrasonic bond period.Bonding force
Exemplary range be 0.1kg to 100kg.Bonding force can be used as steady state value to apply, or can be during being bonded the period
The bonding force curve of change.In controlled bonding force embodiment, based on one or more input (for example, ultrasonic amplitude, when
Between, speed, deformation, temperature etc.), the feedback control of para-linkage power can be constant, slope or proportional.
It as described herein, can be before being bonded the period and/or during being bonded the period to one in semiconductor element
It is a or multiple heated.The exemplary temperature range of semiconductor element is between 20 DEG C to 250 DEG C.Heat is (for example, pass through key
What one or all or other elements in conjunction tool and support construction applied) steady state value can be used as to apply, or can be with
It is the temperature curve changed during being bonded the period, and can be controlled using feedback control.
Ultrasonic bond portion is formed between the aluminium conductive structure on corresponding semiconductor element although having related generally to
The present invention has shown and described, but the present invention is certainly not limited to this.That is, the teachings of the present invention can be adapted for difference
Ultrasonic bond portion is formed between the conductive structure of ingredient.The exemplary lists of material for connected conductive structure include：
Aluminium is with copper (that is, in the aluminium conductive structure on a semiconductor element and the copper conduction knot on another semiconductor element
Ultrasonic bond portion is formed between structure)；Lead-free solder (for example, being mainly made of tin) and copper；Lead-free solder and aluminium；Copper and copper；Aluminium
With silver；Copper and silver；Aluminium and gold；Jin Yujin；And copper with gold.Of course, it is possible to imagine the other of conductive structure ingredient (for example, indium)
Combination.
As provided above, although having been combined the aluminum material in the various conductive structures for being included in semiconductor element
The aspect of the present invention is described, but the invention is not restricted to this.That is, the conductive structure on semiconductor element may include each
The different material (or being formed by a variety of different materials) of kind.For example, positioned at upper semiconductor element (for example, using bonding work
Tool carrying and bonding element) on conductive structure and/or positioned at lower semiconductor element (for example, upper conductive element is by key
The element being bonded to) on conductive structure can be formed by copper (or including copper).This copper product surface can suffer from air dirt
Contaminate object；That is, copper surface is tended to aoxidize.
Therefore, in certain embodiments of the present invention, in multiple first conductive structures and multiple second conductive structures extremely
A kind of few conductive structure can be formed (or including copper) by copper.In this embodiment of the present invention, entire conductive structure is not
It needs to be formed by copper, but, multiple first conductive structures and/or multiple second conductive structures can be conductive neighbouring multiple first
Include copper at structure and the interface portion of another conductive structure in multiple second conductive structures.
According to aspects of the present invention, coating (for example, inorganic coating) can be applied to this before carrying out ultrasonic bond
The surface of conductive structure, to prevent copper surface (for example, connection surface of the copper conductive structure of such as copper post) from aoxidizing.It is specific and
This coating, can be applied to positioned at upper semiconductor element (for example, being held using bonding tool by speech before being bonded
Carry and bonding element) on conductive structure and/or positioned at lower semiconductor element (for example, upper conductive element be bonded by key
The element being bonded to) on conductive structure surface (for example, engagement surface).
For example, this coating can be applied in conductive structure (for example, copper post conduction knot as thin frangible coating
Structure) on inorganic coating (for example, silicon oxynitride coating).In the phase on upper semiconductor element and lower semiconductor element
It answers before forming flip-chip interconnection between conductive structure, coating, which can play, protects these conductive structure (such as copper conduction knots
Structure) in it is certain from oxidation etc. effect.Then, in conjunction with ultrasonic flip-chip Joining Technology, it is located on corresponding conductive structure
(one or more) coating by ultrasound wipe, thus establish contact/interconnection of the metal to metal.
By the way that coating is arranged on conductive structure, the productivity and stability of thin space Flip-Chip Using can be improved.
For example, since Flip-Chip Using (it may include copper-connection portion) tends to increasingly thinner spacing, the use of coating is suitable
For including but not limited to form interconnection in bare die to substrate, bare die to bare die and bare die to the various occasions of wafer.
Utilizing (and/or the other oxidations being formed on conductive structure of ultrasonic energy damages (break through) coating
Nitride layer) after, complete between the conductive structure of semiconductor element final Joining Technology (for example, its may include heat, pressure and/or
Any required combination of power).
Fig. 8 A to Fig. 8 C (with together with the flow chart of Fig. 9), Figure 10 A to Figure 10 C (together with the flow chart of Figure 11) and figure
12A to Figure 12 C shown (together with the flow chart of Figure 13) using aforementioned (one or more) coating semiconductor element it
Between formed interconnection system and method.Fig. 9, Figure 11 and Figure 13 are to show inciting somebody to action partly for exemplary embodiment according to the present invention
The flow chart for the method that conductor element is bonded together.It arrives as understood by those skilled in the art, it is convenient to omit be included in
Certain steps in flow chart；Some additional steps can be increased；And the sequence of step can be relative to shown suitable
Sequence changes.
With specific reference to Fig. 8 A, upper semiconductor element 808 is by the holding part 810 of bonding tool 824 (for example, by true
Sky, the vacuum ports such as limited by the holding surface by holding part 810) it keeps.Upper semiconductor element 808 includes
Top conductive structure 812a and 812b on its lower surface.Lower semiconductor element 860 includes being bonded to substrate 804
The semiconductor bare chip 802 of (or being supported in other ways by substrate 804).Lower part conductive structure 806a and 806b are (for example, all
Copper conductive structure, other conductive structures such as copper post) it is arranged on the upper surface of lower semiconductor bare die 802.Coating 806a1
It is arranged on conductive structure 806a, and coating 806b1 is arranged on conductive structure 806b.Substrate 804 is tied by support again
Structure 850 (for example, the anvil block of the heat block of machine 800, machine 800 or any other desired support construction) supports.Scheming
In configuration shown in 8A (being ready for being bonded), under each of top conductive structure 812a and 812b are substantially corresponding to opposite
Portion's conductive structure 806a and 806b alignment.Make semiconductor (as shown in the arrow 826 in Fig. 8 A) by the movement of bonding tool 824
Element 808 moves down.After this movement, Fig. 8 B show corresponding conductive structure 806a (including coating 806a1) with
Contact between 812a and 806b (including coating 806b1) and 812b.It (is not shown, but in the accompanying drawings using ultrasonic transducer
It is represented as " USG ", i.e. ultrasonic generator) ultrasonic energy 814 is applied to by upper semiconductor element by bonding tool 824
808 and top conductive structure 812a and 812b.For example, the ultrasonic transducer of carrying bonding tool 824 again can be by upside-down mounting core
The bondhead assembly of piece bonder 800 carries.During ultrasonic bond, lower part conductive structure 806a and 806b can be by by supporting
Structure 850 be supplied to lower semiconductor element 860 support (for example, the support surface of support construction 850 may include one or
Multiple vacuum ports, substrate 804 is fastened to support construction 850 during bonding) keep opposing stationary.Ultrasonic energy
814 can make conductive structure local deformation (together with optional bonding force and/or heat).For example, in Fig. 8 C, conduction knot
Structure 806a and 806b and 812a and 812b is shown as deformation (or deforming at least partly).In Fig. 8 C, ultrasonic bond
Portion is formed between the conductive structure of corresponding pairs.For example, ultrasonic bond portion 828a is formed on the conductive structure of deformation
Between 812a'/806a', and ultrasonic bond portion 828b is formed between conductive structure 812b'/806b' of deformation.
With specific reference to Fig. 9, in step 900, the first semiconductor element (e.g., including the semiconductor being located on substrate is naked
Piece, element 860 shown in such as Fig. 8 A) it is supported in the support construction of bonder.First semiconductor element is (for example, partly lead
The upper surface of body structure) include multiple first conductive structures, multiple first conductive structure includes the contact positioned at conductive structure
Frangible coating on surface (for example, bonding surface for flip-chip bonding) is (see, e.g. element as shown in Figure 8 A
The 860 structure 806a and 806b for including coating 806a1 and 806b1).In step 902, the second semiconductor element is by being bonded
The holding part of the bonding tool of machine keeps (see, e.g. the element 808 in Fig. 8 A).Second semiconductor element includes multiple
Second conductive structure (for example, on lower surface of the second semiconductor element).In step 904, the first conductive structure and
Two conductive structures then make them be in contact with each other (see, e.g. Fig. 8 B) by (see, e.g. Fig. 8 A) aligned with each other.
In step 906, ultrasonic energy (such as in the fig. 8b, passing through the bonding tool of the second semiconductor element of carrying) is applied to second
Semiconductor element so that the conductive structure of the second semiconductor element destroy the conductive structure of the first semiconductor element with this at
It is relevant corresponding (for example, with reference to the ultrasonic bond portion 828a and 828b in Fig. 8 C) that ultrasonic bond portion is formed between conductive structure
Coating.
With specific reference to Figure 10 A, upper semiconductor element 1008 is by the holding part 1010 of bonding tool 1024 (for example, logical
Cross vacuum, the vacuum ports such as limited by the holding surface by holding part 1010) it keeps.Upper semiconductor element 1008
Including top conductive structure 1012a and 1012b on its lower surface (for example, being formed by copper or conductive knot including copper
Structure), floating coat 1012a1 is arranged on conductive structure 1012a, and coating 1012b1 is arranged on conductive structure
On 1012b.Lower semiconductor element 1060 includes being bonded to substrate 1004 (or being supported in other ways by substrate 1004)
Semiconductor bare chip 1002.Lower part conductive structure 1006a and 1006b are (for example, the copper conductive structure of such as copper post, other conductions
Structure) it is arranged on the upper surface of lower semiconductor bare die 1002.Substrate 1004 is again by support construction 1050 (for example, machine
1000 heat block, the anvil block of machine 1000 or any other desired support construction) support.The configuration shown in Figure 10 A
In (being ready for being bonded), each of top conductive structure 1012a and 1012b substantially with opposite respective lower conductive structure
1006a and 1006b alignments.Make semiconductor element (as shown in the arrow 1026 in Figure 10 A) by the movement of bonding tool 1024
1008 move down.After this movement, Figure 10 B show corresponding conductive structure 1006a and 1012a (including coating
1012a1) and the contact between 1006b and 1012b (including coating 1012b1).Pass through bonding tool using ultrasonic transducer
Ultrasonic energy 1014 is applied to upper semiconductor element 1008 and top conductive structure 1012a and 1012b by 1024.For example,
The ultrasonic transducer of carrying bonding tool 1024 can be carried again by the bondhead assembly of machine 1000.During ultrasonic bond,
Lower part conductive structure 1006a and 1006b can be by being supplied to the support (example of lower semiconductor element 1060 by support construction 1050
Such as, the support surface of support construction 1050 may include one or more vacuum ports, to fasten substrate 1004 during bonding
To support construction 1050) keep opposing stationary.Ultrasonic energy 1014 can make (together with optional bonding force and/or heat)
Obtain conductive structure local deformation.For example, in fig 1 oc, conductive structure 1006a and 1006b and 1012a and 1012b are shown
For deformation (or deforming at least partly).In fig 1 oc, ultrasonic bond portion be formed on corresponding pairs conductive structure it
Between.For example, ultrasonic bond portion 1028a is formed between conductive structure 1012a'/1006a' of deformation, and ultrasonic bond portion
1028b is formed between conductive structure 1012b'/1006b' of deformation.
With specific reference to Figure 11, in step 1100, the first semiconductor element (e.g., including the semiconductor being located on substrate
Bare die, element 1060 shown in such as Figure 10 A) it is supported in the support construction of bonder.First semiconductor element (for example,
The upper surface of semiconductor structure) include multiple first conductive structures (see, e.g. the structure of element 1060 as shown in Figure 10 A
1006a and 1006b).In step 1102, the second semiconductor element keeps (ginseng by the holding part of the bonding tool of bonder
See, such as the element 1008 in Figure 10 A).Second semiconductor element includes multiple second conductive structures (for example, positioned at the second half
On the lower surface of conductor element), multiple second conductive structure includes the coating (ginseng in the contact portion of conductive structure
See, such as shown in Figure 10 A, the structure 1012a and 1012b for including coating 1012a1 and 1012b1 of element 1060).In step
In 1004, the first conductive structure and the second conductive structure by (see, e.g. Figure 10 A) aligned with each other, and then make them that
This contact.In step 1006, ultrasonic energy (such as in fig. 1 ob, passing through the bonding tool of the second semiconductor element of carrying)
It is applied to the second semiconductor element so that the conductive structure of the first semiconductor element destroys the conductive knot of the second semiconductor element
Structure with formed between the pairs of conductive structure ultrasonic bond portion (for example, with reference in Figure 10 C ultrasonic bond portion 1028a and
1028b) relevant respective coatings.
With specific reference to Figure 12 A, upper semiconductor element 1208 is by the holding part 1210 of bonding tool 1224 (for example, logical
Cross vacuum, the vacuum ports such as limited by the holding surface by holding part 1210) it keeps.Upper semiconductor element 1208
Including top conductive structure 1212a and 1212b on its lower surface (for example, being formed by copper or conductive knot including copper
Structure), floating coat 1212a1 is arranged on conductive structure 1212a, and coating 1212b1 is arranged on conductive structure
On 1212b.Lower semiconductor element 1260 includes being bonded to substrate 1204 (or being supported in other ways by substrate 1204)
Semiconductor bare chip 1202.Lower part conductive structure 1206a and 1206b are (for example, the copper conductive structure of such as copper post, other conductions
Structure) it is arranged on the upper surface of lower semiconductor bare die 1202.Coating 1206a1 is arranged on conductive structure 1206a,
And coating 1206b1 is arranged on conductive structure 1206b.Substrate 1204 is again by support construction 1250 (for example, machine 1200
Heat block, machine 1200 anvil block or any other desired support construction) support.The configuration shown in Figure 12 A (prepares
Be bonded) in, each of top conductive structure 1212a and 1212b substantially with opposite respective lower conductive structure 1206a
And 1206b alignments.By the movement of bonding tool 1224 make (as shown in the arrow 1226 in Figure 12 A) semiconductor element 1208 to
Lower movement.After this movement, Figure 12 B show corresponding conductive structure 1206a (including coating 1206a1) and 1212a (packets
Include coating 1212a1) and 1206b (including coating 1206b1) and 1212b (including coating 1212b1) between contact.It utilizes
Ultrasonic transducer (be not shown, but be represented as " USG ", i.e. ultrasonic generator in the accompanying drawings) will be ultrasonic by bonding tool 1224
Energy 1214 is applied to upper semiconductor element 1208 and top conductive structure 1212a and 1212b.For example, carrying bonding work
The ultrasonic transducer of tool 1224 can be carried again by the bondhead assembly of machine 1200.During ultrasonic bond, lower part conduction knot
Structure 1206a and 1206b can be by being supplied to the support of lower semiconductor element 1260 (for example, support is tied by support construction 1250
The support surface of structure 1250 may include one or more vacuum ports, substrate 1204 is fastened to support construction during bonding
1250) keep opposing stationary.Ultrasonic energy 1214 can make conductive structure (together with optional bonding force and/or heat)
Local deformation.For example, in fig. 12 c, conductive structure 1206a and 1206b and 1212a and 1212b be shown as deformation (or
Person deforms at least partly).In fig. 12 c, ultrasonic bond portion is formed between the conductive structure of corresponding pairs.For example, super
Sound bonding part 1228a is formed between conductive structure 1212a'/1206a' of deformation, and ultrasonic bond portion 1228b is by shape
At between conductive structure 1212b'/1206b' of deformation.
With specific reference to Figure 13, in step 1300, the first semiconductor element (e.g., including the semiconductor being located on substrate
Bare die, element 1260 shown in such as Figure 12 A) it is supported in the support construction of bonder.First semiconductor element (for example,
The upper surface of semiconductor structure) include multiple first conductive structures, multiple first conductive structure includes being located at conductive structure
In contact surface coating (see, e.g. as illustrated in fig. 12, the structure for including coating 1206a1 and 1206b1 of element 1260
1206a and 1206b).In step 1302, the second semiconductor element keeps (ginseng by the holding part of the bonding tool of bonder
See, such as the element 1208 in Figure 12 A).Second semiconductor element includes multiple second conductive structures (for example, positioned at the second half
On the lower surface of conductor element), multiple second conductive structure include positioned at conductive structure contact portion coating (referring to,
Such as illustrated in fig. 12, the structure 1212a and 1212b for including coating 1212a1 and 1212b1 of element 1208).In step
In 1304, the first conductive structure and the second conductive structure by (see, e.g. Figure 12 A) aligned with each other, and then make them that
This contact.In step 1306, ultrasonic energy (such as in Figure 12 B, by the bonding tool for carrying the second semiconductor element)
It is applied to the second semiconductor element so that the conductive structure of the second semiconductor element destroys the conductive knot of the first semiconductor element
Structure with formed between the pairs of conductive structure ultrasonic bond portion (for example, with reference in Figure 12 C ultrasonic bond portion 1228a and
1228b) (and vice versa, that is, the conductive structure of the first semiconductor element destroys the second semiconductor element for relevant respective coatings
The conductive structure of part between the pairs of conductive structure formed the relevant respective coatings in ultrasonic bond portion).
Conducting element (the 806a and 812a and 806b and 812b in Fig. 8 A of corresponding pairs；1006a in Figure 10 A with
1012a and 1006b and 1012b；And the 1206a in Figure 12 and 1212a and 1206b and 1212b) can be at room temperature
(without adding heat during bonding technology) is bonded together.It is alternatively possible to for example：(1) during bonding technology, lead to
It crosses bonding tool 824/1024/1224 and applies heat to upper semiconductor element 808/1008/1012, thus heating is corresponding
Upper conductive element；And/or (2) give lower semiconductor member during bonding technology by support construction 850/1050/1250
Part 860/1060/1260 applies heat, thus heats corresponding lower part conductive structure.This optional heating is (for example, pass through key
Conjunction tool and/or support construction etc.) it is suitable for any embodiment of the present invention illustrated and described herein.
In addition, in bonding technology (for example, being shown in conjunction with Fig. 8 A to Fig. 8 C, Figure 10 A to Figure 10 C and figure 12 A to figure 12 C
And the technique described) during, multiple first conductive structures and the second conductive structure can be pressed in the bonding force of predefined size
Together.The bonding force of predefined size can be single bonding force value, or practical key during being flip-chip bonding operation
The bonding force curve that resultant force changes wherein.
Regardless of above-mentioned particular element, semiconductor element 860 and 808 (in Fig. 8 A to Fig. 8 C), 1060 and 1008
What (in Figure 10 A to Figure 10 C) and 1260 and 1208 (in figure 12 A to figure 12 C) can be configured for being bonded together
Any one (for example, being configured to be bonded to the memory device of processor) in multiple semiconductor elements.For example, lower part is partly led
Volume elements part (860,1060,1260) can be configured for receiving upper semiconductor element during flip-chip bonding technology
The semiconductor bare chip, wafer, panel, substrate and many other possible elements of (for example, bare die).
Conductive structure is (that is, 812a, 812b, 806a and 806b in Fig. 8 A to Fig. 8 C；In Figure 10 A to Figure 10 C
1012a, 1012b, 1006a and 1006b；And 1212a, 1212b, 1206a and 1206b in figure 12 A to figure 12 C) be illustrated as
Universal architecture.Many different forms may be used in these structures, and such as conductive column, column-shaped projection are (for example, use column-shaped projection
What machine was formed), plated conductive structure, sputtering conductive structure, lead portion, bonding welding pad, contact pad and other forms.This
The various other attached drawings that text provides show the specific example of this structure.Some embodiments according to the present invention, conductive structure
It can be by the formation such as copper or some other materials aoxidized, or including copper or some other materials etc. aoxidized.
Although the present invention has shown and described herein with reference to specific embodiment, the present invention is not intended to be limited to shown thin
Section.More precisely, can in the boundary and range of the equivalent of claim and without departing from the present invention
Details is carry out various modifications.
Claims (25)
1. a kind of method carrying out ultrasonic bond to semiconductor element, the described method comprises the following steps：
(a) conductive by multiple the second of the surface of multiple first conductive structures of the first semiconductor element and the second semiconductor element
The respective surfaces of structure are aligned, wherein at least one of first conductive structure and second conductive structure conductive structure
Bonding surface include frangible coating；And
(b) by phase in several the first conductive structure ultrasonic bonds to second conductive structure in first conductive structure
Several second conductive structures answered.
2. according to the method described in claim 1, it is characterized in that, first semiconductor element is semiconductor bare chip.
3. according to the method described in claim 1, it is characterized in that, first semiconductor element and second semiconductor element
Each of part is corresponding semiconductor bare chip.
4. according to the method described in claim 1, it is characterized in that, first semiconductor element includes semiconductor bare chip.
5. according to the method described in claim 1, it is characterized in that, first semiconductor element and second semiconductor element
Each of part includes corresponding semiconductor bare chip.
6. according to the method described in claim 1, it is characterized in that, further comprising the steps of：Make first semiconductor element
It is moved towards second semiconductor element so that the lower surface of first conductive structure and corresponding described second conductive knot
The upper surface of structure contacts.
7. according to the method described in claim 1, it is characterized in that, further comprising the steps of：At least the one of the step (b)
During part, apply pressure between first semiconductor element and second semiconductor element.
8. according to the method described in claim 1, it is characterized in that, further comprising the steps of：During the step (b), make
Several first conductive structures deformation in first conductive structure.
9. according to the method described in claim 1, it is characterized in that, the step (b) carries out at ambient temperature.
10. according to the method described in claim 1, it is characterized in that, further comprising the steps of：The step (b) at least
At least one of first semiconductor element and second conducting element are heated during a part.
11. according to the method described in claim 1, it is characterized in that, further comprising the steps of：The step (b) at least
During a part, first semiconductor element is added using the bonding tool of first semiconductor element is kept
Heat.
12. according to the method described in claim 1, it is characterized in that, further comprising the steps of：The step (b) at least
During a part, support the support construction of second semiconductor element come to described second using during the step (b)
Semiconductor element is heated.
13. according to the method described in claim 1, it is characterized in that, the multiple first conductive structure and the multiple second
At least one of conductive structure conductive structure is formed by copper.
14. according to the method described in claim 1, it is characterized in that, the multiple first conductive structure and the multiple second
Conductive structure is copper conductive structure.
15. according to the method described in claim 1, it is characterized in that, the multiple first conductive structure and the multiple second
At least one of conductive structure conductive structure is in neighbouring the multiple first conductive structure and the multiple second conductive structure
In another conductive structure interface portion at include copper.
16. according to the method described in claim 1, it is characterized in that, the step (b) includes, using in step (b) phase
Between keep the bonding tool of first semiconductor element by several first conductive structures in first conductive structure
Several corresponding second conductive structures in ultrasonic bond to second conductive structure.
17. according to the method for claim 16, which is characterized in that during the step (b), the bonding tool with it is super
Sonic transducer is engaged to provide ultrasonic energy.
18. according to the method for claim 16, which is characterized in that the bonding tool is using vacuum come in the step
(b) first semiconductor element is kept during.
19. according to the method described in claim 1, it is characterized in that, the coating is ceramic coating.
20. according to the method described in claim 1, it is characterized in that, the coating is the nitride, oxide or carbonization by silicon
The superficial layer that object or their mixture are constituted.
21. according to the method described in claim 1, it is characterized in that, the thickness of the coating is between 10 angstroms to 500 angstroms.
22. according to the method described in claim 1, it is characterized in that, the thickness of the coating is between 15 angstroms to 250 angstroms.
23. a kind of method carrying out ultrasonic bond to semiconductor element, the described method comprises the following steps：
(a) conductive by multiple the second of the surface of multiple first conductive structures of the first semiconductor element and the second semiconductor element
The respective surfaces of structure are aligned, and first semiconductor element is supported by the support construction of bonder, second semiconductor element
Part is carried by the bonding tool of the bonder, wherein the bonding surface of first conductive structure includes frangible coating；And
(b) using the bonding tool by several the first conductive structure ultrasonic bonds in first conductive structure to described
Several corresponding second conductive structures in second conductive structure.
24. a kind of method carrying out ultrasonic bond to semiconductor element, the described method comprises the following steps：
(a) conductive by multiple the second of the surface of multiple first conductive structures of the first semiconductor element and the second semiconductor element
The respective surfaces of structure are aligned, and first semiconductor element is supported by the support construction of bonder, the second semiconductor element by
The bonding tool of the bonder carries, wherein the bonding surface of second conductive structure includes frangible coating；And
(b) using the bonding tool by several the first conductive structure ultrasonic bonds in first conductive structure to described
Several corresponding second conductive structures in second conductive structure.
25. a kind of method carrying out ultrasonic bond to semiconductor element, the described method comprises the following steps：
(a) conductive by multiple the second of the surface of multiple first conductive structures of the first semiconductor element and the second semiconductor element
The respective surfaces of structure are aligned, and first semiconductor element is supported by the support construction of bonder, second semiconductor element
Part is carried by the bonding tool of the bonder, wherein each in first conductive structure and second conductive structure is led
The bonding surface of electric structure includes frangible coating；And
(b) using the bonding tool by several the first conductive structure ultrasonic bonds in first conductive structure to described
Several corresponding second conductive structures in second conductive structure.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/456,767 | 2017-03-13 | ||
| US15/456,767 US9779965B2 (en) | 2013-10-08 | 2017-03-13 | Systems and methods for bonding semiconductor elements |
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| CN108573882B CN108573882B (en) | 2023-10-20 |
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| KR (1) | KR102475581B1 (en) |
| CN (1) | CN108573882B (en) |
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| CN110676184A (en) * | 2019-08-27 | 2020-01-10 | 华东光电集成器件研究所 | Interconnection method for metal shell lead |
| CN117219526A (en) * | 2023-11-09 | 2023-12-12 | 日月新半导体(昆山)有限公司 | Integrated circuit bonding process and integrated circuit structure |
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| CN117219526A (en) * | 2023-11-09 | 2023-12-12 | 日月新半导体(昆山)有限公司 | Integrated circuit bonding process and integrated circuit structure |
| CN117219526B (en) * | 2023-11-09 | 2024-02-09 | 日月新半导体(昆山)有限公司 | Integrated circuit bonding process and integrated circuit structure |
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| KR102475581B1 (en) | 2022-12-08 |
| KR20180104580A (en) | 2018-09-21 |
| TWI791013B (en) | 2023-02-01 |
| CN108573882B (en) | 2023-10-20 |
| TW201836097A (en) | 2018-10-01 |
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