TWI791013B - Methods for ultrasonically bonding semiconductor elements - Google Patents
Methods for ultrasonically bonding semiconductor elements Download PDFInfo
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- TWI791013B TWI791013B TW107108056A TW107108056A TWI791013B TW I791013 B TWI791013 B TW I791013B TW 107108056 A TW107108056 A TW 107108056A TW 107108056 A TW107108056 A TW 107108056A TW I791013 B TWI791013 B TW I791013B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
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- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L2021/60007—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process
- H01L2021/60022—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process using bump connectors, e.g. for flip chip mounting
- H01L2021/60097—Applying energy, e.g. for the soldering or alloying process
- H01L2021/60195—Applying energy, e.g. for the soldering or alloying process using dynamic pressure, e.g. ultrasonic or thermosonic bonding
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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Abstract
Description
本發明涉及半導體封裝的形成,尤其涉及用於將半導體元件接合在一起的改進的系統及方法。The present invention relates to the formation of semiconductor packages, and more particularly to improved systems and methods for bonding semiconductor components together.
傳統的半導體封裝通常包括晶粒附接工藝和導線接合工藝。在這個產業中,先進半導體封裝技術(例如,倒裝晶片接合、熱壓接合等)正獲得更多的關注。例如,在熱壓接合中,在半導體元件之間使用熱量和壓力來形成複數個互連部。Conventional semiconductor packaging typically includes a die attach process and a wire bonding process. In this industry, advanced semiconductor packaging technologies (eg, flip chip bonding, thermocompression bonding, etc.) are gaining more attention. For example, in thermocompression bonding, heat and pressure are used between semiconductor elements to form a plurality of interconnections.
雖然先進封裝技術的應用日益增加,但是在這些技術中存在許多限制,這些限制包括例如與一些先進封裝技術的相對初期(relative infancy)有關的限制。因此,期望能提供用於將半導體元件接合在一起的改進系統及方法。While the use of advanced packaging technologies is increasing, there are a number of limitations in these technologies, including, for example, limitations related to the relative infancy of some advanced packaging technologies. Accordingly, it would be desirable to provide improved systems and methods for bonding semiconductor components together.
根據本發明的示例性實施例,提供了一種對半導體元件進行超音波接合的方法。該方法包括以下步驟:(a)將第一半導體元件的複數個第一導電結構的複數個表面與第二半導體元件的複數個第二導電結構的複數個相對應表面對準;以及(b)將該等第一導電結構中的多個第一導電結構超音波接合至該等第二導電結構中相應的多個第二導電結構。在步驟(b)之前,該等第一導電結構及該等第二導電結構中的至少一個的接合表面包括易碎塗層。According to an exemplary embodiment of the present invention, there is provided a method of ultrasonically bonding a semiconductor element. The method includes the steps of: (a) aligning a plurality of surfaces of a plurality of first conductive structures of a first semiconductor element with a plurality of corresponding surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) A plurality of first conductive structures among the first conductive structures are ultrasonically bonded to a corresponding plurality of second conductive structures among the second conductive structures. Prior to step (b), the bonding surface of at least one of the first conductive structures and the second conductive structures includes a friable coating.
例如,位於至少一個第一半導體元件及至少一個第二半導體元件的複數個導電結構上的易碎塗層可以在倒裝晶片接合前施加,以保護導電結構的接合表面免於氧化(例如,其中導電結構可以由銅形成或者包括銅)。塗層可以是由氮化矽、氧化矽或碳化矽或它們的混合物構成的表面層,該塗層具有適於接合的厚度而無需用熔劑處理(fluxing),並且該塗層在超音波接合的作用下足夠易碎,以在第一半導體元件和第二半導體元件的導電結構之間獲得金屬到金屬接觸。該塗層的厚度的示例性範圍在10埃(Angstroms, Å)到500埃之間,另一示例性範圍在15埃到250埃之間。該塗層可以是例如鈦、鉭、銦、鋁、錫、鋅、鋯、釩、鉻、鎳的氮化物、氧化物或碳化物。For example, a frangible coating on the plurality of conductive structures of at least one first semiconductor component and at least one second semiconductor component may be applied prior to flip-chip bonding to protect the bonding surfaces of the conductive structures from oxidation (e.g., where The conductive structure may be formed of or include copper). The coating may be a surface layer composed of silicon nitride, silicon oxide or silicon carbide or mixtures thereof, the coating has a thickness suitable for bonding without fluxing, and the coating is used in ultrasonic bonding The action is friable enough to obtain a metal-to-metal contact between the conductive structures of the first semiconductor element and the second semiconductor element. An exemplary range of thickness of the coating is between 10 Angstroms (Angstroms, Å) and 500 Angstroms, and another exemplary range is between 15 Angstroms and 250 Angstroms. The coating may be, for example, a nitride, oxide or carbide of titanium, tantalum, indium, aluminum, tin, zinc, zirconium, vanadium, chromium, nickel.
可以使用足夠易碎的陶瓷塗層,以在超音波倒裝晶片接合期間在相應導電結構的接合表面之間獲得金屬到金屬接觸,並且獲得適於接合而無需用熔劑處理的表面。A sufficiently brittle ceramic coating can be used to obtain a metal-to-metal contact between the bonding surfaces of the corresponding conductive structures during ultrasonic flip-chip bonding and to obtain a surface suitable for bonding without fluxing.
亦即,本發明提供了一種方法以保護導電結構(例如,銅導電結構)的用於包括超音波連接的倒裝晶片接合的接合表面免受污染物(諸如氧化銅)或者從該接合表面移除污染物。該方法包括使接合表面塗覆有陶瓷材料層,該陶瓷材料層具有適於接合而無需熔劑處理、並且給該層提供足夠易碎以在倒裝晶片接合期間在導電結構的接合表面之間獲得金屬到金屬接觸的硬度的厚度。That is, the present invention provides a method to protect the bonding surface of a conductive structure (e.g., a copper conductive structure) for flip-chip bonding including an ultrasonic connection from contaminants such as copper oxide or migration from the bonding surface. Remove pollutants. The method includes coating the bonding surfaces with a layer of ceramic material having properties suitable for bonding without flux processing and providing the layer with sufficient frangibility to obtain a bond between the bonding surfaces of the conductive structures during flip-chip bonding. The thickness of the hardness of the metal-to-metal contact.
導電結構的塗層可以是由與銅形成複合物(complexes)的稀土金屬構成的表層塗層(例如,如果包括塗層的導電結構是銅)。塗層可以具有這樣的厚度,使得在形成銅複合物(例如,暴露於含有氫的還原環境)時,形成陶瓷氫化物層(例如,選自銅-稀土金屬複合物的金屬氫化物以及形成金屬氫化物的不與銅融合金屬的金屬氫化物的金屬氫化物化合物的層),該陶瓷氫化物層具有適於接合且無需熔劑處理並且給該層提供前述硬度的厚度。The coating of the conductive structure may be a surface coating composed of a rare earth metal that forms complexes with copper (eg, if the conductive structure comprising the coating is copper). The coating may have a thickness such that upon formation of the copper complex (e.g., exposure to a reducing environment containing hydrogen), a ceramic hydride layer (e.g., selected from the group consisting of metal hydrides of copper-rare earth metal complexes and forming metal hydrides) is formed. A layer of a metal hydride compound of a metal hydride of a hydride that does not fuse metal with copper), the ceramic hydride layer has a thickness suitable for bonding without flux treatment and provides the layer with the aforementioned hardness.
如本發明所使用的,「半導體元件」一詞意指包括(或被配置成在隨後的步驟中包括)半導體晶片或晶粒的任何結構。示例性的半導體元件包括裸露的半導體晶粒、位於基板(例如,導線框架、PCB、載體等)上的半導體晶粒、封裝半導體裝置、倒裝晶片半導體裝置、嵌入基板中的晶粒、由半導體晶粒構成的堆疊等。此外,半導體元件可以包括被配置成被接合或者以其它方式被包括在半導體封裝中的元件(例如,被結合在堆疊晶粒構型中的間隔件、基板等)。As used herein, the term "semiconductor element" means any structure that includes (or is configured to include in a subsequent step) a semiconductor wafer or die. Exemplary semiconductor components include bare semiconductor die, semiconductor die on a substrate (e.g., lead frame, PCB, carrier, etc.), packaged semiconductor device, flip-chip semiconductor device, die embedded in a substrate, made of semiconductor stacks of crystal grains, etc. Furthermore, the semiconductor elements may include elements configured to be bonded or otherwise included in a semiconductor package (eg, spacers, substrates, etc. incorporated in a stacked die configuration).
根據本發明的某些示例性實施例,提供了用於裝配諸如疊層封裝(即,package on package, PoP)結構的半導體裝置的創新技術(及結構)。例如,多個半導體元件(可以是封裝)可以呈堆疊結構佈置。這些元件中的每個元件較佳地包括被超音波接合在一起的鋁(或鋁合金、或部分是鋁(partially aluminum))導電結構。這種技術具有某些優點,包括例如:與其它互連技術(例如,基於焊料的PoP技術)相比,密度減小;與其它互連技術相反,不使用焊料塊回流;並且在某些應用中通過使用鋁-鋁互連使得能進行室溫超音波接合。According to certain exemplary embodiments of the present invention, innovative techniques (and structures) for assembling semiconductor devices such as package on package (ie, package on package, PoP) structures are provided. For example, multiple semiconductor elements (which may be packages) may be arranged in a stacked structure. Each of these elements preferably comprises an aluminum (or aluminum alloy, or partially aluminum) conductive structure ultrasonically bonded together. This technology has certain advantages including, for example: reduced density compared to other interconnect technologies (e.g., solder-based PoP technology); no use of solder bump reflow as opposed to other interconnect technologies; and in some applications room temperature ultrasonic bonding is enabled by the use of aluminum-aluminum interconnects.
圖1A顯示超音波接合機100的部分,超音波接合機100包括接合工具124以及支撐結構150。如本領域技術人員將理解到的,熱壓接合機(諸如機器100或本發明中所描述的任何其它機器的實施例)可包括為了簡單起見而未在附圖中示出的許多元件。示例性的元件包括例如:複數個輸入元件,其用於提供欲與其它半導體元件接合的複數個輸入工件;複數個輸出元件,其用於接收此時包括其它半導體元件的複數個已加工工件;用於移動複數個工件的傳送系統;用於對複數個工件進行成像和對準的成像系統;承載接合工具的接合頭元件;用於移動接合頭元件的運動系統;包括用於操作機器的軟體的電腦系統;以及其它元件。FIG. 1A shows a portion of an
再次參考圖1A,上部半導體元件108由接合工具124的保持部分110(例如,通過真空,諸如通過由保持部分110的保持表面所定義的真空埠)保持。上部半導體元件108包括位於其下表面上的上部導電結構112a及112b。下部半導體元件160包括被接合至基板104(或者以其它方式由基板104支撐)的半導體晶粒102。下部導電結構106a及106b被設置在下部半導體晶粒102的上表面上。基板104又由支撐結構150(例如,機器100的加熱塊、機器100的砧座或者任何其它理想的支撐結構)支撐。在圖1A所示的結構(準備進行接合)中,上部導電結構112a及112b中的每一個通常是與相對應的下部導電結構106a及106b對準。通過接合工具124的運動(如圖1A中的箭頭126所示)使半導體元件108向下移動。在這個運動之後,圖1B示出了相應導電結構106a與112a以及106b與112b之間的接觸。利用超音波換能器(未於圖中示出,但在附圖中被表示為『ultrasonic generator, USG』,即超音波發生器)通過接合工具124將超音波能量114施加至上部半導體元件108以及上部導電結構112a和112b。例如,承載接合工具124的超音波換能器又可以由機器100的接合頭元件承載。Referring again to FIG. 1A , the
在超音波接合期間,下部導電結構106a及106b可通過由支撐結構150提供給下部半導體元件160的支撐(例如,支撐結構150的支撐表面可包括一個或多個真空埠,以在接合期間將基板104緊固至支撐結構150)來保持相對靜止。超音波能量114(與可選的接合力及/或熱量一起)可以使得導電結構局部變形。例如,在圖1C中,導電結構106a及106b以及112a及112b被示出為部分地變形。在圖1C中,超音波接合部被形成在相應成對的導電結構之間。例如,超音波接合部128a被形成在變形的導電結構112a'/106a'之間,並且超音波接合部128b被形成在變形的導電結構112b'/106b'之間。導電結構106a及106b以及112a及112b可以由鋁或鋁合金形成,或者可以在它們的接合表面處包含鋁等等。During ultrasonic bonding, the lower
相應成對的導電元件106a與112a以及106b與112b可以在室溫下(在接合過程期間無需添加熱量)被接合在一起。可選地,可以施加額外的熱量,例如:(1)在接合過程期間,通過接合工具124給上部半導體元件108施加額外的熱量,由此加熱上部導電元件112a及112b;及/或(2)在接合過程期間,通過支撐結構150(例如,加熱塊150)給下部半導體元件160施加額外的熱量,由此加熱下部導電結構106a及106b。這種可選的加熱(例如,通過接合工具及/或支撐結構等)適用於在本發明中所顯示並描述的本發明的任何實施例。Corresponding pairs of
圖1A至圖1C所示的半導體元件160和108可以是被配置成接合在一起的多個半導體元件中的任何一種。在一個特別具體的示例(其也適用於在本發明中所顯示並描述的其它實施例)中,半導體元件160是處理器(例如,也可被稱為應用處理器單元(application processor unit, APU)的行動電話處理器),並且半導體元件108是被配置成如圖1A至圖1C所示地接合至處理器的存儲裝置。The
圖1A至圖1C所示的導電結構(即,112a、112b、106a、106b)被顯示為通用結構。這些結構可以採取許多不同的形式,諸如導電柱、柱形凸起(例如,使用柱形凸起機形成)、電鍍導電結構、濺射導電結構、導線部分、接合焊盤、接觸焊盤以及其它形式。本發明提供的各種其它附圖顯示這些結構的具體示例。根據本發明的某些實施例,導電結構在於該位置處將被接合至其它導電結構的接觸區域(即,接合表面)包括鋁。在這些實施例中,導電結構可以由鋁或鋁合金(例如,鋁與銅熔成合金、鋁與矽和銅熔成合金等)形成。在其它示例中,導電結構可以包括除鋁之外的基底導電材料(例如,銅)與位於接觸區域的鋁(或鋁合金)。在本申請案中,如果導電結構被稱為「鋁」,則應理解到,該結構可以是鋁,可以是鋁合金,或者可以在這種導電結構的接觸區域包括鋁(或鋁合金)。The conductive structures shown in FIGS. 1A-1C (ie, 112a, 112b, 106a, 106b) are shown as generic structures. These structures can take many different forms, such as conductive posts, stud bumps (for example, formed using a stud bump machine), plated conductive structures, sputtered conductive structures, wire sections, bond pads, contact pads, and other form. Various other drawings provided herein show specific examples of these structures. According to some embodiments of the invention, the contact area (ie the bonding surface) of the conductive structure at which it is to be bonded to another conductive structure comprises aluminum. In these embodiments, the conductive structure may be formed of aluminum or an aluminum alloy (eg, alloyed aluminum with copper, alloyed aluminum with silicon and copper, etc.). In other examples, the conductive structure may include a base conductive material other than aluminum (eg, copper) and aluminum (or an aluminum alloy) in the contact region. In this application, if a conductive structure is referred to as "aluminum", it should be understood that the structure may be aluminum, may be an aluminum alloy, or may include aluminum (or an aluminum alloy) in the contact area of such a conductive structure.
圖2A顯示超音波接合機200的部分,超音波接合機200包括接合工具224以及支撐結構250。上部半導體元件208由接合工具224的保持部分210(例如,通過真空)保持,並且包括設置在其下表面處的上部導電結構222a及222b(即,導電鋁焊盤222a及222b)。下部半導體元件260包括被接合至基板204(或者以其它方式由基板204支撐)的半導體晶粒202。下部導電結構206a及206b被設置在下部半導體晶粒202的上表面上。基板204又由支撐結構250支撐。在圖2A所示的結構中,上部導電結構222a及222b中的每一個通常是與相對應的下部導電結構206a及206b對準(並且被配置成超音波接合至相對應的下部導電結構206a及206b)。下部導電結構206a包括被設置在下部半導體晶粒202上的上表面上的銅(Cu)柱230以及位於Cu柱230的上表面上的上部鋁接觸結構216。上部鋁接觸結構216例如可以被電鍍或濺射到下部銅柱230的上表面上。圖2B是圖2A的「B」部分的放大圖,並且顯示下部導電結構206a的與上部導電元件222a處於接觸的頂部。FIG. 2A shows a portion of an
利用超音波換能器(未於圖中顯示)通過接合工具224將超音波能量施加至上部半導體元件208。如圖2C所示,超音波能量可以使導電結構局部變形。即,超音波接合部228被形成在變形的上部導電結構222a'與變形的接觸結構216'之間(如圖2C所示)。Ultrasonic energy is applied to the
如本領域技術人員將理解到的,Cu柱230(包括電鍍或濺射的鋁接觸結構/部分216)僅是包括鋁的導電結構的一個示例。圖2A還示出了另一種示例性的導電結構206b。下部導電結構206b是諸如一部分鋁線(可以使用導線接合工藝來接合)、鋁柱等的鋁結構(或鋁合金結構)。As will be appreciated by those skilled in the art, Cu pillars 230 (including plated or sputtered aluminum contact structures/portions 216) are but one example of a conductive structure comprising aluminum. FIG. 2A also shows another exemplary
圖3顯示超音波接合機300的部分,超音波接合機300包括接合工具324以及支撐結構350。上部半導體元件308由接合工具324的保持部分310(例如,通過真空)保持,並且包括上部導電結構322a及322b(即,導電鋁焊盤322a及322b)。圖3顯示封裝半導體裝置360(即,下部半導體元件360)到上部半導體元件308的接合。下部半導體元件360包括接合至基板304(或以其它方式由基板304支撐)的半導體晶粒302。下部導電結構306a及306b被設置在基板304的上表面上。基板304又由支撐結構350支撐。導線環320a及320b被接合在半導體晶粒302和基板304之間(雖然未在圖3中顯示,但是晶粒302可以倒裝晶片接合至基板304,這與導線環互連不同或是對它的補充)。已經在晶粒302和導線環320a及320b上施加塗層/封裝334(例如,環氧樹脂模塑膠)。如圖所示,下部導電結構306a及306b的上部部分暴露於塗層/封裝334上方,以允許電連接至上部半導體元件308。FIG. 3 shows a portion of an
在圖3所示的結構中,上部導電結構322a及322b中的每一個通常是與相對應的下部導電結構306a及306b對準(並且被配置成超音波接合至相對應的下部導電結構306a及306b)。如圖3所示,下部導電結構306a及306b中的每一個包括位於基板304的上表面上的相應Cu柱330a及330b、以及位於Cu柱330a及330b的上表面上的相應上部鋁接觸結構316a及316b。上部鋁接觸結構316a及316b可以被電鍍或濺射到Cu柱330a及330b的相應上表面上。如圖所示,已經通過接合工具324的運動(如圖3中的箭頭所示)使半導體元件308向下移動,圖3顯示導電結構306a與322a以及306b與322b之間的接觸。使用超音波換能器來(例如,通過接合工具324)將超音波能量(與可選的熱量及/或接合力一起)施加至上部半導體元件308,以在鋁導電結構322a及322b與相應的鋁接觸結構316a及316b之間形成超音波接合部。In the structure shown in FIG. 3, each of the upper
圖4A顯示超音波接合機400的部分,超音波接合機400包括接合工具424以及支撐結構450。上部半導體元件408由接合工具424的保持部分410(例如,通過真空)保持,並且包括設置在其下表面上的上部導電結構412a及412b(即,例如濺射鋁凸起、鋁柱形凸起等)。下部半導體元件460包括被接合至支撐結構404(例如,FR4支撐結構)(或以其他方式由支撐結構404支撐)的半導體晶粒402。下部導電結構406a及406b(即,例如濺射鋁凸起、鋁柱形凸起等)被設置在下部半導體晶粒402的上表面上。基板404又由支撐結構450支撐。在圖4A所示的結構中,上部導電結構412a及412b中的每一個通常是與相對應的下部導電結構406a及406b對準(並且被配置成超音波接合至相對應的下部導電結構406a及406b)。圖4B顯示結構412a及406a(在超音波接合之前)的細節。再次參考圖4A,已經通過接合工具424的運動(如圖4A中的箭頭所示)使半導體元件408向下移動,讓接觸被顯示在導電結構406a與412a以及406b與412b之間。使用超音波換能器來(例如,通過接合工具424)將超音波能量414(與可選的熱量及/或接合力一起)施加至上部半導體元件408,以在變形的上部鋁導電結構和變形的相應下部鋁接觸結構之間形成超音波接合部428a和428b(參見,例如圖4C所示的被形成在變形的結構412a'與變形的結構406a'之間的完整超音波接合部428a')。FIG. 4A shows a portion of an
圖5A顯示超音波接合機500的部分,超音波接合機500包括接合工具524以及支撐結構550。上部半導體元件508由接合工具524的保持部分510(例如,通過真空)保持,並且包括上部導電結構522a及522b(即,導電鋁焊盤522a及522b)。下部半導體元件560包括被接合至基板504(例如,FR4支撐結構)(或者以其它方式由基板504支撐)的半導體晶粒502。下部導電結構506a及506b(即,例如濺射鋁凸起、鋁柱形凸起等)被設置在下部半導體晶粒502的上表面上。基板504又由支撐結構550支撐。在圖5A所示的結構中,上部導電結構522a及522b中的每一個通常是與相對應的下部導電結構506a及506b對準(並且被配置成超音波接合至相對應的下部導電結構506a及506b)。圖5B顯示結構522a及506a(在超音波接合之前)的細節。如圖所示,已經通過接合工具524的運動(如圖5A中的箭頭所示)使半導體元件508向下移動,圖5A顯示導電結構506a與522a之間的接觸。使用超音波換能器來(例如,通過接合工具524)將超音波能量(與可選的熱量及/或接合力一起)施加至上部半導體元件508,以在變形的上部鋁導電結構與變形的相應下部鋁接觸結構之間形成超音波接合部528a及528b(參見,例如圖5C所示的被形成在變形的結構522a'與變形的結構506a'之間的完整超音波接合部528a')。FIG. 5A shows a portion of an
圖6A顯示超音波接合機600的部分,超音波接合機600包括接合工具624以及支撐結構650。在圖6A中,根據本發明的教示,多個半導體元件係以一堆疊結構接合在一起。具體而言,半導體元件660a包括被接合至基板604a(或者以其它方式由基板604a支撐)的半導體晶粒602a,其中導電結構606a及606b(即,例如濺射鋁凸起、鋁柱形凸起等)被設置在半導體晶粒602a的上表面上。半導體元件660a由支撐結構650支撐。FIG. 6A shows a portion of an
另一個半導體元件660b(包括被接合至基板604b或者以其它方式由基板604b支撐的相應半導體晶粒602b,並且包括位於基板604b上的導電結構612a及612b)已經預先被接合至半導體元件660a。具體而言,接合工具624預先將元件660b接合(例如,超音波接合)至元件660a,使得在相應成對的鋁導電結構612a與606a以及612b與606b之間形成超音波接合部628a及628b。元件660b還包括導電結構606a'及606b',它們已經在下面描述的步驟中被接合至元件660c的導電結構。圖6B顯示包括變形的導電結構612a及606a的超音波接合部628a的詳細視圖。Another
類似地,又一個半導體元件660c(包括被接合至基板604c或者以其它方式由基板604c支撐的相應半導體晶粒602c,並且包括位於基板604c上的導電結構612a'及612b')已經預先被接合至半導體元件660b。具體而言,接合工具624預先將元件660c接合(例如,超音波接合)至元件660b,使得在相應成對的鋁導電結構612a'與606a'以及612b'與606b'之間形成超音波接合部628a'及628b'。元件660c還包括導電結構606a''及606b'',它們將在下面描述的步驟中被接合至元件660d的導電結構。Similarly, yet another
如圖6A所示,上部半導體元件660d由接合工具624的保持部分610(例如,通過真空)保持,並且包括被接合至基板604d(或者以其它方式由基板604d支撐)的半導體晶粒602d。導電結構612a''及612b''(即,例如濺射鋁凸起、鋁柱形凸起等)被設置在基板604d的下表面上。導電結構612a''及612b''通常是與相對應的導電結構606a''及606b''對準(並且被構造成超音波接合至相對的相應導電結構606a''及606b'')。通過接合工具624的運動(如圖6A中的箭頭所示)使半導體元件660d向下移動。在該向下運動之後,在相應成對的導電結構612a''與606a''以及612b''與606b''之間發生接觸(參見,例如圖6C的結構612a''與606a''之間在通過超音波接合變形前的接觸的詳細視圖)。使用超音波換能器(未於圖中示出)通過接合工具624將超音波能量施加至上部半導體元件604d,以在相應成對的導電結構612a''與606a''以及612b''與606b''之間形成超音波接合部。As shown in FIG. 6A ,
雖然已經例示了具體的示例性上部鋁導電結構和下部鋁導電結構,但是本領域技術人員將理解到,在本發明的教示內允許有各種形狀和設計的上部鋁導電結構和下部鋁導電結構。Although specific exemplary upper and lower aluminum conductive structures have been illustrated, those skilled in the art will appreciate that various shapes and designs of upper and lower aluminum conductive structures are permitted within the teachings of the present invention.
圖7是顯示根據本發明的一個示例性實施例的將半導體接合在一起的方法的流程圖。如本領域技術人員所理解到的,可以省略被包括在流程圖的某些步驟;可以增加一些額外的步驟;以及,步驟的順序可以相對於所示出的順序改變。在步驟700中,第一半導體元件(例如,包括位於基板上的半導體晶粒)被支撐在接合機的支撐結構上。第一半導體元件(例如,半導體結構的上表面)包括至少部分地由鋁構成的多個第一導電結構(參見,例如圖1A中的元件160的結構106a及106b;圖2A中的元件260的結構206a及206b;圖3A中的元件360的結構306a及306b;圖4A中的元件460的結構406a及406b;圖5A中的元件560的結構506a及506b;以及圖6A中的元件660c的結構606a''及606b'')。在步驟702中,第二半導體元件由接合機的接合工具的保持部分保持(參見,例如相應附圖中的元件108、208、308、408、508以及660d)。第二半導體元件包括至少部分地由鋁構成的多個第二導電結構(例如,位於第二半導體元件的下表面上)。在步驟704中,第一導電結構和第二導電結構被彼此對準(參見,例如圖1A和圖6A),隨後使它們彼此接觸。在可選的步驟706中,以預定大小的接合力將多個被對準的第一導電結構和第二導電結構壓在一起。預定大小的接合力可以是單個接合力值,或者可以是接合操作期間實際接合力在其中變化的接合力曲線(profile)。在可選的步驟708中,將熱量施加至多個被對準的第一導電結構及/或第二導電結構。例如,可以使用支撐第一半導體元件的支撐結構來將熱量施加至第一導電結構。類似地,可以使用保持第二半導體元件的接合工具來將熱量施加至第二導電結構。在步驟710中,多個第一導電結構和第二導電結構被超音波接合在一起,以在它們之間形成超音波接合部。FIG. 7 is a flowchart showing a method of bonding semiconductors together according to an exemplary embodiment of the present invention. As those skilled in the art understand, certain steps included in the flowcharts may be omitted; some additional steps may be added; and the order of the steps may be changed relative to the order shown. In
如本領域技術人員將理解到的,由於本發明將鋁材料接合至鋁材料,這可以容易地利用超音波能量及/或接合力來完成,而通常不需要加熱,因此當期望環境溫度/較低溫度的接合操作時,本發明尤其有益。As will be appreciated by those skilled in the art, since the present invention joins aluminum material to aluminum material, this can readily be accomplished using ultrasonic energy and/or bonding force, typically without the need for heating, so when ambient temperature/relative The present invention is particularly beneficial for low temperature bonding operations.
雖然本發明主要描述並例示關於被超音波接合在一起的兩對導電結構,但是本發明當然不限於此。實際上,根據本發明裝配的半導體封裝(例如,先進封裝)可以具有任意數量的導電結構,並且可以具有被超音波接合在一起的數百(或者甚至數千)對導電結構。此外,導電結構不需要成對接合。例如,一個結構可以被接合至兩個或更多個相對的結構。因此,來自一個半導體元件的任意數量的導電結構可以被超音波接合至另一個半導體的任意數量的導電結構。While the present invention is primarily described and illustrated in relation to two pairs of conductive structures ultrasonically bonded together, the invention is of course not limited thereto. In fact, semiconductor packages assembled in accordance with the present invention (eg, advanced packages) may have any number of conductive structures, and may have hundreds (or even thousands) of pairs of conductive structures that are ultrasonically bonded together. Furthermore, the conductive structures do not need to be bonded in pairs. For example, one structure may be joined to two or more opposing structures. Thus, any number of conductive structures from one semiconductor component can be ultrasonically bonded to any number of conductive structures of another semiconductor.
雖然本發明主要描述(和示出)了超音波能量通過接合工具(例如,在接合工具與超音波換能器接合的位置)的施加,但是本發明不限於此。更確切地說,可以通過任何期望的結構傳輸超音波能量,例如支撐結構。While the present disclosure primarily describes (and illustrates) the application of ultrasonic energy through a bonding tool (eg, at the location where the bonding tool engages an ultrasonic transducer), the present invention is not limited thereto. Rather, ultrasound energy can be transmitted through any desired structure, such as a support structure.
如本領域技術人員將理解到的,根據具體應用,超音波接合的細節可廣泛變化。儘管如此,現在描述一些非限制性的示例性細節。例如,可以結合導電結構(例如,柱結構等)的設計來對超音波換能器的頻率進行設計,使得換能器諧振頻率大致與給定的半導體元件的諧振頻率一致,在這種情況下,導電結構可以作為懸臂樑來動態地起作用。在另一個示例性替代方案中,換能器能夠以簡單的「從動」型方式相對於半導體元件成非諧振狀態運行。As will be appreciated by those skilled in the art, the details of the ultrasonic bonding can vary widely depending on the particular application. Nonetheless, some non-limiting exemplary details are now described. For example, the frequency of the ultrasonic transducer can be designed in conjunction with the design of the conductive structure (for example, a column structure, etc.), so that the resonant frequency of the transducer is roughly consistent with the resonant frequency of a given semiconductor element, in this case , the conductive structure can act dynamically as a cantilever beam. In another exemplary alternative, the transducer can be operated out of resonance with respect to the semiconductor element in a simple "slave" type of manner.
施加至超音波換能器(例如,施加至換能器驅動器中的壓電晶體/陶瓷)的能量的示例性範圍可以在0.1kHz至160kHz、10kHz至120kHz、20kHz至60kHz等範圍內。在接合期間,可以施加單個頻率,或者可以施加多個頻率(例如,依序地、同時地或者依序且同時地)。對半導體元件的擦洗(即,被施加至由接合工具保持的半導體元件的振動能量)可以在多個期望方向中的任意方向上被施加,並且可以通過保持半導體元件的接合工具(如本發明中所示的)、通過支撐半導體元件的支撐結構、以及其它結構來施加。具體參考本發明所示的實施例(其中超音波能量通過保持半導體元件的接合工具施加),擦洗可以在大致平行於或者大致垂直於接合工具的縱向軸線的方向上(或者在其它方向上)施加。Exemplary ranges of energy applied to an ultrasonic transducer (eg, to a piezoelectric crystal/ceramic in a transducer driver) may be in the range of 0.1 kHz to 160 kHz, 10 kHz to 120 kHz, 20 kHz to 60 kHz, etc. During engagement, a single frequency may be applied, or multiple frequencies may be applied (eg, sequentially, simultaneously, or both sequentially and simultaneously). The scrubbing of the semiconductor element (i.e., the vibrational energy applied to the semiconductor element held by the bonding tool) can be applied in any of a number of desired directions, and can be applied by the bonding tool holding the semiconductor element (as in the present invention). shown), applied by support structures supporting semiconductor elements, and other structures. With particular reference to the illustrated embodiment of the invention in which ultrasonic energy is applied by a bonding tool holding a semiconductor component, the scrubbing may be applied in a direction generally parallel or generally perpendicular to the longitudinal axis of the bonding tool (or in other directions) .
由超音波換能器施加的振動能量可以例如以0.1 um至10 um的峰-峰幅度範圍施加(例如,利用對恆定電壓、恆定電流的回饋控制、或包括但不限於斜坡電流、斜坡電壓的交替控制方案、或基於一個或多個輸入的比例回饋控制)。The vibrational energy applied by the ultrasonic transducer can be applied, for example, with a peak-to-peak amplitude range of 0.1 um to 10 um (e.g., using feedback control to constant voltage, constant current, or including but not limited to ramp current, ramp voltage Alternate control schemes, or proportional feedback control based on one or more inputs).
如本發明所描述的,還可以在超音波接合週期的至少一部分期間施加接合力。接合力的示例性範圍為0.1kg至100kg。接合力可以作為恆定值施加,或者可以是在接合週期期間改變的接合力曲線。在受控的接合力實施方式中,基於一個或多個輸入(例如,超音波振幅、時間、速度、變形、溫度等),對接合力的回饋控制可以是恆定的、斜坡的或成比例的。The bonding force may also be applied during at least a portion of the ultrasonic bonding cycle, as described herein. An exemplary range of engagement force is 0.1 kg to 100 kg. The engagement force may be applied as a constant value, or may be an engagement force profile that varies during the engagement cycle. In controlled joint force embodiments, feedback control of joint force may be constant, ramped, or proportional based on one or more inputs (eg, ultrasonic amplitude, time, velocity, deformation, temperature, etc.).
如本發明所描述的,可以在接合週期前及/或在接合週期期間對半導體元件中的一個或多個進行加熱。半導體元件的示例性溫度範圍在20℃至250℃之間。熱量(例如,通過接合工具和支撐結構中的一個或全部、或者其它元件施加的)可以作為恆定值施加,或者可以是在接合週期期間改變的溫度曲線,並且可以利用回饋控制來控制。As described herein, one or more of the semiconductor elements may be heated prior to and/or during the bonding cycle. Exemplary temperature ranges for semiconductor components are between 20°C and 250°C. Heat (eg, applied by one or both of the bonding tool and support structure, or other elements) may be applied as a constant value, or may be a temperature profile that varies during the bonding cycle, and may be controlled using feedback control.
雖然本發明主要係描述並例示關於位於相應半導體元件上的鋁導電結構之間形成超音波接合部,但是本發明當然不限於此。即,本發明的教示可以適用在具有不同成分的導電結構之間形成超音波接合部。用於被連接的導電結構的材料的示例性列表包括:鋁與銅(即,在位於一個半導體元件上的鋁導電結構與位於另一半導體元件上的銅導電結構之間形成超音波接合部);無鉛焊料(例如,主要由錫組成)與銅;無鉛焊料與鋁;銅與銅;鋁與銀;銅與銀;鋁與金;金與金;以及銅與金。當然,可以設想導電結構成分(例如,銦)的其它組合。Although the present invention is primarily described and illustrated in relation to the formation of ultrasonic joints between aluminum conductive structures on corresponding semiconductor components, the present invention is of course not limited thereto. That is, the teachings of the present invention may be adapted to form ultrasonic joints between conductive structures having different compositions. An exemplary list of materials for the conductive structures being connected includes: Aluminum and Copper (i.e., to form an ultrasonic bond between an aluminum conductive structure on one semiconductor element and a copper conductive structure on another semiconductor element) ; lead-free solder (eg, consisting essentially of tin) and copper; lead-free solder and aluminum; copper and copper; aluminum and silver; copper and silver; aluminum and gold; gold and gold; and copper and gold. Of course, other combinations of conductive structural components (eg, indium) are conceivable.
如以上所提供的,雖然已經結合被包括在半導體元件的各種導電結構中的鋁材料來描述本發明的多個方面,但是本發明不限於此。即,位於半導體元件上的導電結構可以包括各種不同的材料(或由各種不同的材料形成)。例如,位於上部半導體元件(例如,使用接合工具承載和接合的元件)上的導電結構及/或位於下部半導體元件(例如,上部導電元件被接合至的元件)上的導電結構可以由銅形成(或者包括銅)。這種銅材料表面可能受大氣污染物;即,銅表面傾向於氧化。As provided above, although aspects of the present invention have been described in connection with aluminum materials included in various conductive structures of semiconductor elements, the present invention is not limited thereto. That is, the conductive structures on the semiconductor element may include (or be formed from) various materials. For example, conductive structures on the upper semiconductor element (e.g., the element carried and bonded using a bonding tool) and/or on the lower semiconductor element (e.g., the element to which the upper conductive element is bonded) may be formed from copper ( or include copper). Such copper material surfaces may be subject to atmospheric contamination; that is, the copper surface tends to oxidize.
因此,在本發明的某些實施例中,多個第一導電結構和多個第二導電結構中的至少一種導電結構可以由銅形成(或者包括銅)。在本發明的這種實施例中,整個導電結構不需要由銅形成,而是,多個第一導電結構及/或多個第二導電結構可以在鄰近多個第一導電結構和多個第二導電結構中的另一種導電結構的介面部分處包括銅。Therefore, in some embodiments of the present invention, at least one conductive structure of the plurality of first conductive structures and the plurality of second conductive structures may be formed of (or include) copper. In such an embodiment of the invention, the entire conductive structure need not be formed of copper, instead, the plurality of first conductive structures and/or the plurality of second conductive structures may be adjacent to the plurality of first conductive structures and the plurality of second conductive structures. The interface portion of the other conductive structure of the two conductive structures includes copper.
根據本發明的各個面向,可以在進行超音波接合前,將塗層(例如,無機塗層)施加至這種導電結構的表面,以防止銅表面(例如,諸如銅柱的銅導電結構的連接表面)氧化。具體而言,可以在進行接合前,將這種塗層施加至位於上部半導體元件(例如,使用接合工具來承載和接合的元件)上的導電結構及/或位於下部半導體元件(例如,上部導電元件接合被接合至的元件)上的導電結構的表面(例如,接合表面)。According to aspects of the invention, coatings (e.g., inorganic coatings) may be applied to the surface of such conductive structures prior to ultrasonic bonding to prevent the joining of copper surfaces (e.g., copper conductive structures such as copper pillars). surface) oxidation. In particular, such coatings may be applied to conductive structures on upper semiconductor elements (e.g., elements carried and bonded using a bonding tool) and/or to conductive structures on lower semiconductor elements (e.g., upper conductive components) prior to bonding. A component engages a surface (eg, a bonding surface) of a conductive structure on the component to which it is bonded.
例如,這種塗層可以是作為薄的易碎塗層被施加在導電結構(例如,銅柱導電結構)上的無機塗層(例如,氮氧化矽塗層)。在位於上部半導體元件和下部半導體元件上的相應導電結構之間形成倒裝晶片互連部前,塗層可以起到保護這些導電結構(諸如銅導電結構)中的某些免於氧化等的作用。隨後,結合超音波倒裝晶片連接工藝,位於相對應導電結構上的(一個或多個)塗層被超音波擦除,由此建立金屬到金屬的接觸/互連。For example, such a coating may be an inorganic coating (eg, a silicon oxynitride coating) applied as a thin, friable coating on a conductive structure (eg, a copper pillar conductive structure). The coating may serve to protect some of these conductive structures, such as copper conductive structures, from oxidation, etc. . Subsequently, in conjunction with an ultrasonic flip-chip bonding process, the coating(s) on the corresponding conductive structures are ultrasonically erased, thereby establishing metal-to-metal contacts/interconnections.
通過在導電結構上設置塗層,可以提高細間距倒裝晶片封裝的生產率和穩固性。例如,由於倒裝晶片封裝(其可以包括銅互連部)趨向越來越細的間距,因此塗層的使用適用於包括但不限於晶粒到基板、晶粒到晶粒以及晶粒到晶圓的各種場合中形成互連部。By providing a coating on the conductive structure, the productivity and robustness of fine-pitch flip-chip packaging can be improved. For example, as flip-chip packages (which may include copper interconnects) move toward finer and finer pitches, the use of coatings is suitable for applications including, but not limited to, die-to-substrate, die-to-die, and die-to-die Interconnects are formed in various occasions of the circle.
在利用超音波能量破壞(break through)塗層(及/或形成在導電結構上的其它氧化物層)後,完成半導體元件的導電結構之間的最終連接工藝(例如,其可包括熱、壓力及/或力的任何所需組合)。After ultrasonic energy is used to break through the coating (and/or other oxide layers formed on the conductive structures), the final connection process (for example, which may include heat, pressure, etc.) between the conductive structures of the semiconductor element is completed. and/or any desired combination of forces).
圖8A至圖8C(與圖9的流程圖一起)、圖10A至圖10C(與圖11的流程圖一起)以及圖12A至圖12C(與圖13的流程圖一起)顯示在利用前述(一個或多個)塗層的半導體元件之間形成互連部的系統及方法。圖9、圖11及圖13顯示根據本發明的示例性實施例的將半導體元件接合在一起的方法的流程圖。如本領域技術人員所理解到的,可以省略被包括在流程圖中的某些步驟;可以增加一些額外的步驟;以及,步驟的順序可以相對於所示出的順序改變。8A to 8C (together with the flowchart of FIG. 9 ), FIGS. 10A to 10C (together with the flowchart of FIG. 11 ), and FIGS. 12A to 12C (together with the flowchart of FIG. 13 ) show A system and method for forming interconnections between coated semiconductor elements. 9 , 11 and 13 show flowcharts of a method of bonding semiconductor elements together according to an exemplary embodiment of the present invention. As those skilled in the art will appreciate, certain steps included in the flowcharts may be omitted; some additional steps may be added; and the order of the steps may be changed relative to the order shown.
具體參考圖8A,上部半導體元件808由接合工具824的保持部分810(例如,通過真空,諸如通過由保持部分810的保持表面限定的真空埠)保持。上部半導體元件808包括位於其下表面上的上部導電結構812a及812b。下部半導體元件860包括被接合至基板804(或者以其它方式由基板804支撐)的半導體晶粒802。下部導電結構806a及806b(例如,諸如銅柱的銅導電結構、其它導電結構)被設置在下部半導體晶粒802的上表面上。塗層806a1被設置在導電結構806a上,並且塗層806b1被設置在導電結構806b上。基板804又由支撐結構850(例如,機器800的加熱塊、機器800的砧座或者任何其它期望的支撐結構)支撐。在圖8A所示的結構(準備進行接合)中,上部導電結構812a及812b中的每一個通常是與相對應的下部導電結構806a及806b對準。通過接合工具824的運動(如圖8A中的箭頭826所示)使半導體元件808向下移動。在這個運動之後,圖8B顯示相應導電結構806a(包括塗層806a1)與812a以及806b(包括塗層806b1)與812b之間的接觸。利用超音波換能器(未於圖中示出,但在附圖中被表示為「USG」,即超音波發生器)通過接合工具824將超音波能量814施加至上部半導體元件808以及上部導電結構812a和812b。例如,承載接合工具824的超音波換能器又可以由倒裝晶片接合機800的接合頭組件承載。在超音波接合期間,下部導電結構806a及806b可通過由支撐結構850提供給下部半導體元件860的支撐(例如,支撐結構850的支撐表面可包括一個或多個真空埠,以在接合期間將基板804緊固至支撐結構850)來保持相對靜止。超音波能量814(與可選的接合力及/或熱量一起)可以使得導電結構局部變形。例如,在圖8C中,導電結構806a及806b以及812a及812b被顯示為變形(或者至少部分地變形)。在圖8C中,超音波接合部被形成在相應成對的導電結構之間。例如,超音波接合部828a被形成在變形的導電結構812a'/806a'之間,並且超音波接合部828b被形成在變形的導電結構812b'/806b'之間。Referring specifically to FIG. 8A ,
具體參考圖9,在步驟900中,第一半導體元件(例如,包括位於基板上的半導體晶粒,諸如圖8A所示的元件860)被支撐在接合機的支撐結構上。第一半導體元件(例如,半導體結構的上表面)包括多個第一導電結構,該多個第一導電結構包括位於導電結構的接觸表面(例如,用於倒裝晶片接合的接合表面)上的易碎塗層(參見,例如如圖8A所示的元件860的包括塗層806a1及806b1的結構806a及806b)。在步驟902中,第二半導體元件由接合機的接合工具的保持部分保持(參見,例如圖8A中的元件808)。第二半導體元件包括多個第二導電結構(例如,位於第二半導體元件的下表面上)。在步驟904中,第一導電結構和第二導電結構被彼此對準(參見,例如圖8A),並且隨後使它們彼此接觸(參見,例如圖8B)。在步驟906中,超音波能量(諸如在圖8B中,通過承載第二半導體元件的接合工具)被施加至第二半導體元件,使得第二半導體元件的導電結構破壞第一半導體元件的導電結構的與在該成對導電結構之間形成的超音波接合部(例如,參見圖8C中的超音波接合部828a及828b)相關的相應塗層。Referring specifically to FIG. 9, in
具體參考圖10A,上部半導體元件1008由接合工具1024的保持部分1010(例如,通過真空,諸如通過由保持部分1010的保持表面限定的真空埠)保持。上部半導體元件1008包括位於其下表面上的上部導電結構1012a及1012b(例如,由銅形成或包括銅的導電結構),其中塗層1012a1被設置在導電結構1012a上,並且塗層1012b1被設置在導電結構1012b上。下部半導體元件1060包括被接合至基板1004(或者以其它方式由基板1004支撐)的半導體晶粒1002。下部導電結構1006a及1006b(例如,諸如銅柱的銅導電結構、其它導電結構)被設置在下部半導體晶粒1002的上表面上。基板1004又由支撐結構1050(例如,機器1000的加熱塊、機器1000的砧座或者任何其它期望的支撐結構)支撐。在圖10A所示的結構(準備進行接合)中,上部導電結構1012a及1012b中的每一個通常是與相對應的下部導電結構1006a及1006b對準。通過接合工具1024的運動(如圖10A中的箭頭1026所示)使半導體元件1008向下移動。在這個運動之後,圖10B顯示相應導電結構1006a與1012a(包括塗層1012a1)以及1006b與1012b(包括塗層1012b1)之間的接觸。利用超音波換能器通過接合工具1024將超音波能量1014施加至上部半導體元件1008以及上部導電結構1012a及1012b。例如,承載接合工具1024的超音波換能器又可以由機器1000的接合頭元件承載。在超音波接合期間,下部導電結構1006a及1006b可通過由支撐結構1050提供給下部半導體元件1060的支撐(例如,支撐結構1050的支撐表面可包括一個或多個真空埠,以在接合期間將基板1004緊固至支撐結構1050)來保持相對靜止。超音波能量1014(與可選的接合力及/或熱量一起)可以使得導電結構局部變形。例如,在圖10C中,導電結構1006a及1006b以及1012a及1012b被顯示為變形(或者至少部分地變形)。在圖10C中,超音波接合部被形成在相應成對的導電結構之間。例如,超音波接合部1028a被形成在變形的1012a'/1006a'之間,並且超音波接合部1028b被形成在變形的導電結構1012b'/1006b'之間。Referring specifically to FIG. 10A ,
具體參考圖11,在步驟1100中,第一半導體元件(例如,包括位於基板上的半導體晶粒,諸如圖10A所示的元件1060)被支撐在接合機的支撐結構上。第一半導體元件(例如,半導體結構的上表面)包括多個第一導電結構(參見,例如圖10A所示的元件1060的結構1006a及1006b)。在步驟1102中,第二半導體元件由接合機的接合工具的保持部分保持(參見,例如圖10A中的元件1008)。第二半導體元件包括多個第二導電結構(例如,位於第二半導體元件的下表面上),該多個第二導電結構包括位於導電結構的接觸部分上的塗層(參見,例如圖10A所示,元件1060的包括塗層1012a1及1012b1的結構1012a及1012b)。在步驟1104中,第一導電結構和第二導電結構被彼此對準(參見,例如圖10A),並且隨後使它們彼此接觸。在步驟1106中,超音波能量(諸如在圖10B中,通過承載第二半導體元件的接合工具)被施加至第二半導體元件,使得第一半導體元件的導電結構破壞第二半導體元件的導電結構的與在該成對導電結構之間形成超音波接合部(例如,參見圖10C中的超音波接合部1028a及1028b)相關的相應塗層。Referring specifically to FIG. 11 , in step 1100 a first semiconductor component (eg, comprising a semiconductor die on a substrate, such as
具體參考圖12A,上部半導體元件1208由接合工具1224的保持部分1210(例如,通過真空,諸如通過由保持部分1210的保持表面限定的真空埠)保持。上部半導體元件1208包括位於其下表面上的上部導電結構1212a及1212b(例如,由銅形成或包括銅的導電結構),其中塗層1212a1被設置在導電結構1212a上,並且塗層1212b1被設置在導電結構1212b上。下部半導體元件1260包括被接合至基板1204(或者以其它方式由基板1204支撐)的半導體晶粒1202。下部導電結構1206a及1206b(例如,諸如銅柱的銅導電結構、其它導電結構)被設置在下部半導體晶粒1202的上表面上。塗層1206a1被設置在導電結構1206a上,並且塗層1206b1被設置在導電結構1206b上。基板1204又由支撐結構1250(例如,機器1200的加熱塊、機器1200的砧座或者任何其它期望的支撐結構)支撐。在圖12A所示的結構(準備進行接合)中,上部導電結構1212a及1212b中的每一個通常是與相對應的下部導電結構1206a及1206b對準。通過接合工具1224的運動(如圖12A中的箭頭1226所示)使半導體元件1208向下移動。在這個運動之後,圖12B顯示相應導電結構1206a(包括塗層1206a1)與1212a(包括塗層1212a1)以及1206b(包括塗層1206b1)與1212b(包括塗層1212b1)之間的接觸。利用超音波換能器(未示出,但在附圖中被表示為「USG」,即超音波發生器)通過接合工具1224將超音波能量1214施加至上部半導體元件1208以及上部導電結構1212a及1212b。例如,承載接合工具1224的超音波換能器又可以由機器1200的接合頭元件承載。在超音波接合期間,下部導電結構1206a及1206b可通過由支撐結構1250提供給下部半導體元件1260的支撐(例如,支撐結構1250的支撐表面可包括一個或多個真空埠,以在接合期間將基板1204緊固至支撐結構1250)來保持相對靜止。超音波能量1214(與可選的接合力及/或熱量一起)可以使得導電結構局部變形。例如,在圖12C中,導電結構1206a及1206b以及1212a及1212b被顯示為變形(或者至少部分地變形)。在圖12C中,超音波接合部被形成在相應成對的導電結構之間。例如,超音波接合部1228a被形成在變形的導電結構1212a'/1206a'之間,並且超音波接合部1228b被形成在變形的導電結構1212b'/1206b'之間。Referring specifically to FIG. 12A ,
具體參考圖13,在步驟1300中,第一半導體元件(例如,包括位於基板上的半導體晶粒,諸如圖12A所示的元件1260)被支撐在接合機的支撐結構上。第一半導體元件(例如,半導體結構的上表面)包括多個第一導電結構,該多個第一導電結構包括位於導電結構的接觸表面上的塗層(參見,例如圖12A所示,元件1260的包括塗層1206a1及1206b1的結構1206a及1206b)。在步驟1302中,第二半導體元件由接合機的接合工具的保持部分保持(參見,例如圖12A中的元件1208)。第二半導體元件包括多個第二導電結構(例如,位於第二半導體元件的下表面上),該多個第二導電結構包括位於導電結構的接觸部分的塗層(參見,例如圖12A所示,元件1208的包括塗層1212a1及1212b1的結構1212a及1212b)。在步驟1304中,第一導電結構和第二導電結構被彼此對準(參見,例如圖12A),並且隨後使它們彼此接觸。在步驟1306中,超音波能量(諸如在圖12B中,通過承載第二半導體元件的接合工具)被施加至第二半導體元件,使得第二半導體元件的導電結構破壞第一半導體元件的導電結構的與在該成對導電結構之間形成超音波接合部(例如,參見圖12C中的超音波接合部1228a及1228b)相關的相應塗層(並且反之亦然,即,第一半導體元件的導電結構破壞第二半導體元件的導電結構的與在該成對導電結構之間形成超音波接合部相關的相應塗層)。Referring specifically to FIG. 13, in
相應成對的導電元件(圖8A中的806a與812a以及806b與812b;圖10A中的1006a與1012a以及1006b與1012b;以及圖12中的1206a與1212a以及1206b與1212b)可以在室溫下(無需在接合工藝期間添加熱量)被接合在一起。可選地,可以例如:(1)在接合工藝期間,通過接合工具824/1024/1224給上部半導體元件808/1008/1012施加熱量,由此加熱相應的上部導電元件;及/或(2)在接合工藝期間,通過支撐結構850/1050/1250給下部半導體元件860/1060/1260施加熱量,由此加熱相應的下部導電結構。這種可選的加熱(例如,通過接合工具及/或支撐結構等)適用於在本發明中示出並描述的本發明的任何實施例。Corresponding pairs of conductive elements (806a and 812a and 806b and 812b in FIG. 8A; 1006a and 1012a and 1006b and 1012b in FIG. 10A; and 1206a and 1212a and 1206b and 1212b in FIG. without adding heat during the bonding process) are bonded together. Optionally, heat may be applied to the
此外,在接合工藝(例如,結合圖8A至圖8C、圖10A至圖10C以及圖12A至圖12C示出並描述的工藝)期間,可以用預定大小的接合力將多個第一導電結構和第二導電結構壓合在一起。預定大小的接合力可以是單個接合力值,或者可以是倒裝晶片接合操作期間實際接合力在其中變化的接合力曲線。In addition, during a bonding process (eg, the processes shown and described in conjunction with FIGS. 8A to 8C , 10A to 10C , and 12A to 12C ), the plurality of first conductive structures and The second conductive structures are pressed together. The predetermined magnitude of bonding force may be a single bonding force value, or may be a bonding force profile in which actual bonding force varies during the flip chip bonding operation.
無論上述特定元件如何,半導體元件860及808(在圖8A至圖8C中)、1060及1008(在圖10A至圖10C中)以及1260及1208(在圖12A至圖12C中)可以是被配置成接合在一起的多個半導體元件中的任意一個(例如,被配置成接合至處理器的記憶體裝置)。例如,下部半導體元件(860、1060、1260)可以是被配置成在倒裝晶片接合工藝期間接收上部半導體元件(例如,晶粒)的半導體晶粒、晶圓、面板、基板、以及許多其它可能的元件。Regardless of the particular elements described above,
導電結構(即,圖8A至圖8C中的812a、812b、806a及806b;圖10A至圖10C中的1012a、1012b、1006a及1006b;以及圖12A至圖12C中的1212a、1212b、1206a及1206b)被顯示為通用結構。這些結構可以採用許多不同的形式,諸如導電柱、柱形凸起(例如,使用柱形凸起機形成的)、電鍍導電結構、濺射導電結構、導線部分、接合焊盤、接觸焊盤以及其它形式。本發明提供的各種其它附圖顯示這種結構的具體示例。根據本發明的某些實施例,導電結構可以由銅或受氧化的一些其它材料等形成,或者包括銅或受氧化的一些其它材料等。Conductive structures (i.e., 812a, 812b, 806a, and 806b in FIGS. 8A-8C; 1012a, 1012b, 1006a, and 1006b in FIGS. ) are shown as generic constructs. These structures can take many different forms, such as conductive posts, stud bumps (for example, formed using a stud bump machine), plated conductive structures, sputtered conductive structures, wire sections, bond pads, contact pads, and other forms. Various other figures provided herein show specific examples of such structures. According to some embodiments of the present invention, the conductive structure may be formed of or include copper or some other material that is oxidized, or the like.
儘管本發明參照特定實施例來說明和描述,但本發明並不意圖受限於該描述細節。相反地,在申請專利範圍的範疇和均等範圍內且在不脫離本發明的情況下,可以對本發明細節進行各種修改。Although the invention has been illustrated and described with reference to particular embodiments, the invention is not intended to be limited to the details of the description. Rather, various modifications may be made to the details of the invention within the scope and range of equivalents of the claims and without departing from the invention.
100‧‧‧超音波接合機、機器102‧‧‧半導體晶粒、下部半導體晶粒104‧‧‧基板106a、106b‧‧‧導電結構、下部導電結構、導電元件、結構106a'‧‧‧導電結構108‧‧‧半導體元件、上部半導體元件、元件110‧‧‧保持部分112a、112b‧‧‧導電結構、上部導電結構、導電元件、上部導電元件112a'‧‧‧導電結構114‧‧‧超音波能量124‧‧‧接合工具126‧‧‧箭頭128a、128b‧‧‧超音波接合部150‧‧‧支撐結構160‧‧‧半導體元件、下部半導體元件、元件200‧‧‧超音波接合機202‧‧‧半導體晶粒、下部半導體晶粒204‧‧‧基板206a、206b‧‧‧下部導電結構、導電結構、結構208‧‧‧上部半導體元件、元件210‧‧‧保持部分216‧‧‧上部鋁接觸結構、鋁接觸結構/部分216'‧‧‧接觸結構222a、222b‧‧‧上部導電結構、導電鋁焊盤222a'‧‧‧上部導電結構224‧‧‧接合工具228‧‧‧超音波接合部230‧‧‧銅柱、Cu柱250‧‧‧支撐結構260‧‧‧下部半導體元件、元件300‧‧‧超音波接合機302‧‧‧半導體晶粒、晶粒304‧‧‧基板306a、306b‧‧‧下部導電結構、導電結構、結構308‧‧‧上部半導體元件310‧‧‧保持部分316a、316b‧‧‧上部鋁接觸結構、鋁接觸結構320a、320b‧‧‧導線環322a、322b‧‧‧上部導電結構、導電鋁焊盤、導電結構、鋁導電結構324‧‧‧接合工具330a、330b‧‧‧Cu柱334‧‧‧塗層/封裝350‧‧‧支撐結構360‧‧‧封裝半導體裝置、下部半導體元件、元件400‧‧‧超音波接合機402‧‧‧半導體晶粒、下部半導體晶粒404‧‧‧支撐結構、基板406a、406b‧‧‧下部導電結構、導電結構、結構406a、406a'‧‧‧結構408‧‧‧上部半導體元件、半導體元件、元件410‧‧‧保持部分412a、412b‧‧‧上部導電結構、導電結構412a、412a'‧‧‧結構414‧‧‧超音波能量424‧‧‧接合工具428a、428b‧‧‧超音波接合部428a'‧‧‧完整超音波接合部450‧‧‧支撐結構460‧‧‧下部半導體元件、元件500‧‧‧超音波接合機502‧‧‧半導體晶粒、下部半導體晶粒504‧‧‧基板506a、506b‧‧‧下部導電結構、結構506a、506a'‧‧‧結構508‧‧‧半導體元件、上部半導體元件、元件510‧‧‧保持部分522a、522b‧‧‧上部導電結構、導電鋁焊盤522a、522a'‧‧‧結構524‧‧‧接合工具528a、528b‧‧‧超音波接合部528a'‧‧‧完整超音波接合部550‧‧‧支撐結構560‧‧‧下部半導體元件、元件600‧‧‧超音波接合機602a、602b、602c、602d‧‧‧半導體晶粒604a、604b、604c、604d‧‧‧基板、上部半導體元件606a、606b、612a、612b‧‧‧導電結構、鋁導電結構606a'、606b'、612a'、612b'‧‧‧導電結構、鋁導電結構606a''、606b''、612a''、612b''‧‧‧導電結構、結構624‧‧‧接合工具628a、628b‧‧‧超音波接合部628a'、628b'‧‧‧超音波接合部650‧‧‧支撐結構660a、660b、660c、660d‧‧‧半導體元件、元件700、702、704、706、708、710‧‧‧步驟800‧‧‧倒裝晶片接合機、機器802‧‧‧下部半導體晶粒、半導體晶粒804‧‧‧基板806a、806b‧‧‧導電結構、下部導電結構、結構、導電元件806a'、806b'‧‧‧導電結構806a1、806b1‧‧‧塗層808‧‧‧上部半導體元件、元件、半導體元件810‧‧‧保持部分812a、812b‧‧‧上部導電結構、導電結構、導電元件812a'、812b'‧‧‧導電結構814‧‧‧超音波能量824‧‧‧接合工具826‧‧‧箭頭828a、828b‧‧‧超音波接合部850‧‧‧支撐結構860‧‧‧下部半導體元件、元件、半導體元件900、902、904、906‧‧‧步驟1000‧‧‧機器1002‧‧‧半導體晶粒、下部半導體晶粒1004‧‧‧基板1006a、1006b‧‧‧下部導電結構、導電結構、結構、導電元件1006a'、1006b'‧‧‧導電結構1008‧‧‧上部半導體元件、半導體元件、元件1010‧‧‧保持部分1012‧‧‧上部半導體元件1012a、1012b‧‧‧上部導電結構、導電結構、導電元件1012a'、1012b'‧‧‧導電結構1012a1、1012b1‧‧‧塗層1014‧‧‧超音波能量1024‧‧‧接合工具1026‧‧‧箭頭1028a、1028b‧‧‧超音波接合部1050‧‧‧支撐結構1060‧‧‧下部半導體元件、元件、半導體元件1100、1102、1104、1106‧‧‧步驟1200‧‧‧機器1202‧‧‧半導體晶粒、下部半導體晶粒1204‧‧‧基板1206a、1206b‧‧‧下部導電結構、導電結構、結構、導電元件1206a'、1206b'‧‧‧導電結構1206a1、1206b1塗層1208‧‧‧上部半導體元件、半導體元件1210‧‧‧保持部分1212a、1212b‧‧‧上部導電結構、導電結構、導電元件1212a'、1212b'‧‧‧導電結構1212a1、1212b1‧‧‧塗層1214‧‧‧超音波能量1224‧‧‧接合工具1226‧‧‧箭頭1228a、1228b‧‧‧超音波接合部1250‧‧‧支撐結構1260‧‧‧下部半導體元件、元件、半導體元件1300、1302、1304、1306‧‧‧步驟100‧‧‧ultrasonic bonding machine, machine 102‧‧‧semiconductor grain, lower semiconductor grain 104‧‧‧substrate 106a, 106b‧‧‧conductive structure, lower conductive structure, conductive element, structure 106a'‧‧‧conduction Structure 108‧‧‧semiconductor element, upper semiconductor element, element 110‧‧‧holding part 112a, 112b‧‧‧conductive structure, upper conductive structure, conductive element, upper conductive element 112a'‧‧‧conductive structure 114‧‧‧super Sonic energy 124‧‧‧bonding tool 126‧‧‧arrow 128a, 128b‧‧‧ultrasonic bonding part 150‧‧‧supporting structure 160‧‧‧semiconductor element, lower semiconductor element, element 200‧‧‧ultrasonic bonding machine 202 ‧‧‧semiconductor die, lower semiconductor die 204‧‧‧substrate 206a, 206b‧‧‧lower conductive structure, conductive structure, structure 208‧‧‧upper semiconductor element, element 210‧‧‧holding part 216‧‧‧upper Aluminum contact structure, aluminum contact structure/part 216'‧‧‧contact structure 222a, 222b‧‧‧upper conductive structure, conductive aluminum pad 222a'‧‧‧upper conductive structure 224‧‧‧bonding tool 228‧‧‧ultrasonic Bonding part 230‧‧‧copper pillar, Cu pillar 250‧‧‧support structure 260‧‧‧lower semiconductor element, element 300‧‧‧ultrasonic bonding machine 302‧‧‧semiconductor die, die 304‧‧‧substrate 306a , 306b‧‧‧lower conductive structure, conductive structure, structure 308‧‧‧upper semiconductor element 310‧‧‧holding part 316a, 316b‧‧‧upper aluminum contact structure, aluminum contact structure 320a, 320b‧‧‧wire ring 322a, 322b‧‧‧Upper conductive structure, conductive aluminum pad, conductive structure, aluminum conductive structure 324‧‧‧bonding tool 330a, 330b‧‧‧Cu pillar 334‧‧‧coating/packaging 350‧‧‧supporting structure 360‧‧ ‧Package semiconductor device, lower semiconductor element, component 400 , structure 406a, 406a'‧‧‧structure 408‧‧‧upper semiconductor element, semiconductor element, element 410‧‧‧holding part 412a, 412b‧‧‧upper conductive structure, conductive structure 412a, 412a'‧‧‧structure 414‧ ‧‧ultrasonic energy 424‧‧‧bonding tools 428a, 428b‧‧‧ultrasonic bonding part 428a'‧‧‧complete ultrasonic bonding part 450‧‧‧supporting structure 460‧‧‧lower semiconductor components, components 500‧‧‧ Ultrasonic bonding machine 502‧‧‧semiconductor die, lower semiconductor die 504‧‧‧substrate 506a, 506b‧‧‧lower conductive structure, structure 506a, 506a'‧ ‧‧structure 508‧‧‧semiconductor element, upper semiconductor element, element 510‧‧‧holding part 522a, 522b‧‧‧upper conductive structure, conductive aluminum pad 522a, 522a'‧‧‧structure 524‧‧‧bonding tool 528a , 528b‧‧‧ultrasonic bonding part 528a'‧‧‧complete ultrasonic bonding part 550‧‧‧supporting structure 560‧‧‧lower semiconductor components, components 600‧‧‧ultrasonic bonding machines 602a, 602b, 602c, 602d‧ ‧‧Semiconductor grains 604a, 604b, 604c, 604d‧‧‧Substrate, upper semiconductor element 606a, 606b, 612a, 612b‧‧‧conductive structure, aluminum conductive structure 606a', 606b', 612a', 612b'‧‧‧ Conductive structure, aluminum conductive structure 606a'', 606b'', 612a'', 612b''‧‧‧conductive structure, structure 624‧‧‧bonding tool 628a, 628b‧‧‧ultrasonic bonding part 628a', 628b'‧ ‧‧Ultrasonic bonding part 650‧‧‧supporting structure 660a, 660b, 660c, 660d‧‧‧semiconductor components, components 700, 702, 704, 706, 708, 710‧‧‧step 800‧‧‧flip chip bonding machine , machine 802‧‧‧lower semiconductor grain, semiconductor grain 804‧‧‧substrate 806a, 806b‧‧‧conductive structure, lower conductive structure, structure, conductive element 806a', 806b'‧‧‧conductive structure 806a1, 806b1‧ ‧‧coating 808‧‧‧upper semiconductor element, component, semiconductor element 810‧‧‧holding part 812a, 812b‧‧‧upper conductive structure, conductive structure, conductive element 812a', 812b'‧‧‧conductive structure 814‧‧ ‧Ultrasonic energy 824‧‧‧bonding tool 826‧‧‧arrows 828a, 828b‧‧‧ultrasonic bonding part 850‧‧‧supporting structure 860‧‧‧lower semiconductor components, components, semiconductor components 900, 902, 904, 906 ‧‧‧step 1000‧‧‧machine 1002‧‧‧semiconductor die, lower semiconductor die 1004‧‧‧substrate 1006a, 1006b‧‧‧lower conductive structure, conductive structure, structure, conductive element 1006a', 1006b'‧‧ ‧Conductive structure 1008‧‧‧upper semiconductor element, semiconductor element, element 1010‧‧‧holding part 1012‧‧‧upper semiconductor element 1012a, 1012b‧‧‧upper conductive structure, conductive structure, conductive element 1012a', 1012b'‧‧ ‧Conductive structure 1012a1, 1012b1 ‧‧‧coating 1014‧‧‧ultrasonic energy 1024‧‧‧bonding tool 1026‧‧‧arrow 1028a, 1028b‧‧‧ultrasonic joint 1050‧‧‧supporting structure 1060‧‧‧down Part semiconductor element, element, semiconductor element 1100, 1102, 1104, 1106‧‧‧step 1200‧‧‧machine 1202‧‧‧semiconductor die, lower semiconductor die 1204‧‧‧substrate 1206a, 1206b‧‧‧lower conductive structure , conductive structure, structure, conductive element 1206a', 1206b'‧‧‧conductive structure 1206a1, 1206b1 coating 1208‧‧‧upper semiconductor element, semiconductor element 1210‧‧‧holding part 1212a, 1212b‧‧‧upper conductive structure, conductive Structure, conductive element 1212a', 1212b'‧‧‧conductive structure 1212a1, 1212b1‧‧‧coating 1214‧‧‧ultrasonic energy 1224‧‧‧bonding tool 1226‧‧‧arrow 1228a, 1228b‧‧‧ultrasonic joint 1250‧‧‧supporting structure 1260‧‧‧lower semiconductor components, components, semiconductor components 1300, 1302, 1304, 1306‧‧‧steps
當結合附圖閱讀下面的詳細描述時,將最佳地理解本發明。需要強調的是,根據一般慣例,附圖的各種特徵不是按比例繪製的。相反地,為清楚起見,各種特徵的尺寸被任意擴大或減小。附圖中包括以下圖式: 圖1A至圖1C是超音波接合機的部分的方塊圖,顯示根據本發明的一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖2A是超音波接合機的部分的方塊圖,顯示根據本發明的另一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖2B是圖2A的「圖2B」部分的放大圖; 圖2C是圖2B在超音波接合後的示意圖; 圖3是超音波接合機的部分的方塊圖,顯示根據本發明的又一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖4A是超音波接合機的部分的方塊圖,顯示根據本發明的又一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖4B是圖4A的「圖4B」部分的放大圖; 圖4C是圖4B在超音波接合後的示意圖; 圖5A是超音波接合機的部分的方塊圖,顯示根據本發明的另一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖5B是圖5A的「圖5B」部分的放大圖; 圖5C是圖5B在超音波接合後的示意圖; 圖6A是超音波接合機的部分的方塊圖,顯示根據本發明的又一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖6B是圖6A的「圖6B」部分的放大圖; 圖6C是圖6A的一部分在導電結構之間接觸後的示意圖; 圖7顯示根據本發明的一個示例性實施例的對半導體元件進行超音波接合的方法的流程圖; 圖8A至圖8C是超音波接合機的部分的框圖,顯示根據本發明的一個示例性實施例的將上部半導體元件接合至下部半導體元件的結構及方法; 圖9顯示根據本發明的一個示例性實施例的對半導體元件進行超音波接合的方法的流程圖; 圖10A至圖10C是超音波接合機的部分的方塊圖,顯示根據本發明的另一個示例性實施例的將上部半導體元件接合至下部半導體元件的另一個結構及方法; 圖11顯示根據本發明的又一個示例性實施例的對半導體元件進行超音波接合的又一個方法的流程圖; 圖12A至圖12C是超音波接合機的部分的方塊圖,顯示根據本發明的又一個示例性實施例的將上部半導體元件接合至下部半導體元件的又一個結構及方法;以及 圖13顯示根據本發明的又一個示例性實施例的對半導體元件進行超音波接合的又一個方法的流程圖。The present invention is best understood from the following detailed description when read with the accompanying drawings. It is emphasized that, according to common practice, the various features of the drawings are not drawn to scale. On the contrary, the dimensions of the various features are arbitrarily expanded or reduced for clarity. The accompanying drawings include the following drawings: FIGS. 1A to 1C are partial block diagrams of an ultrasonic bonding machine, showing a structure and a method for bonding an upper semiconductor element to a lower semiconductor element according to an exemplary embodiment of the present invention; FIG. 2A is a block diagram of a part of an ultrasonic bonding machine, showing a structure and a method for bonding an upper semiconductor element to a lower semiconductor element according to another exemplary embodiment of the present invention; Enlarged view; FIG. 2C is a schematic diagram of FIG. 2B after ultrasonic bonding; FIG. 3 is a block diagram of a part of an ultrasonic bonding machine, showing an upper semiconductor element bonded to a lower semiconductor element according to another exemplary embodiment of the present invention structure and method; FIG. 4A is a partial block diagram of an ultrasonic bonding machine, showing a structure and a method for bonding an upper semiconductor element to a lower semiconductor element according to yet another exemplary embodiment of the present invention; FIG. 4B is a block diagram of FIG. 4A "Fig. 4B" part of the enlarged view; Fig. 4C is a schematic diagram of Fig. 4B after ultrasonic bonding; Fig. 5A is a block diagram of part of the ultrasonic bonding machine, showing the upper semiconductor according to another exemplary embodiment of the present invention The structure and method of component bonding to the lower semiconductor component; FIG. 5B is an enlarged view of the “FIG. 5B” portion of FIG. 5A; FIG. 5C is a schematic diagram of FIG. 5B after ultrasonic bonding; FIG. 6A is a block of a part of an ultrasonic bonding machine 6B is an enlarged view of the "Fig. 6B" part of Fig. 6A; Fig. 6C is a part of Fig. 6A A schematic diagram after contact between conductive structures; FIG. 7 shows a flow chart of a method for ultrasonic bonding of a semiconductor element according to an exemplary embodiment of the present invention; FIGS. 8A to 8C are blocks of parts of an ultrasonic bonding machine Fig. 9 shows a structure and a method for bonding an upper semiconductor element to a lower semiconductor element according to an exemplary embodiment of the present invention; Flowchart; FIG. 10A to FIG. 10C are partial block diagrams of an ultrasonic bonding machine, showing another structure and method of bonding an upper semiconductor element to a lower semiconductor element according to another exemplary embodiment of the present invention; FIG. 11 shows A flow chart of yet another method for ultrasonically bonding a semiconductor element according to yet another exemplary embodiment of the present invention; FIGS. 12A to 12C are block diagrams of parts of an ultrasonic bonding machine, showing yet another example according to the present invention Still another structure and method of bonding an upper semiconductor element to a lower semiconductor element according to an exemplary embodiment; and FIG. 13 shows a flow chart of yet another method of ultrasonically bonding a semiconductor element according to yet another exemplary embodiment of the present invention.
800‧‧‧倒裝晶片接合機、機器 800‧‧‧Flip chip bonder, machine
802‧‧‧下部半導體晶粒 802‧‧‧lower semiconductor die
804‧‧‧基板 804‧‧‧substrate
806a、806b‧‧‧導電結構、下部導電結構、結構、導電元件 806a, 806b‧‧‧conductive structure, lower conductive structure, structure, conductive element
806a1、806b1‧‧‧塗層 806a1, 806b1‧‧‧coating
808‧‧‧上部半導體元件、元件、半導體元件 808‧‧‧Upper semiconductor components, components, semiconductor components
810‧‧‧保持部分 810‧‧‧maintenance part
812a、812b‧‧‧上部導電結構、導電結構、導電元件 812a, 812b‧‧‧Upper conductive structure, conductive structure, conductive element
824‧‧‧接合工具 824‧‧‧joining tools
826‧‧‧箭頭 826‧‧‧arrow
850‧‧‧支撐結構 850‧‧‧Supporting structure
860‧‧‧下部半導體元件、元件、半導體元件 860‧‧‧Lower semiconductor components, components, semiconductor components
Claims (25)
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US15/456,767 US9779965B2 (en) | 2013-10-08 | 2017-03-13 | Systems and methods for bonding semiconductor elements |
US15/456,767 | 2017-03-13 |
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TW201836097A (en) | 2018-10-01 |
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