CN108521275B - Logic gate based on magnetic siganmin - Google Patents
Logic gate based on magnetic siganmin Download PDFInfo
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- CN108521275B CN108521275B CN201810290782.5A CN201810290782A CN108521275B CN 108521275 B CN108521275 B CN 108521275B CN 201810290782 A CN201810290782 A CN 201810290782A CN 108521275 B CN108521275 B CN 108521275B
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- H—ELECTRICITY
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- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/185—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using dielectric elements with variable dielectric constant, e.g. ferro-electric capacitors
- H03K19/19—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using dielectric elements with variable dielectric constant, e.g. ferro-electric capacitors using ferro-resonant devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
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Abstract
A logic gate based on magnetic sigecures belongs to the technical field of magnetic devices. The magnetic Sgermine with opposite polarities is used for expressing logic 1 and 0, so that the problems of information loss and misreading are solved; the conversion of a NAND gate and an OR gate can be realized only by changing a voltage source connection port of the voltage control magnetic anisotropy region gate, so that the manufacturing process is greatly optimized; the invention utilizes the characteristic that the twisted magnetic skutters can move along an antiferromagnetic boundary, two twisted magnetic skutters can be fused into one twisted magnetic skutter or a traditional magnetic skutter, and the magnetic skutters with topological charge of +1 or-1 can be mutually converted with the twisted magnetic skutters under the drive of current, thereby realizing the logical operation based on the magnetic skutters; the logic NOT gate is realized by utilizing the principle that the polarity of the magnetic Sgemini is reversed at the anti-ferromagnetic coupling boundary; the logic gate has the characteristics of small volume, low power consumption, high stability, high operation speed and the like.
Description
Technical Field
The invention belongs to the technical field of magnetic devices, and particularly relates to a logic gate for realizing a NAND gate, a NOR gate and a NOT gate based on magnetic sigecures.
Background
Logic gates are the cornerstone of modern electronic information technology, in digital circuits, high and low levels are usually used to represent logic "1" and "0", different boolean functions can be implemented with different logic gates, nand, nor and nor gates are all basic logic gates, and the corresponding truth tables of nand, nor and nor gates are as follows:
input A | Input | Output F | |
0 | 0 | 1 | |
0 | 1 | 1 | |
1 | 0 | 1 | |
1 | 1 | 0 |
Table 1: truth table of logic NAND gate
Input A | Input | Output F | |
0 | 0 | 1 | |
0 | 1 | 0 | |
1 | 0 | 0 | |
1 | 1 | 0 |
Table 2: truth table of logic NOR gate
Input device | Output of |
0 | 1 |
1 | 0 |
Table 3: truth table of logic not gate
Logic gates fabricated in conventional CMOS structures are bulky, consume high power, and joule heating limits their integration to high densities.
The magnetic siganmin is a magnetic structure protected by topology, and has the characteristics of high stability, small size, various control modes and the like. The different states of the magnetic segmenter are used as "bits" to implement information storage and to fabricate logic devices. In conventional applications, logic "1" and "0" are usually expressed in terms of the presence or absence of Magnetic segregants, and the basic logic operations are implemented (x.zhanget. al, Magnetic skew logic gates: conversion, duration and convergence of skewers).
Twisted sigrons are a novel stable sigrons state that exists at the boundary of two antiferromagnetically coupled domains (Huanghuan Yang et al, Twisted Skylmion at domain boundaries and the method of image). The distorted sigmin and the traditional sigmin can be mutually converted, and the two distorted sigmin can realize fusion.
It was found that current can be used to drive the movement of Magnetic skamming in Magnetic nanobelts (Xicha Zhang. al, Magnetic biolayer-scattering semiconductors with out scattering semiconductor Hall effect). In addition, Voltage Controlled Magnetic Anisotropy (VCMA) technology (Wang Kang et al, Voltage Controlled Magnetic scattering motion for a Racetrack Memory) can be used to change the anisotropic properties of the Magnetic nanoribbons, and thus the motion state of the Magnetic skullers. Magnetic Tunnel Junctions (MTJs) (Jares, H et al, Angular dependence of the tunnel magnetic in transition-metal-based junctions) can be used to read the state of the magnetic skulls. The technical means are proved by experiments or theories and are applied to the invention.
Disclosure of Invention
The invention aims to provide a novel logic NAND gate, a logic NOR gate and a logic NOT gate based on magnetic skynet, which can realize the conversion of the NAND gate and the NOR gate by simply changing the position of a voltage control magnetic anisotropic gate and realize the logic NOT gate by utilizing the principle that the polarity of the magnetic skynet is reversed at an anti-ferromagnetic coupling boundary.
The technical scheme of the invention is as follows:
a magnetic sigecun-based logic gate, comprising:
a first input comprising a first input track 11 and a second input track 12 arranged in parallel and antiferromagnetically coupled, and a second input comprising a third input track 13 and a fourth input track 14 arranged in parallel and antiferromagnetically coupled;
an output comprising a first output rail 21 and a second output rail 22;
a first connection path including a first connection track 31 and a second connection track 32 which are arranged in parallel and antiferromagnetically coupled;
a second connection path including a third connection track 33 and a fourth connection track 34 arranged in parallel and antiferromagnetically coupled;
a third connection path including a fifth connection track 35 and a sixth connection track 36 arranged in parallel and antiferromagnetically coupled;
a fourth connection path comprising a seventh connection track 37 and an eighth connection track 38 arranged in parallel and antiferromagnetically coupled;
a fifth connecting path including a ninth connecting rail 39 and a tenth connecting rail 310;
a first escape path comprising a first escape track 41 and a second escape track 42 arranged in parallel and antiferromagnetically coupled;
a second escape path comprising a third escape track 43 and a fourth escape track 44 arranged in parallel and antiferromagnetically coupled;
one end of the first connecting track 31 is antiferromagnetically coupled to the first input track 11, and the other end is ferromagnetically coupled to one end of the first escape track 41;
one end of the second connecting track 32 is ferromagnetically coupled to the first input track 11;
one end of the third connecting track 33 is ferromagnetically coupled to the third input track 13, and the other end is ferromagnetically coupled to one end of the second escape track 42;
one end of the fourth connecting track 34 is antiferromagnetically coupled to the third input track 13, and the other end is antiferromagnetically coupled to the other end of the second connecting track 32;
one end of the ninth connecting track 39 is antiferromagnetically coupled to the other end of the first escape track 41, and is ferromagnetically coupled to the other end of the second escape track 42, and the other end thereof is antiferromagnetically coupled to the first output track 21;
one end of the fifth connecting track 35 is ferromagnetically coupled to the second input track 12;
one end of the sixth connecting track 36 is antiferromagnetically coupled to the second input track 12 and the other end is ferromagnetically coupled to one end of the third exit track 43;
one end of the seventh connecting track 37 is antiferromagnetically coupled to the fourth input track 14, and the other end is antiferromagnetically coupled to the other end of the fifth connecting track 35;
the eighth connecting track 38 has one end ferromagnetically coupled to the fourth input track 14 and the other end ferromagnetically coupled to the fourth exit track 44;
one end of the tenth connecting track 310 is antiferromagnetically coupled to the other end of the third escape track 43, ferromagnetically coupled to the other end of the fourth escape track 44, and the other end thereof is antiferromagnetically coupled to the second output track 22;
magnetic tunnel junctions are arranged in the first output track 21 and the second output track 22 and are used for reading the state of the magnetic siganus;
the direction of the magnetic moment of the magnetic material of the first input track 11 is outward perpendicular to the first input track 11 surface.
Specifically, a voltage-controlled magnetic anisotropic gate is further disposed in the ninth connection track 39, and at this time, the logic gate is a nand gate.
Specifically, a voltage-controlled magnetic anisotropic gate is further disposed in the tenth connection track 310, and in this case, the logic gate is a nor gate.
Specifically, a logical 1 is represented by a magnetic sigh with a polarity of +1, entering from the first input track 11 and the third input track 13; a logical 0 is represented by a magnetic sigramin of polarity-1, entering from the second input track 12 and the fourth input track 14.
Specifically, the magnetic skullamine can be converted into a distorted magnetic skullamine under the driving of current, the distorted magnetic skullamine exists at an antiferromagnetic boundary and can move along the antiferromagnetic boundary, and the distorted magnetic skullamine and the magnetic skullamine with topological charge of +1 or-1 can be mutually converted.
Specifically, the control circuit further comprises a control circuit, the control circuit comprises a first voltage source V1, a second voltage source V2 and a third voltage source V3, the voltage-controlled magnetic anisotropy gate comprises a first voltage-controlled magnetic anisotropy gate C1 and a second voltage-controlled magnetic anisotropy gate C2, the first voltage-controlled magnetic anisotropy gate C1 is connected with the first voltage source V1 and the second voltage source V2, and the second voltage-controlled magnetic anisotropy gate C2 is connected with the first voltage source V1 and the third voltage source V3.
Specifically, magnetic tunnel junctions are arranged in the first input end and the second input end and are used for detecting whether a magnetic sigramin exists or not; a magnetic tunnel junction within the first input is used to control the third voltage source V3 and a magnetic tunnel junction within the second input is used to control the second voltage source V2.
Specifically, the magnetic sigramins are driven to move by in-plane current, the energizing device of the in-plane current is an electrode, the first input end and the second input end are connected with a negative electrode, and the output end is connected with a positive electrode.
In particular, the first output track 21 and the second output track 22 are antiferromagnetically coupled.
A magnetic sigecun-based logic not gate comprising an input comprising antiferromagnetically coupled fifth and sixth input tracks 15 and 16 and an output comprising antiferromagnetically coupled third and fourth output tracks 23 and 24, the fifth input track 15 and the third output track 23 being antiferromagnetically coupled and the sixth input track 16 and the fourth output track 24 being antiferromagnetically coupled.
The invention has the beneficial effects that:
(1) the traditional logic gate circuit based on the magnetic skynet uses the magnetic skynet with or without to represent the logic 1 and 0 (or vice versa), so that the mutual movement between the two magnetic skynets can generate misreading or information loss, and the realization condition for keeping all the skynets synchronously moving under the existing experimental condition is very strict. The invention uses different polarities of the magnetic sigxels to represent logic '1' and '0', and the representing method does not require all the magnetic sigxels to keep synchronous motion, thereby greatly improving the problems of misreading and information loss.
(2) The conversion of the NAND gate and the NOR gate can be realized only by changing the connection port of the voltage control magnetic anisotropic gate voltage source, and the manufacturing process is greatly optimized.
(3) The logic NOT gate is designed by utilizing the property that the polarity of the magnetic sGermin passes through the anti-ferromagnetic coupling boundary is changed, and the logic NOT gate has a simple structure and strong practicability.
(4) The invention utilizes a novel magnetic structure: the twisted magnetic skarnebia glauca which can be mutually converted with the conventional magnetic skarnebia glauca can be fused into a twisted magnetic skarnebia glauca under the driving of an external current, and the new idea of annihilating the magnetic skarnebia glauca is provided.
(5) The invention uses magnetic sigecures to form a logic gate, and has the characteristics of small volume, low power consumption, high stability, high operation speed and the like.
Drawings
Fig. 1 is a schematic structural diagram of a logic nand gate in the embodiment.
Fig. 2 is a schematic structural diagram of a logical nor gate in the embodiment.
Fig. 3 is a schematic structural diagram of a logical not gate in the embodiment.
Fig. 4 is a diagram illustrating the motion states of the magnetic sigramins in the logic nand gate.
Fig. 5 is a schematic diagram of the motion state of the magnetic sigecures in the logic nor gate.
Fig. 6 is a schematic diagram of the motion state of the magnetic sigecures in the logic not gate.
Detailed Description
The invention is described in detail below with reference to the figures and specific embodiments.
The invention utilizes a novel magnetic structure: the magnetic grid is a twisted magnetic grid, the twisted magnetic grid exists on the antiferromagnetic boundary and can move along the antiferromagnetic boundary, and the two twisted magnetic grids can be fused into a twisted magnetic grid or a traditional magnetic grid; under the drive of current, magnetic skullons with topological charge of +1 or-1 can be converted into distorted magnetic skullons, and the distorted magnetic skullons can also be converted into magnetic skullons with topological charge of +1 or-1.
The invention provides a magnetic Scotch-based logic NAND gate and a NOR gate, which comprises a first input end, a second input end and an output end, wherein the first input end comprises a first input track 11 and a second input track 12 which are arranged in parallel and are antiferromagnetically coupled, and the second input end comprises a third input track 13 and a fourth input track 14 which are arranged in parallel and are antiferromagnetically coupled; the output comprises a first output track 21 and a second output track 22, the first output track 21 and the second output track 22 may also be antiferromagnetically coupled to facilitate the cascading of logic gates.
The magnetic moments of the magnetic material of the first input track 11 and the third input track 13 are oriented perpendicular to their surfaces and outward, and since magnetic segregants are typically present in thin films, some embodiments of the present invention provide logic gates based on thin films, such that the magnetic moments of the magnetic material of the first input track 11 and the third input track 13 are oriented perpendicular to the thin films outward, and the magnetic moments of the magnetic material of the second input track 12 and the fourth input track 14 are oriented perpendicular to the thin films inward.
In the invention, a magnetic Scotch syndrome with the polarity of +1 is used for representing logic 1, and a logic gate is accessed from a first input track 11 and a third input track 13; a logic 0 is represented by a magnetic sigh with a polarity of-1, entering the logic gate from the second input track 12 and the fourth input track 14.
The logic gate provided by the invention further comprises a first connecting path, a second connecting path, a third connecting path, a fourth connecting path, a fifth connecting path, a first disengaging path and a second disengaging path, wherein the first connecting path comprises a first connecting track 31 and a second connecting track 32 which are arranged in parallel and are antiferromagnetically coupled, the second connecting path comprises a third connecting track 33 and a fourth connecting track 34 which are arranged in parallel and are antiferromagnetically coupled, the fifth connecting path comprises a ninth connecting track 39 and a tenth connecting track 310, and the first disengaging path comprises a first disengaging track 41 and a second disengaging track 42 which are arranged in parallel and are antiferromagnetically coupled; one end of the first connecting track 31 is antiferromagnetically coupled to the first input track 11, and the other end is ferromagnetically coupled to one end of the first escape track 41; one end of the second connecting track 32 is ferromagnetically coupled to the first input track 11; one end of the third connecting track 33 is ferromagnetically coupled to the third input track 13, and the other end is ferromagnetically coupled to one end of the second escape track 42; one end of the fourth connecting track 34 is antiferromagnetically coupled to the third input track 13, and the other end is antiferromagnetically coupled to the other end of the second connecting track 32; one end of the ninth connecting track is antiferromagnetically coupled to the other end of the first escape track 41, and ferromagnetically coupled to the other end of said second escape track 42, and the other end of the ninth connecting track 39 is antiferromagnetically coupled to the first output track 21; the third connection path comprises a fifth connection track 35 and a sixth connection track 36 arranged in parallel and antiferromagnetically coupled, the fourth connection path comprises a seventh connection track 37 and an eighth connection track 38 arranged in parallel and antiferromagnetically coupled, the second disconnection path comprises a third disconnection track 43 and a fourth disconnection track 44 arranged in parallel and antiferromagnetically coupled, and one end of the fifth connection track 35 is ferromagnetically coupled to the second input track 12; one end of the sixth connecting track 36 is antiferromagnetically coupled to the second input track 12 and the other end is ferromagnetically coupled to one end of the third exit track 43; one end of the seventh connecting track 37 is antiferromagnetically coupled to the fourth input track 14 and the other end is antiferromagnetically coupled to the other end of the fifth connecting track 35; the eighth connecting track 38 has one end ferromagnetically coupled to the fourth input track 14 and the other end ferromagnetically coupled to the fourth exit track 44; one end of the tenth connecting track 310 is antiferromagnetically coupled with the other end of the third disengaging track 43 and ferromagnetically coupled with the other end of the fourth disengaging track 44, and the other end of the tenth connecting track 310 is antiferromagnetically coupled with the second output track 22; magnetic tunnel junctions are provided in both the first output track 21 and the second output track 22 for reading the state of the magnetic sigels.
The magnetic siglechs enter the logic gate from one of the two tracks of the input end, are converted into twisted magnetic siglechs when entering the connection path, then move along the antiferromagnetic boundaries in the connection path and the disconnection path in sequence, are converted into magnetic siglechs with topological charges of +1 or-1 when leaving the disconnection path, then pass through the fifth connection path and enter the output end, and the other ends of the second connection track 32 and the fourth connection track 34 are far from the track of the movement of the magnetic siglechs, so that the effect is not influenced, and therefore the logic gate is not limited in the above.
Some embodiments further comprise a control circuit comprising a first voltage source V1, a second voltage source V2, and a third voltage source V3, the voltage controlled magnetic anisotropy gate comprising a first voltage controlled magnetic anisotropy gate C1 and a second voltage controlled magnetic anisotropy gate C2, the first voltage controlled magnetic anisotropy gate C1 coupled to the first voltage source V1 and the second voltage source V2, and the second voltage controlled magnetic anisotropy gate C2 coupled to the first voltage source V1 and the third voltage source V3. Magnetic tunnel junctions are arranged in the first input end and the second input end to detect whether a magnetic siganus exists, the magnetic tunnel junctions in the first input end are used for controlling the third voltage source V3, the magnetic tunnel junctions in the second input end are used for controlling the second voltage source V2, the magnetic tunnel junctions in the NAND gates are arranged in the first input track 11 and the third input track 13, and the magnetic tunnel junctions in the NOR gates are arranged in the second input track 12 and the fourth input track 14.
The magnetic skynerger controls the magnetic anisotropic gate through the voltage in the fifth connection path, then through the output terminal, and then reads the state through the magnetic tunnel junction in the output terminal. The voltage controlled magnetic anisotropy gate (VCMA) includes a first voltage controlled magnetic anisotropy gate C1 and a second voltage controlled magnetic anisotropy gate C2. The voltage-controlled magnetic anisotropic gate can be separately arranged in the first output track 21 or the second output track 22, or the same voltage-controlled magnetic anisotropic gate can be arranged in both the first output track 21 and the second output track 22, the conversion of a nand gate and a nor gate is achieved by changing the connection port of the voltage source of the voltage-controlled magnetic anisotropic gate, and when the first voltage source V1 and the third voltage source V3 are connected with the first voltage-controlled magnetic anisotropic gate C1 in the first output track 21, and the first voltage source V1 and the second voltage source V2 are connected with the second voltage-controlled magnetic anisotropic gate C2 in the first output track 22, the logic gate is a nand gate, as shown in fig. 1; when the first voltage source V1 and the third voltage source V3 are connected to the first voltage controlled magnetic anisotropy gate C1 in the second output rail 22 and the first voltage source V1 and the second voltage source V2 are connected to the second voltage controlled magnetic anisotropy gate C2 in the second output rail 22, the logic gate is a nor gate, as shown in fig. 2.
In some embodiments, the magnetic siganus are driven to move by the in-plane current, the energizing device of the in-plane current is an electrode, the first input end and the second input end are connected with a negative electrode, the output end is connected with a positive electrode, the moving direction of the magnetic siganus is opposite to the moving direction of the in-plane current, taking the example that the magnetic siganus enters the logic gate from the first input track 11, the direction of the in-plane current sequentially passes through the first output track 21, the fifth connecting path, the first disconnecting path, the first connecting path and the first input track 11, and the moving track of the magnetic siganus sequentially passes through the first input track 11, the antiferromagnetic boundary in the first connecting path, the antiferromagnetic boundary in the first disconnecting path, the fifth connecting path and the first output track 21.
In some embodiments, the logic gates are fabricated using thin films constructed using magnetic materials that are Heusler-type magnetic shape memory alloys including Ni-Mn-Ga, Ni-Mn-Z (In, Sn, Sb), Ni-Mn-Sn-Co, etc. for example, Ni-Mn-Sn-Co thin films are prepared by depositing dc magnetron sputtering (150W power) on a hot (500 degree c) MgO (001) single crystal substrate In an argon atmosphere of 0.011 mpa, the specific composition of the thin films can be characterized by an X-ray spectrometer, the dimensions of the logical nand gates and nor gates can be 1000nm In total length, 600nm In width, 1nm In thickness, 100nm In width at the output, 100nm In voltage-controlled magnetic anisotropy gate VCMA, 20nm In trajectory of four connecting vias, or arc trajectory, preferably, the trajectories of four vias make up a square, the logic gates are symmetrical along the diagonals of the square, and the respective connections are α nm In length at the output β nm.
As shown in fig. 3, the nand gate has three states of magnetic sigramin movement when the input is three types of "1" + "1" ═ 0 "," 1 "+" 0 "═ 1" and "0" + "0" ═ 1 ", and white arrows indicate the flow direction of in-plane Current (CIP). In the initial state, the first voltage source V1 controls the first voltage controlled magnetic anisotropy gate C1 and the second voltage controlled magnetic anisotropy gate C2 to enhance the magnetic anisotropy of the region where the first voltage source V1 is located, and the voltage values of the second voltage source V2 and the third voltage source V3 are 0.
"1" + "1" ═ 0 ": when the inputs "1" and "1", i.e. two magnetic skunks with polarity +1 enter the nand gate from the first input track 11 and the third input track 13, respectively, as shown in a1 in fig. 4, the magnetic tunnel junctions of the first input terminal and the second input terminal both detect the presence of the magnetic skunk with polarity +1, the second voltage source V2 and the third voltage source V3 generate voltages opposite to the first voltage source V1, so that the magnetic anisotropy of the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 returns to normal. The two magnetic segregants of polarity +1 are transformed into two twisted magnetic segregants when entering the first and second connection paths, respectively, as shown at a2 in fig. 4, and then the two twisted magnetic segregants move along the antiferromagnetic boundaries of the first and second connection paths, respectively. The two twisted magnetic segregants in the first and second connection paths meet and merge into one twisted magnetic segregant when entering the first exit path, as shown in fig. 3 a 3. The fused distorted magnetic skynergamine then moves along the antiferromagnetic boundary of the first escape route as shown at a4 in fig. 4. The fused distorted magnetic siganus is converted into a siganus with the polarity of +1 when leaving the first separation path and entering the ninth connection track 39, as shown by a5 in fig. 4, because the magnetic anisotropies of the first voltage control magnetic anisotropies gate C1 and the second voltage control magnetic anisotropies gate C2 in the ninth connection track 39 are both normal, the converted siganus enters the first output end 21 after passing through the two voltage control magnetic anisotropies gates, is detected by the magnetic tunnel junction in the first output end 21 after being converted into a siganus with the polarity of-1 at the boundary, as shown by a6 in fig. 4, because the invention uses the siganus with the polarity of +1 to represent logic "1", uses the siganus with the polarity of-1 to represent logic "0", and the first output track 21 of the nand gate outputs logic "0".
"1" + "0" ═ 1 "," 0 "+" 1 "═ 1": when the input is "1", "0" or "0", "1", i.e. a magnetic skuller with a polarity of +1 enters the nand gate from the first input track 11, a magnetic skuller with a polarity of-1 enters the nand gate from the fourth input track 14, as shown in fig. 4 b 1; or a magnetic skullet of polarity +1 enters the nand gate from the third input track 13 and a magnetic skullet of polarity-1 enters the nand gate from the second input track 12, when the magnetic tunnel junction in the first and second inputs detects the presence of only one magnetic skullet of polarity +1, the magnetic anisotropy of only one of the first and second voltage-controlled magnetic anisotropy gates C1 and C2 is normal, the ninth connection track 39 corresponds to the off state, the magnetic skullet of polarity +1 is not output from the first output track 21, and the magnetic skullet of polarity-1 is transformed into a distorted magnetic skullet upon entering the connection path to move along the third or fourth connection path and output from the second disconnection path to the tenth connection track 310, as shown at b5 in fig. 4, the junction of the tenth connection track 310 and the second output track 22 transitions to a sigecum with a polarity of +1 and is detected by the magnetic tunnel junction in the second output track 22, as shown at b6 in fig. 4, when the second output of the nand gate outputs a logic "1".
"0" + "0" ═ 1 ": when the input is "0" or "0", i.e. two magnetic skunks of polarity-1 enter the nand gate from the second input track 12 and the fourth input track 14, respectively, as shown in c1 in fig. 4, the two magnetic skunks of polarity-1 are transformed into twisted magnetic skunks when entering the connection path, as shown in c2 in fig. 4, and then the two twisted magnetic skunks move along the third connection path and the fourth connection path, respectively, and meet and merge into one twisted magnetic skunk when entering the second exit path, as shown in c3 in fig. 4, the merged twisted magnetic skunk continues to move along the antiferromagnetic boundary of the second exit path toward the tenth connection track 310, as shown in c4 in fig. 4, and when leaving the second exit path to enter the tenth connection track 310, the twisted magnetic skunk is transformed into a skunk of polarity-1, as shown at c5 in fig. 4, the interface between the tenth connecting track 310 and the second output track 22 transitions to a siggmen of polarity +1 and is detected by the magnetic tunnel junction in the second output track 22, as shown at c6 in fig. 4, when the second output track 22 of the nand gate outputs a logic "1".
As shown in fig. 5, the nor gate has three states in which the magnetic sigramin moves when the input is three types of "1" + "1" ═ 0 "," 1 "+" 0 "═ 0" and "0" + "0" 1 ", and white arrows indicate the flow direction of the in-plane Current (CIP). In the initial state, the first voltage source V1 controls the first voltage controlled magnetic anisotropy gate C1 and the second voltage controlled magnetic anisotropy gate C2 to enhance the magnetic anisotropy of the region where the first voltage source V1 is located, and the voltage values of the second voltage source V2 and the third voltage source V3 are 0.
"1" + "1" ═ 0 ": when the inputs are "1" and "1", i.e. two magnetic sigrons with a polarity of +1 enter the nor gate from the first input track 11 and the third input track 13, respectively, as shown in fig. 5 a 1. The two magnetic segregants of polarity +1 are transformed into two twisted magnetic segregants when entering the first and second connection paths, respectively, as shown at a2 in fig. 5, and then the two twisted magnetic segregants move along the antiferromagnetic boundaries of the first and second connection paths, respectively. The two twisted magnetic segregants in the first and second connection paths meet and merge into one twisted magnetic segregant when entering the first exit path, as shown at a3 in fig. 5. The fused distorted magnetic skynergamine then moves along the antiferromagnetic boundary of the first escape route as shown at a4 in fig. 5. The merged distorted magnetic siglecs are again converted into siglecs with a polarity of +1 when leaving the first escape route and entering the ninth joining track 39, as shown at a5 in fig. 5, and are converted into siglecs with a polarity of-1 at the interface between the ninth joining track 39 and the first output track 21 and are detected by the magnetic tunnel junction in the first output track 21, as shown at a6 in fig. 5, when the first output track 11 of the nor gate outputs a logic "0".
"1" + "0" ═ 0 "," 0 "+" 1 "═ 0": when the input is "1", "0" or "0", "1", i.e. a magnetic siglec with a polarity of +1 enters the nor gate from the first input track 11, a magnetic siglec with a polarity of-1 enters the nor gate from the fourth input track 14, as shown in fig. 5 b 1; or a magnetic skullet with a polarity of +1 enters the nor gate from the third input track 13 and a magnetic skullet with a polarity of-1 enters the nor gate from the second input track 12, when the magnetic tunnel junction in the first input terminal and the second input terminal detects the presence of only one magnetic skullet with a polarity of-1, then the magnetic anisotropy of only one of the first voltage controlled magnetic anisotropy gate C1 and the second voltage controlled magnetic anisotropy gate C2 in the second connection track 22 is normal, then the second output track 22 corresponds to the off state, the magnetic skullet with a polarity of-1 will not be output from the second output track 22, and the magnetic skullet with a polarity of +1 upon entering the connection path is transformed into a distorted magnetic skullet moving along the first connection path or the second connection path and output from the first disconnection path to the ninth connection track 39, as indicated by b5 in fig. 5, the interface between the ninth connecting track 39 and the first output track 21 transitions to a siglech with a polarity of-1 and is detected by the magnetic tunnel junction in the first output track 21, as indicated by b6 in fig. 5, when the first output of the nor gate outputs a logic "0".
"0" + "0" ═ 1 ": when the inputs are "0" and "0", that is, two magnetic skynes with the polarity of-1 enter the nor gate from the second input track 12 and the fourth input track 14, respectively, as shown in C1 in fig. 5, when the magnetic tunnel junctions of the first input terminal and the second input terminal both detect the magnetic skynes with the polarity of-1, the second voltage source V2 and the third voltage source V3 generate a voltage opposite to that of the first voltage source V1, so that the magnetic anisotropy of the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 returns to normal; two magnetic segregants of polarity-1 are transformed into twisted magnetic segregants upon entering the connection path, as shown at c2 in fig. 5, and then the two twisted magnetic segregants move along the third connection path and the fourth connection path, respectively, and meet and merge into one twisted magnetic segregant upon entering the second detachment path, as shown at c3 in fig. 5, the merged twisted magnetic segregant continues to move along the antiferromagnetic boundary of the second detachment path toward the tenth connection track 310, as shown at c4 in fig. 5, upon exiting the second detachment path into the tenth connection track 310, the twisted magnetic segregant is transformed into a segregant of polarity-1, as shown at c5 in fig. 5, the segregant in the tenth connection track 310 enters the second output track 22 through two voltage controlled magnetic anisotropy gates, is detected by the magnetic tunnel junction in the second output track 22 after being transformed into a segregant of polarity +1 at the boundary, as shown in fig. 5 c6, the second output track 22 of the nor gate now outputs a logic "1".
In the embodiment of the logic not gate, the magnetic moment direction of the magnetic material of the fifth input track 15 is perpendicular to the surface and outward, and since the magnetic skulls are generally present on the thin film, in some embodiments, the logic not gate provided by the present invention is made based on the thin film, the magnetic moment direction of the magnetic material of the fifth input track 15 and the fourth output track 24 is perpendicular to the thin film outward, and the magnetic moment direction of the magnetic material of the sixth input track 16 and the third output track 23 is perpendicular to the thin film inward.
As shown in fig. 6, the state of the magnetic skutter when the input is "1" and the output is "0" in the logic not gate of the present embodiment is shown, and white arrows indicate the flow of the in-plane Current (CIP).
Fig. 6(a) is an overall schematic diagram of the inverter gate converting an input logic "1" into an output "0", when the input is "1", as shown in fig. 6(b), a magnetic sigramin with a polarity of +1 enters the inverter gate from the fifth input track 15, moves along the fifth input track 15 and enters the third output track 23 under the driving of an in-plane current, and realizes polarity inversion at the boundary to convert into a sigramin with a polarity of-1, as shown in fig. 6(c), the sigramin after conversion continues to move along the third output track, as shown in fig. 6(d), and at this time, the inverter gate outputs a logic "0". The inverter is the same as the inverter in converting an input logic "0" to an output logic "1".
Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.
Claims (10)
1. A magnetic sigecures-based logic gate, comprising:
a first input comprising a first input track (11) and a second input track (12) arranged in parallel and antiferromagnetically coupled, and a second input comprising a third input track (13) and a fourth input track (14) arranged in parallel and antiferromagnetically coupled;
an output comprising a first output track (21) and a second output track (22);
a first connection path comprising a first connection track (31) and a second connection track (32) arranged in parallel and antiferromagnetically coupled;
a second connection path comprising a third connection track (33) and a fourth connection track (34) arranged in parallel and antiferromagnetically coupled;
a third connection path comprising a fifth connection track (35) and a sixth connection track (36) arranged in parallel and antiferromagnetically coupled;
a fourth connection path comprising a seventh connection track (37) and an eighth connection track (38) arranged in parallel and antiferromagnetically coupled;
a fifth connecting passage including a ninth connecting rail (39) and a tenth connecting rail (310);
a first escape path comprising a first escape track (41) and a second escape track (42) arranged in parallel and antiferromagnetically coupled;
a second escape path comprising a third escape track (43) and a fourth escape track (44) arranged in parallel and antiferromagnetically coupled;
-one end of the first connection track (31) is antiferromagnetically coupled to the first input track (11) and the other end is ferromagnetically coupled to one end of the first exit track (41);
one end of the second connecting track (32) is ferromagnetically coupled with the first input track (11);
-one end of the third connecting track (33) is ferromagnetically coupled to the third input track (13) and the other end is ferromagnetically coupled to one end of the second exit track (42);
one end of the fourth connecting track (34) is antiferromagnetically coupled with the third input track (13) and the other end is antiferromagnetically coupled with the other end of the second connecting track (32);
one end of the ninth connecting track (39) is antiferromagnetically coupled with the other end of the first escape track (41), ferromagnetically coupled with the other end of the second escape track (42), and the other end thereof is antiferromagnetically coupled with the first output track (21);
one end of the fifth connecting track (35) is ferromagnetically coupled with the second input track (12);
-one end of the sixth connecting track (36) is antiferromagnetically coupled to the second input track (12) and the other end is ferromagnetically coupled to one end of the third exit track (43);
one end of the seventh connecting track (37) is antiferromagnetically coupled to the fourth input track (14) and the other end is antiferromagnetically coupled to the other end of the fifth connecting track (35);
-one end of the eighth connecting track (38) is ferromagnetically coupled to the fourth input track (14) and the other end is ferromagnetically coupled to the fourth exit track (44);
one end of the tenth connecting track (310) is antiferromagnetically coupled with the other end of the third escape track (43), ferromagnetically coupled with the other end of the fourth escape track (44), and the other end thereof is antiferromagnetically coupled with the second output track (22);
magnetic tunnel junctions are arranged in the first output track (21) and the second output track (22) and are used for reading the state of the magnetic skulls;
the direction of the magnetic moment of the magnetic material of the first input track (11) is outward perpendicular to the first input track (11) surface.
2. The magnetic skutter-based logic gate according to claim 1, wherein a voltage-controlled magnetic anisotropic gate is further disposed in the ninth connection track (39), and the logic gate is a nand gate.
3. The magnetic skutter-based logic gate of claim 1, wherein a voltage-controlled magnetic anisotropy gate is further disposed within the tenth connection track (310), when the logic gate is a nor gate.
4. A magnetic sightline-based logic gate according to claim 2 or 3, characterized in that a logical 1 is represented by a magnetic sightline with a polarity of +1, entering from said first (11) and third (13) input tracks; a logical 0 is represented by a magnetic Stargmen with a polarity of-1, entering from the second input track (12) and a fourth input track (14).
5. The magnetic skutter-based logic gate of claim 4, wherein the magnetic skutter is capable of being transformed into a distorted magnetic skutter under current driving, the distorted magnetic skutter being present at and movable along an antiferromagnetic boundary, the distorted magnetic skutter and the magnetic skutter having a topological charge of +1 or-1 being capable of being transformed into each other.
6. The magnetic skyburn-based logic gate of claim 5, further comprising a control circuit comprising a first voltage source (V1), a second voltage source (V2), and a third voltage source (V3), the voltage-controlled magnetic anisotropy gate comprising a first voltage-controlled magnetic anisotropy gate (C1) and a second voltage-controlled magnetic anisotropy gate (C2), the first voltage-controlled magnetic anisotropy gate (C1) connecting the first voltage source (V1) and the second voltage source (V2), the second voltage-controlled magnetic anisotropy gate (C2) connecting the first voltage source (V1) and the third voltage source (V3).
7. The magnetic skutter-based logic gate of claim 6, wherein a magnetic tunnel junction is disposed in each of the first and second inputs for detecting the presence of a magnetic skutter; a magnetic tunnel junction within the first input terminal is used to control the third voltage source (V3), a magnetic tunnel junction within the second input terminal is used to control the second voltage source (V2).
8. The magnetic siganus based logic gate of claim 5, wherein the magnetic siganus is driven to move by an in-plane current, the energizing means of the in-plane current is an electrode, the first input end and the second input end are connected with a negative electrode, and the output end is connected with a positive electrode.
9. The magnetic skutter-based logic gate of claim 4, wherein the first output track (21) and the second output track (22) are antiferromagnetically coupled.
10. A magnetic sigecun-based logic not gate comprising an input comprising fifth (15) and sixth (16) antiferromagnetically coupled input tracks, and an output comprising third (23) and fourth (24) antiferromagnetically coupled output tracks, the fifth (15) and third (23) output tracks being antiferromagnetically coupled, the sixth (16) and fourth (24) input tracks being antiferromagnetically coupled.
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CN111768806B (en) * | 2020-06-12 | 2022-05-31 | 华南师范大学 | Magnetic skynet based memory device and method for storing information by using same |
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