CN108521275B - Logic gate based on magnetic siganmin - Google Patents

Abstract

A logic gate based on magnetic skyrmions belongs to the technical field of magnetic devices. The use of magnetic skyrmions with opposite polarities to represent logical 1s and 0s improves the problem of information loss and misreading; NAND gates and NORs can be realized only by changing the voltage source connection port of the voltage-controlled magnetic anisotropic region gate The conversion of the gate greatly optimizes the manufacturing process; the invention utilizes the twisted magnetic skyrmion to move along the antiferromagnetic boundary, and the two twisted magnetic skyrmions can be merged into a twisted magnetic skyrmion or a traditional magnetic skyrmion The magnetic skyrmions and the magnetic skyrmions with a topological charge of +1 or -1 can be converted to each other with the twisted magnetic skyrmions under the driving of electric current, realizing the logical operation based on the magnetic skyrmions; using the magnetic skyrmions The logic NOT gate is realized on the principle of polarity reversal at the antiferromagnetic coupling boundary; the logic gate of the present invention has the characteristics of small size, low power consumption, high stability, fast operation speed and the like.

Description

A logic gate based on magnetic skyrmions

technical field

The invention belongs to the technical field of magnetic devices, and in particular relates to a logic gate for realizing NAND gate, NOR gate and NAND gate based on magnetic skyrmions.

Background technique

Logic gates are the cornerstone of modern electronic information technology. In digital circuits, high and low levels are usually used to represent logic "1" and "0". Different logic gates can be used to implement different Boolean functions, NAND gates, and NOR gates. NAND gates are all basic logic gates. The truth table corresponding to NAND gates, NOR gates and NOR gates is as follows:

Enter A Enter B output F 0 0 1 0 1 1 1 0 1 1 1 0

Table 1: Truth Table for Logic NAND Gate

Enter A Enter B output F 0 0 1 0 1 0 1 0 0 1 1 0

Table 2: Truth table for a logical NOR gate

enter output 0 1 1 0

Table 3: Truth Table for Logic NOT Gate

The logic gate made by traditional CMOS structure is bulky, high power consumption, and Joule heating limits its high-density integration.

Magnetic skyrmions are topologically protected magnetic structures with high stability, small size, and diverse manipulation methods. The different states of magnetic skyrmions are used as "bits" to enable information storage and make logic devices. In traditional applications, the presence and absence of magnetic skyrmions are usually used to represent logical "1" and "0" to realize basic logical operations (X.Zhanget.al, Magnetic skyrmion logic gates: conversion, duplication and merging of skyrmions).

Twisted skyrmion is a new type of stable skyrmion state existing at the boundary of two antiferromagnetically coupled domains (Huanhuan Yang et.al, Twisted skyrmion at domain boundaries and the method of image). The twisted skyrmions and the traditional skyrmions can be transformed into each other, and the two twisted skyrmions can be fused.

The study found that electric current can be used to drive magnetic skyrmions to move in magnetic nanoribbons (Xichao Zhang et.al, Magnetic bilayer-skyrmions without skyrmion Hall effect). In addition, the voltage-controlled magnetic anisotropy (VCMA) technique (Wang Kang et.al, Voltage Controlled Magnetic SkyrmionMotion for Racetrack Memory) can be used to change the anisotropic energy of magnetic nanoribbons, thereby changing the motion state of magnetic skyrmion. Magnetic tunnel junctions (MTJs) (Jares, H et.al, Angular dependence of the tunnel magnetoresistance in transition-metal-based junctions) can be used to read the states of magnetic skyrmions. The above technical means have been confirmed by experiments or theories, and will be used in the present invention.

SUMMARY OF THE INVENTION

The purpose of the present invention is to propose a new type of logical NAND gate, logical NOR gate and logical NOT gate based on magnetic skyrmions. The NAND gate and OR can be realized by simply changing the position of the magnetic anisotropic gate by changing the voltage. The conversion of the NOT gate uses the principle that the polarity of magnetic skyrmions is reversed at the antiferromagnetic coupling boundary to realize the logic NOT gate.

The technical scheme of the present invention is:

A magnetic skyrmion-based logic gate comprising:

a first input comprising a first input rail 11 and a second input rail 12 arranged in parallel and antiferromagnetically coupled, and a second input comprising a parallel arranged and antiferromagnetically coupled coupled third input rail 13 and fourth input rail 14;

The output terminal includes a first output track 21 and a second output track 22;

a first connection path, comprising a first connection track 31 and a second connection track 32 arranged in parallel and antiferromagnetically coupled;

The second connecting path includes a third connecting track 33 and a fourth connecting track 34 that are arranged in parallel and are antiferromagnetically coupled;

a third connection path, comprising a fifth connection track 35 and a sixth connection track 36 arranged in parallel and antiferromagnetically coupled;

the fourth connection path, including the seventh connection track 37 and the eighth connection track 38 arranged in parallel and antiferromagnetically coupled;

the fifth connecting passage, including the ninth connecting track 39 and the tenth connecting track 310;

a first escape path, comprising a first escape track 41 and a second escape track 42 arranged in parallel and antiferromagnetically coupled;

a second escape path, comprising a third escape track 43 and a fourth escape track 44 arranged in parallel and antiferromagnetically coupled;

One end of the first connecting track 31 is antiferromagnetically coupled to the first input track 11 , and the other end is ferromagnetically coupled to one end of the first escape track 41 ;

One end of the second connecting track 32 is ferromagnetically coupled to the first input track 11;

One end of the third connecting track 33 is ferromagnetically coupled with the third input track 13, and the other end is ferromagnetically coupled with one end of the second escape track 42;

One end of the fourth connecting track 34 is antiferromagnetically coupled to the third input track 13, and the other end is antiferromagnetically coupled to the other end of the second connecting track 32;

One end of the ninth connecting track 39 is antiferromagnetically coupled to the other end of the first escape track 41 , ferromagnetically coupled to the other end of the second escape track 42 , and the other end of the ninth connecting track 39 is ferromagnetically coupled to the first output track 21 antiferromagnetic coupling;

One end of the fifth connecting track 35 is ferromagnetically coupled to the second input track 12;

One end of the sixth connecting track 36 is antiferromagnetically coupled to the second input track 12, and the other end is ferromagnetically coupled to one end of the third escape track 43;

One end of the seventh connecting track 37 is antiferromagnetically coupled to the fourth input track 14, and the other end is antiferromagnetically coupled to the other end of the fifth connecting track 35;

One end of the eighth connecting track 38 is ferromagnetically coupled to the fourth input track 14, and the other end is ferromagnetically coupled to the fourth escape track 44;

One end of the tenth connecting track 310 is anti-ferromagnetically coupled to the other end of the third escape track 43 , ferromagnetically coupled to the other end of the fourth escape track 44 , and the other end is coupled to the second output track 22 antiferromagnetic coupling;

Magnetic tunnel junctions are arranged in the first output track 21 and the second output track 22 for reading the state of the magnetic skyrmions;

The direction of the magnetic moment of the magnetic material of the first input track 11 is perpendicular to the surface of the first input track 11 and outward.

Specifically, the ninth connection track 39 is further provided with a voltage-controlled magnetic anisotropy gate, and the logic gate is a NAND gate at this time.

Specifically, the tenth connection track 310 is further provided with a voltage-controlled magnetic anisotropy gate, and the logic gate is a NOR gate at this time.

Specifically, a magnetic skyrmion with a polarity of +1 is used to represent a logical 1, entering from the first input track 11 and the third input track 13; a magnetic skyrmion with a polarity of -1 is used to represent a logical 0, from The second input rail 12 and the fourth input rail 14 enter.

Specifically, the magnetic skyrmions can be converted into twisted magnetic skyrmions under the driving of current, and the twisted magnetic skyrmions exist in the antiferromagnetic boundary and can move along the antiferromagnetic boundary, the twisted magnetic skyrmions Skyrmions and magnetic skyrmions with topological charges of +1 or -1 can be converted into each other.

Specifically, it also includes a control circuit, the control circuit includes a first voltage source V1, a second voltage source V2 and a third voltage source V3, and the voltage-controlled magnetic anisotropy gate includes a first voltage-controlled magnetic anisotropy gate C1 and a second voltage controlled magnetic anisotropy gate C2, the first voltage controlled magnetic anisotropy gate C1 is connected to the first voltage source V1 and the second voltage source V2, the second voltage controlled magnetic Anisotropic gate C2 connects the first voltage source V1 and the third voltage source V3.

Specifically, both the first input end and the second input end are provided with a magnetic tunnel junction to detect whether there is a magnetic skyrmion; the magnetic tunnel junction in the first input end is used to control the first input end. Three voltage sources V3, the magnetic tunnel junction in the second input terminal is used to control the second voltage source V2.

Specifically, the magnetic skyrmions are driven to move by an in-plane current, the energizing device of the in-plane current is an electrode, the first input end and the second input end are connected to a negative electrode, and the output end is connected to a positive electrode.

Specifically, the first output track 21 and the second output track 22 are antiferromagnetically coupled.

A logical NOT gate based on magnetic skyrmions, comprising an input end and an output end, the input end including an antiferromagnetically coupled fifth input track 15 and a sixth input track 16, and the output end including an antiferromagnetically coupled The third output track 23 and the fourth output track 24, the fifth input track 15 and the third output track 23 are antiferromagnetically coupled, the sixth input track 16 and the fourth output track 24 are antiferromagnetically coupled Magnetic coupling.

The beneficial effects of the present invention are:

(1) The traditional logic gate circuits based on magnetic skyrmions use "with" and "without" magnetic skyrmions to represent logic "1" and "0" (or the opposite way), so two magnetic skyrmions The mutual motion between skyrmions will cause misreading or information loss, and it is very demanding to keep all skyrmions synchronously moving under the existing experimental conditions. The present invention uses different polarities of magnetic skyrmions to represent logical "1" and "0", and this representation method does not require all magnetic skyrmions to keep synchronous movement, which greatly improves the problem of misreading and information loss.

(2) The conversion of the NAND gate and the NOR gate can be realized only by changing the connection port of the voltage control magnetic anisotropic gate voltage source, which greatly optimizes the manufacturing process.

(3) The logical NOT gate is designed by utilizing the property of magnetic skyrmions passing through the boundary of antiferromagnetic coupling, which is simple in structure and strong in practicability.

(4) The present invention utilizes a new type of magnetic structure: twisted magnetic skyrmions, which can be interconverted with traditional magnetic skyrmions, and driven by an applied current, two twisted magnetic skyrmions can be fused into one Twisted magnetic skyrmions, which provide a new way of annihilating magnetic skyrmions.

(5) The present invention uses magnetic skyrmions to form logic gates, and has the characteristics of small size, low power consumption, high stability, and fast operation speed.

Description of drawings

FIG. 1 is a schematic structural diagram of a logic NAND gate in an embodiment.

FIG. 2 is a schematic structural diagram of a logical NOR gate in an embodiment.

FIG. 3 is a schematic structural diagram of a logical NOT gate in an embodiment.

FIG. 4 is a schematic diagram of the motion state of the magnetic skyrmion in the logic NAND gate.

FIG. 5 is a schematic diagram of the motion state of the magnetic skyrmion in the logic NOR gate.

FIG. 6 is a schematic diagram of the motion state of the magnetic skyrmion in the logic NOT gate.

Detailed ways

The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

A new type of magnetic structure is used in the present invention: twisted magnetic skyrmions, twisted magnetic skyrmions exist in the antiferromagnetic boundary and can move along the antiferromagnetic boundary, and two twisted magnetic skyrmions can also be fused It is a twisted magnetic skyrmion or a traditional magnetic skyrmion; driven by a current, a magnetic skyrmion with a topological charge of +1 or -1 can be converted into a twisted magnetic skyrmion, and the twisted magnetic skyrmion can also be Converted to magnetic skyrmions with topological charges of +1 or -1.

The magnetic skyrmion-based logical NAND gate and NOR gate provided by the present invention includes a first input end, a second input end and an output end, wherein the first input end includes a first input arranged in parallel and antiferromagnetically coupled track 11 and second input track 12, the second input end includes a third input track 13 and a fourth input track 14 arranged in parallel and antiferromagnetically coupled; the output end includes a first output track 21 and a second output track 22, the first An output rail 21 and a second output rail 22 can also be antiferromagnetically coupled to facilitate cascading of logic gates.

The magnetic moment directions of the magnetic materials of the first input track 11 and the third input track 13 are perpendicular to their surfaces and outward. Since magnetic skyrmions generally exist on thin films, the logic gates provided by the present invention in some embodiments are based on The magnetic moment direction of the magnetic material of the first input track 11 and the third input track 13 is perpendicular to the film outward, then the magnetic moment direction of the magnetic material of the second input track 12 and the fourth input track 14 is perpendicular to the film inward.

In the present invention, a magnetic skyrmion with a polarity of +1 is used to represent a logical 1, and the logic gate is entered from the first input track 11 and the third input track 13; a magnetic skyrmion with a polarity of -1 is used to represent a logical 0, from The second input rail 12 and the fourth input rail 14 enter the logic gates.

The logic gate provided by the present invention further includes a first connection path, a second connection path, a third connection path, a fourth connection path, a fifth connection path, a first detachment path and a second detachment path, and the first connection path includes a parallel arrangement And the first connection track 31 and the second connection track 32 are antiferromagnetically coupled, the second connection path includes a third connection track 33 and a fourth connection track 34 that are arranged in parallel and are antiferromagnetically coupled, and the fifth connection path includes a ninth connection path. The connection rail 39 and the tenth connection rail 310, the first escape path includes a first escape rail 41 and a second escape rail 42 arranged in parallel and antiferromagnetically coupled; one end of the first connection rail 31 is antiferrous to the first input rail 11 Magnetic coupling, the other end is ferromagnetically coupled with one end of the first escape track 41; one end of the second connecting track 32 is ferromagnetically coupled with the first input track 11; one end of the third connecting track 33 is ferromagnetically coupled with the third input track 13 , the other end is ferromagnetically coupled with one end of the second escape track 42 ; one end of the fourth connecting track 34 is antiferromagnetically coupled with the third input track 13 , and the other end is antiferromagnetically coupled with the other end of the second connecting track 32 One end of the ninth connecting track is antiferromagnetically coupled with the other end of the first escaping track 41, and is ferromagnetically coupled with the other end of the second escaping track 42, and the other end of the ninth connecting track 39 is coupled with the first output track 21 Antiferromagnetic coupling; the third connection path includes a fifth connection track 35 and a sixth connection track 36 arranged in parallel and antiferromagnetically coupled, and the fourth connection path includes a seventh connection track 37 and a sixth connection track 37 arranged in parallel and antiferromagnetically coupled. Eight connection rails 38, the second escape path includes a third escape rail 43 and a fourth escape rail 44 arranged in parallel and antiferromagnetically coupled, one end of the fifth connection rail 35 is ferromagnetically coupled with the second input rail 12; the sixth connection One end of the track 36 is antiferromagnetically coupled with the second input track 12, and the other end is ferromagnetically coupled with one end of the third escape track 43; one end of the seventh connecting track 37 is antiferromagnetically coupled with the fourth input track 14, and the other One end is antiferromagnetically coupled with the other end of the fifth connecting track 35; one end of the eighth connecting track 38 is ferromagnetically coupled with the fourth input track 14, and the other end is ferromagnetically coupled with the fourth escape track 44; One end is antiferromagnetically coupled to the other end of the third escape track 43, ferromagnetically coupled to the other end of the fourth escape track 44, and the other end of the tenth connection track 310 is antiferromagnetically coupled to the second output track 22; the first output Magnetic tunnel junctions are provided in both the track 21 and the second output track 22 for reading the state of the magnetic skyrmions.

The magnetic skyrmion enters the logic gate from one of the two orbitals at the input, transforms into a twisted magnetic skyrmion when entering the connecting path, and then moves along the antiferromagnetic boundary in the connecting path and the disengaging path in turn, and then moves along the antiferromagnetic boundary in the connecting path and the disengaging path in turn. During the passage, it is converted into a magnetic skyrmion with a topological charge of +1 or -1, and then passes through the fifth connecting passage and enters the output end. Because the other ends of the second connecting track 32 and the fourth connecting track 34 move away from the magnetic skyrmion The orbit is far away and has no effect on the result, so it is not limited here.

Some embodiments further include a control circuit, the control circuit includes a first voltage source V1, a second voltage source V2 and a third voltage source V3, and the voltage-controlled magnetic anisotropy gate includes a first voltage-controlled magnetic anisotropy gate C1 and a third voltage source V3. Two voltage-controlled magnetic anisotropy gates C2, the first voltage-controlled magnetic anisotropy gate C1 is connected to the first voltage source V1 and the second voltage source V2, and the second voltage-controlled magnetic anisotropy gate C2 is connected to the first voltage source V1 and the second voltage source V2 The third voltage source V3. Magnetic tunnel junctions are arranged in both the first input end and the second input end to detect whether there are magnetic skyrmions. The magnetic tunnel junction in the first input end is used to control the third voltage source V3, and the magnetic tunnel junction in the second input end is used to control the third voltage source V3. The magnetic tunnel junction is used to control the second voltage source V2, the magnetic tunnel junction in the NAND gate is arranged in the first input track 11 and the third input track 13, and the magnetic tunnel junction in the NOR gate is arranged in the second input track 12 and the fourth input track 14.

The magnetic skyrmion first controls the magnetic anisotropy gate through the voltage in the fifth connection path, then passes through the output terminal, and then reads the state by the magnetic tunnel junction in the output terminal. The voltage controlled magnetic anisotropy gate (VCMA) includes a first voltage controlled magnetic anisotropy gate C1 and a second voltage controlled magnetic anisotropy gate C2. The voltage-controlled magnetic anisotropy gate can be arranged in the first output rail 21 or the second output rail 22 independently, or the same voltage-controlled magnetic anisotropy gate can be arranged in both the first output rail 21 and the second output rail 22 , by changing the connection port of the voltage source of the voltage-controlled magnetic anisotropic gate to achieve the conversion of the NAND gate and the NOR gate, when the first voltage source V1 and the third voltage source V3 are connected to the first voltage in the first output track 21 When the magnetic anisotropy gate C1 is controlled, the first voltage source V1 and the second voltage source V2 are connected to the second voltage-controlled magnetic anisotropy gate C2 in the first output track 22, the logic gate is a NAND gate, as shown in FIG. 1 When the first voltage source V1 and the third voltage source V3 are connected to the first voltage-controlled magnetic anisotropy gate C1 in the second output rail 22, the first voltage source V1 and the second voltage source V2 are connected to the second output rail 22 When the second voltage inside controls the magnetic anisotropy gate C2, the logic gate is a NOR gate, as shown in FIG. 2 .

In some embodiments, the movement of the magnetic skyrmions is driven by an in-plane current, and the energization device of the in-plane current is an electrode, the first input terminal and the second input terminal are connected to a negative electrode, the output terminal is connected to a positive electrode, and the movement direction of the magnetic skyrmions is Contrary to the movement direction of the in-plane current, taking the magnetic skyrmions entering the logic gate from the first input track 11 as an example, the direction of the in-plane current is sequentially through the first output track 21, the fifth connection path, the first detachment path, The first connecting path and the first input track 11, and the motion trajectory of the magnetic skyrmions is sequentially passing through the first input track 11, the antiferromagnetic boundary in the first connecting path, the antiferromagnetic boundary in the first detaching path, The fifth connection path and the first output rail 21 .

In some embodiments, the logic gate utilizes a thin film constructed of a magnetic material as a Heusler-type magnetic shape memory alloy including Ni-Mn-Ga, Ni -Mn-Z(In,Sn,Sb),Ni-Mn-Sn-Co etc. For example, Ni-Mn-Sn-Co thin films are prepared by DC magnetron sputtering (power 150W) deposited on a hot (500°C) MgO (001) single crystal substrate in an argon atmosphere of 0.011 mPa. The specific composition of the film can be characterized by X-ray energy spectrometer. The size of the logic NAND gate and NOR gate can be: the total length is 1000nm, the width is 600nm, and the thickness is 1nm; the output width is 100nm; the voltage-controlled magnetic anisotropy gate VCMA is 100nm*20nm, and the four connection paths are The track can be a straight or arc track. Preferably, the tracks of the four connecting passages form a square, the logic gates are symmetrical along the diagonal of the square, and the included angle between each connecting track and the input and output ends is α=β=135°. The size of the logic NOT gate is 400nm in length and 100nm in width.

As shown in Figure 3, the input of the NAND gate is "1" + "1" = "0", "1" + "0" = "1" and "0" + "0" = "1" these three The three states of the magnetic skyrmion motion under the condition of the white arrows indicate the flow of the in-plane current (CIP). In the initial state, the first voltage source V1 controls the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 to enhance the magnetic anisotropy in the region where they are located. At this time, the second voltage source V2 and the voltage value of the third voltage source V3 is 0.

"1"+"1"="0": When the input is "1" and "1", that is, two magnetic skyrmions with polarity +1 enter from the first input track 11 and the third input track 13 respectively NAND gate, as shown in a1 in Figure 4, when the magnetic tunnel junctions at the first input and the second input both detect the presence of magnetic skyrmions with a polarity of +1, the second voltage source V2 and the third voltage The source V3 generates a voltage opposite to the first voltage source V1, so that the magnetic anisotropy of the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 returns to normal. The two magnetic skyrmions with a polarity of +1 are transformed into two twisted magnetic skyrmions when they enter the first connection path and the second connection path, respectively, as shown in a2 in Fig. 4, and then two twisted magnetic skyrmions The brightons move along the antiferromagnetic boundaries of the first and second connecting paths, respectively. The two twisted magnetic skyrmions in the first connecting pathway and the second connecting pathway meet and fuse into one twisted magnetic skyrmion when entering the first detachment pathway, as shown in a3 in Fig. 3 . The fused twisted magnetic skyrmions then move along the antiferromagnetic boundary of the first escaping pathway, as shown in a4 in Fig. 4 . The fused twisted magnetic skyrmions are converted into skyrmions with a polarity of +1 when they leave the first detachment pathway and enter the ninth connecting orbit 39, as shown in a5 in Fig. 4. The magnetic anisotropy of the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 are normal, and the converted skyrmions enter the first voltage-controlled magnetic anisotropy gate through the two voltage-controlled magnetic anisotropy gates. The output terminal 21 is detected by the magnetic tunnel junction in the first output terminal 21 after being transformed into a skyrmion with a polarity of -1 at the boundary, as shown in a6 in FIG. The skyrmion represents a logical "1", and a skyrmion with a polarity of -1 represents a logical "0", and the first output track 21 of the NAND gate outputs a logical "0".

"1" + "0" = "1", "0" + "1" = "1": When the input is "1", "0" or "0", "1", that is, a polarity is + A magnetic skyrmion of 1 enters the NAND gate from the first input track 11, and a magnetic skyrmion with a polarity of -1 enters the NAND gate from the fourth input track 14, as shown by b1 in Figure 4; or a polar A magnetic skyrmion with a polarity of +1 enters the NAND gate from the third input track 13, and a magnetic skyrmion with a polarity of -1 enters the NAND gate from the second input track 12. The magnetic tunnel junction in the two input terminals only detects the existence of a magnetic skyrmion with a polarity of +1, then the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 have only one magnetic skyrmion. The magnetic anisotropy of one is a normal value, then the ninth connecting track 39 is equivalent to a closed state, the magnetic skyrmions with a polarity of +1 will not be output from the first output track 21, and the magnetic skyrmions with a polarity of -1 will not be output from the first output track 21. When entering the connecting path, the skyrmions are transformed into twisted magnetic skyrmions and move along the third connecting path or the fourth connecting path and output from the second disengaging path to the tenth connecting track 310, as shown in b5 in FIG. The connection between the ten connecting track 310 and the second output track 22 is transformed into a skyrmion with a polarity of +1 and detected by the magnetic tunnel junction in the second output track 22, as shown in b6 in FIG. A second output terminal of the gate outputs a logic "1".

"0" + "0" = "1": when the input is "0", "0", that is, two magnetic skyrmions with polarity -1 from the second input track 12 and the fourth input track 14 respectively Entering the NAND gate, as shown by c1 in Figure 4, two magnetic skyrmions with a polarity of -1 are transformed into twisted magnetic skyrmions when entering the connecting path, as shown by c2 in Figure 4, and then two twisted The magnetic skyrmions move along the third connection pathway and the fourth connection pathway respectively and meet and fuse into a twisted magnetic skyrmion when entering the second disengagement pathway, as shown in c3 in Figure 4, the fused twisted magnetic skyrmion The skyrmions continue to move toward the tenth connecting track 310 along the antiferromagnetic boundary of the second detachment path, as shown by c4 in FIG. Converted to a skyrmion with a polarity of -1, as shown by c5 in Figure 4, at the interface between the tenth connecting track 310 and the second output track 22, it is transformed into a skyrmion with a polarity of +1 and is converted into a skyrmion with a polarity of +1 and is converted into a skyrmion with a polarity of +1 by the second The magnetic tunnel junction in the output track 22 is detected, as shown by c6 in FIG. 4 , at this time, the second output track 22 of the NAND gate outputs a logic "1".

As shown in Figure 5, the input of the NOR gate is "1" + "1" = "0", "1" + "0" = "0" and "0" + "0" = "1" The three states of the magnetic skyrmion motion under the condition of the white arrows indicate the flow of the in-plane current (CIP). In the initial state, the first voltage source V1 controls the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 to enhance the magnetic anisotropy in the region where they are located. At this time, the second voltage source V2 and the voltage value of the third voltage source V3 is 0.

"1"+"1"="0": When the input is "1" and "1", that is, two magnetic skyrmions with polarity +1 enter from the first input track 11 and the third input track 13 respectively NOR gate, as shown in a1 in Figure 5. The two magnetic skyrmions with a polarity of +1 are transformed into two twisted magnetic skyrmions when they enter the first connection path and the second connection path, respectively, as shown in a2 in Fig. 5, and then two twisted magnetic skyrmions The brightons move along the antiferromagnetic boundaries of the first and second connecting paths, respectively. The two twisted magnetic skyrmions in the first connecting pathway and the second connecting pathway meet and fuse into one twisted magnetic skyrmion when entering the first detachment pathway, as shown in a3 in Fig. 5 . The fused twisted magnetic skyrmions then move along the antiferromagnetic boundary of the first escape pathway, as shown in a4 in Fig. 5. The fused twisted magnetic skyrmions are converted into skyrmions with a polarity of +1 when they leave the first detachment pathway and enter the ninth connecting orbital 39, as shown in a5 in Fig. 5. The interface of an output track 21 is transformed into a skyrmion with a polarity of -1 and detected by the magnetic tunnel junction in the first output track 21, as shown in a6 in FIG. 5, at this time the first output track of the NOR gate 11 Output logic "0".

"1" + "0" = "0", "0" + "1" = "0": When the input is "1", "0" or "0", "1", that is, a polarity is + A magnetic skyrmion of 1 enters the NOR gate from the first input track 11, and a magnetic skyrmion with a polarity of -1 enters the NOR gate from the fourth input track 14, as shown by b1 in Figure 5; or a polar A magnetic skyrmion with a polarity of +1 enters the NOR gate from the third input track 13, and a magnetic skyrmion with a polarity of -1 enters the NOR gate from the second input track 12. The magnetic tunnel junction in the two input terminals only detects the existence of a magnetic skyrmion with a polarity of -1, then the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C1 in the second connection track 22 The magnetic anisotropy of only one of the anisotropic gates C2 is a normal value, then the second output track 22 is equivalent to a closed state, and the magnetic skyrmions with a polarity of -1 will not be output from the second output track 22, while the polar The magnetic skyrmions with a property of +1 are transformed into twisted magnetic skyrmions when they enter the connecting path, and move along the first connecting path or the second connecting path and output from the first disengaging path to the ninth connecting track 39, as shown in Figure 5 As shown in b5, at the interface between the ninth connecting track 39 and the first output track 21, the skyrmion with polarity -1 is transformed into a skyrmion and detected by the magnetic tunnel junction in the first output track 21, as shown in b6 in Fig. 5 As shown, the first output terminal of the NOR gate outputs a logic "0" at this time.

"0" + "0" = "1": when the input is "0", "0", that is, two magnetic skyrmions with polarity -1 from the second input track 12 and the fourth input track 14 respectively Entering the NOR gate, as shown in c1 in Figure 5, at this time, the magnetic tunnel junctions of the first input and the second input both detect the magnetic skyrmion with a polarity of -1, the second voltage source V2 and the third voltage The source V3 generates a voltage opposite to the first voltage source V1, so that the magnetic anisotropy of the first voltage-controlled magnetic anisotropy gate C1 and the second voltage-controlled magnetic anisotropy gate C2 returns to normal; the two polarities are - The magnetic skyrmion of 1 transforms into a twisted magnetic skyrmion when it enters the connecting pathway, as shown in c2 in Fig. 5, and then the two twisted magnetic skyrmions move along the third connecting pathway and the fourth connecting pathway, respectively, and at When entering the second escape pathway, they meet and fuse into a twisted magnetic skyrmion, as shown in c3 in Fig. 5, the fused twisted magnetic skyrmion continues along the antiferromagnetic boundary of the second escape pathway to the tenth connecting orbit 310 moves, as shown by c4 in Figure 5, when leaving the second detachment path and entering the tenth connecting orbit 310, the twisted magnetic skyrmions are converted into skyrmions with a polarity of -1, as shown by c5 in Figure 5 , the skyrmion in the tenth connection track 310 enters the second output track 22 after passing through two voltage-controlled magnetic anisotropy gates, and is transformed into a skyrmion with a polarity of +1 at the boundary, and is transported by the second output track 22 The inner magnetic tunnel junction is detected, as shown by c6 in FIG. 5 , at this time, the second output track 22 of the NOR gate outputs a logic “1”.

In the logic NOT gate in this embodiment, the magnetic moment direction of the magnetic material of the fifth input track 15 is perpendicular to its surface and outward. Since magnetic skyrmions generally exist on thin films, in some embodiments, the magnetic moment provided by the present invention The logic NOT gate is made of thin films, then the magnetic moment direction of the magnetic material of the fifth input track 15 and the fourth output track 24 is perpendicular to the film outward, then the magnetic properties of the sixth input track 16 and the third output track 23 The direction of the magnetic moment of the material is perpendicular to the film inward.

Figure 6 shows the state of the magnetic skyrmion motion of the logic NOT gate in this embodiment when the input is "1" and the output is "0", and the white arrows indicate the flow of the in-plane current (CIP).

Figure 6(a) is the overall schematic diagram of the NOT gate converting the input logic "1" into the output "0". When the input is "1", as shown in Figure 6(b), the magnetic sigma with the polarity of +1 The bright son enters the NOT gate from the fifth input track 15, moves along the fifth input track 15 and enters the third output track 23 under the drive of the in-plane current, and realizes the polarity reversal at the junction, turning it into a polarity of -1. The skyrmion, as shown in Fig. 6(c), after the transformation, the skyrmion continues to move along the third output track, as shown in Fig. 6(d), and the NOT gate outputs a logic "0" at this time. The process of the NOT gate converting the input logic "0" into the output logic "1" is the same as above.

Those skilled in the art can make various other specific modifications and combinations without departing from the essence of the present invention according to the technical teaching disclosed in the present invention, and these modifications and combinations still fall within the protection scope of the present invention.

Claims (10)

1. a logic gate based on magnetic skyrmions, is characterized in that, comprises: A first input comprising a first input rail (11) and a second input rail (12) arranged in parallel and antiferromagnetically coupled, and a second input comprising a parallel arrangement and antiferromagnetically coupled third input track (13) and fourth input track (14); an output end, comprising a first output track (21) and a second output track (22); a first connection path, comprising a first connection track (31) and a second connection track (32) arranged in parallel and antiferromagnetically coupled; a second connection path, comprising a third connection track (33) and a fourth connection track (34) arranged in parallel and antiferromagnetically coupled; a third connection path, comprising a fifth connection track (35) and a sixth connection track (36) arranged in parallel and antiferromagnetically coupled; a fourth connection path, comprising a seventh connection track (37) and an eighth connection track (38) arranged in parallel and antiferromagnetically coupled; a fifth connection passage, comprising a ninth connection track (39) and a tenth connection track (310); a first escape path, comprising a first escape track (41) and a second escape track (42) arranged in parallel and antiferromagnetically coupled; a second escape path comprising a third escape track (43) and a fourth escape track (44) arranged in parallel and antiferromagnetically coupled; One end of the first connecting track (31) is anti-ferromagnetically coupled to the first input track (11), and the other end is ferromagnetically coupled to one end of the first escape track (41); One end of the second connecting track (32) is ferromagnetically coupled to the first input track (11); One end of the third connection track (33) is ferromagnetically coupled with the third input track (13), and the other end is ferromagnetically coupled with one end of the second escape track (42); One end of the fourth connecting track (34) is antiferromagnetically coupled to the third input track (13), and the other end is antiferromagnetically coupled to the other end of the second connecting track (32); One end of the ninth connecting track (39) is antiferromagnetically coupled to the other end of the first escape track (41), ferromagnetically coupled to the other end of the second escape track (42), and the other end is ferromagnetically coupled to the second escape track (42). The first output track (21) is antiferromagnetically coupled; One end of the fifth connecting track (35) is ferromagnetically coupled to the second input track (12); One end of the sixth connecting track (36) is antiferromagnetically coupled with the second input track (12), and the other end is ferromagnetically coupled with one end of the third escape track (43); One end of the seventh connecting track (37) is antiferromagnetically coupled to the fourth input track (14), and the other end is antiferromagnetically coupled to the other end of the fifth connecting track (35); One end of the eighth connecting track (38) is ferromagnetically coupled with the fourth input track (14), and the other end is ferromagnetically coupled with the fourth escape track (44); One end of the tenth connecting track (310) is antiferromagnetically coupled to the other end of the third escape track (43), and ferromagnetically coupled to the other end of the fourth escape track (44), and the other end is ferromagnetically coupled to the other end of the fourth escape track (44). The second output track (22) is antiferromagnetically coupled; Magnetic tunnel junctions are provided in both the first output track (21) and the second output track (22) for reading the state of the magnetic skyrmions; The direction of the magnetic moment of the magnetic material of the first input track (11) is perpendicular to the surface of the first input track (11) and outward. 2. the logic gate based on magnetic skyrmions according to claim 1, is characterized in that, is also provided with voltage control magnetic anisotropy gate in described ninth connection track (39), and logic gate is NAND at this moment Door. 3. The logic gate based on magnetic skyrmions according to claim 1, wherein the tenth connection track (310) is also provided with a voltage-controlled magnetic anisotropy gate, and the logic gate is NOR at this time Door. 4. The logic gate based on magnetic skyrmions according to claim 2 or 3, characterized in that, a magnetic skyrmion with a polarity of +1 is used to represent logic 1, from the first input track (11) and A third input track (13) enters; logical 0 is represented by a magnetic skyrmion with polarity -1, entering from said second input track (12) and fourth input track (14). 5 . The logic gate based on magnetic skyrmions according to claim 4 , wherein the magnetic skyrmions can be converted into twisted magnetic skyrmions under the driving of electric current, and the twisted magnetic skyrmions exist The twisted magnetic skyrmions and magnetic skyrmions with a topological charge of +1 or -1 can be interconverted at and along the antiferromagnetic boundary. 6. The magnetic skyrmion-based logic gate according to claim 5, further comprising a control circuit, the control circuit comprising a first voltage source (V1), a second voltage source (V2) and a third voltage source (V2) a voltage source (V3), the voltage controlled magnetic anisotropy gate comprising a first voltage controlled magnetic anisotropy gate (C1) and a second voltage controlled magnetic anisotropy gate (C2), the first voltage controlled magnetic anisotropy gate (C2) An anisotropic gate (C1) connects the first voltage source (V1) and the second voltage source (V2), and the second voltage-controlled magnetic anisotropy gate (C2) connects the first voltage source (V1) ) and the third voltage source (V3). 7. The logic gate based on magnetic skyrmions according to claim 6, wherein a magnetic tunnel junction is provided in the first input end and the second input end for detecting whether there is a magnetic skyrmion There is; a magnetic tunnel junction in the first input for controlling the third voltage source (V3) and a magnetic tunnel junction in the second input for controlling the second voltage source (V2). 8 . The logic gate based on magnetic skyrmions according to claim 5 , wherein the magnetic skyrmions are driven to move by an in-plane current, and the energization device of the in-plane current is an electrode, and the first The input terminal and the second input terminal are connected to the negative electrode, and the output terminal is connected to the positive electrode. 9. The magnetic skyrmion-based logic gate according to claim 4, wherein the first output track (21) and the second output track (22) are antiferromagnetically coupled. 10. A logical NOT gate based on magnetic skyrmions, characterized by comprising an input end and an output end, the input end comprising a fifth input track (15) and a sixth input track (16) that are antiferromagnetically coupled , the output terminal comprises an antiferromagnetically coupled third output track (23) and a fourth output track (24), and the fifth input track (15) and the third output track (23) are antiferromagnetically coupled , the sixth input track (16) and the fourth output track (24) are antiferromagnetically coupled.

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