CN108509055B

CN108509055B - Independent keyboard scanning and positioning method

Info

Publication number: CN108509055B
Application number: CN201810338492.3A
Authority: CN
Inventors: 王兵; 凌云; 肖伸平; 陈刚
Original assignee: Hunan University of Technology
Current assignee: Hunan University of Technology
Priority date: 2016-01-05
Filing date: 2016-01-05
Publication date: 2021-03-16
Anticipated expiration: 2036-01-05
Also published as: CN105677054B; CN105677054A; CN108509055A

Abstract

A stand-alone keyboard scanning positioning method is realized by a circuit consisting of a stand-alone keyboard, a buffer register, a state code register and an encoder, wherein the stand-alone keyboard comprising N keys outputs N-bit keyboard state signals; the clock pulse controls the parallel register to simultaneously latch the current state and the previous state of the N-bit keyboard state signal to obtain a 2 multiplied by N-bit state code; encoding the status code and outputting a key number; different single key operation, combined key operation and keyboard maintenance state operation are only reflected on the difference of the state codes; if the key operation function needs to be increased or decreased or adjusted, the circuit structure does not need to be modified, and the encoding content of the encoder only needs to be changed according to the corresponding relation between the increased or decreased state code and the key number. The method does not need to write and run programs and works reliably.

Description

Independent keyboard scanning and positioning method

The patent application of the invention is divisional application, the original application number is 201610003719.X, the application date is 2016, 1, month and 5 days, and the name of the invention is independent keyboard scanning positioning circuit.

Technical Field

The invention relates to a scanning and positioning method of a keyboard, in particular to a scanning and positioning method of an independent keyboard.

Background

With the continuous development of embedded technology, various electronic products generally adopt a microcontroller as a control core and a keyboard as a main input device, and are widely applied.

The existing keyboard scanning is mainly controlled by a microcontroller, and is performed by running a program in the microcontroller, so that the program runs off due to interference, and the scanning program cannot work normally.

The invention patent with application number CN201010153560.2, "a method for fast scanning and positioning matrix keyboard", adopts a mode of keyboard interrupt triggering to enter the scanning and positioning process of keyboard, adopts a method of repeating the keyboard scanning step for many times to judge whether the key is valid, and makes state judgment on the obtained key value; if the multiple sampling states are the same, the key value is in a stable state and is valid; if the multiple sampling states are different, the key value is invalid. The single key operation or the combined key operation needs to be judged separately, if the single key operation is carried out, the single key processing mode is entered; if the operation is a combination key operation, a combination key processing mode is entered. The method disclosed in the patent solves the problems of wrong keys, continuous key touch and other errors caused by keyboard shaking due to the mechanical characteristics of the keyboard, and the problem of supporting combined keys and repeated keys. But the single key operation and the combined key operation of the method need to be processed respectively; a keyboard operation function of executing effective operation after a certain period of time of maintaining the keyboard state is not considered; when the key operation function is increased or decreased or adjusted, the structure of the keyboard scanning and positioning program needs to be modified.

Disclosure of Invention

In order to solve the technical problems of the existing keyboard scanning and positioning method, the invention provides an independent keyboard scanning and positioning method, which comprises the steps that an independent keyboard with N keys outputs N-bit keyboard state signals; the clock pulse controls the parallel register to simultaneously latch the current state and the previous state of the N-bit keyboard state signal to obtain a 2 multiplied by N-bit state code; encoding the status code and outputting a key number; the N-bit keyboard state signal is a level signal.

The current state of the N-bit keyboard state signal is the N-bit keyboard state signal at the effective triggering edge moment of the clock pulse, and the previous state of the N-bit keyboard state signal is the N-bit keyboard state signal at the effective triggering edge moment of the clock pulse; the clock pulse effective triggering edge is the rising edge of the clock pulse; the clock pulse active trigger edge is either a falling edge of the clock pulse.

The state code consists of an effective state code and an ineffective state code and is used for identifying the current state and the operation state of the independent keyboard; the key number is composed of a valid key number and an invalid key number; the effective state code is generated by the operation or the state of an effective keyboard, and a corresponding effective key number is correspondingly output; the invalid state code is generated by invalid keyboard operation or state and correspondingly outputs an invalid key number. The key number is M bits, and the selection of the M value should satisfy 2^MGreater than or equal to the sum of the number of valid and invalid key numbers.

The effective keyboard operations include single key press operation, single key release operation, single key press hold operation, and combination key operation. The combined key operation refers to the operation that after a single key is pressed down, other keys are pressed down; the invalid keyboard operation is an operation other than the valid keyboard operation.

The encoding of the state code and the output of the key number are realized by an encoder. When all invalid state codes are input by the encoder, the invalid key number is correspondingly output, and the invalid key number is a value except all valid key numbers. Further, the encoder is a read-only memory; the key operation function is increased or decreased or adjusted by modifying the storage content of the read-only memory.

The parallel register comprises an N-bit buffer register and a 2 multiplied by N-bit status code register; the specific method for simultaneously latching the current state and the previous state of the N-bit keyboard state signal by the parallel register controlled by the clock pulse to obtain the 2 xN-bit state code is that the N-bit keyboard state signal is input into the N-bit data input end of the buffer register, the N-bit keyboard state signal is input into the N-bit data input end of the state code register, and the other N bits are connected to the N-bit data output end of the buffer register; and the receiving pulse input end of the buffer register and the receiving pulse input end of the state code register are both connected to a clock pulse. The buffer register and the status code register perform data latch at the same time on the rising edge of the clock pulse or perform data latch at the same time on the falling edge of the clock pulse.

The N bits, 2 XN bits and M bits all refer to binary bit data; the period of the clock pulse is 20-100 ms; the N-bit keyboard state signals and the N keys meet one-to-one correspondence.

The independent keyboard scanning and positioning method is realized by an independent keyboard scanning and positioning circuit. The independent keyboard, the buffer register, the state code register and the encoder form an independent keyboard scanning positioning circuit.

Further, when the output key number is changed, a keyboard state change pulse is output. The independent keyboard scanning positioning circuit also comprises a keyboard state change pulse generating unit, wherein the keyboard state change pulse is output by the keyboard state change pulse generating unit consisting of an OR gate, an M-bit delay buffer and M exclusive-OR gates; the M-bit delay buffer is used for respectively carrying out signal delay on the M-bit key numbers output by the independent keyboard; the inputs of the M exclusive-OR gates are input signals and output signals of the M-bit delay buffer respectively; the outputs of the M exclusive-OR gates are respectively connected to the input ends of the OR gates; the output end of the OR gate outputs a keyboard state change pulse.

The independent keyboard scanning positioning circuit further comprises an oscillator; the oscillator outputs clock pulses.

The invention has the beneficial effects that: the positioning of single key operation, combined key operation and keyboard maintenance state operation is converted into state codes with the same binary length by clock pulse scanning, and the state codes are processed by adopting a uniform coding mode, wherein the single key operation, the combined key operation and the keyboard maintenance state operation are only reflected on the difference of the state codes; if the key operation function needs to be increased or decreased or adjusted, the structure of the keyboard scanning circuit does not need to be modified, and the encoding content of the encoder is changed according to the corresponding relation between the increased or decreased state codes and the key numbers, namely the storage content written into the read-only memory is modified again. The method does not use microcontrollers such as a single chip microcomputer and an ARM, does not need running programs, and works reliably.

Drawings

FIG. 1 is a functional block diagram of a stand alone keyboard scanning positioning circuit;

FIG. 2 is a circuit diagram of a stand alone keyboard according to an embodiment of the present invention;

FIG. 3 is a scan positioning circuit diagram of an embodiment of the present invention;

FIG. 4 is a circuit diagram of a keyboard state change pulse generating unit according to an embodiment of the present invention;

FIG. 5 is a waveform diagram illustrating the effective operation of the keyboard according to the embodiment of the present invention.

Detailed Description

The invention is further described below with reference to the accompanying drawings.

Fig. 1 is a schematic block diagram of a stand-alone keyboard scan positioning circuit, which is composed of a stand-alone keyboard 400, a buffer register 100, a status code register 200, an encoder 300, and an oscillator 500.

Fig. 2 is a circuit diagram of a stand-alone keyboard 400 of an embodiment of the present invention, having 4 keys, which is composed of a key S1, a key S2, a key S3, a key S4, and a pull-up resistor R1, a pull-up resistor R2, a pull-up resistor R3, and a pull-up resistor R4 connected to a power supply + VCC. The 4 output ends of the independent keyboard 400 respectively output status signals I1, I2, I3 and I4 of a key S1, a key S2, a key S3 and a key S4 in a one-to-one correspondence mode, and when the key is pressed down, the status signal of the corresponding output end is at a low level; when the key is not pressed, the state signal of the corresponding output end is high level.

The buffer register 100, the status code register 200 and the encoder 300 in fig. 1 constitute a scan positioning circuit, and a circuit diagram of an embodiment thereof is shown in fig. 3. The stand-alone keyboard circuit has 4 keys, and thus, the buffer register 100 is required to register 4-bit binary data, and the status code register 200 is required to register 8-bit binary data. 4 data input ends of the buffer register 100 are connected to I1, I2, I3 and I4; of the 8 data inputs of the

status code register

200, 4 data inputs are connected to I1, I2, I3, I4, and the other 4 data inputs are connected to 4 outputs of the buffer register 100; the 8 inputs of the encoder 300 are connected to the 8 outputs of the status code register 200. The encoder 300 outputs a 4-bit binary key number determined by the scan location.

In fig. 3, the flip-flop 101 constitutes the buffer register 100, and the flip-flop 201 constitutes the status code register 200. The flip-flop 101 is composed of 4 edge flip-flops, and the trigger input ends of the 4 edge flip-flops are the receiving pulse input ends of the buffer register 100 and are all connected to the CP clock pulse output end of the oscillator 500; the flip-flop 201 is composed of 8 edge flip-flops, and the trigger input ends of the 8 edge flip-flops are the receiving pulse input ends of the state code register 200, and are all connected to the CP clock pulse output end of the oscillator 500. The flip-

flops

101 and 201 are preferably composed of edge-triggered D flip-flops, for example, a dual D flip-flop 74HC74 and a 4D flip-flop 74HC 175. In the embodiment of fig. 3, both the flip-flop 101 and the flip-flop 201 select the 8D flip-flop 74HC273 triggered by the rising edge, at this time, a clear input terminal not shown in fig. 3 needs to be connected to a high level, so that the clear function of the 74HC273 is in an invalid state, and only has a trigger function; the flip-flop 101 only requires 4D flip-flops, and any 4D flip-flops out of the selected 8D flip-flops 74HC273 are used. The trigger inputs CLK1, CLK2 of the two 8D flip-flops 74HC273 are both connected to CP.

In fig. 3, the rom 301 constitutes an encoder 300. The address input terminals A7-A0 of the ROM 301 are input terminals of the encoder 300, and the data output terminals D3-D0 of the ROM 301 are encoding output terminals C3-C0 of the encoder 300.

In the embodiment, the circuit of the oscillator 500 is not shown, the oscillator 500 is a multivibrator, and outputs a rectangular wave with a period of 20-100 ms, which is the CP clock pulse in fig. 3. The CP clock may also be provided by a circuit or device other than the standalone keyboard scan location circuit.

The principle of the independent keyboard scanning and positioning method is as follows:

under the control of the CP clock pulse, the buffer register 100 and the status code register 200 latch data at the active trigger edge of each period of the CP. In fig. 3, the rising edge trigger is active at 74HC273, and therefore the active trigger edge of the CP clock pulse is a rising edge.

4 data input ends D20-D23 of 8 data input ends of the state code register 200 are directly connected to state signals I1, I2, I3 and I4 output by the independent keyboard, the other 4 data input ends D24-D27 are connected to data output ends Q10-Q13 output by the buffer register 100, and the 4 data input ends D10-D13 of the buffer register 100 are directly connected to state signals I1, I2, I3 and I4 output by the independent keyboard, so that the data latched by the 4 data output ends Q20-Q23 corresponding to the state signals I1, I2, I3 and I4 directly connected to the independent keyboard are the current state of the independent keyboard, and the 4 bits of data are called as current state key values; the 4 data outputs Q24-Q27 corresponding to the data outputs connected to buffer register 100 latch data that is the previous state of the free standing keyboard, and their 4 bits of data are referred to as previous state key values. The 4-bit present key value and the 4-bit previous key value output by the data output terminal of the status code register 200 together form an 8-bit status code.

The 8-bit state code is used for identifying the current state and the operation state of the independent keyboard. For example, in the present embodiment, the status code of no key depression is 11111111; the status code of the single key press operation of the S1 key is 11111110; the state code of S1 key single key press and maintenance is 11101110; the state code of the S1 key single-key release operation is 11101111; the state code of the single key press operation of the S2 key is 11111101; the state code of the single key press operation of the S4 key is 11110111; the S1 pressing operation of the S2+ S1 combination operation indicates an operation of pressing S1 after pressing S2 first, and the status code of this operation is 11011100 while maintaining the pressed state at S2.

The encoder 300 is used to convert the status code into a key number. In an embodiment, there are 7 valid keyboard operations and states, including:

operation 0: a single key press operation of the key S1, the key number being 0000;

operation 1: a single key of the key S2 is pressed, and the key number is 0001;

operation 2: a single key of the key S3 is pressed, with the key number 0010;

operation 3: the key S3 is in a maintenance state after the single key is pressed, and the key number is 0011;

and operation 4: after the single key of the key S4 is pressed, the combined key of the key S1 is pressed for operation, and the key number is 0100;

operation 5: after the single key of the key S4 is pressed, the combined key of the key S2 is pressed for operation, and the key number is 0101;

operation 6: the single key release operation of the key S1 has a key number of 0110.

The state code and key number obtained according to the above specification are shown in code table 1:

TABLE 1 coding table

Keyboard operation	Status code (Address)	Key number (storage data)
			S1 Single Key Pushing	11111110	0000
S2 Single Key Pushing	11111101	0001
			S3 Single Key Pushing	11111011	0010
S3 Single Key Press Retention	10111011	0011
			Combined operation of S4+ S1	01110110	0100
Combined operation of S4+ S2	01110101	0101
			S1 Single bond Release	11101111	0110
Other operations or states	********	1111

The encoder 300 is a combinational logic circuit, and the circuit is designed to satisfy the logic relationship of table 1.

The encoder 300 of an embodiment is preferably comprised of a read only memory 301. The ROM 301 has 8-bit address, 2 in total ⁸4 bit binary memory cells. 7 effective keyboard operation and states have 7 effective state codes corresponding to 7 effective key numbers; the state codes are written as the addresses a7 to a0 of the read only memory 301, and the corresponding key numbers are written as the storage data in the storage cells corresponding to the 7 valid state codes. The status codes generated by the 7 valid keyboard operations and statuses are invalid status codes, that is, the status codes generated by the other operations or statuses in table 1 are invalid status codes; in the other memory cells, an invalid key number, which is a value other than 7 valid key numbers, is written all over, and in the embodiment, the invalid key number is 1111.

The read only memory 301 is always operated in the data output state. When the rom 301 has functions of chip select control and data output buffer control, the chip select control and the data output buffer control should be enabled.

The key number in the embodiment is a 4-bit binary code. The number of binary digits of the key number may be increased or decreased as required, and in this case, only the rom 301 matched with the number of binary digits is selected. Assuming that the number of binary digits of the key number is M, the value of M should be selected to satisfy 2^MGreater than or equal to the sum of the number of valid and invalid key numbers. When the stand-alone keyboard has N-bit keyboard status signal output, the rom 301 needs to have 2 × N-bit address input and M-bit data output.

If the key operation function needs to be increased or decreased or the key operation function needs to be adjusted, the table 1 needs to be modified as needed, and the modified content is rewritten into the storage content of the rom 301.

In the embodiment, when the single key of the independent keyboard S1 is pressed, the encoder 300 outputs the key number 0000 from the effective triggering edge of the CP clock pulse after the single key of S1 is pressed to the effective triggering edge of the next CP clock pulse through the encoding output terminals C3-C0; when the independent keyboard S2 single key is pressed, the encoder 300 outputs a key number 0001 from the effective triggering edge of the CP clock pulse after the pressing of the S2 single key to the effective triggering edge of the next CP clock pulse; when the independent keyboard is pressed S4 first and then S1 is pressed, the encoder 300 outputs a key number 0100 from the effective triggering edge of the CP clock pulse after the combination key is pressed S1 to the effective triggering edge of the next CP clock pulse; when the independent keyboard S1 single key is released, the encoder 300 outputs the key number 0110 from the effective triggering edge of the CP clock pulse after the S1 single key is released to the effective triggering edge of the next CP clock pulse; it can be seen that, when a valid key operation of the stand-alone keyboard is recognized, the encoder 300 outputs a valid key number having a duration of one CP clock period width from a valid trigger edge of a CP clock after the valid key operation to a valid trigger edge of the next CP clock.

In the embodiment, when the single key of the independent keyboard S3 is pressed, the encoder 300 outputs a key number 0010 from the active triggering edge of the CP clock pulse after the single key is pressed at S3 until the active triggering edge of the next CP clock pulse; the encoder 300 outputs a key number 0011 from the start of the effective trigger edge of the next CP clock pulse to the end of the effective trigger edge of the next CP clock pulse after the holding state of pressing the single key at S3; it can thus be seen that when a sustained state of the stand-alone keyboard is identified, the duration of the encoder 300 outputting a valid key number is adapted to the duration of the sustained state.

When the state or operation of the keyboard is outside the 7 valid keyboard operations and states described in table 1, the encoder 300 outputs an invalid key number 1111. Whether the valid key number is output or the invalid key number is output, the moment when the encoder 300 changes the output content is the valid trigger edge of the CP clock pulse; in an embodiment, the moment when the encoder 300 changes the output content is the rising edge of the CP clock pulse.

The period of the CP clock is the scan period of the free standing keyboard. When the scanning period of the keyboard is more than 20ms, the influence of keyboard key jitter can be effectively avoided; when the keyboard scanning period is below 100ms, keyboard operation is not missed; therefore, the period of the CP clock pulse should be controlled to be 20-100 ms.

Fig. 4 is a circuit diagram of a keyboard state change pulse generating unit according to an embodiment of the present invention. When a valid key operation of the stand-alone keyboard is recognized, the encoder 300 outputs a valid key number having a duration of one CP clock period width from a valid trigger edge of a CP clock after the valid key operation to a valid trigger edge of the next CP clock. And the device for receiving the output of the independent keyboard inquires the output of the independent keyboard at any time to acquire the key number. The period interval of the inquiry must be smaller than the period of the CP clock pulse.

The circuit shown in fig. 4 is used for judging whether the key number output by the independent keyboard is changed or not, outputting a keyboard state change pulse when the key number output by the independent keyboard is changed, and assisting the receiving device of the independent keyboard to receive the key number output by the independent keyboard, for example, using the keyboard state change pulse as an interrupt request signal of the receiving device.

The circuit shown in fig. 4 is composed of a delay buffer 601, an xor gate 602, an xor gate 603, an xor gate 604, an xor gate 605, and an or gate 606. The delay buffer 601 is composed of 4 edge flip-flops only having a trigger function, and the trigger input ends of the 4 edge flip-flops are the receiving pulse input ends of the delay buffer 601 and are all connected to the CP clock pulse output end of the oscillator 500; the delay buffer 601 performs data latching on the active triggering edge of the CP clock pulse.

The delay buffer 601 delays the 4-bit data C3 to C0 at the encoding output terminal of the encoder 300. 4 data input ends D63-D60 of the delay buffer 601 are connected to encoding output ends C3-C0 of the encoder 300, and data correspondingly output by 4 data output ends Q63-Q60 of the delay buffer 601 are C31-C01; after the signals of C31-C01 are buffered by the first stage of the delay buffer 601, the signals are delayed by one CP clock period compared with the signals of C3-C0, and FIG. 5 is a waveform diagram showing the effective operation of the keyboard according to the embodiment of the present invention. And setting the interval T1 of the CP clock pulse, the independent keyboard has one effective operation, and the effective operation of the embodiment comprises the following steps: an S1 single key press, an S2 single key press, an S3 single key press, an S1 press for the combined S4+ S1 operation, an S2 press for the combined S4+ S2 operation, and an S1 single key release. At the next active trigger edge of an active operation, i.e. the rising edge after the interval of the CP clock pulse T1 in fig. 5, the codes C3-C0 output by the encoder 300 change; in the interval T2, the encoder 300 outputs effective codes C3-C0 of one period; during the intervals T3, T4, and thereafter, the codes C3-C0 output by the encoder 300 change again and enter a hold state, which may be, for example, the S1 single key pressing the following hold state, outputting an invalid key number, or the S3 single key pressing the following hold state, outputting a valid key number, until the next valid operation.

The D6 pulse in fig. 5 schematically shows whether the codes C3 to C0 outputted from the encoder 300 are in the hold state, unchanged, or changed, and the D6 pulse does not exist in the actual circuit. As shown in fig. 5, the D6 pulse is low, which schematically shows that the codes C3 to C0 outputted from the encoder 300 are in a hold state and do not change; the D6 pulse is high, which schematically indicates that the encoder 300 outputs one cycle of valid codes C3-C0. Q6 in FIG. 5 reflects the C31-C01 variation, and it is clear that Q6 is delayed by one CP clock period from D6. Also, the Q6 pulse is not present in an actual circuit.

In fig. 5, the codes C3 to C0 outputted from the encoder 300 are in a hold state, are unchanged, or are changed, and are actually completed by a logic circuit including a 4-bit delay buffer 601, an exclusive or gate 602, an exclusive or gate 603, an exclusive or gate 604, an exclusive or gate 605, and an or gate 606. The 4 exclusive or gates correspond to 1 bit of the encoding output terminals C3 to C0 of the encoder 300, and input signals of the 4-bit delay buffer 601 are input and output signals of the 4-bit delay buffer. For example, the two input signals of the xor gate 602 are C0 and C01, respectively, and C01 is delayed from C0 by one CP clock period, so that when C0 changes, the xor gate 602 outputs a positive pulse of 1 CP clock period width; when C0 is a CP clock cycle width change signal, xor-gate 602 outputs a positive pulse of 2 CP clock cycle widths. The xor gate 603, the xor gate 604, and the xor gate 605 respectively determine whether or not C1 to C3 have changed, and the principle is the same as that of determining whether or not C0 has changed. The output ends of the exclusive-or gate 602, the exclusive-or gate 603, the exclusive-or gate 604 and the exclusive-or gate 605 are respectively connected to the input end of the or gate 606, and the or gate 606 is used for comprehensively judging whether the C0-C3 change or not, so long as the C0-C3 change, the or gate 606 outputs a keyboard state change pulse F, and the pulse is a positive pulse.

In an embodiment, the delay buffer 601 selects the rising edge triggered 8D flip-flop 74HC 273. In an embodiment, the output of the encoder 300 is a 4-bit binary key number, and therefore, only 4D flip-flops are required for the delay buffer 601. Since the trigger inputs of the 4D flip-flops in the delay buffer 601 and the 4D flip-flops in the flip-flop 101 are both connected to the CP clock pulse output of the oscillator 500, the delay buffer 601 and the flip-flop 101 may share one 8D flip-flop 74HC 273.

Other schemes can be adopted for the delay buffer 601, for example, an RC circuit is adopted, and 4 RC circuits are used for respectively delaying C0-C3; if the delay time of the RC circuit is less than one CP clock pulse period, the encoder 300 outputs effective codes C3-C0 of one period, a keyboard state change pulse is generated at the beginning of outputting the effective codes C3-C0 and at the end of outputting the effective codes C3-C0, and the width of the keyboard state change pulse is equal to the delay time of the RC circuit; if the delay time of the RC circuit is more than or equal to one CP clock pulse period, the encoder 300 generates a keyboard state change pulse at the beginning of outputting the effective codes C3-C0 when outputting the effective codes C3-C0 of one period, and the pulse width is more than or equal to 2 CP clock pulse periods. The delay time of the RC circuit is required to not exceed 2 CP clock cycles to avoid false negatives.

In the circuit, the positioning of single key operation, combined key operation and keyboard maintenance state operation is converted into a state code with the same binary length by CP pulse scanning, and the state code is processed by adopting a uniform coding mode, wherein the single key operation, the combined key operation and the keyboard maintenance state operation are only reflected on the difference of the state code; if the key operation function needs to be increased or decreased or the key operation function needs to be adjusted, the structure of the keyboard scanning circuit does not need to be modified, and the encoder 300 only needs to be updated according to the increased or decreased state code table, that is, the storage content of the read-only memory 301 needs to be rewritten and updated. The circuit of the invention does not use microcontrollers such as a singlechip and an ARM, does not need running programs, and has reliable work.

Claims

1. A method for scanning and positioning an independent keyboard is characterized in that: comprises thatNIndependent keyboard output of individual keysNA keyboard status signal; the parallel register is controlled by clock pulseNThe current state and the previous state of the bit keyboard state signal are latched simultaneously to obtain 2 dataNA status code of the bit; encoding the status code and outputting a key number; the bits are binary bits;

the state code is coded and the key number is output by the coder;

the parallel register comprisesNBuffer register of bits and 2 valuesNA status code register of bits;

the parallel register controlled by clock pulseNThe current state and the previous state of the bit keyboard state signal are latched simultaneously to obtain 2 dataNThe status code of the bit is specified by buffering the registerNBit data inputNIn the data input of the status code register, for status signals of the keyboardNBit inputNA status signal of the keyboard, otherwiseNBit-coupled to buffer registerNA bit data output terminal; and the receiving pulse input end of the buffer register and the receiving pulse input end of the state code register are both connected to a clock pulse.

2. A method of scanning and locating a free standing keyboard as claimed in claim 1, wherein: the above-mentionedNThe current state of the bit-keyboard state signal being the moment of the effective triggering edge of the clock pulseNA status signal of the keyboard is set to be on,Nthe preceding state of the bit-keyboard state signal being the instant of a valid trigger edge on a clock pulseNA keyboard status signal.

3. A method of scanning and locating a free standing keyboard as claimed in claim 1, wherein: the state code consists of an effective state code and an ineffective state code and is used for identifying the current state and the operation state of the independent keyboard; the key number is composed of a valid key number and an invalid key number; the effective state code is generated by the operation or the state of an effective keyboard, and a corresponding effective key number is correspondingly output; the invalid state code is generated by invalid keyboard operation or state and correspondingly outputs an invalid key number.

4. A method of scanning and locating a free standing keyboard as claimed in claim 3, wherein: the effective keyboard operation comprises single-key pressing operation, single-key releasing operation, single-key pressing maintaining operation and combined key operation; the invalid keyboard operation is an operation other than the valid keyboard operation.

5. The standalone keyboard scan positioning method of claim 4, wherein: the combined key operation refers to the operation that after a single key is pressed, other keys are pressed.

6. A method of scanning and locating a free standing keyboard as claimed in claim 3, wherein: the key number isMThe number of bits is,Mthe value should be selected to satisfy 2^MGreater than or equal to the sum of the number of valid and invalid key numbers.

7. The standalone keyboard scan positioning method of claim 6, wherein: the encoder is a read-only memory.