CN108447888B - Array substrate, preparation method thereof and display device - Google Patents
Array substrate, preparation method thereof and display device Download PDFInfo
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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Abstract
The disclosure provides an array substrate, a preparation method thereof and a display device, and belongs to the technical field of display. The array substrate includes: substrate base plate, pixel district and drive element district, the drive element district includes: a gate electrode, a gate insulating layer, an active layer, an interlayer insulating layer, and a source/drain electrode layer, the pixel region including: the pixel structure comprises a reflecting layer, at least one pixel defining layer and a phase change material layer, wherein one or more layers of a gate insulating layer, an active layer and a source/drain electrode layer and at least one pixel defining layer positioned in pixel regions with different colors are respectively formed by the same material layer, and the pixel defining layer comprises the same material layer as the source/drain electrode layer. The pixel definition layer on the array substrate is formed by one or more layers of the same materials in the gate insulating layer, the active layer and the source/drain electrode layer at the same time, so that the pixel definition layer and the film layer of the driving element region can be completed in the same process, the exposure times are reduced, and the production cost is reduced.
Description
Technical Field
The disclosure relates to the technical field of display, in particular to an array substrate, a preparation method of the array substrate and a display device.
Background
Phase Change Material (PCM) has wide application in emerging display technologies (e.g., electronic paper) due to its wide color gamut, high transparency, high resolution, and fast response time, for example, it can be applied in the fields of artificial intelligence, display security and privacy, etc.
The phase-change material has very big prospect in the transparent display field, can realize the regulation of color through the change that drives phase-change material and take place different degrees, and the rationale relies on phase-change material to take place the change that refractive index and reflectivity appear, combines the high demonstration that shows different colour gamuts of the different thickness pixel definition layer (Space) in phase-change material bottom simultaneously.
Since the phase change display technology needs to drive the phase change material through a Thin Film Transistor (TFT) array, the number of Mask (Mask) processes required in the manufacturing aspect is large, and the color gamut displayed by the phase change material depends on the thickness of ITO below the phase change material, the requirements on the thickness and uniformity of ITO are very high due to the strict requirements in the optical aspect, and the manufacturing difficulty of the phase change material as a Space layer is large.
Therefore, there is still a need for improvement in the prior art solutions.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The present disclosure is directed to an array substrate, a method for manufacturing the same, and a display device, so as to overcome the problem of difficulty in manufacturing a Space layer in the related art at least to a certain extent.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows, or in part will be learned by practice of the disclosure.
According to an aspect of the present disclosure, there is provided an array substrate including:
a substrate base plate;
a plurality of pixel regions on the substrate base plate; and
a plurality of driving element regions respectively disposed adjacent to the pixel regions;
the driving element region includes:
a gate electrode;
a gate insulating layer disposed on the gate electrode;
an active layer disposed on the gate insulating layer;
an interlayer insulating layer disposed on the active layer; and
a source/drain electrode layer disposed on the interlayer insulating layer;
the pixel region includes:
a reflective layer;
at least one pixel defining layer disposed on the reflective layer; and
a phase change material layer disposed on the at least one pixel defining layer;
wherein one or more of the gate insulating layer, the active layer and the source/drain electrode layer and the at least one pixel defining layer located in the pixel region of different colors are formed of the same material layer, respectively, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layer.
In an exemplary embodiment of the present disclosure, the reflective layer and the gate electrode are formed of the same material in the same layer.
In an exemplary embodiment of the present disclosure, the different color pixel regions include a first color pixel region, the at least one pixel defining layer includes a first pixel defining layer located at the first color pixel region, the first pixel defining layer includes:
a first electrode disposed on the reflective layer;
wherein the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
In an exemplary embodiment of the present disclosure, the different color pixel region includes a second color pixel region, the at least one pixel defining layer includes a second pixel defining layer located at the second color pixel region, the second pixel defining layer includes:
a first inorganic layer disposed on the reflective layer; and
a first electrode disposed on the first inorganic layer;
the first inorganic layer and the gate insulating layer are formed of the same material in the same layer, and the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
In an exemplary embodiment of the present disclosure, the different color pixel regions include a third color pixel region, the at least one pixel defining layer includes a third pixel defining layer located at the third color pixel region, the third pixel defining layer includes:
a first inorganic layer disposed on the reflective layer;
an oxide thin film layer disposed on the first inorganic layer; and
a first electrode disposed over the oxide thin film layer;
the first inorganic layer and the gate insulating layer are formed of the same material in the same layer, the oxide thin film layer and the active layer are formed of the same material in the same layer, and the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
In an exemplary embodiment of the present disclosure, the driving element region further includes:
a passivation layer disposed on the source/drain electrode layer;
wherein the passivation layer and the phase change material layer are formed of the same material in the same layer.
In an exemplary embodiment of the present disclosure, the pixel region further includes:
a second electrode disposed on the phase change material layer;
the driving element region further includes:
a third electrode disposed on the passivation layer;
wherein the second electrode and the third electrode are formed of the same material in the same layer.
According to a second aspect of the present disclosure, there is also provided a method for manufacturing an array substrate, including:
forming a metal layer on a substrate, forming a reflecting layer in a pixel area of the substrate through a composition process, and forming a gate in a driving element area of the substrate;
forming a gate insulating layer, an active layer and source/drain electrode layers on the gate electrode, wherein one or more of the gate insulating layer, the active layer and the source/drain electrode layers are formed of the same material layer as the at least one pixel defining layer located in the pixel region of the different color, respectively, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layers;
forming a phase change material layer on the at least one pixel defining layer.
In one exemplary embodiment of the present disclosure, the different color pixel regions include a first color pixel region, a second color pixel region, and a third color pixel region, and one or more of the gate insulating layer, the active layer, and the source/drain electrode layer and the at least one pixel defining layer located in the different color pixel regions are respectively formed of the same material layer including:
forming a first inorganic material layer on the metal layer, forming a gate insulating layer on the gate electrode through a composition process, and forming a first inorganic layer on the reflective layers of the second color pixel region and the third color pixel region;
forming a metal oxide material layer on the inorganic material layer, forming an active layer on the gate insulating layer through a patterning process, and forming an oxide thin film layer on the first inorganic layer of the third color pixel region;
forming a second inorganic material layer on the metal oxide material layer, and forming an interlayer insulating layer on the active layer through a patterning process;
forming a first electrode material layer on the second inorganic material layer, forming a source/drain electrode layer on the interlayer insulating layer through a patterning process, and forming first electrodes on the first, second, and third color pixel regions.
In an exemplary embodiment of the present disclosure, while forming the phase change material layer on the at least one pixel defining layer, the method further includes:
and forming a passivation layer on the source/drain electrode layer by using the material for forming the phase change material layer.
In an exemplary embodiment of the present disclosure, after forming the phase change material layer on the at least one pixel defining layer, further includes:
and forming a second electrode material layer, forming a second electrode on the phase change material layer by using the electrode material layer, and forming a third electrode on the passivation layer.
According to a third aspect of the present disclosure, there is also provided a display device including the array substrate described above.
According to the array substrate and the preparation method and the display device thereof provided by some embodiments of the disclosure, on one hand, pixel definition layers corresponding to different film layers of the driving element region are respectively arranged below phase change material layers in pixel regions with different colors on the array substrate, namely the pixel definition layers are formed by one or more same materials in a gate insulating layer, an active layer and a source/drain electrode layer at the same time, so that the pixel definition layers and the film layers of the driving element region can be completed in the same process, the exposure times are reduced, and the production cost is reduced; on the other hand, voltages with different sizes are applied to the phase change material layer in the pixel regions with different colors, so that the phase change material layer is subjected to different refractive index changes, and different colors are displayed by combining the phase change material layers with different thicknesses under the phase change material layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty.
Fig. 1 is a schematic diagram illustrating different color display by a phase change material according to an example embodiment of the present disclosure.
Fig. 2 is a schematic diagram illustrating an array substrate provided in the present exemplary embodiment.
Fig. 3 shows a schematic structural diagram of a pixel circuit on the array substrate in the present exemplary embodiment.
Fig. 4 shows a schematic circuit diagram of the pixel area solid-state reflective element in the present exemplary embodiment.
Fig. 5 illustrates a timing waveform diagram of inputting a voltage to the gate line GL in fig. 3 according to the present exemplary embodiment.
Fig. 6 is a schematic diagram illustrating film layer compositions and film layer thicknesses of pixel regions of three colors corresponding to the structure illustrated in fig. 2 in the present exemplary embodiment.
Fig. 7 shows a graph of a change in a spectral change analog value of the blue pixel region in the present exemplary embodiment.
Fig. 8 shows a graph of a change in a spectral change analog value of a red pixel region in the present exemplary embodiment.
Fig. 9 shows a graph of a change in a spectral change analog value of a green pixel region in the present exemplary embodiment.
Fig. 10 illustrates a flowchart of a method of manufacturing an array substrate provided in another example embodiment.
Fig. 11 illustrates a step flowchart of step S1002 in fig. 10 according to another exemplary embodiment.
Fig. 12 is a schematic view illustrating a specific process flow of a method for manufacturing an array substrate according to another exemplary embodiment.
Fig. 13 shows a schematic diagram after step S1101 in another exemplary embodiment.
Fig. 14 shows a schematic diagram after step S1102 in another exemplary embodiment.
Fig. 15 shows a schematic diagram after step S1103 in another exemplary embodiment.
FIG. 16 illustrates the formation of SiO through step S1104 in another example embodiment2The latter schematic.
Fig. 17 shows a schematic view after dry etching is performed in step S1104 in another exemplary embodiment.
Fig. 18 shows a schematic diagram after step S1105 in another exemplary embodiment.
Fig. 19 shows a schematic diagram of a display device provided in still another exemplary embodiment.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and the like. In other instances, well-known structures, methods, devices, implementations, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure.
In the related example embodiment of the present disclosure, color change is adjusted by driving the degree of occurrence of the phase change material by the driving element, fig. 1 shows a schematic diagram of realizing different color display by the phase change material, as shown in fig. 1, RGB are pixel regions of three colors of red, green and blue, respectively, and partial structures for realizing different color display in the pixel regions of different colors all include a pixel definition layer (space)11, a phase change material layer 12 and an electrode layer 13, where the pixel definition layer (space)11 is realized by ITO (Indium Tin Oxide ) of different thicknesses, so that in order to prepare ITO of different thicknesses, a mask process needs to be performed in an array preparation process for many times, a preparation period is long, and a preparation cost is high.
Fig. 2 is a schematic view illustrating an array substrate provided in the present exemplary embodiment, and as shown in fig. 2, the array substrate 200 includes: a substrate base 201, a plurality of pixel regions (i.e., P1 regions) located on the substrate base, and a plurality of driving element regions (i.e., P2 regions) respectively disposed adjacent to the pixel regions.
Wherein the pixel region P1 includes: a reflective layer 202, at least one pixel defining layer (i.e., a Space layer, not labeled in fig. 2) disposed on the reflective layer 202, and a phase change material layer 204 disposed on the pixel defining layer 204. The driving element region P2 includes: the organic light emitting diode comprises a grid electrode G, a grid insulating layer GI, an Active layer Active, an interlayer insulating layer ILD and a source/drain electrode layer, wherein the grid insulating layer GI is arranged on the grid electrode G, the Active layer Active is arranged on the grid insulating layer GI, the interlayer insulating layer ILD is arranged on the Active layer Active, and the source/drain electrode layer is arranged on the interlayer insulating layer ILD. One or more layers of the gate insulating layer GI, the Active layer and the source/drain electrode layer and at least one pixel defining layer located in the pixel region of different colors are respectively formed of the same material layer, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layer.
It should be noted that the source/drain electrode layer includes a source S and a drain D, and two via holes are formed on the interlayer insulating layer ILD, and the source S and the drain D are electrically connected to the Active layer Active under the interlayer insulating layer ILD through the via holes, respectively.
Fig. 3 shows a schematic structural diagram of a pixel circuit on an array substrate in this exemplary embodiment, which includes, as shown in fig. 3, a driving element T and a solid reflective element W in addition to a plurality of gate lines GL and a plurality of data lines DL disposed perpendicular to the gate lines GL, wherein a gate of the driving element is connected to the gate lines GL, a drain of the driving element is connected to the data lines DL, a source of the driving element is connected to one end of the solid reflective element W, and the other end of the solid reflective element W is grounded.
According to the array substrate in the embodiment of the present invention, the pixel definition layers corresponding to different film layers of the driving element region are respectively disposed below the phase change material layers in the pixel regions with different colors on the array substrate, that is, the pixel definition layers are formed simultaneously by one or more same materials in the gate insulating layer, the active layer and the source/drain electrode layer, so that the pixel definition layers and the film layers in the driving element region can be completed in the same process, the number of exposure times is reduced, and the production cost is reduced.
Next, the array substrate in the present exemplary embodiment will be described in detail with reference to fig. 2.
Taking fig. 2 as an example, a pixel region P1 and a driving element region P2 corresponding to three different colors on a substrate are shown, for each color display, the display of the solid reflection element in the adjacent pixel region is controlled by the driving element of the driving element region P2, but only one of the color pixel region P1 and the driving element region P2 is identified and illustrated in fig. 2, and the other two colors are the same, and are not repeated here.
As shown in fig. 2, the structure of the driving element region P2 has no difference in the pixel regions of different colors, except that: the gate electrode G, the gate insulating layer GI, the Active layer Active, the interlayer insulating layer ILD, the source electrode S, and the drain electrode D further include a passivation layer PL disposed on the source electrode S and the drain electrode D, and a third electrode ET is further disposed on the passivation layer PL.
In the present exemplary embodiment, the material of the gate G is metal, for example, a single metal Ag or a combined metal Mo/Ag can be used as the gate material, and in other exemplary embodiments, other metal materials can be selected to make the gate as needed. For the thickness of the gate G, taking Mo/Ag as an example, the thickness of the gate G may be 220/50nm, taking a single metal Ag as an example, the thickness of the gate G may be 50nm, and if other metals or metal combinations are used as the gate, the corresponding thickness may be the same as or different from the above-mentioned thickness.
In the present exemplary embodiment, the material of the gate insulating layer GI may be silicon dioxide SiO2Corresponding to, SiO2The thickness of the gate insulating layer GI may be 135nm, in other embodiments, the material of the gate insulating layer GI may also be other insulating materials, and the corresponding film thickness may also be the same as or different from the above film thickness.
In this exemplary embodiment, the Active layer may be formed of IGZO (Indium Gallium Zinc Oxide), and as IGZO is an amorphous Oxide containing Indium, Gallium and Zinc, the carrier mobility is 20 to 30 times that of amorphous silicon, so that the charge and discharge rate of the TFT element to the pixel electrode can be greatly increased, and the response speed of the pixel can be increased. The thickness of the IGZO may be 90nm, and in other embodiments, the thickness of the film layer of the Active layer may be set to a value other than 90nm as needed.
In the present example embodiment, the material of the interlayer insulating layer ILD may be silicon dioxide SiO2Corresponding to, SiO2The thickness of the interlayer insulating layer ILD may be 150nm, in other embodiments, the material of the interlayer insulating layer ILD may be other insulating materials, and the corresponding film thickness may be the same as or different from the above film thickness.
In the present exemplary embodiment, the source electrode S and the drain electrode D may be made of ITO, and the thickness of the ITO may be 60 nm.
In the present exemplary embodiment, the passivation layer PL is formed of the same material as the phase change material layer of the pixel region, and thus is bluntThe Material of layer PL may be a PCM (Phase Change Material) type Material, such as Ge2Sb2Te5Etc. Ge2Sb2Te5The thickness of the film layer(s) can be 20nm, although the PCM can be set to a thickness of other values than 20nm as required.
In the present exemplary embodiment, the material of the third electrode ET on the passivation layer PL may also be ITO, and the thickness of the ITO may be 80 nm.
It should be noted that, in the present exemplary embodiment, the above description of the thickness of each film layer is only a reference value, and does not mean that the thickness of each film layer is limited to the reference value, and in an actual process and a product manufacturing, a reasonable range of the thickness of each film layer may be selected according to needs, and is not limited herein.
Since each layer structure in the pixel region P1 and the driving element region P2 on the substrate is formed in a patterning process such as deposition and etching, each layer constituting the driving element and each layer constituting the solid reflective element may be the same material, for example, the reflective layer in the solid reflective element and the gate electrode in the driving element are formed of the same material.
In the present exemplary embodiment, as shown in fig. 2, the pixel regions are respectively used to display different colors, and the different color pixel regions include a first color pixel region, a second color pixel region, and a third color pixel region, which may respectively correspond to a blue pixel region, a red pixel region, and a green pixel region. For pixel regions of different colors, the same thing is that they all include: the display device comprises a reflecting layer, a pixel defining layer (including a first electrode), a phase change material layer and a second electrode, wherein the first electrode and the second electrode are respectively positioned above and below the phase change material layer.
In the present exemplary embodiment, the at least one pixel defining layer includes a first pixel defining layer located at a first color pixel region (i.e., a blue pixel region), the first pixel defining layer including: and a first electrode 203 disposed on the reflective layer 202, wherein the first electrode 203 and the source/drain electrode layer are formed of the same material in the same layer.
In the present exemplary embodiment, the at least one pixel defining layer includes a second pixel defining layer located at a second color pixel region (i.e., a red pixel region), the second pixel defining layer including: a first inorganic layer 206 and a first electrode 203, the first inorganic layer 206 being disposed on the reflective layer 202, the first electrode 203 being disposed on the first inorganic layer 206; the first inorganic layer 206 and the gate insulating layer GI are formed of the same material, and the first electrode 203 and the source and drain electrodes are formed of the same material.
In the present exemplary embodiment, the at least one pixel defining layer includes a third pixel defining layer located at a third color pixel region (i.e., a green pixel region), the third pixel defining layer including: a first inorganic layer 206, an oxide thin film layer 207, and a first electrode 203, the first inorganic layer 206 being disposed on the reflective layer 202, the oxide thin film layer 207 being disposed on the first inorganic layer 206, the first electrode 203 being disposed on the oxide thin film layer 207; the first inorganic layer 206 and the gate insulating layer GI are formed of the same material, the oxide thin film layer 207 and the Active layer Active are formed of the same material, and the first electrode 203 and the source/drain electrode layer are formed of the same material.
Based on the above, as shown in fig. 2, the solid reflective element of the blue pixel region sequentially includes: a reflective layer 202, a first electrode 203, a phase change material layer 204, and a second electrode 205, the solid reflective element of the red pixel region sequentially includes: the reflective layer 202, the first inorganic layer 206, the first electrode 203, the phase change material layer 204, and the second electrode 205, the solid reflective element of the green pixel region sequentially includes: a reflective layer 202, a first inorganic layer 206, an oxide thin film layer 207, a first electrode 203, a phase change material layer 204, and a second electrode 205.
Correspondingly, the reflective layer 202 in the solid reflective element and the gate G in the driving element are formed of the same material in the same layer, such as metal Ag; the first inorganic layer 206 in the solid reflective element and the gate insulating layer GI in the driving element are formed of the same material as each other, such as SiO2(ii) a The oxide thin film layer 207 in the solid reflection element and the Active layer Active in the driving element are formed by the same material, such as IGZO; first electrode 203 and driver in solid reflective elementThe source S and the drain D in the movable element are made of the same material in the same layer, such as ITO; the phase change material layer 204 in the solid reflective element and the passivation layer PL in the driving element are formed of the same material in the same layer, such as Ge2Sb2Te5(ii) a The second electrode 205 in the solid reflective element and the third electrode ET on the passivation layer PL in the driving element are formed of the same material in the same layer, for example, ITO.
In addition, as shown in fig. 2, the reflective layer 202 in the solid reflective element is not connected to the gate G in the driving element in the pixel region, the first inorganic layer 206 in the solid reflective element is connected to the gate insulating layer GI in the driving element, the oxide thin film layer 207 in the solid reflective element is not connected to the Active layer Active in the driving element, the first electrode 203 in the solid reflective element is connected to the drain D in the driving element (since the source S and the drain D can be interchanged, the source S can be connected in other embodiments), the phase change material layer 204 in the solid reflective element is connected to the passivation layer PL in the driving element, the second electrode 205 in the solid reflective element is also connected to the electrode on the passivation layer PL in the driving element, and it should be noted that the interlayer insulating layer is only distributed in the driving element region.
Fig. 4 shows a schematic circuit diagram of the pixel area solid reflective element in the present exemplary embodiment, as shown in fig. 4, in which only two electrodes (i.e., the first electrode 203 and the second electrode 205) of the solid reflective element and the phase change material layer 204 located between the two electrodes are shown. According to the pixel area of the array substrate, voltages with different sizes are applied to the first electrode above the phase change material layer and the second electrode below the phase change material layer, and after the voltages are applied, the phase change material can be subjected to phase change from a crystalline state to an amorphous state, so that the phase change material is subjected to refractive index change in different degrees.
Fig. 5 shows a timing waveform diagram of inputting a voltage to the gate lines GL in fig. 3, and controlling the gate lines GL to be turned on row by row.
The following describes the simulated value of the spectral change after the phase change of the phase change material for the pixel regions of different colors, respectively, and fig. 6 shows the film composition and the film thickness diagram of the pixel regions of three colors corresponding to the structure shown in fig. 2. Fig. 7, 8, and 9 respectively show graphs of changes in the simulated values of the spectral changes corresponding to the blue pixel region, the red pixel region, and the green pixel region, which all show schematic diagrams of changes in wavelength and reflectance from the crystalline state to the amorphous state, where the abscissa is wavelength and the ordinate is reflectance.
As can be seen from fig. 2, 6, and 7-9, the pixel regions of different colors have different thicknesses of the pixel defining layers under the phase change material layer PCM, so that different colors can be displayed when the phase change material layers having different refractive indexes are combined with the pixel defining layers having different thicknesses.
In summary, in the array substrate provided in this exemplary embodiment, on one hand, the pixel definition layers corresponding to different film layers of the driving element region are respectively disposed below the phase change material layers in the pixel regions with different colors on the array substrate, that is, the pixel definition layers are formed by one or more layers of the same material in the gate insulating layer, the active layer and the source/drain electrode layer, so that the pixel definition layers and the film layers in the driving element region can be completed in the same process, thereby reducing the number of exposure times and reducing the production cost; on the other hand, voltages with different sizes are applied to the phase change material layer in the pixel regions with different colors, so that the phase change material layer is subjected to different refractive index changes, and different colors are displayed by combining the phase change material layers with different thicknesses under the phase change material layer.
Based on the above, the present disclosure further provides a method for manufacturing an array substrate in another exemplary embodiment, and fig. 10 shows a flowchart of the method for manufacturing, including the following steps:
as shown in fig. 10, in step S1001, a metal layer is formed on a substrate, a reflective layer is formed in a pixel region of the substrate through a patterning process, and a gate is formed in a driving element region of the substrate.
As shown in fig. 10, in step S1002, a gate insulating layer, an active layer, and source/drain electrode layers are formed on the gate electrode, and one or more of the gate insulating layer, the active layer, and the source/drain electrode layers are formed of the same material layer as at least one pixel defining layer located in the different color pixel region, respectively, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layer.
As shown in fig. 10, in step S1003, a phase change material is formed on at least one pixel defining layer.
Because the pixel definition layer comprises the first electrode which is made of the same material as the source/drain electrode layer, the phase change material is heated by current and then undergoes phase change by applying voltages with different magnitudes to the electrodes positioned above and below the phase change material layer, the irradiation rates of the materials with different phase change degrees are different, and the pixel definition layer with different thicknesses below the phase change material layer is combined to realize display with different colors.
In the present exemplary embodiment, the different color pixel regions include a first color pixel region, a second color pixel region, and a third color pixel region, which may correspond to a blue color pixel region, a red color pixel region, and a green color pixel region, respectively.
Fig. 11 shows a step flowchart of step S1002 in fig. 10, including the steps of:
as shown in fig. 11, in step S1101, a first inorganic material layer is formed on the metal layer, a gate insulating layer is formed on the gate electrode through a patterning process, and a first inorganic layer is formed on the reflective layers of the second color pixel region and the third color pixel region.
As shown in fig. 11, in step S1102, a metal oxide material layer is formed on the inorganic material layer, an active layer is formed on the gate insulating layer through a patterning process, and an oxide thin film layer is formed on the first inorganic layer of the third color pixel region.
As shown in fig. 11, in step S1103, a second inorganic material layer is formed on the metal oxide material layer, and an interlayer insulating layer is formed on the active layer through a patterning process.
As shown in fig. 11, in step S1104, a first electrode material layer is formed on the second inorganic material layer, a source/drain electrode layer is formed on the interlayer insulating layer through a patterning process, and first electrodes are formed at the first color pixel region, the second color pixel region, and the third color pixel region.
In the present exemplary embodiment, while the phase change material is formed on at least one pixel defining layer in step S1003, the method further includes: and forming a passivation layer on the source/drain electrode layer using a material forming the phase change material layer.
In the present exemplary embodiment, step S1003 is followed by:
and forming a second electrode material layer, forming a second electrode on the phase change material layer by using the electrode material layer, and forming a third electrode on the passivation layer, wherein the second electrode and the third electrode are formed by the same material in the same layer.
It is to be noted that the patterning process in the present exemplary embodiment generally includes processes of photoresist coating, exposure, development, etching, photoresist stripping, and the like. The corresponding patterning process may be selected in accordance with the structures formed in the present disclosure during actual processing.
As described in detail below with reference to specific materials and film thicknesses, fig. 12 is a schematic process flow diagram of a method for manufacturing an array substrate, including the following steps:
as shown in fig. 12, in step S1201, a Mo/Ag (220/50nm) metal layer is prepared on the substrate base plate 201 by a Sputter (sputtering) technique, and then a desired pattern is obtained by a wet etching technique. Wherein a portion of the desired pattern serves as the gate G of the driving element and a portion serves as the reflective layer 202 of the solid reflective element, and the two portions are discontinuous. Fig. 13 shows a schematic diagram after step S1201, in which the pixel regions and the driving element regions corresponding to three colors are schematically shown in fig. 13.
As shown in FIG. 12, in step S1202, SiO is deposited by a PECVD (Plasma Enhanced Chemical Vapor Deposition) technique2(135nm) as the GI layer. Fig. 14 shows the schematic diagram after step S1202, the GI layer is covered on the gate and the exposed substrate.
As shown in fig. 12, in step S1203, an oxide thin film layer of IGZO (90nm) is deposited by a sputtering technique, and a desired pattern is formed by wet etching. Wherein a portion of the desired pattern IGZO is used as an active layer of the driving element and a portion is used as a portion of a pixel defining layer in the solid reflective element of a certain color pixel region. Fig. 15 shows a schematic diagram after step S1203, including the IGZO of the three color drive element regions, with only the IGZO in the green pixel region (i.e., 207) remaining, and the IGZO in both the red pixel region and the blue pixel region etched.
As shown in fig. 12, in step S1204, SiO is prepared by a PECVD technique2(150nm) the desired pattern was obtained by dry etching. Wherein FIG. 16 shows the formation of SiO through step S12042Then, fig. 17 shows a schematic diagram after dry etching is performed in step S1204, and as shown in fig. 17, after dry etching, the required pattern is only a portion of the driving element region, and SiO is formed in the driving element region2As an interlayer insulating layer ILD, two via holes V1 and V2 are present on the interlayer insulating layer, and SiO is present in the green, red and blue pixel regions2Are all etched while SiO is formed in the blue pixel region in step S12022Is also etched.
As shown in fig. 12, in step S1205, ITO (60nm) is deposited by a sputtering technique, and a desired pattern is obtained through wet etching. Fig. 18 shows the schematic diagram after step S1205, as shown in fig. 18, a part of the required pattern is as a source S and a drain D in the driving device region, the source and the drain are electrically connected to the Active layer Active through vias V1 and V2, respectively, a part of the required pattern is as the first electrode 203 of the pixel definition layer in the pixel region, and the first electrode 203 of the pixel definition layer is connected to the drain D.
As shown in FIG. 12, in step S1206, PCM (Ge) is deposited by a sequential sputtering technique2Sb2Te5)(20nm)、ITO(80nm)。
The array substrate is obtained based on the process flow of the above steps S1201 to S1206, and the array substrate shown in fig. 2 is obtained, as shown in fig. 2, the PCM serves as a passivation layer PL in the driving element region and a phase change material layer 204 in the pixel region, and the two parts are connected. An electrode is formed on the PCM, a third electrode (e.g., a pixel electrode) over the passivation layer in the driving element region, and a second electrode 205 over the pixel material layer 204 in the pixel region, and these two parts are also connected.
In summary, in the array process, the reflective layer of the solid reflective element is fabricated while the gate electrode of the driving element is fabricated, the pixel defining layer of the solid reflective element is fabricated while the gate insulating layer, the active layer and the source/drain electrode layer of the driving element are fabricated, and the passivation layer of the solid reflective element is fabricated while the driving element is fabricated, i.e., the fabrication method completes the fabrication of each film layer in the solid reflective element while fabricating each film layer (such as the gate electrode, the gate insulating layer, the active layer, the source electrode, the drain electrode and the passivation layer) of the driving element, so as to reduce the number of process exposures, and to improve the productivity and reduce the production cost.
Based on the above, the present disclosure also provides, in another exemplary embodiment, a display device including the array substrate.
The display device may be: any product or component with a display function, such as a display panel, electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The preparation method of the display device comprises the steps of the preparation method of the array substrate, and further comprises the following steps:
the processing technology is the same as the traditional technology, and is not described again.
Fig. 19 is a schematic diagram of a display device obtained by the above manufacturing method, where 208 is a frame sealing adhesive, and 209 is a glass cover plate for packaging.
The manufacturing method of the display device can achieve the same effect as the manufacturing method of the array substrate, and the details are not repeated here.
It should be clearly understood that this disclosure describes how to make and use particular examples, but the principles of this disclosure are not limited to any details of these examples. Rather, these principles can be applied to many other embodiments based on the teachings of the present disclosure.
Exemplary embodiments of the present disclosure are specifically illustrated and described above. It is to be understood that the present disclosure is not limited to the precise arrangements, instrumentalities, or instrumentalities described herein; on the contrary, the disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims (11)
1. An array substrate, comprising:
a substrate base plate;
a plurality of pixel regions on the substrate base plate; and
a plurality of driving element regions respectively disposed adjacent to the pixel regions;
the driving element region includes:
a gate electrode;
a gate insulating layer disposed on the gate electrode;
an active layer disposed on the gate insulating layer;
an interlayer insulating layer disposed on the active layer; and
a source/drain electrode layer disposed on the interlayer insulating layer;
the pixel region includes:
a reflective layer;
at least one pixel defining layer disposed on the reflective layer; and
a phase change material layer disposed on the at least one pixel defining layer;
wherein one or more of the gate insulating layer, the active layer and the source/drain electrode layer and the at least one pixel defining layer located in the pixel region of different colors are formed of the same material layer, respectively, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layer;
the different color pixel regions include a second color pixel region, the at least one pixel definition layer includes a second pixel definition layer located in the second color pixel region, the second pixel definition layer includes:
a first inorganic layer disposed on the reflective layer; and
a first electrode disposed on the first inorganic layer;
the first inorganic layer and the gate insulating layer are formed of the same material in the same layer, and the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
2. The array substrate of claim 1, wherein the reflective layer and the gate are formed of the same material in the same layer.
3. The array substrate of claim 1, wherein the different color pixel regions comprise a first color pixel region, the at least one pixel definition layer comprises a first pixel definition layer located in the first color pixel region, and the first pixel definition layer comprises:
a first electrode disposed on the reflective layer;
wherein the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
4. The array substrate of claim 1, wherein the different color pixel regions comprise a third color pixel region, wherein the at least one pixel definition layer comprises a third pixel definition layer located in the third color pixel region, and wherein the third pixel definition layer comprises:
a first inorganic layer disposed on the reflective layer;
an oxide thin film layer disposed on the first inorganic layer; and
a first electrode disposed over the oxide thin film layer;
the first inorganic layer and the gate insulating layer are formed of the same material in the same layer, the oxide thin film layer and the active layer are formed of the same material in the same layer, and the first electrode and the source/drain electrode layer are formed of the same material in the same layer.
5. The array substrate of claim 1, wherein the driving element region further comprises:
a passivation layer disposed on the source/drain electrode layer;
wherein the passivation layer and the phase change material layer are formed of the same material in the same layer.
6. The array substrate of claim 5, wherein the pixel region further comprises:
a second electrode disposed on the phase change material layer;
the driving element region further includes:
a third electrode disposed on the passivation layer;
wherein the second electrode and the third electrode are formed of the same material in the same layer.
7. A preparation method of an array substrate is characterized by comprising the following steps:
forming a metal layer on a substrate, forming a reflecting layer in a pixel area of the substrate through a composition process, and forming a gate in a driving element area of the substrate;
forming a gate insulating layer, an active layer and source/drain electrode layers on the gate electrode, wherein one or more of the gate insulating layer, the active layer and the source/drain electrode layers and at least one pixel defining layer located in a pixel region of a different color are formed of the same material layer, respectively, and the at least one pixel defining layer includes the same material layer as the source/drain electrode layers;
the different color pixel regions include a second color pixel region, the at least one pixel definition layer includes a second pixel definition layer located in the second color pixel region, the second pixel definition layer includes:
a first inorganic layer disposed on the reflective layer; and
a first electrode disposed on the first inorganic layer;
wherein the first inorganic layer and the gate insulating layer are formed of the same material in the same layer, and the first electrode and the source/drain electrode layer are formed of the same material in the same layer;
forming a phase change material layer on the at least one pixel defining layer.
8. The method of claim 7, wherein the different color pixel regions include a first color pixel region, a second color pixel region, and a third color pixel region, and wherein the one or more of the gate insulating layer, the active layer, and the source/drain electrode layer and the at least one pixel defining layer located in the different color pixel regions are respectively formed of the same material layer including:
forming a first inorganic material layer on the metal layer, forming a gate insulating layer on the gate electrode through a composition process, and forming a first inorganic layer on the reflective layers of the second color pixel region and the third color pixel region;
forming a metal oxide material layer on the inorganic material layer, forming an active layer on the gate insulating layer through a patterning process, and forming an oxide thin film layer on the first inorganic layer of the third color pixel region;
forming a second inorganic material layer on the metal oxide material layer, and forming an interlayer insulating layer on the active layer through a patterning process;
forming a first electrode material layer on the second inorganic material layer, forming a source/drain electrode layer on the interlayer insulating layer through a patterning process, and forming first electrodes on the first, second, and third color pixel regions.
9. The method for manufacturing an array substrate of claim 7, wherein the forming a phase change material layer on the at least one pixel defining layer further comprises:
and forming a passivation layer on the source/drain electrode layer by using the material for forming the phase change material layer.
10. The method for preparing an array substrate of claim 9, further comprising, after forming the phase change material layer on the at least one pixel defining layer:
and forming a second electrode material layer, forming a second electrode on the phase change material layer by using the electrode material layer, and forming a third electrode on the passivation layer.
11. A display device comprising the array substrate according to any one of claims 1 to 6.
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