CN108335679A - A kind of LCD scan drive circuits - Google Patents
A kind of LCD scan drive circuits Download PDFInfo
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- CN108335679A CN108335679A CN201810041575.6A CN201810041575A CN108335679A CN 108335679 A CN108335679 A CN 108335679A CN 201810041575 A CN201810041575 A CN 201810041575A CN 108335679 A CN108335679 A CN 108335679A
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- triode
- drive signal
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- pixel
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The present invention relates to a kind of LCD scan drive circuits, what is solved is the big technical problems of storage capacitance C2, by using including cascade N/2 two thin walls transistor series circuit, two thin walls transistor series circuit includes that the first triode M1 and the second triode M2, the source electrode of the first triode M1 are connect with the drain electrode of the second triode M1；The source electrode of the second triode M2 is connected with concatenated capacitance C1 and capacitance C2；First triode M1 grids input the first drive signal Gate1 by scan line Gate line, the grid of second triode M2 inputs the second drive signal Gate2 by scan line Gate line, in pixel holding area Tb, first drive signal Gate1 replaces the full technical solution for opening the first triode M1 and the second triode M2 with the second drive signal Gate2, the problem is preferably resolved, can be used in LCD driving applications.
Description
Technical field
The present invention relates to display drive circuit fields, and in particular to a kind of LCD scan drive circuits.
Background technology
There is the too low conservation rate that can bring pixel voltage of refreshing frequency in existing LCD scan drive circuits, into
And prodigious storage capacitance C2 is needed to design, pixel size is limited, exists and is difficult to realize high liquid crystal display pixel density
The technical issues of product.Therefore it provides a kind of low-power consumption product color LCD production that can realize high liquid crystal display pixel density
The LCD scan drive circuits of product are with regard to necessary.
Invention content
The technical problem to be solved by the present invention is to the big technical problems of storage capacitance C2 existing in the prior art.It provides
A kind of new LCD scan drive circuits, the LCD scan drive circuits are with storage capacitance C2 is small, solves ultralow refreshing frequency
Pixel voltage Preserving problems, the characteristics of realizing the low-power consumption product color LCD product of high liquid crystal display pixel density.
In order to solve the above technical problems, the technical solution used is as follows：
A kind of LCD scan drive circuits, the LCD scan drive circuits include cascade N/2 two thin walls transistor string
Join circuit, the two thin walls transistor series circuit includes the first triode M1 and the second triode M2, the first triode
The source electrode of M1 is connect with the drain electrode of the second triode M1；The source electrode of the second triode M2 is connected with concatenated capacitance C1 and electricity
Hold C2；The first triode M1 grids input the first drive signal Gate1, the second triode by scan line Gate line
The grid of M2 inputs the second drive signal Gate2 by scan line Gate line；First drive signal, the second driving letter
Number it is pulse signal, and is divided into pixel more new district Ta and pixel holding area Tb within a signal period；In pixel
In holding area Tb, the pulse width of the first drive signal Gate1 and the second drive signal Gate2 are △ t2；First drive signal
Time delay between Gate1 and the second drive signal Gate2 is △ t2, i-th of two thin walls transistor series circuit
The second drive signal Gate i1 time delays of first drive signal Gate i and (i-1)-th two thin walls transistor series circuit
For △ t2；Wherein, N is positive integer, i≤N/2, i1=2 × i.
The operation principle of the present invention：In the present invention, within the time of a frame, pixel charging only occurs in Ta sections of adjacent rows
It is answered for a long time in what same state was brought at Tb sections in order to improve thin film transistor in the region that Gate is opened simultaneously
Power drifting problem, the first triode M1 of setting replace open VGM waveforms with the second triode M2.At Tb sections, due to film crystalline substance
Body triode will not completely close, and during the first triode M1 replaces opening with the second triode M2, there is smaller
Leakage current.It is filled in pixel at this point, the voltage on data line has minute quantity charge.But due to the voltage on data line
Pressure difference between pixel is small, and leakage current can be much smaller, so storage capacitance C2 uses the value of very little in pixel, so as to subtract
The size of small pixel realizes the design of high liquid crystal display pixel density product.Ta sections only account for seldom ratio in whole cycle
Example, gate are partially opened in 2 adjacent, overlappings, opening time T1/2；Tb sections of each pulse interlacings are opened, no overlap part, and two
Gate Tb segment signals are staggered ± T2, and driving source signal Source is using the opposite reversion side of the driving source signal polarity of interval frame
Formula.
In said program, to optimize, further：In pixel more new district Ta, the first drive signal Gate1 and second drives
There are time delay △ t1 by dynamic signal Gate2；First drive signal Gate1 high level and the second drive signal Gate2 high level are T1,
First drive signal Gate i of i-th of two thin walls transistor series circuit and (i-1)-th three pole of two thin walls crystal
There are time delay △ t1, △ t1=T1/2 by second drive signal Gate i1 of pipe series circuit.
Further, the drain electrode of the first triode M1 in first two thin walls transistor series circuit passes through data
Line Source line input driving source signals Source；The driving source signal Source is driven using column inversion, is spaced frame
Driving source signal polarity is opposite.
Further, the driving source signal Source is pulse signal, and is divided within a signal period
Pixel more new district Ta and pixel holding area Tb；It is charging voltage that the voltage value of source signal Source is driven in pixel more new district Ta
The voltage value of driving source signal Source is to maintain voltage SoureL2, SoureL2 ＜ in SoureL1, pixel holding area Tb
SoureL1。
Further, the voltage value of driving source signal Source is to maintain voltage SoureL2 and is not in pixel holding area Tb
0V。
Further, the refreshing frequency of the two thin walls transistor series circuit is 1Hz.
Due to the influence of the interelectrode capacity Cgd of the grid and drain electrode of the presence and the second triode M2 of VGM, pixel voltage
Smaller lifting is had, is lifted to reduce, Tb sections of SoureL2 is set as being slightly less than Ta sections of SoureL1；Data line is in Tb simultaneously
The setting value of section is to other pixel voltages, and the position that need not be charged also brings along 0.1V changes below, and this variation will not
Transmitance is influenced, therefore, does not interfere with display effect.
Beneficial effects of the present invention：
Effect one, the present invention pass through two thin walls transistor series design；First triode M1 and the second triode M2 are set
The VGM waveforms alternately opened, solve the pixel voltage Preserving problems of ultralow refreshing frequency, and the smaller Pixel Dimensions of use are real
The low-power consumption product color LCD product of high liquid crystal display pixel density is showed；
Tb sections of SoureL2 are set as being slightly less than Ta sections of SoureL1 by effect two, are reduced the lifting degree of pixel voltage, are carried
High driveability.
Description of the drawings
Present invention will be further explained below with reference to the attached drawings and examples.
Fig. 1, two thin walls transistor series circuit schematic diagram.
Fig. 2, the first drive signal Gate1 and the second drive signal Gate2 schematic diagrames.
Fig. 3 drives source signal Source schematic diagrames.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to embodiments, to the present invention
It is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, is not used to limit
The fixed present invention.
Embodiment 1
The present embodiment provides a kind of LCD scan drive circuits, the LCD scan drive circuits include cascade 1 two thin walls crystalline substance
Body triode series circuit, such as Fig. 1, the two thin walls transistor series circuit include the first triode M1 and the two or three pole
Pipe M2, the source electrode of the first triode M1 are connect with the drain electrode of the second triode M1；The source electrode of the second triode M2 is connected with
Concatenated capacitance C1 and capacitance C2；The first triode M1 grids input the first drive signal by scan line Gate line
The grid of Gate1, the second triode M2 input the second drive signal Gate2 by scan line Gate line；First driving
Signal, the second drive signal are pulse signal, and pixel more new district Ta and pixel are divided within a signal period
Holding area Tb；In pixel holding area Tb, the first drive signal Gate1 replaces full opening first with the second drive signal Gate2
Triode M1 and the second triode M2；The pulse width of first drive signal Gate1 and the second drive signal Gate2 are △ t2；
Time delay between first drive signal Gate1 and the second drive signal Gate2 is △ t2.
In the present embodiment, the refreshing frequency of two thin walls transistor series circuit is ultralow frequency, using 1Hz, but not office
It is limited to this.
Using 2 or multiple two thin walls transistor series circuits cascade driven when, i-th of two thin walls
Second driving of the first drive signal of transistor series circuit and (i-1)-th two thin walls transistor series circuit is believed
Number time delay is △ t2.
In the present embodiment, in same frame, pixel charging only occurs in the region that Ta sections of adjacent rows Gate are opened simultaneously,
At Tb sections, in order to improve the stress drift problem that thin film transistor is brought in same state for a long time, setting the one or three
Pole pipe M1 replaces open VGM waveforms with the second triode M2.At Tb sections, since thin film transistor will not completely close,
During the first triode M1 replaces opening with the second triode M2, there is smaller leakage currents.At this point, on data line
Voltage have minute quantity charge and be filled in pixel.But since the voltage on data line and the pressure difference between pixel are small, electric leakage
Stream can be much smaller, so storage capacitance C2 realizes high liquid crystal using the value of very little so as to reduce the size of pixel in pixel
The design of display screen matrix density products.
Wherein, such as Fig. 2, in pixel more new district Ta, the arteries and veins of the first drive signal Gate1 and the second drive signal Gate2
It is T1=△ t2 to rush width, there is time delay △ t1 therebetween；The of the 2nd two thin walls transistor series circuit
There are time delay △ by second drive signal Gate2 of one drive signal Gate3 and the 1st two thin walls transistor series circuit
t1.Therefore, pixel, which charges, occurs over just the region that the adjacent rows Gate in pixel more new district Ta is opened simultaneously, and wherein △ t1=
T1/2。
In the present embodiment, such as Fig. 1, the drain electrode of the first triode M1 in first two thin walls transistor series circuit
Pass through data line Source line input driving source signals Source；As Fig. 2, the driving source signal Source use row anti-
Turn driving, the driving source signal polarity for being spaced frame is opposite.
Due to the influence of the interelectrode capacity Cgd of the grid and drain electrode of the presence and the second triode M2 of VGM, pixel voltage
Smaller lifting is had, is lifted to reduce, it is preferable that such as Fig. 2, driving source signal Source is pulse signal, and in a signal
Pixel more new district Ta and pixel holding area Tb are divided into period；Such as Fig. 3, source signal is driven in pixel more new district Ta
The voltage value of Source is charging voltage SoureL1, drives the voltage value of source signal Source to be to maintain in pixel holding area Tb
Voltage SoureL2, SoureL2 ＜ SoureL1.The voltage value of driving source signal Source is to maintain voltage in pixel holding area Tb
SoureL2 is not 0V.
Although the illustrative specific implementation mode of the present invention is described above, in order to the technology of the art
Personnel are it will be appreciated that the present invention, but the present invention is not limited only to the range of specific implementation mode, to the common skill of the art
For art personnel, as long as long as various change the attached claims limit and determine spirit and scope of the invention in, one
The innovation and creation using present inventive concept are cut in the row of protection.
Claims (6)
1. a kind of LCD scan drive circuits, it is characterised in that：The LCD scan drive circuits include cascade N/2 two thin walls
Transistor series circuit, the two thin walls transistor series circuit include the first triode M1 and the second triode
M2, the source electrode of the first triode M1 are connect with the drain electrode of the second triode M1；The source electrode of the second triode M2 is connected with string
The capacitance C1 and capacitance C2 of connection；
The first triode M1 grids input the first drive signal Gate1, the second triode M2 by scan line Gate line
Grid pass through scan line Gate line and input the second drive signal Gate2；
First drive signal, the second drive signal are pulse signal, and are divided into picture within a signal period
The new districts Su Geng Ta and pixel holding area Tb；
In pixel holding area Tb, the pulse width of the first drive signal Gate1 and the second drive signal Gate2 are △ t2；The
Time delay between one drive signal Gate1 and the second drive signal Gate2 is △ t2, i-th of two thin walls transistor
The second drive signal of the first drive signal Gate i and (i-1)-th two thin walls transistor series circuit of series circuit
Gate i1 time delays are △ t2；
Wherein, N is positive integer, i≤N/2, i1=2 × i.
2. LCD scan drive circuits according to claim 1, it is characterised in that：In pixel more new district Ta, the first driving
There are time delay △ t1 by signal Gate1 and the second drive signal Gate2；First drive signal Gate1 high level and the second driving are believed
Number Gate2 high level is T1, the first drive signal Gate i and i-th-of i-th of two thin walls transistor series circuit
There are time delay △ t1, △ t1=T1/2 by second drive signal Gate i1 of 1 two thin walls transistor series circuit.
3. LCD scan drive circuits according to claim 2, it is characterised in that：First two thin walls transistor string
The drain electrode for joining the first triode M1 in circuit passes through data line Source line input driving source signals Source；The drive
Dynamic source signal Source is driven using column inversion, and the driving source signal polarity for being spaced frame is opposite.
4. LCD scan drive circuits according to claim 3, it is characterised in that：The driving source signal Source is arteries and veins
Signal is rushed, and is divided into pixel more new district Ta and pixel holding area Tb within a signal period；In pixel more new district Ta
The voltage value of interior driving source signal Source is charging voltage SoureL1, drives source signal Source's in pixel holding area Tb
Voltage value is to maintain voltage SoureL2, SoureL2 ＜ SoureL1.
5. LCD scan drive circuits according to claim 3, it is characterised in that：The holding voltage SoureL2 is not
0V。
6. according to any LCD scan drive circuits of claim 1-5, it is characterised in that：Three pole of two thin walls crystal
The refreshing frequency of pipe series circuit is 1Hz.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810041575.6A CN108335679A (en) | 2018-01-16 | 2018-01-16 | A kind of LCD scan drive circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810041575.6A CN108335679A (en) | 2018-01-16 | 2018-01-16 | A kind of LCD scan drive circuits |
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| Publication Number | Publication Date |
|---|---|
| CN108335679A true CN108335679A (en) | 2018-07-27 |
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ID=62925179
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810041575.6A Pending CN108335679A (en) | 2018-01-16 | 2018-01-16 | A kind of LCD scan drive circuits |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113625485A (en) * | 2021-07-28 | 2021-11-09 | 深圳莱宝高科技股份有限公司 | Array substrate, manufacturing method thereof and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040113879A1 (en) * | 2002-12-10 | 2004-06-17 | Hitachi, Ltd. | Liquid-crystal display device and method of driving liquid-crystal display device |
| US20060022202A1 (en) * | 2004-06-29 | 2006-02-02 | Sang Hee Yu | Liquid crystal display panel and fabricating method thereof |
| CN106842748A (en) * | 2017-03-28 | 2017-06-13 | 信利半导体有限公司 | The dot structure and liquid crystal display device of a kind of liquid crystal display device |
| CN107167973A (en) * | 2017-07-07 | 2017-09-15 | 京东方科技集团股份有限公司 | Array base palte, display device and its driving method |
| CN206563861U (en) * | 2017-03-28 | 2017-10-17 | 信利半导体有限公司 | The dot structure and liquid crystal display device of a kind of liquid crystal display device |
| CN107464519A (en) * | 2017-09-01 | 2017-12-12 | 上海天马微电子有限公司 | Shift register unit, shift register, driving method, display panel and device |
| CN107481659A (en) * | 2017-10-16 | 2017-12-15 | 京东方科技集团股份有限公司 | Gate driving circuit, shift register and its drive control method |
-
2018
- 2018-01-16 CN CN201810041575.6A patent/CN108335679A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040113879A1 (en) * | 2002-12-10 | 2004-06-17 | Hitachi, Ltd. | Liquid-crystal display device and method of driving liquid-crystal display device |
| US20060022202A1 (en) * | 2004-06-29 | 2006-02-02 | Sang Hee Yu | Liquid crystal display panel and fabricating method thereof |
| CN106842748A (en) * | 2017-03-28 | 2017-06-13 | 信利半导体有限公司 | The dot structure and liquid crystal display device of a kind of liquid crystal display device |
| CN206563861U (en) * | 2017-03-28 | 2017-10-17 | 信利半导体有限公司 | The dot structure and liquid crystal display device of a kind of liquid crystal display device |
| CN107167973A (en) * | 2017-07-07 | 2017-09-15 | 京东方科技集团股份有限公司 | Array base palte, display device and its driving method |
| CN107464519A (en) * | 2017-09-01 | 2017-12-12 | 上海天马微电子有限公司 | Shift register unit, shift register, driving method, display panel and device |
| CN107481659A (en) * | 2017-10-16 | 2017-12-15 | 京东方科技集团股份有限公司 | Gate driving circuit, shift register and its drive control method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113625485A (en) * | 2021-07-28 | 2021-11-09 | 深圳莱宝高科技股份有限公司 | Array substrate, manufacturing method thereof and display device |
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Application publication date: 20180727 |
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