CN104008738A - Display Panel and Gate Driver - Google Patents
Display Panel and Gate Driver Download PDFInfo
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- CN104008738A CN104008738A CN201410211058.0A CN201410211058A CN104008738A CN 104008738 A CN104008738 A CN 104008738A CN 201410211058 A CN201410211058 A CN 201410211058A CN 104008738 A CN104008738 A CN 104008738A
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Abstract
The invention discloses a display panel and a grid driver, wherein the grid driver comprises a plurality of driving stages which are connected in series and outputs a grid driving signal. The driving stage comprises an input unit, a driving unit and a pull-down unit. The input unit transmits a preceding stage gate driving signal to the control node, and the preceding stage gate driving signal comprises a first pulse and a second pulse which are continuous. The driving unit outputs a gate driving signal according to a level voltage of the control node. The pull-down unit pulls down the gate driving signal to a first voltage after an enabling period of the second pulse. During the enabling period of the first pulse, the input unit pulls up the control node to a second voltage. After the enabling period of the second pulse, the driving unit pulls up the control node to a third voltage, and the third voltage is greater than the second voltage.
Description
Technical field
The present invention relates to a kind of display panel (DISPLAY PANEL), particularly a kind of gate drivers of display panel.
Background technology
Recently, the product of various liquid crystal display is considerably universal, and in order effectively to promote the effective area of liquid crystal display, the display panel technology that is applicable to narrow frame is constantly suggested.
But along with the resolution of display constantly promotes, the time that gate drivers can drive display panel to charge is shorter and shorter.In order to maintain certain pixel charge rate, in gate drivers, multiple transistorized sizes must need to increase.So, can make gate drivers dynamic power consumption and circuit layout area increase, be difficult to all the better be applicable to the application of narrow frame.
Therefore, how can effectively reduce the circuit area of gate drivers, and maintain good pixel charge rate simultaneously, real one of the current important research and development problem that belongs to, also becomes current association area and needs improved target badly.
Summary of the invention
In order to solve the above problems, the invention provides a kind of display panel.Display panel comprises many gate lines and gate drivers.The driving stage that gate drivers comprises multiple serial connections, wherein each driving stage is used for exporting gate drive signal to its corresponding gate line, and the N level driving stage in driving stage comprises input block, driver element and drop-down unit.Input block is used for the gate drive signal of N-1 level driving stage output to be sent to the first control node, and wherein N is positive integer, and the gate drive signal of N-1 level driving stage output comprises the first continuous pulse and the second pulse.Driver element is used for exporting gate drive signal according to the level voltage of the first control node.Drop-down unit is used for, after during the activation of the second pulse, gate drive signal is pulled down to the first voltage.In wherein during the activation of the first pulse, input block will be moved second voltage on the level voltage of the first control node, after during the activation of the second pulse, driver element will be moved tertiary voltage on the level voltage of this first control node, and tertiary voltage is greater than second voltage.
The invention provides another kind of gate drivers.The driving stage that gate drivers comprises multiple serial connections, and in multiple driving stage, any one driving stage comprises input block, driver element and drop-down unit.Input block comprises first input end, the second input end and output terminal.The first input end of input block is used for receiving prime gate drive signal, and the second input end of input block is used for receiving first frequency signal, and the output terminal electric property coupling control node of input block.Driver element comprises first input end, the second input end and output terminal.The first input end electric property coupling control node of driver element, the second input end of driver element is used for receiving second frequency signal, and the output terminal of driver element is used for exporting gate drive signal at the corresponding levels, and wherein first frequency signal and second frequency signal are anti-phase.Drop-down unit comprises the first switch, second switch, the 3rd switch, the 4th switch, the 5th switch and the 6th switch.The first switch has first end, the second end and control end, and wherein the control end of the first switch is used for receiving first frequency signal, the control end of first end electric property coupling first switch of the first switch.Second switch has first end, the second end and control end, and wherein the control end of second switch is electrically connected the control end of the first switch, and the first end of second switch is electrically connected the first end of the first switch.The 3rd switch has first end, the second end and control end, and wherein the control end of the 3rd switch is used for receiving prime gate drive signal, the second end of first end electric property coupling first switch of the 3rd switch, and the second end of the 3rd switch is used for receiving the first voltage.The 4th switch has first end, the second end and control end, and wherein the control end of the 4th switch is used for receiving prime gate drive signal, the second end of the first end electric property coupling second switch of the 4th switch, and the second end of the 4th switch is used for receiving the first voltage.The 5th switch has first end, the second end and control end, wherein the second end of the control end electric property coupling second switch of the 5th switch, the first end electric property coupling control node of the 5th switch, and the output terminal of the second end electric property coupling driver element of the 5th switch.The 6th switch has first end, the second end and control end, wherein the second end of the control end electric property coupling second switch of the 6th switch, and the output terminal of the first end electric property coupling driver element of the 6th switch, and the second end of the 6th switch is used for receiving the first voltage.
In sum, technical scheme of the present invention compared with prior art has obvious advantage and beneficial effect.According to the description of technique scheme, the present invention has very large technical progress, and there is the extensive value in industry, display panel provided by the invention and gate drivers can have multiple type of drive, and can provide the charge rate that array of pixels is higher, and then can make the aperture opening ratio of display panel promote, or can make the area of gate drivers reduce, to meet the demand of narrow frame application.
Brief description of the drawings
Fig. 1 is the schematic diagram of a kind of display panel of the embodiment of the present invention;
Fig. 2 A is the schematic diagram of a kind of gate drivers of the embodiment of the present invention;
Fig. 2 B is the driving stage schematic diagram shown in embodiment of the present invention Fig. 2 A;
Fig. 3 is the schematic diagram of embodiment of the present invention N level driving stage;
Fig. 4 is the operation signal sequential schematic diagram of the driving stage of embodiment of the present invention Fig. 3;
Fig. 5 A is the view of each switch in the driving stage of embodiment of the present invention Fig. 3 in period T1; Fig. 5 B is the view of each switch in the driving stage of embodiment of the present invention Fig. 3 in period T2; Fig. 5 C is the view of each switch in the driving stage of embodiment of the present invention Fig. 3 in period T5; Fig. 6 is the signal sequence schematic diagram of the operation of the driving stage in another embodiment of the present invention Fig. 3;
Wherein, Reference numeral:
100 display panels
120 viewing areas
122 array of pixels
124 pixels
140 source electrode drivers
160,200 gate drivers
GL1, GL2, GL3～GLN gate line
DL1, DL2, DL3, DL4～DLN data line
200a, 300 driving stages
XHC, HC frequency signal
G[1], G[2]～G[n-1], G[n] gate drive signal
Din inceptive impulse
220 input blocks
240 driver elements
260 drop-down unit
262 pull-down control circuits
264 pull-down circuits
A, B control node
VSS, V1, V2, V3, V4, Δ V voltage
C electric capacity
T1, T2, T3, T4, T5 period
T11, T12, T21, T31, T32, T41, T42, T43, T44 switch
Embodiment
Provide the specific embodiment of the present invention below, in conjunction with diagram, the present invention has been made to detailed description.But the embodiment providing is not used for limiting the scope that the present invention is contained, and the description of structure operation is not the order for limiting its execution, any structure being reconfigured by assembly, the device with impartial effect that produces, is all the scope that the present invention is contained.In addition, accompanying drawing only for the purpose of description, is not mapped according to life size.For the ease of understanding, in following explanation, same components will illustrate with identical symbology.
About " first " used herein, " second " ... Deng, the not special meaning of censuring order or order, neither be used for limiting the present invention, it is only used to assembly or the operation of difference with constructed term description.
In " approximately " used herein, " approximately " or " roughly " general common error or scope 20 approximately percent that means numerical value, be in approximately 10 preferably, be more preferably in approximately 5 percent.Wen Zhongruo is without clearly stating, and its mentioned numerical value is all regarded as approximate value, as " approximately ", " approximately " or " roughly " represented error or scope.
In addition, about " coupling " used herein or " connection ", all can refer to that two or more assemblies directly make entity or in electrical contact mutually, or mutually indirectly put into effect body or in electrical contact, also can refer to two or more assembly mutual operation or actions.
Fig. 1 is the schematic diagram of a kind of display panel 100 in embodiment provided by the invention.As shown in Figure 1, display panel 100 comprise image display district 120, source electrode driver 140 with gate driver 160.Image display district 120 comprises the array of pixels 122 and the multiple pixel 124 that are formed with many gate lines (as: M bar gate lines G L1～GLM) configuration by many data lines (as: N bar data line DL1～DLN), and pixel 124 is disposed in above-mentioned array of pixels 122.
Source electrode driver 140 couples data line DL1～DLN, by data line DL1～DLN outputting data signals to image display district 120 corresponding pixel 124, and gate drivers 160 couples gate lines G L1～GLM, and be used for exporting successively gate drive signal to gate lines G L1～GLM, be sent to the corresponding pixel 124 in image display district 120 by gate lines G L1～GLM.
Fig. 2 A is the schematic diagram of a kind of gate drivers 200 of embodiment provided by the invention.As shown in Figure 2 A, gate drivers 200 comprises multiple drive power level 200a.Each driving stage 200a is connected in series each other, and every one-level driving stage 200a is used for exporting gate drive signal G[n] in corresponding gate lines G L1～GLM.
2B figure is the schematic diagram of the driving stage 200a of embodiment Fig. 2 A provided by the invention.Taking N level driving stage 200a as example, N level driving stage 200a comprises input block 220, driver element 240 and drop-down unit 260, and wherein N is a positive integer.
The first input end of input block 220 is used for receiving N-1 level gate drive signal G[n-1] or inceptive impulse Din (in the time of N=1), the second input end of input block 220 is used for receiving frequency signals XHC and the output terminal electric property coupling control node A of input block 220.
The first input end of driver element 240 is electrically coupled to controls node A, and the second input end of driver element 240 is used for receiving frequency signals HC, and the output terminal of driver element 240 is used for exporting gate drive signal G[n at the corresponding levels].Wherein, above-mentioned frequency signal XHC and frequency signal HC are anti-phase each other.
With operation, input block 220 is by the signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din (in the time of N=1) be sent to and control node A, adjust the level voltage of controlling node A.Driver element 240 is used for exporting gate drive signal G[n at the corresponding levels according to the level voltage of controlling node A].Drop-down unit 260 electric property coupling input blocks 220 and driver element 240.Drop-down unit 260 is used for receiving the signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din (in the time of N=1) and frequency signal XHC, with by gate drive signal G[n at the corresponding levels] pull down to voltage VSS.
In addition, gate drivers 200 provided by the invention can produce dissimilar gate drive signal G[n], and make to show that array 122 has different polarity driven mode (for example: some reversion, picture frame reversion, row reversion, hurdle reversion etc.).Particularly, shown in Fig. 2 A, the first input end of the input block 220 of the 1st grade of driving stage 200a is used for receiving inceptive impulse DIN, and above-mentioned different polarity driven mode can have been set by inceptive impulse DIN according to actual demand.
Following paragraph will propose each embodiment, and function and the application of above-mentioned driving stage 200a are described, but the present invention is not limited in following listed embodiment.
Please refer to Fig. 3, Fig. 3 is the schematic diagram of the N level driving stage 300 that illustrates according to embodiment provided by the invention.As shown in Figure 3, input block 220 comprises switch T11 and switch T12.The first input end of the control end electric property coupling input block 220 of switch T11, to receive the gate drive signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din when N=1 (if), and the control end of the first end electric property coupling switch T11 of switch T11.The second input end of the control end electric property coupling input block 220 of switch T12, with receiving frequency signals XHC.The second end of the first end electric property coupling switch T11 of switch T12, the second end of switch T12 is electrically coupled to the output terminal (namely controlling node A) of input block 220.So, when switch T11 and switch T12 are when conducting, the gate drive signal G[n-1 of N-1 level driving stage 200a output] can be sent to and control node A, to adjust the level voltage of controlling node A.
Moreover as shown in Figure 3, driver element 240 comprises switch T21 and capacitor C.The control end electric property coupling of switch T21 is to the first input end (namely controlling node A) of driver element 240, the second input end of the first end electric property coupling driver element 240 of switch T21, with receiving frequency signals HC, and the second end electric property coupling of switch T21 is to the output terminal of driver element 240, to export gate drive signal G[n at the corresponding levels].Between capacitor C electric property coupling control node A and switch T21, so that pressure stabilization function to be provided.
Drop-down unit 260 comprises pull-down control circuit 262 and pull-down circuit 264.Pull-down control circuit 262 is used for according to the gate drive signal G[n-1 of N-1 level driving stage output] or inceptive impulse Din when N=1 (if) adjust the level voltage of controlling Node B.Pull-down circuit 262 electric property coupling control Node B, and be used for according to the level voltage of control Node B and by gate drive signal G[n at the corresponding levels] pull down to voltage VSS, wherein voltage VSS is low level voltage.
Particularly, pull-down control circuit 262 comprises switch T41, switch T42, switch T43 and switch T44.The control end of switch T41 is used for receiving frequency signals XHC and the control end of the first end electric property coupling switch T41 of switch T41.The second end of the control end electric property coupling switch T41 of switch T43, the first end of the first end electric property coupling switch T41 of switch T43, and the second end electric property coupling control Node B of switch T43.The control end of switch T42 is used for receiving the gate drive signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din when N=1 (if).The control end of switch T42 is used for receiving the gate drive signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din when N=1 (if), the second end of the first end electric property coupling switch T41 of switch T42, and the second end of switch T42 is used for receiver voltage VSS.The control end of switch T44 is used for receiving the gate drive signal G[n-1 of N-1 level driving stage 200a output] or inceptive impulse Din when N=1 (if), the first end electric property coupling control Node B of switch T44, and the second end of switch T44 is used for receiver voltage VSS.
Then, as shown in Figure 3, pull-down circuit 264 comprises switch T32 and switch T31.The control end electric property coupling control Node B of switch T32, the first end electric property coupling control node A of switch T32, and the second end of switch T32 is used for receiving gate drive signal G[n at the corresponding levels].The control end electric property coupling control Node B of switch T31, the second end of the first end electric property coupling switch T21 of switch T31, and the second end of switch T31 is used for receiver voltage VSS.
Fig. 4 illustrates the signal sequence schematic diagram of the operation of the driving stage 300 in Fig. 3 according to embodiment provided by the invention.As shown in Figure 4, in this embodiment, inceptive impulse Din arranges has continuous pulse P1 and pulse P2.So, can make to show that array 122 operates with type of drive such as a reversion, row reversions.
Fig. 5 A is the view that illustrates each switch in the driving stage 300 of the 3rd figure in period T1 according to embodiment provided by the invention.For convenience of description, please with reference to Fig. 4, Fig. 2 B and Fig. 5 A, the operation of the driving stage 300 above-mentioned graphic explanation in the lump of arranging in pairs or groups.In addition following describing as an example of the 1st grade of driving stage 300 example.The operation of subsequent stages driving stage 300, can be considered as the gate drive signal G[n-1 that prime driving stage 300 is exported by the inceptive impulse Din of following explanation] and corresponding pushing away.
As shown in Fig. 4 and Fig. 5 A, when period T1 (namely during the activation of pulse P1), the pulse P1 of inceptive impulse Din is input to switch T11 and switch T42, and actuating switch T11, switch T42.Because frequency signal XHC is now high level voltage, switch T12 and therefore conducting of switch T41, and switch T43 and also therefore conducting of switch T44.So, the level voltage of controlling Node B can be pulled down to voltage VSS via switch T44, with stopcock T32 and switch T31.Input block 220 can transmit inceptive impulse Din to controlling node A, so that the level voltage of controlling node A is drawn high to voltage V1, and then actuating switch T21.Therefore, switch T21 can be output as gate drive signal G[1 at the corresponding levels by the frequency signal HC with low level voltage].
It should be noted that in each embodiment provided by the invention, the voltage difference between switch T32 is by controlling node A and gate drive signal G[1 at the corresponding levels] level voltage determined.The gate drivers of knowing is mainly with the voltage difference of controlling the level voltage of node A and the switch of voltage VSS decision pull-down circuit, and the driving stage 300 shown in the content that the present invention provides can reduce the voltage difference between first end and the second end of switch T32 by this kind of set-up mode, the leakage current of switch T32 can obviously be reduced, and then improve the operation reliability of driving stage 300.
Fig. 5 B is the view that illustrates each switch in the driving stage 300 of the 3rd figure in period T2 according to embodiment provided by the invention.As shown in Fig. 4 and Fig. 5 B, when period T2 (the namely time during the activation of pulse P1 and between during the activation of pulse P2), during the pulse P1 of inceptive impulse Din enters forbidden energy, and frequency signal XHC is also switched to low level voltage.Therefore, switch T11, switch T12, switch T41, switch T42, switch T43, switch T44, switch T32 and switch T31 turn-off.Because the level voltage of controlling node A is being previously pulled up to voltage V1 in period T1, so switch T21 still can keep conducting.Thus, in period T2, frequency signal HC is switched to high level voltage, and is output as the gate drive signal G[1 at the corresponding levels with high level voltage via switch T21], to allow array of pixels 122 carry out the operation of precharge.In addition, gate drive signal G[1 at the corresponding levels] can again charge to controlling node A via capacitor C, move voltage V2 to and make to control on the level voltage of node A.
Moreover as shown in Figure 4, in the time of period T3, during inceptive impulse Din enters the activation of pulse P2, and frequency signal XHC is switched to high level voltage.Now, the state of each switch of driving stage 300 can be identical with previous Fig. 5 A, and namely switch T11, switch T12, switch T2, switch T41, switch T42, switch T43 and switch T44 are conducting, and switch T32 and switch T31 are for turn-offing.
Meanwhile, frequency signal HC is switched to low level voltage, and makes the level voltage of controlling node A pull down to voltage V1 via driver element 240.But in practical operation, because the level voltage of controlling node A has been charged to higher voltage V2 at period T2, therefore, in the time of period T3, the level voltage of controlling node A only can pull down to voltage V3, wherein voltage V3 is higher than voltage V1, and V3=V1+ Δ V.In each embodiment, Δ V is approximately 1～3V.
Please, referring again to Fig. 4, when period T4 (after namely during the activation of pulse P2), inceptive impulse Din is switched to low level voltage, and frequency signal XHC is also switched to low level voltage.Now, the state of each switch of driving stage 300 can be identical with previous Fig. 5 B, and namely switch T11, switch T12, switch T32, switch T31, switch T41, switch T42, switch T43 and switch T44 are shutoff, and switch T21 is conducting.Now, frequency signal HC is switched to high level voltage, and is output as the gate drive signal G[1 at the corresponding levels with high level voltage via switch T21], to allow array of pixels 122 carry out the operation of data writing signal.
Meanwhile, gate drive signal G[1 at the corresponding levels] can be again via capacitor C to controlling node A charging, move voltage V2 to and make to control on the level voltage of node A.As discussed previously, in practical operation, because the level voltage of controlling node A has risen to higher voltage V3 at period T3.Therefore, under the identical duration of charging, the level voltage of controlling node A can be pulled up to higher voltage V4 at period T4, also makes gate drive signal G[1 at the corresponding levels] also promote thereupon, wherein voltage V4 is higher than voltage V2, and voltage V4=V2+ Δ V.
That is to say, driving stage 300 can be in the time that array of pixels 122 be carried out the operation of data writing signal (namely period T4) the gate drive signal G[1 with higher level voltage is provided] drive, and make multiple pixels 124 in array of pixels 122 can there is good charge rate.Therefore, in array of pixels 122, the size of multiple pixels 124 can reduce, to improve the aperture opening ratio (aperture ratio) of display panel 200.Or, can reduce the size of multiple switches in driving stage 300, be minimized with the area that makes gate drivers 160, more to meet the demand of narrow frame application.
Fig. 5 C is the view that illustrates each switch in the driving stage 300 of Fig. 3 in period T5 according to embodiment provided by the invention.As shown in Fig. 4 and Fig. 5 C, in the time of period T5, inceptive impulse Din and frequency signal HC are low level voltage, and frequency signal XHC is high level voltage.Therefore, switch T12, switch T41, switch T43 are conducting, and switch T11, switch T42 and switch T43 are for turn-offing.Frequency signal XHC can draw high high level voltage by the level voltage of controlling Node B via switch T43, and then actuating switch T32 and switch T31.So, control level voltage and the gate drive signal G[1 at the corresponding levels of node A] all pulled down to low level voltage (being for example voltage VSS).
Fig. 6 is the signal sequence schematic diagram that content provides according to the present invention another embodiment illustrates the operation of the driving stage 300 in Fig. 3.As shown in Figure 4, in this embodiment, inceptive impulse Din also can be set to only have single pulse P1, so can make to show that array 122 operates with type of drive such as picture frame reversion, hurdle reversions.In the operation only with Sing plus P1, can, with reference to the operation instructions between period T1 in previous embodiment and period T2, not repeat them here.
In each embodiment providing in content of the present invention, each switch can be all types of transistors, for example, be metal oxide semiconductcor field effect transistor (MOSFET), bottom gate transistor, top gate type transistor, thin film transistor (TFT) etc.Above are only illustration, the present invention is not as limit.
In sum, display panel provided by the invention and gate drivers can have multiple type of drive, and the charge rate that array of pixels is higher can be provided, and then can make the aperture opening ratio of display panel promote, or can make the area of gate drivers be minimized, to meet the demand of narrow frame application.
Although the invention provides above embodiment; but these embodiments are not used for limiting the present invention; those skilled in the art; not departing from the definite the spirit and scope of the present invention of claims; can be used for a variety of modifications and variations, therefore protection scope of the present invention should be determined by the scope of claims.
Claims (10)
1. a display panel, is characterized in that, comprises:
Many gate lines and gate drivers, the driving stage that described gate drivers comprises multiple serial connections, wherein each driving stage is used for exporting gate drive signal to corresponding one of described many gate lines, the N level driving stage of described multiple driving stages comprises: input block, be used for the described gate drive signal of N-1 level driving stage output to be sent to the first control node, wherein N is positive integer, and the described gate drive signal of described N-1 level driving stage output comprises the first continuous pulse and the second pulse;
Driver element, is used for exporting described gate drive signal according to the described first level voltage of controlling node; And
Drop-down unit, is used for, after during the activation of described the second pulse, described gate drive signal is pulled down to the first voltage;
In wherein during the activation of described the first pulse, the described first level voltage of controlling node is pulled to second voltage by described input block, after during the activation of described the second pulse, described driver element will be moved tertiary voltage on the level voltage of described the first control node, and described tertiary voltage is greater than described second voltage.
2. display panel as claimed in claim 1, it is characterized in that, during the activation of wherein said the first pulse and between during the activation of described the second pulse, described driver element will be moved the 4th voltage on the level voltage of described the first control node, and described tertiary voltage is more than or equal to described the 4th voltage.
3. display panel as claimed in claim 1, is characterized in that, wherein said input block transmits the described gate drive signal of described N-1 level driving stage output according to first frequency signal, and described input block comprises:
The first switch, comprise first end, the second end and control end, the described control end of wherein said the first switch is used for receiving the described gate drive signal of described N-1 level driving stage output, the described control end of the first switch described in the described first end electric property coupling of described the first switch; And
Second switch, comprise first end, the second end and control end, the described control end of wherein said second switch is used for receiving described first frequency signal, described second end of the first switch described in the described first end electric property coupling of described second switch, and the first control node described in the described second end electric property coupling of described second switch.
4. display panel as claimed in claim 3, it is characterized in that, wherein said driver element is exported described gate drive signal according to the described first level voltage and second frequency signal of controlling node, described first frequency signal and described second frequency signal are anti-phase, and described driver element comprises:
The first switch, comprise first end, the second end and control end, described in the described control end electric property coupling of wherein said the first switch, first controls node, the described first end of described the first switch is used for receiving described second frequency signal, and described second end of described the first switch is used for exporting described gate drive signal; And electric capacity, be electrically coupled to described first and control between node and described the first switch.
5. display panel as claimed in claim 4, is characterized in that, wherein said drop-down unit comprises:
Pull-down control circuit, is used for according to the level voltage of the described gate drive signal adjustment second control node of described N-1 level driving stage output; And
Pull-down circuit, second controls node described in electric property coupling, is used for controlling the level voltage of node and described gate drive signal being pulled down to described the first voltage according to described second.
6. display panel as claimed in claim 5, is characterized in that, wherein said pull-down control circuit comprises:
Second switch, comprises first end, the second end and control end, and the described control end of wherein said second switch is used for receiving described first frequency signal, the described control end of second switch described in the described first end electric property coupling of described second switch;
The 3rd switch, comprise first end, the second end and control end, described second end of second switch described in the described control end electric property coupling of wherein said the 3rd switch, the described first end of second switch described in the described first end electric property coupling of described the 3rd switch, and the second control node described in the described second end electric property coupling of described the 3rd switch;
The 4th switch, comprise first end, the second end and control end, the described control end of wherein said the 4th switch is used for receiving the described gate drive signal of described N-1 level driving stage output, described second end of second switch described in the described first end electric property coupling of described the 4th switch, and described second end of described the 4th switch is used for receiving described the first voltage;
The 5th switch, comprise first end, the second end and control end, the described control end of wherein said the 5th switch is used for receiving the described gate drive signal of described N-1 level driving stage output, described in the described first end electric property coupling of described the 5th switch, second controls node, and described second end of described the 5th switch is used for receiving described the first voltage.
7. display panel as claimed in claim 5, is characterized in that, wherein said pull-down circuit comprises:
Second switch, comprise first end, the second end and control end, described in the described control end electric property coupling of wherein said second switch, second controls node, described in the described first end electric property coupling of described second switch, first controls node, and described second end of described second switch is used for receiving described gate drive signal; And
The 3rd switch, comprise first end, the second end and control end, described in the described control end electric property coupling of wherein said the 3rd switch, second controls node, described second end of the first switch described in the described first end electric property coupling of described the 3rd switch, and described second end of described the 3rd switch is used for receiving described the first voltage.
8. a gate drivers, is characterized in that, the driving stage that described gate drivers comprises multiple serial connections, and in described multiple driving stages, driving stage comprises arbitrarily:
Input block, comprise first input end, the second input end and output terminal, the described first input end of wherein said input block is used for receiving prime gate drive signal, described second input end of described input block is used for receiving first frequency signal, and the described output terminal electric property coupling control node of described input block;
Driver element, comprise first input end, the second input end and output terminal, described in the described first input end electric property coupling of wherein said driver element, control node, described second input end of described driver element is used for receiving second frequency signal, and the described output terminal of described driver element is used for exporting gate drive signal at the corresponding levels, wherein said first frequency signal and described second frequency signal are anti-phase; And
Drop-down unit, comprises:
The first switch, has first end, the second end with control end, and the described control end of wherein said the first switch is used for receiving described first frequency signal, and the described control end of the first switch described in the described first end electric property coupling of described the first switch;
Second switch, has first end, the second end and control end, and the described control end of wherein said second switch is electrically connected the described control end of described the first switch, and the described first end of described second switch is electrically connected the described first end of described the first switch;
The 3rd switch, there is first end, the second end and control end, the described control end of wherein said the 3rd switch is used for receiving described prime gate drive signal, described second end of the first switch described in the described first end electric property coupling of described the 3rd switch, and described second end of described the 3rd switch is used for receiving the first voltage;
The 4th switch, there is first end, the second end and control end, the described control end of wherein said the 4th switch is used for receiving described prime gate drive signal, described second end of second switch described in the described first end electric property coupling of described the 4th switch, and described second end of described the 4th switch is used for receiving described the first voltage;
The 5th switch, there is first end, the second end with control end, described second end of second switch described in the described control end electric property coupling of wherein said the 5th switch, described in the described first end electric property coupling of described the 5th switch, control node node processed, and the described output terminal of driver element described in the described second end electric property coupling of described the 5th switch; And
The 6th switch, there is first end, the second end and control end, described second end of second switch described in the described control end electric property coupling of wherein said the 6th switch, the described output terminal of driver element described in the described first end electric property coupling of described the 6th switch, and described second end of described the 6th switch is used for receiving described the first voltage.
9. gate drivers as claimed in claim 8, is characterized in that, wherein said input block comprises:
Minion is closed, there is first end, the second end and control end, the described first input end of input block described in the described control end electric property coupling that wherein said minion is closed, and the described control end that described in the described first end electric property coupling of described minion pass, minion is closed; And
The 8th switch, there is first end, the second end and control end, described second input end of input block described in the described control end electric property coupling of wherein said the 8th switch, described the second end that described in the described first end electric property coupling of described the 8th switch, minion is closed, and the described output terminal of input block described in the described second end electric property coupling of described the 8th switch.
10. gate drivers as claimed in claim 8, is characterized in that, wherein said driver element comprises:
Minion is closed, there is first end, the second end and control end, the described first input end of driver element described in the described control end electric property coupling that wherein said minion is closed, described second input end of driver element described in the described first end electric property coupling that described minion is closed, and the described output terminal of driver element described in described the second end electric property coupling of closing of described minion; And
Electric capacity, is electrically coupled between the described control end of described minion pass and described second end of described minion pass.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103112319 | 2014-04-02 | ||
| TW103112319A TWI521490B (en) | 2014-04-02 | 2014-04-02 | Display panel and gate driver |
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| CN104008738A true CN104008738A (en) | 2014-08-27 |
| CN104008738B CN104008738B (en) | 2016-10-19 |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN104008738B (en) | 2016-10-19 |
| TWI521490B (en) | 2016-02-11 |
| TW201539407A (en) | 2015-10-16 |
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