CN108318803A - Chip single particle radiation test method, device, system and database building method - Google Patents
Chip single particle radiation test method, device, system and database building method Download PDFInfo
- Publication number
- CN108318803A CN108318803A CN201810086328.8A CN201810086328A CN108318803A CN 108318803 A CN108318803 A CN 108318803A CN 201810086328 A CN201810086328 A CN 201810086328A CN 108318803 A CN108318803 A CN 108318803A
- Authority
- CN
- China
- Prior art keywords
- test
- chip
- vector
- measured
- vectors compression
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a kind of chip single particle radiation test method, device, system and database building methods, belong to irradiation technical field of measurement and test.The single particle radiation test method, including:Test instruction is obtained, and according to the Test Vectors Compression file identification for including in the test instruction, corresponding Test Vectors Compression file is extracted from Test Vectors Compression document data bank;The Test Vectors Compression file of extraction is unziped it, determines test vector and the corresponding outputting standard value of test vector;According to the determining test vector, to drive chip to be measured, make the corresponding real output value of the chip output test vector to be measured;The corresponding outputting standard value of the test vector is compared with real output value, the single particle radiation test result as chip to be measured.This method can cover the irradiation test test of all chips, and versatility is high.
Description
Technical field
The invention belongs to irradiate technical field of measurement and test, more particularly to a kind of chip single particle radiation test method, device
And system.
Background technology
The irradiation of cosmic ray from the external space can seriously affect the electronics device in all kinds of spacecrafts of outer space motion
Part, and then threaten the safety in orbit of spacecraft.Because of the effects such as single-particle inversion caused by radiation so that deposited on spacecraft
The content of reservoir is likely to occur small probability mistake, and this mistake can influence the operation of system.Once system operation is collapsed, various aspects
The loss brought has no way of estimating.In order to simulate the environment of the external space, the heavy ion stream bombardment generated on the ground with accelerator waits for
Chip is surveyed, the effects such as single-particle inversion is formed and carries out relevant test assessment and analysis.
In the test of commercial chip, there is the automatic test machine platform of a large amount of all kinds of models, but in irradiation is tested not
Laboratory may be moved into.Current irradiation experiment system is completed to treat generally by cable joint test room and monitoring room
Survey chip controls work.But cable is both dangerous too much to be not easy to safeguard, and be easily damaged, it is next difficult for the positioning belt of problem
Degree.
The attribute function of chip 10,000,000 to be measured, different chips is different, if test system is testing a new core
A large amount of development of manpower input is still required for when piece, the reusability of that system will have a greatly reduced quality, and not only reduce reliability, but also
Cause exploitation waste.
Patent No. 201310724722.7 discloses a kind of SRAM type FPGA single particle irradiation test survey in the prior art
Test system and method, Patent No. 201410706041.2 disclose a kind of single particle radiation experimental test based on jtag interface
System and method, wherein all include test FPGA array, but above-mentioned test system is unable to test function chip, sophisticated functions core
Sector-meeting is related to software-development function setting and various agreement topological structures etc., and FPGA only needs to configure code stream, due to surveying
It is diversiform chip to try object, small to 74 logical series chips, greatly to 8 or 32 8-digit microcontroller chips, or place
Manage device chip, when needing to test different functional chips, the prior art cannot annex test, can only for specific chip into
Row test, i.e., a kind of single particle radiation test system can only detect a kind of chip, poor universality.
Invention content
The purpose of the present invention is to provide a kind of unitized chip single particle radiation test method, apparatus and system, energy
The irradiation test test of all chips is enough covered, versatility is high.
To achieve the above object, the present invention provides the following technical solutions:
A kind of chip single particle radiation test method is executed in test control end, including:
Obtain test instruction, and according to it is described test instruction in include Test Vectors Compression file identification, from test to
Corresponding Test Vectors Compression file is extracted in amount compressed file database;
The Test Vectors Compression file of extraction is unziped it, determines that test vector and test vector are corresponding defeated
Go out standard value;
According to the determining test vector, to drive chip to be measured, the chip output test vector to be measured is made to correspond to
Real output value;
The corresponding outputting standard value of the test vector is compared with real output value, determines the simple grain of chip to be measured
Son irradiation test result.
Include at least two groups Test Vectors Compression file identification in the test instruction in an alternative embodiment;
Corresponding Test Vectors Compression file is extracted in the document data bank from Test Vectors Compression, including:Respectively from
The corresponding at least two groups of at least two groups Test Vectors Compression file identification are extracted in Test Vectors Compression document data bank to survey
Try vector compression file;
The Test Vectors Compression file of described pair of extraction unzips it, including:Described at least two groups to extraction
Test Vectors Compression file unzips it respectively.
In an alternative embodiment, the Test Vectors Compression file identification includes first address and the end for reading data
Location.
It is described to compare the corresponding outputting standard value of the test vector with real output value in an alternative embodiment
After relatively, further include:
It obtains test result and transfers instruction, and according to the single particle radiation survey transferred instruction and send the chip to be measured
Test result.
A kind of chip single particle radiation test method is executed in main control end, including:
Test instruction is sent, includes Test Vectors Compression file identification in the test instruction, so that test control end
According to the Test Vectors Compression file identification, corresponding Test Vectors Compression is extracted from Test Vectors Compression document data bank
File, and the Test Vectors Compression file of extraction is unziped it, determine that test vector and test vector are corresponding defeated
Go out standard value, to according to the determining test vector, to drive chip to be measured, make the chip output test vector to be measured
Corresponding real output value, the test control end carry out the corresponding outputting standard value of the test vector and real output value
Compare, determines the single particle radiation test result of chip to be measured.
A kind of method for building up of Test Vectors Compression document data bank, including:
The the first logic difference and the second logic difference of each test vector of computing chip obtain the of each test vector
One logic variance data stream and the second logic variance data stream, wherein the first logic difference be the test vector adjacent
Logic difference in period, the second logic difference are the corresponding outputting standard value of the test vector in adjacent periods
Logic difference;
The first logic variance data stream and the second logic variance data stream to each test vector carry out compressed encoding
Processing obtains the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip, so that test control end
According to Test Vectors Compression file identification, corresponding Test Vectors Compression is extracted from the Test Vectors Compression document data bank
File, and the Test Vectors Compression file of extraction is unziped it, determine that test vector and test vector are corresponding defeated
Go out standard value, according to the determining test vector, to drive chip to be measured, the chip output test vector to be measured is made to correspond to
Real output value, to make the test control end by the corresponding outputting standard value of the test vector and real output value into
Row compares, and determines the single particle radiation test result of chip to be measured.
A kind of chip single particle radiation test device, in test control end, including:
Control unit, for obtaining test instruction, and according to the Test Vectors Compression file for including in the test instruction
Mark, extracts corresponding Test Vectors Compression file from Test Vectors Compression document data bank;
Decompression units unzip it for the Test Vectors Compression file to extraction, determine test vector and survey
The corresponding outputting standard value of examination vector;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output to be measured
The corresponding real output value of test vector;
Comparing unit is determined for the corresponding outputting standard value of the test vector to be compared with real output value
The single particle radiation test result of chip to be measured.
Include at least two groups Test Vectors Compression file identification in the test instruction in an alternative embodiment;
Described control unit, for extracted from Test Vectors Compression document data bank respectively at least two groups test to
It measures compressed file and identifies corresponding at least two groups Test Vectors Compression file;
The decompression units, the Test Vectors Compression file extracted for described Dui unzip it, including:To carrying
Test Vectors Compression file described in at least two groups taken unzips it respectively.
In an alternative embodiment, the Test Vectors Compression file identification includes first address and the end for reading data
Location.
In an alternative embodiment, the chip single particle radiation test device further includes:
Instruction acquisition unit is transferred, transfers instruction for obtaining test result, and transfer described in instruction transmission according to described
The single particle radiation test result of chip to be measured.
A kind of chip single particle radiation test device, in main control end, including:
Instruction sending module is tested, includes Test Vectors Compression text in the test instruction for sending test instruction
Part identifies, so that test control end is according to the Test Vectors Compression file identification, from Test Vectors Compression document data bank
Corresponding Test Vectors Compression file is extracted, and the Test Vectors Compression file of extraction is unziped it, determines test
The corresponding outputting standard value of vector sum test vector, to make institute according to the determining test vector to drive chip to be measured
State the corresponding real output value of chip output test vector to be measured, the test control end is by the corresponding output of the test vector
Standard value is compared with real output value, determines the single particle radiation test result of chip to be measured.
A kind of Test Vectors Compression document data bank establishes device, including:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains described
First logic variance data stream of each test vector and the second logic variance data stream, wherein the first logic difference is described
Logic difference of the test vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector
Logic difference in adjacent periods;
Coding unit, for the first logic variance data stream and the second logic variance data stream to each test vector
Compressed encoding processing is carried out, the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip is obtained, with
Make test control end according to Test Vectors Compression file identification, is extracted from the Test Vectors Compression document data bank corresponding
Test Vectors Compression file, and the Test Vectors Compression file of extraction is unziped it, determine test vector and test
The corresponding outputting standard value of vector, to drive chip to be measured, makes the chip output to be measured according to the determining test vector
The corresponding real output value of test vector, to make the test control end by the corresponding outputting standard value of the test vector with
Real output value is compared, and determines the single particle radiation test result of chip to be measured.
A kind of chip single particle radiation test system, including master controller and test controller, wherein:
The master controller includes test instruction sending module, for sending test instruction, institute to the test controller
It includes Test Vectors Compression file identification to state in test instruction;
The test controller includes:
Control unit, for obtaining test instruction, and according to the Test Vectors Compression file for including in the test instruction
Mark, extracts corresponding Test Vectors Compression file from Test Vectors Compression document data bank;
Decompression units unzip it for the Test Vectors Compression file to extraction, determine test vector and survey
The corresponding outputting standard value of examination vector;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output to be measured
The corresponding real output value of test vector;
Comparing unit, for the corresponding outputting standard value of the test vector to be compared with real output value, as
The single particle radiation test result of chip to be measured.
In an alternative embodiment, the chip single particle radiation tests system, further includes Test Vectors Compression file
Database establishes device, including:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains described
First logic variance data stream of each test vector and the second logic variance data stream, wherein the first logic difference is described
Logic difference of the test vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector
Logic difference in adjacent periods;
Coding unit, for the first logic variance data stream and the second logic variance data stream to each test vector
Compressed encoding processing is carried out, the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip is obtained.
In an alternative embodiment, the test controller further includes high-speed memory chip, for storing the test
Vector compression document data bank.
In an alternative embodiment, the master controller and test controller are integrated on one piece of pcb board, and the system is also
Including chip mounting board to be measured, for carrying the chip to be measured, the chip mounting board to be measured passes through row with the pcb board
Needle, the female connection of row.
The present invention includes at least following advantageous effect:
(1) the single particle radiation test method of chip provided in an embodiment of the present invention, by establishing Test Vectors Compression text
Part database needs to select fc-specific test FC vector compression file from database according to test, and according to the test vector of selection
Compressed file determines test vector and its corresponding outputting standard value, and single particle radiation is carried out to chip with determining test vector
Test experiments, this method allows same memory space to preserve more test vectors by compression, by establising or updating
Database can cover the irradiation test of all chips, and versatility is high;
It (2), can be by passing through simultaneously by including at least two groups Test Vectors Compression file identification in being instructed in test
For different test vectors to chip into row energization, while the different function of test chip further improves testing efficiency.
Description of the drawings
Fig. 1 is a kind of single particle radiation test method flow chart of chip provided in an embodiment of the present invention;
Fig. 2 is a kind of method for building up flow chart of Test Vectors Compression document data bank provided in an embodiment of the present invention;
Fig. 3 is the frame principles structural schematic diagram of a specific embodiment of the invention;
Fig. 4 is the control principle structural schematic diagram of a specific embodiment of the invention.
Specific implementation mode
The advantages of to make technical solution of the present invention, is clearer, is done specifically to the present invention with reference to the accompanying drawings and examples
It is bright.
Referring to Fig. 1, an embodiment of the present invention provides a kind of chip single particle radiation test methods, are held in test control end
Row, including:
Step 101:Test instruction, and the Test Vectors Compression file identification for including in being instructed according to the test are obtained,
Corresponding Test Vectors Compression file is extracted from Test Vectors Compression document data bank;
Specifically, in the embodiment of the present invention, test control end includes programmable logic chip, in other embodiments, is surveyed
Examination control terminal can also be CPLD (Complex Programmable Logic Device) Complex Programmable Logic Devices,
Can be the dedicated IC chip that other are customized, test vector is the pumping signal for test module, the present invention
Test Vectors Compression file includes test vector and its corresponding outputting standard value in embodiment, and the outputting standard value is normal
The output signal that chip generates under test vector excitation;Test Vectors Compression file can pass through regular file compression method
Compression obtains;The Test Vectors Compression document data bank includes different test vectors and its corresponding outputting standard value;
In an alternative embodiment, the Test Vectors Compression file identification includes first address and the end for reading data
Location determines starting and final position when reading data from database, with standard according to the first address and end address of reading data
Really extraction Test Vectors Compression file;
Step 102:The Test Vectors Compression file of extraction is unziped it, determines test vector and test vector
Corresponding outputting standard value;
In the embodiment of the present invention, compressed file can be decompressed by conventional decompressing method;
Step 103:According to the determining test vector, to drive chip to be measured, make the chip output test to be measured
The corresponding real output value of vector;
Step 104:The corresponding outputting standard value of the test vector is compared with real output value, determines core to be measured
The single particle radiation test result of piece.
Chip single particle radiation test method provided in an embodiment of the present invention, by establishing Test Vectors Compression file data
Library needs to select fc-specific test FC vector compression file from database according to test, and according to the Test Vectors Compression of selection text
Part determines test vector and its corresponding outputting standard value, and it is real to carry out single particle radiation test to chip with determining test vector
It tests, this method allows same memory space to preserve more test vectors by compression, by establising or updating database
The irradiation test of all chips can be covered, versatility is high.
Include at least two groups Test Vectors Compression file identification in the test instruction in an alternative embodiment;It is described
Corresponding Test Vectors Compression file is extracted from Test Vectors Compression document data bank, including:Respectively from Test Vectors Compression
The corresponding at least two groups Test Vectors Compression text of at least two groups Test Vectors Compression file identification is extracted in document data bank
Part;The Test Vectors Compression file of described pair of extraction unzips it, including:Tested described at least two groups to extraction to
Amount compressed file unzips it respectively.It, can by including at least two groups Test Vectors Compression file identification in being instructed in test
With by simultaneously by different test vectors to chip into row energization, while the different function of test chip further increases
Testing efficiency.
It is described to compare the corresponding outputting standard value of the test vector with real output value in an alternative embodiment
After relatively, further include:
It obtains test result and transfers instruction, and according to the single particle radiation survey transferred instruction and send the chip to be measured
Test result.
Get transfer instruction before test result can be stored, retransmit test when receiving the when of transferring instruction
As a result, checking test result at any time convenient for tester.
The embodiment of the present invention additionally provides a kind of chip single particle radiation test method, is executed in main control end, including:
Test instruction is sent, includes Test Vectors Compression file identification in the test instruction, so that test control end
According to the Test Vectors Compression file identification, corresponding Test Vectors Compression is extracted from Test Vectors Compression document data bank
File, and the Test Vectors Compression file of extraction is unziped it, determine that test vector and test vector are corresponding defeated
Go out standard value, to according to the determining test vector, to drive chip to be measured, make the chip output test vector to be measured
Corresponding real output value, the test control end carry out the corresponding outputting standard value of the test vector and real output value
Compare, determines the single particle radiation test result of chip to be measured.
In the present embodiment, the preferred microprocessor of main control end can also select other to have in other embodiments
The processor of communication function, the present invention do not limit;The test control end executes the above-mentioned survey executed in test control end
Method for testing is specifically described referring to above-described embodiment, and details are not described herein.
In an alternative embodiment, the test instruction includes the control instruction at least two test control ends, with same
When control at least two test control ends different chips tested, further improve testing efficiency.
The embodiment of the present invention additionally provides a kind of method for building up of Test Vectors Compression document data bank, including:
Step 301:The the first logic difference and the second logic difference of each test vector of computing chip, obtain each test
Vector the first logic variance data stream and the second logic variance data stream, wherein the first logic difference be it is described test to
The logic difference in adjacent periods is measured, the second logic difference is the corresponding outputting standard value of the test vector adjacent
Logic difference in period;
Specifically, each test vector of chip to be measured can be generated in the embodiment of the present invention by simulation software;It can lead to
It crosses and the logic difference in adjacent periods is obtained to the test vector progress xor operation of adjacent clock cycle, due to most of pipe
The logical value of foot does not change in two adjacent periods, in the data flow obtained after xor operation, including a large amount of " 0 ",
Only a small number of " 1 ";Similarly, the logic difference of the corresponding outputting standard value of the test vector is determined;
Step 302:The first logic variance data stream and the second logic variance data stream to each test vector carry out
Compressed encoding processing, obtains the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip.
Specifically, preferably first the logic variance data stream and outputting standard value are carried out in the embodiment of the present invention
Run length encoding (RLE) codings carry out Golomb-Rice code (GR) codings again, to ensure test vector
And corresponding outputting standard value is with about 10:1 compression ratio is compressed, to be transferred to solution in time under given memory bandwidth
In code unit, the high efficiency of decompression algorithm so that test rate has obtained effective guarantor when testing more complicated chip
Card.
Test Vectors Compression document data bank provided in this embodiment is used for said chip single particle radiation test method, with
Make test control end according to Test Vectors Compression file identification, is extracted from the Test Vectors Compression document data bank corresponding
Test Vectors Compression file, and the Test Vectors Compression file of extraction is unziped it, determine test vector and test
The corresponding outputting standard value of vector, to drive chip to be measured, makes the chip output to be measured according to the determining test vector
The corresponding real output value of test vector, to make the test control end by the corresponding outputting standard value of the test vector with
Real output value is compared, and determines the single particle radiation test result of chip to be measured.
It specifically describes referring to the above-mentioned irradiation test method executed in test control end, details are not described herein.
The embodiment of the present invention additionally provides a kind of chip single particle radiation test device, and in test control end, feature exists
In, including:
Control unit, for obtaining test instruction, and according to the Test Vectors Compression file for including in the test instruction
Mark, extracts corresponding Test Vectors Compression file from Test Vectors Compression document data bank;
Decompression units unzip it for the Test Vectors Compression file to extraction, determine test vector and survey
The corresponding outputting standard value of examination vector;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output to be measured
The corresponding real output value of test vector;
Comparing unit is determined for the corresponding outputting standard value of the test vector to be compared with real output value
The single particle radiation test result of chip to be measured.
Include at least two groups Test Vectors Compression file identification in the test instruction in an alternative embodiment;
Described control unit, for extracted from Test Vectors Compression document data bank respectively at least two groups test to
It measures compressed file and identifies corresponding at least two groups Test Vectors Compression file;
The decompression units, the Test Vectors Compression file extracted for described Dui unzip it, including:To carrying
Test Vectors Compression file described in at least two groups taken unzips it respectively.
Specifically, the Test Vectors Compression file identification includes the first address and end address for reading data.
Further, the single particle radiation test device of the chip further includes:
Instruction acquisition unit is transferred, transfers instruction for obtaining test result, and transfer described in instruction transmission according to described
The single particle radiation test result of chip to be measured.
The device embodiment is corresponded with the embodiment of the method executed in test control end, is specifically described referring to method reality
Example is applied, details are not described herein.
The embodiment of the present invention additionally provides a kind of single particle radiation test device of chip, in main control end, including:
Instruction sending module is tested, includes Test Vectors Compression text in the test instruction for sending test instruction
Part identifies, so that test control end is according to the Test Vectors Compression file identification, from Test Vectors Compression document data bank
Corresponding Test Vectors Compression file is extracted, and the Test Vectors Compression file of extraction is unziped it, determines test
The corresponding outputting standard value of vector sum test vector, to make institute according to the determining test vector to drive chip to be measured
State the corresponding real output value of chip output test vector to be measured, the test control end is by the corresponding output of the test vector
Standard value is compared with real output value, determines the single particle radiation test result of chip to be measured.
The present embodiment is corresponding with the above-mentioned embodiment of the method executed in main control end, and specific descriptions are implemented referring to the above method
Example, details are not described herein.
The embodiment of the present invention additionally provides a kind of device of establishing of Test Vectors Compression document data bank, including:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains described
First logic variance data stream of each test vector and the second logic variance data stream, wherein the first logic difference is described
Logic difference of the test vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector
Logic difference in adjacent periods;
Coding unit, for the first logic variance data stream and the second logic variance data stream to each test vector
Compressed encoding processing is carried out, the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip is obtained, with
Make test control end according to Test Vectors Compression file identification, is extracted from the Test Vectors Compression document data bank corresponding
Test Vectors Compression file, and the Test Vectors Compression file of extraction is unziped it, determine test vector and test
The corresponding outputting standard value of vector, to drive chip to be measured, makes the chip output to be measured according to the determining test vector
The corresponding real output value of test vector, to make the test control end by the corresponding outputting standard value of the test vector with
Real output value is compared, the single particle radiation test result as chip to be measured.
The embodiment and the method for building up embodiment of above-mentioned Test Vectors Compression document data bank correspond, and specifically describe
Referring to above method embodiment, details are not described herein.
The embodiment of the present invention additionally provides a kind of chip single particle radiation test system, including master controller and testing and control
Device, wherein:
The master controller includes test instruction sending module, for sending test instruction, institute to the test controller
It includes Test Vectors Compression file identification to state in test instruction;
The test controller includes:
Control unit, for obtaining test instruction, and according to the Test Vectors Compression file for including in the test instruction
Mark, extracts corresponding Test Vectors Compression file from Test Vectors Compression document data bank;
Decompression units unzip it for the Test Vectors Compression file to extraction, determine test vector and survey
The corresponding outputting standard value of examination vector;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output to be measured
The corresponding real output value of test vector;
Comparing unit, for the corresponding outputting standard value of the test vector to be compared with real output value, as
The single particle radiation test result of chip to be measured.
Specifically, in the embodiment of the present invention master controller and test controller used respectively by above-mentioned in main control end and survey
Try the particle irradiation test device composition of control terminal;
Further, the single particle radiation test system of the chip further includes Test Vectors Compression document data bank
Device is established, the device of establishing includes:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains described
First logic variance data stream of each test vector and the second logic variance data stream, wherein the first logic difference is described
Logic difference of the test vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector
Logic difference in adjacent periods;
Coding unit, for the first logic variance data stream and the second logic variance data stream to each test vector
Compressed encoding processing is carried out, the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip is obtained.
Further, the test controller preferably further includes high-speed memory chip, for storing the test vector
Compressed file database, in order to rapid extraction data.
In an alternative embodiment, the master controller and test controller are integrated on one piece of pcb board, and the system is also
Including chip mounting board to be measured, for carrying the chip to be measured, the chip mounting board to be measured passes through row with the pcb board
Needle, the female connection of row, so that the chip to be measured is connect with the test controller, by by master controller and test controller collection
On Cheng Yi block pcb boards, the communication connection of test controller and chip to be measured is realized by mounting plate, reduces the body of system
Product, is readily transported and stores.
Further, the single particle radiation test system of chip provided in an embodiment of the present invention can also include that can monitor can
The power supply module of configuration, the power supply module are connect with the master controller, and for powering to each component, the power supply module is excellent
Choosing is integrated in the master controller and test controller on one piece of pcb board.
It is the specific embodiment of the present invention below:
Ginseng is seen figures 3 and 4, and the present embodiment provides a kind of single particle radiations based on compression and decompression to test system comprising
Three daughter boards (chip mounting board to be measured), three test controllers (test controller 1, test controller 2 and test controllers
3), main control module PI (master controller) and power supply module, test controller, main control module PI and power supply module pass through row
Needle, row mother are connected on motherboard, and on daughter board, daughter board is connect with test controller by arranging needle, arranging mother chip carrying to be measured, real
It is now connected with the test controller electric signal, the test controller is connected with main control module PI communications.
Include programmable logic chip and high-speed memory chip in the test controller, chip to be measured is by arranging needle
Multiple signal pins are drawn, the programmable logic chip is connected to.Motherboard provides power supply and ground, daughter board by arranging needle to daughter board
It needs to power to it according to chip to be measured.Test Vectors Compression file is read in by the ddr interface of the programmable logic chip
To inside the programmable logic chip, test vector is output to chip to be measured by decompression, output while is also receiving
The output signal for monitoring chip to be measured compares chip output measured value with standard value.If the output signal of chip to be measured occurs
Abnormal, the programmable logic chip records abnormal conditions, and by providing protocol report to the main control module PI.
The main control module PI is a single-borad computer based on microprocessor;The module is by interface to test controller
It sends out instruction or collects data;The module is by regulation bus marco power supply module and acquires current monitoring data;The module contains
There is Ethernet interface, in indoor experimenter is monitored, main control module can be logged on to by laptop and Ethernet
And running experiment control software.
The power supply module receives laboratory external voltage input, is convertible into multiple-channel output voltage, meets variety classes
The needs of chip to be measured are respectively equipped with switch and current monitoring per road voltage output, total by providing by special sampling A/D chip
Line reports current indication to main control module.It can be with the power supply feelings of real-time control and understanding system in indoor experimenter is monitored
Condition.
The programmable logic chip in the test controller includes controller circuitry (control unit), decompression units
(including input buffer module, decoding circuit module, test vector buffer module), comparator module (comparing unit) and output
Buffer module;The temporary compressed test vector of process read from the high-speed memory chip of input buffer module (is surveyed
Try vector compression file);Then it is decompressed by decoding circuit module, and the data after decompression is written to test vector and are delayed
Die block;The test vector buffer module by after the document analysis after decompression, obtain pin data output control signal OE,
The window open signal that the level signal data (including test vector and corresponding outputting standard value) and data of pin compare
The level signal data of the data output control signal OE of pin, pin are transferred to chip to be measured to drive described wait for by mask
Chip is surveyed, the window open signal mask that the level signal data and data of pin compare is transferred to the comparator module;
By the level and standard value of comparator module chip reality output more to be measured, if the two is not met, will will work as
Preceding clock cycle serial number and error value are saved in the output buffer module.It is corresponding for the input pin of chip to be measured
The level signal data of the pin level specified is output to by data output control signal OE values 1, test vector buffer module
Chip to be measured, meanwhile, the corresponding window open signal mask values 0 of the pin close comparing function.For the defeated of chip to be measured
Go out pin, corresponding OE signals value 0, test vector buffer module is by level signal data (the corresponding outputting standards of pin
Value) send comparator, mask signals value 1 to.
The single particle radiation based on compression and decompression of the present embodiment tests the control method of system comprising following step
Suddenly:
S1:The test vector of chip to be measured and corresponding outputting standard value are generated using simulation software, executes compression control
Logic compresses it to obtain Test Vectors Compression document data bank;
In the present embodiment, the simulation software includes the product of three big mainstream companies, such as the VCS works of Synopsys companies
Tool, the NCsim tools of Cadence companies, Mentor companies questasim tools.
S2:Test Vectors Compression document data bank will be obtained to be deposited into the high-speed memory chip of testing control module,
Test start after, corresponding Test Vectors Compression file by the programmable logic chip physics realization in testing control module height
Fast memory interface enters in decoder module FPGA, is specifically read into institute by the ddr interface of the programmable logic chip
It states inside test controller;
S3:The Test Vectors Compression file is decompressed in the test controller, drives chip to be measured;
S4:The test controller obtains the output signal of the chip to be measured after test vector drives;
S5:Compare the output signal and standard value, obtain testing result, store and exports to main control module.
The compression control logic in the step S1 includes the following steps:
S11:Compression starts;
S12:Compression pretreatment, test vector and corresponding outputting standard value to the adjacent clock cycle carry out distance
Operation calculates the logic difference in adjacent periods, since the logical value of most of pin does not have in two adjacent periods
Change, in the data flow obtained after xor operation, including a large amount of " 0 ", only a small number of " 1 ";
S13:Run length encoding (RLE) are carried out to the data flow of step S12 outputs to encode;
S14:Golomb-Rice code (GR) are carried out to the data flow of step S13 outputs to encode;
S15:Compressed encoding processing is completed.
The control method of the main control module PI includes the following steps:
S201:Each BANK content is initialized;
S202:By data from the DDR2 for copying test controller in main control module microprocessor;
S203:The first address for reading data when test into each BANK is set;
S204:The end address for reading data when test into each BANK is set;
S205:By DDR2 data copies to the corresponding First Input First Output in each channel;
S206:The full test period is set;
S207:Start to test.
Main control module PI described in the present embodiment uses spi communications protocol with test controller communication, instructs lattice
Formula is as shown in table 1.
1 main control module PI of table and testing control module FPGA communication instruction format tables
2bit | 6bit | 32bit | 32bit |
Read and write symbol | Order symbol | Address symbol | Data symbols |
By taking CMD_MEM_START_ADDR orders as an example, order can configure multiple autonomous channels and read data from ddr
Initial address.Spi includes 8 order of the bit+32 data of+32 bit address, and channel number information is placed in 32 bit address by order, will be risen
Beginning address information is placed in 32 data.
Again by taking ddr is written as an example, state machine redirects in CMD_MEM_WR_ADDR orders control testing control module, empty
For not busy state transition to write address state, write address completion jumps back to idle state.Spi includes+32 bit address of 8 order of the bit+32
Data.Address information drives ddr control interface signals after being latched, and the address is written before writing bursty data.Under burst mode
It needs first to write the addresses MEM, then data is written.Write-in data can disposably write the data in a channel;Idle state redirects
To data mode is write, jumped to after writing write data latency state waiting write data command next time;It jumps out and writes data mode
It needs to write and cease and desist order.Such as:The last one data of data ... the .. of write address -- first data -- second.By flexible
Instruction, main control module PI can control the progress entirely tested well.
In the present embodiment, in RTL simulating, verifyings, the input of chip circuit to be measured, output waveform are recorded, as
Test vector and corresponding outputting standard value are stored in memory, and FPGA test circuits read in test vector, in each test
In period, chip to be measured is written into test vector, reads chip signal output, and make comparisons with outputting standard value.
The above, best specific implementation mode only of the invention, but scope of protection of the present invention is not limited thereto,
Any one skilled in the art in the technical scope disclosed by the present invention, the change or replacement that can be readily occurred in,
It should be covered by the protection scope of the present invention.
The content that description in the present invention is not described in detail belongs to the known technology of professional and technical personnel in the field.
Claims (16)
1. a kind of chip single particle radiation test method is executed in test control end, which is characterized in that including:
Test instruction is obtained, and according to the Test Vectors Compression file identification for including in the test instruction, from test vector pressure
Corresponding Test Vectors Compression file is extracted in contracting document data bank;
The Test Vectors Compression file of extraction is unziped it, determines test vector and the corresponding output mark of test vector
Quasi- value;
According to the determining test vector, to drive chip to be measured, make the corresponding reality of the chip output test vector to be measured
Border output valve;
The corresponding outputting standard value of the test vector is compared with real output value, determines the single-particle spoke of chip to be measured
According to test result.
2. chip single particle radiation test method according to claim 1, which is characterized in that include in the test instruction
At least two groups Test Vectors Compression file identification;
Corresponding Test Vectors Compression file is extracted in the document data bank from Test Vectors Compression, including:Respectively from test
Extracted in vector compression document data bank the corresponding at least two groups of at least two groups Test Vectors Compression file identification test to
Measure compressed file;
The Test Vectors Compression file of described pair of extraction unzips it, including:It is tested described at least two groups to extraction
Vector compression file unzips it respectively.
3. chip single particle radiation test method according to claim 1, which is characterized in that the Test Vectors Compression text
Part mark includes reading the first address and end address of data.
4. chip single particle radiation test method according to claim 1, which is characterized in that described by the test vector
After corresponding outputting standard value is compared with real output value, further include:
It obtains test result and transfers instruction, and according to the single particle radiation test knot transferred instruction and send the chip to be measured
Fruit.
5. a kind of chip single particle radiation test method is executed in main control end, which is characterized in that including:
Send test instruction, the test instruct in include Test Vectors Compression file identification so that test control end according to
The Test Vectors Compression file identification extracts corresponding Test Vectors Compression text from Test Vectors Compression document data bank
Part, and the Test Vectors Compression file of extraction is unziped it, determine test vector and the corresponding output of test vector
Standard value, to according to the determining test vector, to drive chip to be measured, make the chip output test vector pair to be measured
The real output value answered, the test control end compare the corresponding outputting standard value of the test vector with real output value
Compared with determining the single particle radiation test result of chip to be measured.
6. a kind of method for building up of Test Vectors Compression document data bank, which is characterized in that including:
The the first logic difference and the second logic difference of each test vector of computing chip, obtain each test vector first are patrolled
Volume variance data stream and the second logic variance data stream, wherein the first logic difference is the test vector in adjacent periods
Interior logic difference, the second logic difference are logic of the corresponding outputting standard value of the test vector in adjacent periods
Difference;
The first logic variance data stream and the second logic variance data stream to each test vector carry out compressed encoding processing,
The Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip is obtained, so that test control end is according to survey
Vector compression file identification is tried, corresponding Test Vectors Compression file is extracted from the Test Vectors Compression document data bank,
And the Test Vectors Compression file of extraction is unziped it, determine test vector and the corresponding outputting standard of test vector
Value, according to the determining test vector, to drive chip to be measured, makes the corresponding reality of the chip output test vector to be measured
Output valve, to make the test control end compare the corresponding outputting standard value of the test vector with real output value
Compared with determining the single particle radiation test result of chip to be measured.
7. a kind of chip single particle radiation test device, in test control end, which is characterized in that including:
Control unit tests the Test Vectors Compression file identification for including in instruction for obtaining test instruction, and according to described,
Corresponding Test Vectors Compression file is extracted from Test Vectors Compression document data bank;
Decompression units are unziped it for the Test Vectors Compression file to extraction, determine test vector and test to
Measure corresponding outputting standard value;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output test to be measured
The corresponding real output value of vector;
Comparing unit determines to be measured for the corresponding outputting standard value of the test vector to be compared with real output value
The single particle radiation test result of chip.
8. chip single particle radiation test device according to claim 7, which is characterized in that include in the test instruction
At least two groups Test Vectors Compression file identification;
Described control unit, for extracting at least two groups test vector pressure from Test Vectors Compression document data bank respectively
The corresponding at least two groups Test Vectors Compression file of contracting file identification;
The decompression units, the Test Vectors Compression file extracted for described Dui unzip it, including:To extraction
Test Vectors Compression file described at least two groups unzips it respectively.
9. chip single particle radiation test device according to claim 7, which is characterized in that the Test Vectors Compression text
Part mark includes reading the first address and end address of data.
10. chip single particle radiation test device according to claim 7, which is characterized in that further include:
Instruction acquisition unit is transferred, transfers instruction for obtaining test result, and instruct transmission described to be measured according to described transfer
The single particle radiation test result of chip.
11. a kind of chip single particle radiation test device, in main control end, which is characterized in that including:
Instruction sending module is tested, includes Test Vectors Compression files-designated in the test instruction for sending test instruction
Know, so that test control end is extracted according to the Test Vectors Compression file identification from Test Vectors Compression document data bank
Corresponding Test Vectors Compression file, and the Test Vectors Compression file of extraction is unziped it, determine test vector
Outputting standard value corresponding with test vector, to according to the determining test vector, to drive chip to be measured, make described wait for
Survey the corresponding real output value of chip output test vector, the test control end is by the corresponding outputting standard of the test vector
Value is compared with real output value, determines the single particle radiation test result of chip to be measured.
12. a kind of Test Vectors Compression document data bank establishes device, which is characterized in that including:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains each survey
The the first logic variance data stream and the second logic variance data stream of vector are tried, wherein the first logic difference is the test
Logic difference of the vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector in phase
Logic difference in the adjacent period;
Coding unit, for being carried out to the first logic variance data stream of each test vector and the second logic variance data stream
Compressed encoding processing, obtains the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip, so as to survey
Control terminal is tried according to Test Vectors Compression file identification, corresponding test is extracted from the Test Vectors Compression document data bank
Vector compression file, and the Test Vectors Compression file of extraction is unziped it, determine test vector and test vector
Corresponding outputting standard value, to drive chip to be measured, makes the chip output test to be measured according to the determining test vector
The corresponding real output value of vector, to make the test control end by the corresponding outputting standard value of the test vector and reality
Output valve is compared, and determines the single particle radiation test result of chip to be measured.
13. a kind of chip single particle radiation tests system, which is characterized in that including master controller and test controller, wherein:
The master controller includes test instruction sending module, for sending test instruction, the survey to the test controller
Include Test Vectors Compression file identification in examination instruction;
The test controller includes:
Control unit tests the Test Vectors Compression file identification for including in instruction for obtaining test instruction, and according to described,
Corresponding Test Vectors Compression file is extracted from Test Vectors Compression document data bank;
Decompression units are unziped it for the Test Vectors Compression file to extraction, determine test vector and test to
Measure corresponding outputting standard value;
Transmission unit, for according to the determining test vector, to drive chip to be measured, making the chip output test to be measured
The corresponding real output value of vector;
Comparing unit, for the corresponding outputting standard value of the test vector to be compared with real output value, as to be measured
The single particle radiation test result of chip.
14. chip single particle radiation according to claim 13 tests system, which is characterized in that further include test vector pressure
Contracting document data bank establishes device, including:
Computing unit is used for the first logic difference and the second logic difference of each test vector of computing chip, obtains each survey
The the first logic variance data stream and the second logic variance data stream of vector are tried, wherein the first logic difference is the test
Logic difference of the vector in adjacent periods, the second logic difference are the corresponding outputting standard value of the test vector in phase
Logic difference in the adjacent period;
Coding unit, for being carried out to the first logic variance data stream of each test vector and the second logic variance data stream
Compressed encoding processing, obtains the Test Vectors Compression document data bank of each Test Vectors Compression file comprising chip.
15. wanting the chip single particle radiation described in 13 to test system according to right, which is characterized in that the test controller also wraps
High-speed memory chip is included, for storing the Test Vectors Compression document data bank.
16. wanting the chip single particle radiation described in 13 to test system according to right, which is characterized in that the master controller and test
Controller is integrated on one piece of pcb board, and the system also includes chip mounting boards to be measured, for carrying the chip to be measured, institute
Chip mounting board to be measured is stated to connect by arranging needle, arranging mother with the pcb board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810086328.8A CN108318803A (en) | 2018-01-30 | 2018-01-30 | Chip single particle radiation test method, device, system and database building method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810086328.8A CN108318803A (en) | 2018-01-30 | 2018-01-30 | Chip single particle radiation test method, device, system and database building method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN108318803A true CN108318803A (en) | 2018-07-24 |
Family
ID=62888026
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810086328.8A Pending CN108318803A (en) | 2018-01-30 | 2018-01-30 | Chip single particle radiation test method, device, system and database building method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108318803A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109633421A (en) * | 2018-11-27 | 2019-04-16 | 珠海欧比特宇航科技股份有限公司 | A kind of test method of SOC chip, device, equipment and storage medium |
CN110376504A (en) * | 2019-06-27 | 2019-10-25 | 福州瑞芯微电子股份有限公司 | One kind is about IC high pressure lesion mimic system and method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102141951A (en) * | 2010-11-25 | 2011-08-03 | 华为技术有限公司 | Chip simulation system and method |
CN103728553A (en) * | 2013-12-31 | 2014-04-16 | 万高(杭州)科技有限公司 | Method for verifying electric energy measuring chip |
CN104049204A (en) * | 2013-03-11 | 2014-09-17 | 中兴通讯股份有限公司 | System-on-chip chip test method, device and system |
CN104656009A (en) * | 2015-02-25 | 2015-05-27 | 上海华岭集成电路技术股份有限公司 | Method for storing test vectors in test machine |
CN106707144A (en) * | 2017-01-16 | 2017-05-24 | 电子科技大学 | Reverse analysis method for test vector of anti-fuse FPGA (Field Programmable Gate Array) |
-
2018
- 2018-01-30 CN CN201810086328.8A patent/CN108318803A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102141951A (en) * | 2010-11-25 | 2011-08-03 | 华为技术有限公司 | Chip simulation system and method |
CN104049204A (en) * | 2013-03-11 | 2014-09-17 | 中兴通讯股份有限公司 | System-on-chip chip test method, device and system |
CN103728553A (en) * | 2013-12-31 | 2014-04-16 | 万高(杭州)科技有限公司 | Method for verifying electric energy measuring chip |
CN104656009A (en) * | 2015-02-25 | 2015-05-27 | 上海华岭集成电路技术股份有限公司 | Method for storing test vectors in test machine |
CN106707144A (en) * | 2017-01-16 | 2017-05-24 | 电子科技大学 | Reverse analysis method for test vector of anti-fuse FPGA (Field Programmable Gate Array) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109633421A (en) * | 2018-11-27 | 2019-04-16 | 珠海欧比特宇航科技股份有限公司 | A kind of test method of SOC chip, device, equipment and storage medium |
CN110376504A (en) * | 2019-06-27 | 2019-10-25 | 福州瑞芯微电子股份有限公司 | One kind is about IC high pressure lesion mimic system and method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10929260B2 (en) | Traffic capture and debugging tools for identifying root causes of device failure during automated testing | |
US20190353696A1 (en) | Smart and efficient protocol logic analyzer configured within automated test equipment (ate) hardware | |
CN110291588B (en) | Self-test controller and method for controlling self-test | |
CN104820637B (en) | A kind of hand-held USB3.0 protocol analyzers | |
CN105738854A (en) | Simulation memory test board system for intelligent ammeter embedded application and test method | |
CN202693754U (en) | Device used for testing analogue integrated circuit and component | |
US10203371B2 (en) | Methods and systems for generating functional test patterns for manufacture test | |
US11828787B2 (en) | Eye diagram capture test during production | |
CN203260029U (en) | System chip prototype verification debugging device based on field programmable gate array (FPGA) | |
CN107643506A (en) | A kind of verification system of universal full automatic electric energy meter calibrating installation | |
CN108318803A (en) | Chip single particle radiation test method, device, system and database building method | |
CN109061446A (en) | A kind of test method and system of single-ended port transmission chip | |
US20130111268A1 (en) | Testing device capable of simulating plugging and unplugging operations and method thereof | |
CN113204456A (en) | Test method, tool, device and equipment for VPP interface of server | |
CN109491854B (en) | SoC prototype verification method based on FPGA | |
CN106200623B (en) | The semi-physical simulation test device of reactor core measuring system logic module | |
CN210665952U (en) | Integrated circuit chip test system | |
CN116735981A (en) | Digital integrated circuit radiation effect in-situ test system and test method | |
CN104678292B (en) | A kind of complex programmable logic device (CPLD) test method and device | |
CN110444247A (en) | Store the test device of equipment write error error correcting capability | |
KR102229416B1 (en) | Method and Apparatus for Compressing Memory Test Data | |
CN206451035U (en) | A kind of satellite control system ground checkout equipment automates combined adjuster | |
CN205942434U (en) | Reactor core measurement system logic modules's semi -physical simulation testing arrangement | |
CN211318672U (en) | Fault diagnosis system for multiport network nonlinear analog circuit | |
CN101071394A (en) | Inter-board transparent transmission bus test device and method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180724 |