CN108292637A - 多基准集成式散热器（ihs）解决方案 - Google Patents

多基准集成式散热器（ihs）解决方案 Download PDF

Info

Publication number
CN108292637A
CN108292637A CN201680068468.1A CN201680068468A CN108292637A CN 108292637 A CN108292637 A CN 108292637A CN 201680068468 A CN201680068468 A CN 201680068468A CN 108292637 A CN108292637 A CN 108292637A
Authority
CN
China
Prior art keywords
ihs
tim
blocks
layers
chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201680068468.1A
Other languages
English (en)
Other versions
CN108292637B (zh
Inventor
A.乔德胡里
J.比蒂
P.乔德哈里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of CN108292637A publication Critical patent/CN108292637A/zh
Application granted granted Critical
Publication of CN108292637B publication Critical patent/CN108292637B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H01L21/4882—Assembly of heatsink parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
    • H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/278—Post-treatment of the layer connector
    • H01L2224/27848—Thermal treatments, e.g. annealing, controlled cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29016—Shape in side view
    • H01L2224/29018—Shape in side view comprising protrusions or indentations
    • H01L2224/29019—Shape in side view comprising protrusions or indentations at the bonding interface of the layer connector, i.e. on the surface of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2902—Disposition
    • H01L2224/29021—Disposition the layer connector being disposed in a recess of the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2902—Disposition
    • H01L2224/29022—Disposition the layer connector being at least partially embedded in the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H01L2224/29082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H01L2224/29083—Three-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29113—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29116—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29118—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/2912—Antimony [Sb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29149—Manganese [Mn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29157—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/2916—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29164—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29169—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29171—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29172—Vanadium [V] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29176—Ruthenium [Ru] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/2918—Molybdenum [Mo] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29181—Tantalum [Ta] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29184—Tungsten [W] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29187—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H01L2224/32058—Shape in side view being non uniform along the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8321—Applying energy for connecting using a reflow oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/8382—Diffusion bonding
    • H01L2224/83825—Solid-liquid interdiffusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92222—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92225—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/1579—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H01L2924/16153—Cap enclosing a plurality of side-by-side cavities [e.g. E-shaped cap]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal
    • H01L2924/164—Material
    • H01L2924/1659—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

描述了帮助冷却半导体封装（诸如多芯片封装（MCP））的方法、系统和装置。一种半导体封装包括衬底上的部件。该部件可以包括一个或多个半导体管芯。该封装还可以包括多基准集成式散热器（IHS）解决方案（也被称为智能IHS解决方案），在这里该智能IHS解决方案包括智能IHS盖。该智能IHS盖包括在智能盖的中心区域中形成的腔。该智能IHS盖可以在部件上，以使得该腔对应于该部件。第一热界面材料层（TIM层1）可以在部件上。单独IHS盖（IHS块）可以在TIM层1上。该IHS块可以被插入腔中。此外，中间热界面材料层（TIM‑1A层）可以在IHS块和腔之间。

Description

多基准集成式散热器（IHS）解决方案
技术领域
本文中描述的实施例总体上涉及半导体封装，并且具体地涉及用于冷却半导体封装的方法、系统和装置。
背景技术
一种类型的半导体封装是多芯片半导体封装或多芯片封装（MCP），其是具有封装到衬底上的多个部件——例如集成电路（IC）、半导体管芯或其他分立部件的电子封装。可以使用三维（3D）封装技术来形成MCP，该三维（3D）封装技术通过以垂直配置堆叠半导体管芯来利用z高度维度以使得结果得到的在x-y维度中的MCP占用空间更小。由3D封装技术创建的封装的示例包括封装上封装（PoP）解决方案、封装中封装（PiP）解决方案、嵌入式晶圆级（eWLB）封装等等。
集成式散热器（IHS）解决方案可以用在MCP中从而耗散由MCP的部件产生的不需要的热量。在MCP中堆叠管芯的一个缺点在于MCP中的部件的z高度可能变化，这可能通过增加不需要的热量产生而对MCP的性能能力有负面影响。由于部件高度中的这些变化，典型的集成式散热器（IHS）解决方案不能有效工作。图1A-1B图示这个问题。
图1A是包括典型IHS解决方案的典型MCP 100的横截面视图。如在图1A中示出的，部件103和104，它们中的每一个都可以包括（一个或多个）半导体管芯，处在衬底101上。在MCP 100中，典型IHS解决方案被用于由部件103和104产生的不需要的热量的耗散。该典型IHS解决方案包括典型IHS盖102、部件104上的第一热界面材料层（TIM-1层）105、和部件103上的TIM-1层106。使用密封剂（未被示出）将典型IHS盖102的侧壁区域附接至衬底101，以使得该典型IHS盖102在部件103和104之上。该TIM-1层105和106分别将部件104和103热和/或机械耦合至典型IHS盖102的中心区域。
该部件103和104具有彼此变化的z高度，它们被统称为高度变化。具体来说，因为部件104具有比部件103更大的z高度，所以发生这种高度变化。这种高度变化可以包括用于创建部件103和104的制造工艺中固有的自然高度变化。不管用于制造部件103的制造工艺与用于制造部件104的制造工艺相同还是不同，都会发生自然高度变化。影响部件103和104的对高度变化的另一贡献因素可能起因于用来将部件103和104附接至衬底101的附接机制或技术。例如，如果部件103表示经由球栅阵列（BGA）组装（未被示出）安装在衬底101上的管芯，而部件104表示直接附接至衬底101的管芯，则在部件103和部件104的z高度之间会存在一些差异。
除了它们的热耗散功能之外，TIM-1层105和TIM-1层106被用来补偿这种高度变化。如在图1A中示出的，TIM-1层106比TIM-1层105更厚以补偿部件高度差。补偿影响部件103和104的高度变化以增加TIM-1层106和105的z高度或接合线厚度（BLT）为代价而发生。然而，TIM-1层106和105的更厚的BLT降低了TIM-1层106和105的冷却能力，这进而导致更高的芯片结温度（Tj）、有限带宽、频率、更大的功率泄漏等等。另外，高度变化由TIM-1层105和106的吸收可以限制被用于形成TIM-1层105和106的TIM-1材料的选择。
目前，形式为典型三维IHS解决方案（典型3D IHS解决方案）的架构IHS解决方案可以避免增加TIM-1层的BLT。不过，这种典型3D IHS解决方案不能补救上面结合图1A描述的典型IHS解决方案的缺点。
图1B是具有用于耗散由部件123和124产生的热量的典型3D IHS解决方案的典型MCP 150的横截面视图。这种典型3D IHS解决方案包括典型IHS盖122、部件123上的TIM-1层126、部件124上的TIM-1层125、TIM-1层126上的铜（Gu）箔127、TIM-1层125上的Cu箔131、Cu箔127上的中间热界面材料层（TIM-1A层）129、和Cu箔131上的TIM-1A层133。在图1B中，Cu箔127和131使用TIM-1A层129和133分别耦合至典型IHS盖122。Cu箔和TIM-1A层的每个相应组合充当针对其相应部件的单独IHS解决方案。该TIM-1层126的BLT基本上等于TIM-1层125的BLT。此外，Cu箔127的z高度基本上等于Cu箔131的z高度。因此，影响部件123和124的高度变化分别被TIM-1A层129和133吸收。如在图1B中示出的，TIM-1A层129的BLT比TIM-1A层133的BLT更大。因此，影响部件123和124的高度变化从TIM-1层126和125分别转移至TIM-1A层129和133。TIM-1A层129和133的BLT中的增加导致它们的冷却能力的降低。因此，典型3D IHS解决方案仅仅将与TIM-1层的BLT相关联的问题转移至TIM-1A层的BLT。
此外，Cu箔127和131通常需要在x-y维度上是部件123和124的若干倍。因此，典型3D IHS解决方案是受限的，因为它需要具有大x-y尺寸的阻进区（keep-out zone）来耗散不需要的热量。
附图说明
在附图的各图中通过示例而不是限制来图示本文中描述的实施例，在附图中相似的参考标记指示类似的特征。此外，在各图中，已经省略了一些常规细节以便不使本文中描述的发明的概念模糊。
图1A是包括典型集成式散热器（IHS）解决方案的典型MCP的横截面视图。
图1B是包括典型三维（3D）IHS解决方案的典型MCP的横截面视图。
图2A-2B图示根据至少一个实施例的智能（smart）IHS盖的横截面侧视图。
图2C图示根据一个实施例的包括多基准集成式散热器（IHS）解决方案或智能IHS解决方案的半导体封装的横截面侧视图。
图2D图示根据另一实施例的包括智能IHS解决方案的半导体封装的横截面侧视图。
图2E图示根据至少一个实施例的包括智能IHS解决方案和热沉的半导体封装的横截面侧视图。
图3是根据一个实施例的形成智能IHS盖的方法的工艺流程图示。
图4是根据一个实施例的形成包括智能IHS解决方案的半导体封装的方法的工艺流程图示。
图5A-5G是根据一个实施例的形成包括智能IHS解决方案的半导体封装的方法的横截面侧视图图示。
图6A-6G是根据另一实施例的形成包括智能IHS解决方案的半导体封装的方法的横截面侧视图图示。
图7是根据另一实施例的形成包括智能IHS解决方案的半导体封装的方法的工艺流程图示。
图8是根据一个实施例的利用包括智能IHS解决方案的半导体封装的计算机系统的示意性框图的图示。
具体实施方式
本文中描述的实施例提供可以帮助改进用于半导体封装（诸如多芯片封装（MCP））的集成式散热器（IHS）解决方案的方法、系统和装置。
对于一个方面，实施例将多基准集成式散热器（IHS）解决方案或智能IHS解决方案集成到MCP中以改进由MCP的一个或多个部件产生的不需要的热量的热耗散。
对于一个实施例，“多基准集成式散热器解决方案”、“多基准IHS解决方案”、“智能集成式散热器解决方案”、“智能IHS解决方案”以及它们的变体指代包括以下部件中的每一个的架构解决方案：（i）由导热材料形成的智能IHS盖，在这里该智能IHS盖具有在智能IHS盖的中心区域中形成的至少一个腔；（ii）要在半导体封装（例如MCP等等）的至少一个部件上的至少一个TIM层1；（iii）要在至少一个TIM-1层上并插入智能IHS盖的至少一个腔中的由导热材料形成的至少一个单独IHS盖（IHS块（slug））；以及（iv）要在至少一个IHS块上和/或在智能IHS盖的至少一个腔中分层放置（layer）的至少一个TIM-1A层。对于一个备选实施例，智能IHS解决方案包括上面描述的部件中的至少一个。对于一个实施例，该智能IHS解决方案是将热量从热源（例如半导体封装（例如MCP等等）的一个或多个部件）传递至次热交换器（例如热沉、周围环境等等）的热交换器。对于一个实施例，在智能IHS盖中形成的腔的侧壁包围TIM-1层上的IHS块的侧壁以使得IHS块的至少一部分被插入腔中。此外，并且对于智能IHS解决方案的一个实施例，TIM-1A层在智能IHS盖的腔和插入该腔中的IHS块之间。
智能IHS解决方案的使用可以以下面的方式帮助由半导体封装（例如MCP等等）的一个或多个部件产生的不需要的热量的耗散：（i）IHS块可以帮助减轻影响封装的部件的功率不均匀性的影响；（ii）在智能IHS盖的至少一个腔和至少一个IHS块之间使用TIM-1A层可以帮助通过TIM-1A层耦合来自IHS块的热量，这可以进而增加热传递的面积；（iii）智能IHS盖和至少一个IHS块的组合可以被设计成具有最小重叠面积和热性能，这可以有效地减轻接合线厚度（BLT）变化；（iv）智能IHS解决方案可能能够帮助增加半导体封装（例如MCP等等）的性能（与上面结合图1A-1B描述的典型IHS解决方案相比）；（v）智能IHS解决方案可以与要求封装部件之间的紧密间距的密集封装架构一起使用；（v）智能IHS解决方案可以与当前可得到的制造技术一起使用，这可以帮助降低制造成本；以及（vii）智能IHS解决方案可以利用材料中的当前和/或将来的改进，因为智能IHS解决方案是一种架构解决方案（与基于材料的解决方案相对）。
对于一个实施例，一种半导体封装包括衬底上的部件。对于一个实施例，该封装包括至少一个半导体管芯和智能集成式散热器（IHS）解决方案。对于另一实施例，该智能IHS解决方案包括智能IHS盖。对于一个实施例，该智能IHS盖包括在智能盖的中心区域中形成的腔。对于一个实施例，该智能IHS盖在该部件上，以使得该腔对应于该部件。对于一个实施例，该智能IHS解决方案还包括在部件上的第一热界面材料层（TIM层1）。对于另一实施例，该智能IHS解决方案还包括TIM-1层上的单独IHS盖（IHS块）。对于甚至另一实施例，该IHS块被插入智能IHS盖的腔中，在这里该腔的侧壁包围IHS块的侧壁的至少某部分。对于一个实施例，该智能IHS解决方案包括在IHS块和智能IHS盖的腔之间的中间热界面材料层（TIM-1A层）。
对于一个实施例，在将IHS块插入智能IHS盖的腔中之前在智能IHS解决方案的腔中形成该TIM-1A层。对于一个备选实施例，在将IHS块插入智能IHS盖的腔中之前该TIM-1A层在IHS块上。该TIM-1A层可以包括聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个。对于一个实施例，该智能IHS盖耦合至IHS块。例如，该智能IHS盖以热耦合或机械耦合中的至少一种耦合至IHS块。此外，该智能IHS盖可以利用密封剂机械耦合至衬底。
该封装可以包括智能IHS盖上的热沉，在这里该热沉利用智能IHS盖上的、热沉和智能IHS盖之间的第二热界面材料（TIM-2）层耦合至智能IHS盖。例如，该热沉以热耦合或机械耦合中的至少一种耦合至智能IHS盖。
图2A-2B图示根据至少一个实施例的智能IHS盖202的横截面侧视图。参考图2A，其示出具有在智能IHS盖202的中心区域中形成的至少一个腔的智能IHS盖 202。对于图2A中图示的具体实施例，该智能IHS盖202包括在智能IHS盖202的中心区域中形成的两个腔207和209。要认识到，本文中描述的智能IHS盖的实施例可以包括一个或多个腔——例如下面结合图2D描述的智能IHS盖232仅包括一个腔。
智能IHS盖202可以由导热材料（诸如金属）形成。例如，该智能IHS盖202可以由铜、铝、钢、镍、任何其他金属、金属合金、任何其他导电材料、或其任何组合中的至少一个来形成。腔207和209中的每一个都可以使用本领域中已知的技术来形成。例如，形成腔207和209包括使用如本领域中已知的激光钻孔、蚀刻、锻造、冲压或压铸（die-casting）中的至少一个来机械切割所述腔。腔207和209中的每一个都可以具有方形、长方形、圆形、椭圆形或对应于半导体封装的底层部件（在图2A-2B中没有示出）的任何其他形状。对于智能IHS盖202中的腔207和209中的每一个，其尺寸大于半导体封装（例如MCP等等）的底层部件（在图2A-2B中没有示出）的尺寸。对于一些实施例，腔207和209中的每一个的z高度小于或等于2000µm。对于一个实施例，腔207和209中的每一个的宽度和长度（即x-y尺寸）大于半导体封装（例如MCP等等）的底层部件（在图2A-2B中没有示出）的宽度和长度。对于一个实施例，智能IHS盖202中的腔207和209中的每一个都在部件之上居中。对于另一实施例，该智能IHS盖202的厚度大于腔207和209中的每一个的高度。对于一些实施例，该智能IHS解决方案的厚度大于2000µm。
参考图2B，该腔207包括在腔207的每个壁上形成的中间级热界面材料（TIM-1A）层211，并且腔209包括在腔209的每个壁上形成的TIM-1A层213。对于一些实施例，使智能IHS盖202的腔207和209分别分层放置有TIM-1A层211和213可以帮助耗散来自半导体封装的部件（在图2A-2B中没有示出）的热量，这可以进而帮助增加热传递的面积从而使来自半导体封装的热耗散最大化。如在图2B中示出的，腔207的平行于智能IHS盖202的顶部（或与该顶部共面）的顶壁具有带有范围在50 µm和450 µm之间的z高度的TIM-1A层211。此外，腔209的平行于智能IHS盖202的顶部（或与该顶部共面）的顶壁具有带有范围在50 µm和450 µm之间的z高度的TIM-1A层213。对于一个实施例，TIM-1A层211的厚度或接合线厚度（BLT）可以与TIM-1A层213的厚度或BLT不同。对于另一实施例，TIM-1A层211的厚度或BLT可以与TIM-1A层213的厚度或BLT相等或基本相等。
对于一个实施例，将TIM-1A层211和213沉积到相应腔207和209中。对于该实施例，被沉积的TIM-1A层211和213被固化和/或烘焙以将TIM-1A层211和213粘附至腔207和209的壁。对于一个备选实施例，在没有固化和/或烘焙的情况下，TIM-1A层211和213中的每一个都被沉积到相应腔207和209中。对于该备选实施例，由于被用于形成TIM-1A层211和213的（一个或多个）TIM的性质（例如化学性质、机械性质、磁性质等等），TIM-1A层211和213粘附至腔207和209的壁。
对于一个实施例，用于形成TIM-1A层211和213的每个TIM是呈现高热导率的材料——例如铜、银、金、氧化铍、铝、钨、锌、黄铜、和任何其他材料或本领域中已知呈现高热导率的材料的组合。对于一个实施例，TIM-1A层211和213中的每个的热导率的范围从2瓦每米开尔文（W/mK）至30 W/mK。对于另一实施例，TIM-1A层211和213中的每一个都包括以下各项中的至少一个：具有范围从2 W/mK至7 W/mK的热导率的聚合热界面材料（PTIM）、具有范围从10W/mK至20W/mK的热导率的环氧树脂、具有范围从5W/mK至15W/mK的热导率的液相烧结（LPS）膏、或具有范围从10W/mK至30W/mK的热导率的焊膏。
图2C图示根据至少一个实施例的包括智能IHS解决方案的半导体封装200的横截面侧视图。该封装200可以是多芯片封装（MCP）。要认识到，封装200不必须是MCP封装——例如封装200可以是单芯片封装。下面结合图2C描述的智能IHS盖202与上面结合图2A-2B中的至少一个描述的智能IHS盖202类似或相同。
参考图2C，封装200的一个实施例包括以下各项：（i）衬底201；（ii）部件203；（iii）部件204；（iv）部件204上的第一级热界面材料（TIM-1）层205；（v）部件203上的TIM-1层206；（vi）包括腔207和209的智能IHS盖202；（vii）TIM-1层206上的单独IHS盖（IHS块）297；（viii）TIM-1层205上的IHS块299；（ix）在腔207和IHS块297之间的中间级热界面材料（TIM-1A）层211；（x）在腔209和IHS块299之间的TIM-1A层213；以及（xi）密封剂217。
如在图2C中示出的，该封装200可以包括衬底201上的多个部件，诸如部件203和204。该部件203和204在衬底201上可以彼此邻近并且可以彼此间隔开。该部件203和204可以是有源和无源电子器件部件中的任一个——例如晶体管、存储器、电容器、电阻器、光电子器件、开关、互连、以及任何其他电子器件部件。对于一个实施例，该部件103和204中的至少一个包括存储器、处理器、平台控制器集线器（PCH）、外围部件互连（PCI）、图形处理单元（GPU）、片上系统构造、网络接口控制器、堆叠部件、非堆叠部件、球栅阵列（BGA）封装、任何其他电子部件或其任何组合。
该部件203和204可以具有相对于衬底201的表面的不同z高度。对于一个实施例，该部件203和204在衬底201上的z高度从400 µm至1170 µm。对于一个具体实施例，该部件203和204中的每一个都包括具有至少770µm的z高度的至少一个管芯。对于一个实施例，该部件203和204之间的高度差是至少400µm。影响部件203和204的高度变化可能可归因于如上面结合图1A-1B描述的一个或多个原因。
对于一个实施例，该部件203和204包括半导体管芯。对于一些实施例，该部件203和204中的至少一个是非堆叠管芯部件。对于其他实施例，该部件203和204中的至少一个是堆叠管芯部件。对于一些实施例，该部件203和204中的至少一个是管芯块体。每个管芯块体可以是堆叠管芯封装或非堆叠管芯封装。对于一个实施例，使用相同或类似制造工艺来制造该部件203和204。对于一个实施例，使用不同制造工艺来制造该部件203和204。对于一个实施例，该部件203和204彼此类似或相同——例如该部件203和204中的每一个是直接附接至衬底201的管芯。对于一个备选实施例，该部件203和204彼此不同，例如部件203可以是非堆叠管芯封装，而部件204是堆叠管芯封装。对于一些实施例，该部件203和204中的至少一个经由本领域中已知的任何附接机制或技术附接至衬底201——例如BGA衬底。
尽管图2C将封装200图示为仅具有两个部件（即部件203和204），但是封装200上的部件数目可以是至少一个部件。一般来说，在集成电路的上下文中的管芯是半导体材料的小块体，在其上制造了功能电路。通常，使用本领域中已知的光刻技术中的一个在电子级硅或其他半导体（例如砷化镓（“GaAs”））的晶圆上产生集成电路。
该晶圆通常被切割（“划片”）成许多片，每一片都包含电路的拷贝。这些片中的每一个都可以被称为管芯或芯片。可以使用本领域中已知的不同技术将该管芯安装在衬底（诸如衬底201）上。例如，可以使用引线接合、倒装芯片连接和本领域中已知的其他技术来执行将管芯安装在衬底201上。可以使用本领域中已知的任何技术将该管芯直接附接至衬底。对于一个实施例，该衬底201是在电子器件封装的底侧处的层压衬底。该衬底201可以具有将例如管芯至衬底接合布线和连接至衬底至球阵列接合的导电迹线。
对于一个实施例，该衬底201包括有机芯、树脂、填充物材料、铜、焊料环氧树脂底部填料、焊料或其组合。对于一些实施例，该衬底201是陶瓷衬底。对于其他实施例，该衬底201包括半导体材料——例如单晶硅（“Si”）、锗（“Ge”）、硅锗（“SiGe”）、III-V材料（诸如砷化镓（“GaAs”））、或其任何组合。对于一个实施例，该衬底201包括用于集成电路的金属化互连层。该衬底201可以包括电子器件——例如晶体管、存储器、电容器、电阻器、光电子器件、开关、以及通过电绝缘层分开的任何其他有源和无源电子器件。该绝缘层可以是层间介质、沟槽绝缘层、或电子器件制造领域中已知的任何其他绝缘层。对于一些实施例，该衬底201包括互连——例如被配置成连接金属化层的一个或多个通路。
该封装200可以包括各部件中的每一个上的TIM-1层。具体来说，TIM-1层206在部件203上并且TIM-1层205在部件204上。热界面材料（TIM）被用来促进从部件（例如部件203和/或204）至次热交换器（例如热沉、周围环境、其他次热交换器等等）的热传导。TIM可以帮助使界面热阻最小化。TIM-1层205和206中的每一个可以是高热导率粘附材料或金属合金中的至少一个。因此，被用来形成TIM-1层205和206的TIM通常是在预定操作温度下变成液态或几乎液态的高热导率材料。该TIM可以流动并填充表面粗糙，从而实现两个接触表面之间的热阻的降低。被用来制造TIM-1层205或206中的至少一个的TIM可以是基于金属的TIM、聚合物基质TIM、散热膏、或本领域中已知的任何其他TIM-1材料层中的至少一个。TIM-1层205或206中的至少一个可以是具有低熔点的金属合金。TIM-1层205或206中的至少一个可以是焊料热界面材料（“STIM”），诸如铟焊料TIM。对于一个实施例，TIM-1层205和206中的每一个是99.99%铟焊料。对于一个实施例，TIM-1层205或206中的至少一个是基于金属的合金层。例如，TIM-1层205和206中的一个或两者包括铟、锡、铅、银、锑、铋、锌、镉、金、铜、钌、镍、钴、铬、铁、锰、钛、铝、铪、钽、钨、钒、钼、钯、铂、或其任何组合中的至少一个。
对于一些实施例，将该TIM-1层205和206分别沉积在部件204和203上。可以使用本领域中已知的任何技术来执行TIM-1层的沉积。对于一个实施例，TIM-1层205的厚度或BLT可以与TIM-1层206的厚度或BLT不同。对于另一实施例，TIM-1层205的厚度或BLT可以与TIM-1层206的厚度或BLT相等或基本相等。对于一个实施例，该TIM-1层205和206具有单个预定的BLT。对于另一实施例，TIM-1层205和206中的每一个的最小厚度小于50µm。对于一些实施例，TIM-1层205和206中的每一个的厚度从约20µm至约50µm。对于一个实施例，TIM-1层205和206中的每一个是具有分别调整成部件203和204上的（一个或多个）管芯的形状的预定形状的TIM-1预型件（preform）。可以使用例如真空工具将该TIM-1预型件放置在部件203和204中的任一个的顶表面上。可以使用本领域中已知的技术中的一个（例如通过冲压等等）来制造TIM-1预型件。对于一个实施例，使用本领域中已知的任何适合的工具来将TIM-1预型件放置在管芯上。
该封装200还可以包括分别在TIM-1层206和205上的多个单独IHS盖（IHS块）297和299。对于一个实施例，将IHS块297和299分别沉积在TIM-1层206和205上。对于一个实施例，IHS块297在z方向上的厚度可以与IHS块299在z方向上的厚度不同。对于另一实施例，IHS块297在z方向上的厚度可以与IHS块299在z方向上的厚度相等或基本相等。
对于一个实施例，该IHS块297具有至少与部件203的x-y尺寸（即长度和宽度）相同的x-y尺寸（即长度和宽度），并且该IHS块299具有至少与部件204的x-y尺寸相同的x-y尺寸。例如，该IHS块297具有与部件203（其可以是管芯或管芯堆叠）相同的长度和相同的宽度。对于一个实施例，IHS块297和IHS块299中的每一个都具有小于或等于2000 µm的高度（即z高度）。对于还有的另一实施例，IHS块297和IHS块299中的每一个都具有范围从500µm至2000µm的高度（即z高度）。对于另一实施例，该IHS块297具有大于部件203的x-y尺寸（即长度和宽度）的x-y尺寸（即长度和宽度），并且该IHS块299具有大于部件204的x-y尺寸的x-y尺寸。
如在图2C中示出的，该IHS块297和299被包括在封装200中以分别耗散由部件203和204生成的热量。这可以帮助减轻部件203的（一个或多个）管芯和部件204的（一个或多个）管芯中的功率不均匀性的影响。对于一些实施例，该IHS块297和299中的每一个都是铜板、铝板、由高导热材料制成的任何其他板、或其组合。对于一些实施例，该IHS块297和299中的每一个都具有调整成其相应部件的尺寸的区域尺寸。例如，该IHS块297具有调整成部件203的尺寸的尺寸。该IHS块297和299可以分别具有方形、长方形、圆形、椭圆形或对应于底层部件203和204的任何其他形状。该IHS块297和299中的每一个都可以充当使热量在热源（例如部件203和204）和智能IHS盖202之间移动的第一热交换器，其较大的表面积和几何形状更适合于从封装200移除总的热量。由热源（例如部件203和204）产生的热量被IHS块297和299“散开”，从而允许智能IHS盖202增加封装200的热容量。
仍参考图2C，封装200还可以包括智能HIS盖202，其包括腔207和209，在这里TIM-1A层211在腔207和IHS块297之间，并且在这里TIM-1A层213在腔209和IHS块299之间。图2C的智能IHS盖202与上面结合图2B描述的智能202类似或相同。可以从智能IHS盖202与目前可得到的IHS盖（诸如上面结合图1A-1B描述的IHS盖102或IHS 122）的比较看到智能IHS盖202的优点中的一个。半导体封装中的部件可变性可以增加用来将目前可得到的IHS盖（例如IHS盖102或IHS盖122）耦合至半导体封装的部件的TIM-1层的接合线厚度（BLT）。这可以造成TIM-1层的热阻随着TIM层116的厚度的增加而增加。照此，较薄的TIM-1层（诸如具有固定z高度的TIM-1层205和206）可以更有效地耗散来自半导体封装的部件的热量。除了归因于TIM-1层的附加厚度而添加的热阻之外，TIM-1层的所需厚度的可变性限制材料的选择。例如，许多垫型TIM-1层材料可能不可充分压缩以适应所需的尺寸可变性。另外，一些导热膏材料可能缺少所需的热导率，特别是在x-y维度需要相对厚的TIM-1层的情况下。
本文中描述的智能IHS盖202的一个或多个实施例可以帮助减少或减轻与目前可得到的IHS盖相关联的问题中的一些。对于一个实施例，当智能IHS盖202的腔207和209被填充有TIM-1A层211和213时，与IHS块297和299组合来使用智能IHS盖202以帮助改进从部件203和204的热耗散。下面的描述解释可以如何使用智能IHS盖202、IHS块297和299、腔207和209以及TIM-1A层211和213来提供本文中描述的优点中的一个或多个。为了简洁起见，将仅描述IHS块297、腔207和TIM-1A层211。要认识到，下面的描述还适用于IHS块299、腔209以及TIM-1A层213。
仍参考图2C，可以将IHS块297插入腔207中，以使得TIM-1A层211包封IHS块297。换句话说，并且对于一个实施例，腔211的侧壁包围IHS块297的侧壁以使得IHS块297的至少一部分被插入腔207中。以这种方式，该腔207实现在智能IHS盖202和IHS块297之间的一些重叠的存在。对于一个实施例，腔207的x尺寸、y尺寸或z尺寸比IHS块297的对应x尺寸、对应y尺寸或对应z尺寸更大使得IHS块297能够被插入腔207中，以使得TIM-1A层211包封IHS块297。对于第一示例，腔207具有比IHS块297的x-y尺寸更大的x-y尺寸使得IHS块297能够被插入腔207中，以使得TIM-1A层211包封IHS块297。对应第二示例，该腔207具有比IHS块297的z尺寸更大的z尺寸使得IHS块297能够被插入腔207中，以使得TIM-1A层211包封IHS块297。
如在图2C中示出的，该TIM-1A层211包封IHS块297。如在本文中使用的，“包封”以及其变体不要求IHS块的所有表面都被包在TIM-1A层内。对于一个实施例，IHS块297被TIM-1A层211的包封使得能够改进通过TIM-1A层211的热耗散。此外，该包封可以使得部件203的z高度中的任何变化都能够被IHS块297或TIM-1A层211中的至少一个吸收。例如，如果腔207具有2000 µm的固定z高度，TIM-1层206具有50 µm的固定z高度并且部件203具有400 µm至1170 µm的可变z高度，则IHS块297可以具有500 µm至2000 µm的可变z高度或者TIM-1A层207可以具有50 µm至450µm的可变z高度。因此，可以通过调整IHS块297的z高度或TIM-1A层211的z高度中的至少一个来吸收部件203的z高度中的任何变化。通过将IHS块297放置在腔207内部而创建的重叠可以帮助减小TIM-1层206的BLT或TIM-1A层211的BLT中的至少一个，这可以进而帮助使界面热阻最小化，这可以通过图2C中示出的智能IHS解决方案进一步帮助改进热耗散。对于一个实施例，IHS块297被TIM-1A层211的包封使得：部件203的z高度中的任何变化在不被IHS块297吸收的情况下能够被TIM-1A层211吸收。对于另一实施例，IHS块297被TIM-1A层211的包封使得部件203的z高度中的任何变化在不被TIM-1A层211吸收的情况下能够被IHS块297吸收。
对于一个实施例，并且关于图2C，当将IHS块297和299分别转移到TIM-1层206和205上时，施加力来确保TIM-1层206和205中的每一个的接合线厚度（BLT）被最小化。该力的施加可以帮助确保TIM-1层206和205中的每一个的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。对于一个实施例，并且关于图2C，当将智能IHS盖202转移到IHS块297和299上时，向智能IHS盖202施加力来确保TIM-1A层207和209中的每一个的BLT被最小化。该力的施加可以帮助确保TIM-1A层207和209中的每一个的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。
该智能IHS盖202可以经由密封剂217耦合至衬底201。对于一个实施例，将密封剂217分发在智能IHS盖202的周界处，其中接触区域受智能IHS盖202的（在x-y维度上的）占用空间的区域限制。该占用空间区域的尺寸以及其位置受封装设计考虑（诸如但不限于部件203和204的位置和衬底201的尺寸）驱动。对于一些实施例，该密封剂217可以在智能IHS盖202和衬底201之间提供某一级的热耦合；然而该密封剂217的主要目的是在智能IHS盖202和衬底201之间提供结构或机械连接。该密封剂217可以是作为导热材料的密封粘附材料。导热材料是本领域中已知的。如本领域中已知的，该密封剂217还可以由基于硅树脂或环氧树脂的密封剂材料制成。对于一个实施例，夹子和/或密封剂-粘附剂可以被用作用来将智能IHS盖202粘附至衬底201的密封剂217。
图2D图示根据一个实施例的包括智能IHS解决方案的半导体封装225的横截面侧视图。图2D中示出的封装225类似于上面结合图2C描述的封装200。为了简洁起见，下面将结合图2D仅描述封装225和封装200之间的差异。
该封装225的智能IHS解决方案包括智能IHS盖232、部件213和TIM-1层216。该智能IHS盖232可以与上面结合图2A-2C中的至少一个描述的智能IHS盖202类似。对于一个实施例，并且如在图2D中图示的，智能IHS盖232仅包括一个腔209，上面结合图2A-2C中的至少一个也描述了它。在该封装225中，部件213与上面结合图2C描述的部件203类似；然而，部件213具有比部件204（上面结合图2C描述了它）更大的z高度。
如在图2D中示出的，将TIM-1层216沉积在部件213上。该TIM-1层216与上面结合图2C描述的TIM-1层216类似；然而，TIM-1层216在部件213上以将智能IHS盖232耦合至部件213。例如，该智能IHS盖232以热耦合或机械耦合中的至少一种耦合至部件213。
对于一些实施例，将（上面结合图2C描述的）TIM-1层216和TIM-1层205分别沉积在部件213和204上。可以使用本领域中已知的任何技术来执行TIM-1层的沉积。对于一个实施例，TIM-1层216的厚度或BLT与TIM-1层205的厚度或BLT相等或基本相等。对于另一实施例，TIM-1层216的厚度或BLT与TIM-1层205的厚度或BLT不同。对于一个实施例，该TIM-1层216和205具有单个预定的BLT。对于一个实施例，TIM-1层216和205中的每一个的最小厚度小于50µm。对于一些实施例，TIM-1层216和205中的每一个的厚度从约20µm至约50µm。对于一个实施例，TIM-1层216和205中的每一个是具有分别调整成部件213和204上的（一个或多个）管芯的形状的预定形状的TIM-1预型件。可以使用例如真空工具来将该TIM-1预型件放置在部件216和205中的任一个的顶表面上。可以使用本领域中已知的技术中的一个——例如通过冲压来制造TIM-1预型件。对于一个实施例，使用本领域中已知的任何适合工具来将TIM-1预型件放置在管芯上。
该封装225的智能IHS解决方案示出由部件213和204的不同z高度造成的z高度变化可以使用至少一个腔（例如腔209）来解决影响封装的部件的z高度变化。因此，对于一些实施例，封装（例如封装225）可以包括针对其部件中的一些（例如部件204）的智能IHS解决方案的一个或多个实施例，而将其他架构解决方案（例如仅TIM-1层216）用于其他部件（例如部件213）。因此，如所需要的，本文中描述的智能IHS解决方案的实施例可以与其他IHS解决方案组合，例如，在图2C或2D中示出的智能IHS解决方案可以与典型IHS解决方案（诸如上面结合图1A-1B中的至少一个描述的典型IHS解决方案中的任一个）组合。要认识到，与本文中没有描述的其他IHS解决方案的组合也是可能的。
现在参考图2E，图示了根据一些实施例的包括智能IHS解决方案和热沉215的半导体封装250的横截面侧视图。图2E中示出的智能IHS解决方案与上面结合图2C或2D中的至少一个描述的智能IHS解决方案类似或相同。对于一个实施例，该封装250与上面结合图2C或2D中的至少一个描述的封装中的至少一个类似或相同。为了简洁，下面结合图2E仅描述封装250和图2C-2D中示出的封装之间的差异。
封装250和图2C-2D中示出的封装之间的一个差异在于封装250包括热沉215和第二热界面材料（TIM-2）层295，如在图2E中示出的。对于一个实施例，该热沉215经由TIM-2层295耦合至智能IHS盖202。例如，该热沉215以热耦合或机械耦合中的至少一种耦合至智能IHS盖202。对于一个实施例，并且关于图2E，当将热沉215转移到智能IHS盖202上时，向热沉215施加力来确保TIM-2层295的BLT被最小化。该力的施加可以帮助确保TIM-2层295的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。
该热沉215例如通过传导、转换和/或辐射来使热量进一步远离连接至智能IHS盖202的部件203和204而耗散。该热沉215的热质量通常比部件203和204以及智能IHS盖202的热质量更大。该热沉215通常由高导热材料（例如铜、铝、其他导热金属、或其任何组合）制成。对于一个实施例，将该热沉215安装在智能IHS盖202上以提供与部件203和/或204的（一个或多个）半导体管芯的热接触。
对于图2C-2E中的每一个，并且对于一个实施例，在烘箱中固化或烘焙用来形成TIM-1层205和206的热界面材料（TIM）、用来形成TIM-1A层211和213的TIM、用来形成TIM-2层295的TIM、和用来组装MPS 200或MPS 300的任何其他材料，以将相应的层粘附至部件203和205、IHS块297和299、以及智能IHS盖202中的相应一个。对于一些实施例，该烘焙温度从约150 ºC至约200 ºC。
图3是根据一个实施例的形成智能IHS盖的方法300的工艺流程图示。对于一个实施例，工艺300在框301处开始，在该框301中在智能IHS盖中形成一个或多个腔。对于一个实施例，根据上面结合图2A或2B中的至少一个而提供的描述来形成智能IHS盖的一个或多个腔。
在框303处，将TIM-1A材料沉积在智能IHS盖的一个或多个腔的每一个中以在各腔中的每一个内部形成TIM-1A层。对于一个实施例，使用本领域中已知的沉积技术来执行TIM-1A材料的沉积。对于一个实施例，该TIM-1A材料包括以下各项中的至少一个：具有范围从2 W/mK至7 W/mK的热导率的聚合热界面材料（PTIM）、具有范围从10W/mK至20W/mK的热导率的环氧树脂、具有范围从5W/mK至15W/mK的热导率的液相烧结（LPS）膏、或具有范围从10W/mK至30W/mK的热导率的焊膏。例如，沉积在腔中的TIM-1A材料是具有范围从2 W/mK至7W/mK的热导率的下一代聚合热界面材料（NGPTIM）。对于一个实施例，根据上面结合图2A-2D提供的描述中的至少一个来形成TIM-1A层。
工艺300继续进行至可选框305，在这里固化或烘焙被沉积的TIM-1A层以将TIM-1A层粘附至各腔中的每一个的壁（如果需要的话）。如上面结合图2A-2B解释的，固化和/或烘焙不总是必要的，因为用来在一个或多个腔中形成TIM-1A层的TIM可以具有使得能够在没有固化和/或烘焙的情况下形成TIM-1A层的性质。对于一个实施例，该TIM-1A层充当不需要符合由TIM-1A层包封IHS块的界面。对于一个实施例，智能IHS解决方案的TIM-1A层的关键特性是高热导率。对于另一实施例，用来形成TIM-1A层的材料确保与下游热工艺（例如球附接工艺）的兼容性。对于一个实施例，根据上面结合图2A-2B提供的描述中的至少一个来固化和/或烘焙每个腔中的TIM-1A层。
上面将图3的方法300描述为经由本领域中已知的若干技术来执行。对于一个实施例，使用本领域中已知的激光钻孔、机械切割、蚀刻、锻造、冲压、压铸、沉积技术或本领域中已知的烘焙/固化技术中的至少一个来执行该方法300。
图4是根据一个实施例的形成包括智能IHS解决方案的半导体封装（例如MCP等等）的方法400的工艺流程图示。工艺400在框401处开始，在框401中将TIM-1层沉积在处于衬底上的半导体管芯上。对于一个实施例，根据上面结合图2C或2D中的至少一个提供的描述来执行TIM-1层的沉积。工艺400继续进行至框403，在框403中将IHS块转移到管芯上。对于一个实施例，经由TIM-1层将IHS块附接至管芯。对于还有的另一实施例，使用上面结合图2C-2D中的至少一个提供的描述中的至少一个来将IHS块转移到管芯上和/或附接至管芯。
在框405处，将智能IHS盖耦合至管芯上的IHS块。对于一个实施例，该智能IHS盖与上面结合图2A-2D中的至少一个描述的智能IHS盖中的至少一个类似或相同。此外，并且对于一个实施例，如上面结合图2C或2D中的至少一个描述的，将该智能IHS盖耦合至IHS块。对于还有的另一实施例，如上面结合至少图2B-2C描述的，该智能IHS盖包括分层放置有TIM-1A的腔。此外，如上面结合至少图2B-2C和3描述的，将IHS块插入智能IHS解决方案的对应腔中。对于该实施例，因为智能IHS盖的腔包围IHS块的一些或所有，所以在智能IHS盖和IHS块之间存在一些重叠。对于另一实施例，还经由密封剂将智能IHS盖（在其侧壁区域处）耦合至衬底。对于该实施例，如上面结合至少图2C描述的，将智能IHS盖耦合至衬底。
工艺400还包括可选框407，在可选框407中将TIM-2层沉积在智能IHS盖上。对于一个实施例，如上面结合至少图2E描述的那样来执行TIM-2层在智能IHS盖上的沉积。对于一个实施例，在TIM-2层的沉积之后将热沉耦合至智能IHS盖。对于一个实施例，如上面结合至少图2E描述的那样将热沉耦合至智能IHS盖。
图5A-5G是根据一个实施例的形成包括智能IHS解决方案的半导体封装500的方法的横截面侧视图图示。现在参考图5A，可以以衬底201开始形成封装500的工艺。如在图5A中示出的，经由本领域中已知的技术来将两个部件203和204附接至衬底201。例如，可以使用如本领域中已知的密封剂来将两个部件203和204粘附至衬底201。该衬底201与上面结合图2A-2D描述的衬底201类似或相同。对于一个实施例，该部件203与上面结合至少图2C描述的部件203类似或相同。对于一个实施例，该部件204与上面结合至少图2C描述的部件204类似或相同。如在图5A中示出的，存在影响衬底201上的部件203和204的高度变化。部件203和204的不同z高度可以对由部件203或204中的至少一个产生的不需要的热能的耗散有负面影响。这些负面影响可以抑制部件203和204中的一个或多个的性能。上面结合图1A-1B中的至少一个描述了高度变化。
参考图5B，可以将TIM-1层206和205分别沉积到部件203和204上。例如，将TIM-1层205沉积到部件204上的半导体管芯或管芯堆叠的表面上，并且将TIM-1层206沉积到部件203上的半导体管芯或管芯堆叠的表面上。对于一个实施例，TIM-1层205和206中的每一个都具有固定的预定z高度——例如TIM-1层205和206中的每一个都具有50 µm 的z高度。对于一个实施例，图5中示出的TIM-1层205与上面结合图2A-2E中的至少一个描述的TIM-1层205类似或相同。对于一个实施例，图5中示出的TIM-1层206与上面结合图2A-2E中的至少一个描述的TIM-1层206类似或相同。上面结合图2A-2E中的至少一个描述了关于TIM-1层的细节。
参见图5C，可以将IHS块297和299分别转移到部件203和204的表面上和/或附接至部件203和204的表面。例如，将IHS块297转移到部件203上的半导体管芯或管芯堆叠的表面上和/或附接至该表面，并且将IHS块299转移到部件204上的半导体管芯或管芯堆叠的表面上和/或附接至该表面。对于一个实施例，TIM-1层206被用来将IHS块297耦合至部件203，而TIM-1层205被用来将IHS块299耦合至部件204。例如，该IHS块297以热耦合或机械耦合中的至少一种耦合至部件203，并且该IHS块299以热耦合或机械耦合中的至少一种耦合至部件204。对于一个实施例，图5中示出的IHS块297与上面结合图2A-2E中的至少一个描述的IHS块297类似或相同。对于一个实施例，图5中示出的IHS块299与上面结合图2A-2E中的至少一个描述的IHS块299类似或相同。对于一个实施例，并且关于图5C，当将IHS块297和299分别转移到TIM-1层206和205上时，施加力来确保TIM-1层206和205中的每一个的BLT被最小化。该力的施加可以帮助确保TIM-1层206和205中的每一个的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。
对于一个实施例，IHS块297和299中的每一个都具有从例如500 µm – 2000 µm的z高度的预定范围中选择的z高度。对于一个实施例，对于具有比其他部件更短z高度的那些部件，IHS块297和299更厚。对于一个备选实施例，对于具有比其他部件更短z高度的那些部件，IHS块297和299不更厚。对于一个实施例，IHS块297和299具有与该IHS块处在其上的相应部件相同的长度和宽度（即x-y尺寸）。因此，该IHS块297具有与部件203相同的x-y尺寸，并且该IHS块299具有与部件204相同的x-y尺寸。对于一个实施例，该IHS块297和299中的每一个都使热量从部件203和204中的其相应一个耗散至智能IHS盖202。上面结合至少图2C描述了关于IHS块的附加细节。
参考图5D，引入智能IHS盖202以将其添加至正被形成的封装500。该智能IHS盖202将起作用以使热量从IHS块297和299耗散至次热交换器（例如热沉、周围环境、等等。该智能IHS盖202可以帮助使由与部件203和204相关联的不对称功率分布引起的管芯上温度梯度最小化。如上面结合至少图2C解释的，部件203和204中的每一个都可能受高度变化影响。例如，部件203和204可以是不同制造工艺的结果，并且在某些情况下，可以由不同的供应商来制造部件203和204。这可能导致最终要组装到正被形成的半导体封装500中的部件203和204之间的高度中的差异。对于一个实施例，图5中示出的智能IHS盖202与上面结合图2A-2E中的至少一个描述的智能IHS盖202类似或相同。
对于一个实施例，并且如在图5D中示出的，该智能IHS盖202包括分别对应于IHS块297和299的腔207和209。对于一个实施例，图5中示出的腔207与上面结合图2A-2E中的至少一个描述的腔207类似或相同。对于一个实施例，图5中示出的腔209与上面结合图2A-2E中的至少一个描述的腔209类似或相同。该智能IHS盖202可以限定相对于在衬底201上的部件203、部件204、IHS块297、IHS块297、TIM-1层205和TIM-1层206的有限高度，这些部件中的每一个都将装配到该衬底201。此外，并且对于一个实施例，在智能IHS盖202中形成的腔207和209中的每一个还限定相对于在衬底201上的部件203、部件204、IHS块297、IHS块297、TIM-1层205和TIM-1层206的有限高度。由腔207和209限定的有限高度使得IHS块297和297能够分别被插入腔207和209中。因此，可以执行该智能IHS盖202的设计和制造以适应由于制造工艺中存在的尺寸可变性而引起的部件、其相应TIM-1层以及其相应IHS块的最厚组合。照此，在某些情况下，在部件（例如部件203和/或204）由于制造工艺中存在的尺寸可变性而是较薄的情况下，可以利用插入智能IHS盖202的腔（例如腔207和209）中的IHS块（例如IHS块297和/或299）来填充较薄部件和智能IHS盖202之间的附加空间，在这里TIM-1A层（例如TIM-1A层211和213）在IHS块和腔之间。
图5E包括除了腔207和209以及IHS块297和299之外被用来降低部件厚度中的可变性以及TIM-1层205和206的厚度中的可变性的中间级热界面（TIM-1A）层211和213。对于一个实施例，图5中示出的TIM-1A层211与上面结合图2A-2E中的至少一个描述的TIM-1A层211类似或相同。对于一个实施例，图5中示出的TIM-1A层213与上面结合图2A-2E中的至少一个描述的TIM-1A层213类似或相同。对于一个实施例，腔207和209分别分层放置有TIM-1A层211和213。对于一个实施例，由呈现高热导率的材料来形成TIM-1A层211和213中的每一个。对于一个实施例，由上面结合图2A-3中的至少一个描述的材料中的任一个来形成TIM-1A层211和213中的每一个。对于一个实施例，通过将TIM-1A材料固化到腔207和209的壁中的每一个上来分别形成TIM-1A层211和213。对于一个实施例，TIM-1A层211的厚度或BLT与TIM-1A层213的BLT相等或基本相等。对于另一个实施例，TIM-1A层211的厚度或BLT与TIM-1A层213的BLT不同。对于该实施例，TIM-1A层211和213中的每一个都具有相对于与智能IHS盖202的顶部表面平行的腔207和209的顶部表面的不同z高度。对于该实施例，从例如50µm –450µm的z高度的预定范围中选择TIM-1A层211和213中的每一个的不同z高度。对于一个实施例，对于具有比其他部件更短z高度的那些部件，TIM-1A层211和213更厚。对于一个实施例，对于具有比其他部件更短z高度的那些部件，TIM-1A层211和213不更厚。上面结合至少图2A-2E描述了关于TIM-1A层的附加细节。
参见图5F，将要被用来把智能IHS盖202的侧壁区域耦合至衬底201的密封剂217沉积到衬底201上。对于一个实施例，该密封剂217与上面结合图2A-2E中的至少一个描述的密封剂217类似或相同。对于一个实施例，该密封剂217可以是上面结合至少图2A-2D描述的密封剂中的任一个。
现在参考图5G，其包括形成的封装500。对于一个实施例，通过使用TIM-1A层211和213将智能IHS盖202附接或热耦合至IHS块297和299来形成封装500。对于一个实施例，TIM-1A层211和213将IHS块297和299分别热和/或机械耦合至智能IHS盖202。对于一个实施例，并且如在图5G中示出的，经由密封剂217将智能IHS盖202的侧壁区域热和/或机械耦合至衬底201。如在图5G中示出的，将IHS块297和299分别插入腔207和209中。这在智能IHS盖202与IHS块297和299之间创建一些重叠，这可以帮助改进来自部件203和204的不需要的热量的耗散。对于一个实施例，并且关于图5F-5G，当将智能IHS盖202转移到IHS块297和299上时，向智能IHS盖202施加力来确保TIM-1A层207和209中的每一个的BLT被最小化。该力的施加可以帮助确保TIM-1A层207和209中的每一个的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。
图6A-6G是根据另一实施例的形成包括智能IHS解决方案的半导体封装600的方法的横截面侧视图图示。
图6A-6G中示出的方法与图5A-5G中示出的方法类似或相同。为了简洁起见，下面结合图6A-6G仅描述在图6A-6G中示出的方法和图5A-5G中示出的方法之间的差异。
可以在图6E、6F和6G中找到在图6A-6G中示出的方法与图5A-5G中示出的方法之间的一个差异。如在图6E-6F中示出的，腔207和209的壁没有分别分层放置有TIM-1A层211和213。作为代替，并且对于一个实施例，将TIM-1A层211和213分别沉积在IHS块297和299上。对于一个实施例，图6E-6G中示出的TIM-1A层211的厚度或接合线厚度（BLT）可以与图6E-6G中示出的TIM-1A层213的厚度或BLT不同。对于另一实施例，图6E-6G中示出的TIM-1A层211的厚度或BLT可以与图6E-6G中示出的TIM-1A层213的厚度或BLT相等或基本相等。对于一个实施例，对于具有比其他部件更短z高度的那些部件，图6E-6G中示出的TIM-1A层211和213更厚。对于一个实施例，对于具有比其他部件更短z高度的那些部件，图6E-6G中示出的TIM-1A层211和213不更厚。对于一个实施例，并且如在图6E-6G中示出的，TIM-1A层211具有比TIM-1A 213更高的BLT。对于该实施例，TIM-1A层211和213的不同BLT可以矫正影响部件203和204的高度变化。对于一个实施例，图6E-6G中示出的TIM-1A层211和213的每个BLT在50µm和450µm之间。以这种方式，图6E-6G中示出的TIM-1A层被约束到预定范围，这可以对TIM-1A层211和213的分别使热量从IHS块297和299耗散的能力创建某种可预测性。
具体关于图6G，该智能IHS盖202在部件203和204之上。此外，分别将IHS块297和299插入腔207和209中。对于一个实施例，可以将封装500固化和/或烘焙（在将IHS块297和299插入腔207和209中之后）以使得TIM-1A层211和213分别能够将IHS块297和299耦合至智能IHS 202。例如，在固化或烘焙期间，该IHS块297经由TIM-1A层211以热耦合或机械耦合中的至少一种耦合至智能IHS 202，并且在固化或烘焙期间，该IHS块299经由TIM-1A层以热耦合或机械耦合中的至少一种耦合至智能IHS 202。对于一个实施例，并且关于图6E-6G，当将智能IHS盖202转移到TIM-1A层211和213上时，向智能IHS盖202施加力来确保图6E-6G中示出的TIM-1A层211和213中的每一个的BLT被最小化。该力的施加可以帮助确保图6E-6G中示出的TIM-1A层211和213中的每一个的最小BLT（这帮助使得较低热导率TIM的厚度尽可能低并且帮助降低总的热阻）。
对于另一实施例，在没有任何固化和/或烘焙的情况下，图6E-6G中示出的TIM-1A层211和213将IHS块297和299耦合至腔207和209。对于该实施例，由于用于形成TIM-1A层211和213的（一个或多个）TIM的性质（例如热性质、机械性质、磁性质、热性质等等），TIM-1A层211和213粘附至腔207和209的壁。
图7是根据一个实施例的形成包括智能IHS解决方案的半导体封装（例如MCP等等）的方法700的工艺流程图示。工艺700可以与上面结合图4描述的工艺400类似、相同或不同。
工艺700在框701处开始，在框701中将TIM-1层沉积在处于衬底上的半导体管芯上。对于一个实施例，根据上面结合图2C或2D中的至少一个提供的描述中的至少一个来执行TIM-1层的沉积。工艺700继续进行至框703，在框703中将IHS块转移到管芯上。对于一个实施例，经由TIM-1层将IHS块附接至管芯。对于还有的另一实施例，使用上面结合图2C-2D中的至少一个提供的描述中的至少一个来将IHS块转移到管芯上和/或附接至管芯。
在框709处，工艺700包括TIM-1A层在IHS块上的沉积。对于一个实施例，根据上面结合图6E-6F提供的描述来执行TIM-1A层的沉积。工艺700继续进行至框711，在框711中将智能IHS盖耦合至管芯上的IHS块。对于一个实施例，该智能IHS盖与上面结合图2A-6G中的至少一个描述的智能IHS盖中的至少一个类似或相同。此外，并且对于一个实施例，如上面结合图6A-6G中的至少一个描述的那样将智能IHS盖耦合至IHS块。对于还有的另一实施例，如上面结合至少图6E-6G描述的那样，智能IHS盖包括没有分层放置有TIM-1A的腔。此外，如上面结合至少图6E-6G描述的那样，将其上已沉积TIM-1A层的IHS块插入智能IHS盖的对应腔中。对于该实施例，因为智能IHS盖的腔包围IHS块的一些或所有，所以在智能IHS盖和IHS块之间存在一些重叠。对于另一实施例，还经由密封剂将智能IHS盖（在其侧壁区域处）耦合至衬底。对于该实施例，如上面结合至少图2C描述的那样将智能IHS盖耦合至衬底。
工艺700还包括可选框707，在可选框707中将TIM-2层沉积在智能IHS盖上。对于一个实施例，如上面结合至少图2E描述的那样来执行TIM-2层在智能IHS盖上的沉积。对于一个实施例，在TIM-2层的沉积之后将热沉耦合至智能IHS盖。对于一个实施例，如上面结合至少图2E描述的那样将热沉耦合至智能IHS盖。
图8图示根据一个实施例的计算机系统800的示意图。该计算机系统800（也被称为电子系统800）可以包括半导体封装（例如MCP等等），其包括根据如该公开内容中阐述的实施例以及它们的等同物中的任一个的智能IHS解决方案。该计算机系统800可以是诸如上网本计算机的移动设备。该计算机系统800可以是诸如无线智能手机的移动设备。该计算机系统800可以是桌上型计算机。该计算机系统800可以是手持阅读器。该计算机系统800可以是服务器系统。该计算机系统800可以是超级计算机或高性能计算系统。
该电子系统800可以是计算机系统，其包括用来电耦合电子系统800的各种部件的系统总线820。该系统总线820是根据各种实施例的单个总线或总线的任何组合。该电子系统800包括向集成电路810提供电力的电压源830。在一些实施例中，该电压源830通过系统总线820向集成电路810供应电流。
根据一个实施例，该集成电路810电耦合至系统总线820并且包括任何电路或电路的组合。对于一个实施例，该集成电路810包括可以属于任何类型的处理器812。如在本文中使用的，该处理器812可以意指任何类型的电路，包括但不限于微处理器、微控制器、图形处理器、数字信号处理器或另一处理器。对于一个实施例，如前述说明书中描述的，该处理器812包括包含智能IHS解决方案的半导体封装（例如MCP等等）或与该半导体封装耦合。对于一个实施例，在处理器的存储器高速缓存中找到SRAM实施例。可以包括在集成电路810中的其他类型的电路是定制电路或专用集成电路（ASIC），诸如供在无线设备（诸如蜂窝电话、智能电话、寻呼机、便携式计算机、双向无线电、和类似电子系统）中使用的通信电路814，或用于服务器的通信电路。对于一个实施例，该集成电路810包括管芯上存储器816，诸如静态随机存取存储器（SRAM）。对于一个实施例，该集成电路810包括嵌入式管芯上存储器816，诸如嵌入式动态随机存取存储器（eDRAM）。对于一个实施例，如前述说明书中描述的，该管芯上存储器816可以被封装为包括智能IHS解决方案的半导体封装（例如MCP等等）。
对于一个实施例，该集成电路810与后续集成电路811互补。有用的实施例包括双处理器813和双通信电路815和双管芯上存储器817（诸如SRAM）。对于一个实施例，该双集成电路810包括嵌入式管芯上存储器817（诸如eDRAM）。
对于一个实施例，该电子系统800还包括外部存储器840，其进而可以包括适合于特定应用的一个或多个存储器元件，诸如形式为RAM的主存储器842、一个或多个硬驱动844和/或处置可移动介质846（诸如磁盘、压缩盘（CD）、数字可变盘（DVD）、闪速存储器驱动和本领域中已知的其他可移动介质）的一个或多个驱动。根据一个实施例，该外部存储器840还可以是嵌入式存储器848（诸如管芯堆叠中的第一管芯）。
对于一个实施例，该电子系统800还包括显示设备850和音频输出860。对于一个实施例，该电子系统800包括诸如控制器870的输入设备，其可以是键盘、鼠标、跟踪球、游戏控制器、麦克风、语音识别设备、或将信息输入电子系统800中的任何其他输入设备。对于一个实施例，输入设备870是相机。对于一个实施例，输入设备870是数字录音机。对于一个实施例，输入设备870是相机和数字录音机。
集成电路810或811中的至少一个可以在许多不同实施例中实施，包括：包含根据若干实施例以及它们的等同物中的任一个的智能IHS解决方案的半导体封装（例如MCP等等）、电子系统、计算机系统、制造集成电路的一个或多个方法、和制造包括半导体封装（例如MCP等等）（其包括根据如在本文中在各种实施例中阐述的若干公开实施例以及它们的领域承认的等同物中的任一个的智能IHS解决方案）的电子组件的一个或多个方法。该元件、材料、几何形状、尺寸和操作顺序所有都可以改变以适合特定I/O耦合要求，包括针对嵌入根据若干公开MCP中的任一个的处理器安装衬底中的微电子管芯的阵列接触计数、阵列接触配置，所述MCP包括根据如在本文中阐述的若干公开实施例以及它们的领域承认的等同物中的任一个的智能IHS解决方案。可以包括基础衬底，如由图8的虚线表示的。还可以包括无源器件，如还在图8中描绘的。
遍及该说明书对“一个实施例”、“实施例”、“另一实施例”以及它们的变体的引用意指结合该实施例描述的特定特征、结构、配置或特性被包括在至少一个实施例中。因此，短语“对于一个实施例”、“对于实施例”、“对于另一实施例”以及它们的变体在遍及该说明书的各种地方中的出现不一定指代相同实施例。此外，在一个或多个实施例中可以以任何适合方式来组合该特定特征、结构、配置或特性。此外，在本文中（例如在图3、4、5A-5G、6A-6G或7中的至少一个中）描述的工艺流程的一个或多个实施例中的一些操作可以被省略或者以不同于本文中图示或描述的顺序的顺序来执行。
如在前述说明书中使用的术语“在……之上”、“至……”、“在……之间”和“在……上”指代一个层相对于其他层的相对位置。在另一层“之上”或“上”或者接合“至”另一层或与另一层“接触”的一个层可以与另一个层直接接触或者可以具有一个或多个中间层。在各层“之间”的一个层可以与各层直接接触或者可以具有一个或多个中间层。
上面结合包括智能IHS解决方案的半导体封装（例如MCP等等）的一个或多个实施例提供的描述还可以用于其他类型的IC封装和混合逻辑存储器封装堆叠。此外，用于形成包括智能IHS解决方案的半导体封装（例如MCP等等）的一个或多个实施例的处理顺序可以与晶圆级封装（WLP）及与表面安装衬底（诸如LGA、QFN和陶瓷衬底）的集成两者兼容。
在前述说明书、摘要和/或图中，阐述了许多具体细节（诸如具体材料和处理操作），以便提供对本文中描述的实施例的透彻理解。然而，将显然的是，可以在没有这些具体细节的情况下实践在本文中描述的实施例中的任一个。在其他实例中，为了不会不必要地使本文中描述的实施例模糊，没有详细描述公知特征（诸如半导体管芯的集成电路）。此外，要理解在图中示出且结合图描述的各种实施例是说明性表示并且不一定按照比例绘制。因此，可以在不脱离结合前述说明书、摘要和/或图描述的实施例的更宽广精神和范围的情况下做出各种修改和/或改变。
本文中描述的实施例包括一种半导体封装，包括：衬底上的部件，该部件包括一个或多个半导体管芯；以及智能集成式散热器（IHS）解决方案，该智能IHS解决方案包括：智能IHS盖，该智能IHS盖包括在智能盖的中心区域中形成的腔，该智能IHS盖处于该部件上，并且该腔对应于该部件。
附加实施例包括一种半导体封装，其中该智能集成式散热器（IHS）解决方案进一步包括：在该部件上的TIM-1层上的单独IHS盖（IHS块），其中该IHS块在该腔和该部件之间。
附加实施例包括一种半导体封装，其中该腔的侧壁包围该IHS块的侧壁以使得该IHS块的至少一部分被插入该腔中。
附加实施例包括一种半导体封装，其中该智能集成式散热器（IHS）解决方案进一步包括：在该IHS块和该腔之间的中间级热界面材料（TIM-1A）层。
附加实施例包括一种半导体封装，其中在将该IHS块插入该腔中之前在该智能IHS盖的腔中形成该TIM-1A层。
附加实施例包括一种半导体封装，其中在将该IHS块插入该腔中之前之前该TIM-1A层在该IHS块上。
附加实施例包括一种半导体封装，其中该TIM-1A层包括聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个。
附加实施例包括一种半导体封装，其中该智能IHS盖热耦合且机械耦合至该IHS块。
附加实施例包括一种半导体封装，其中利用密封剂将该智能IHS盖的至少一个侧壁区域机械耦合至衬底。
附加实施例包括一种半导体封装，进一步包括：在该智能IHS盖上的热沉，该热沉耦合至该智能IHS盖；以及在该智能IHS盖上的第二热界面材料（TIM-2）层，该TIM-2层处于该热沉和该智能IHS盖之间。
本文中描述的实施例包括一种形成多芯片封装的方法，包括：在衬底上的半导体管芯上沉积第一热界面材料（TIM-1）层；将单独的集成式散热器盖（IHS块）转移到管芯上，其中将该IHS块转移到管芯上包括：当该IHS块在该TIM-1层上时向该IHS块施加力来促使该TIM-1层具有预定接合线厚度（BLT）；以及将智能集成式散热器盖（智能IHS盖）热耦合至该IHS块，其中该智能IHS盖具有腔，并且其中该腔对应于管芯。
附加实施例包括一种形成多芯片封装的方法，进一步包括：将该IHS块插入该智能IHS盖的腔中，其中该腔的侧壁包围该IHS块的侧壁。
附加实施例包括一种形成多芯片封装的方法，进一步包括：在该腔中或在该IHS块上沉积中间级热界面材料（TIM-1A）层，其中在将该IHS块插入腔中之前沉积该TIM-1A层。
附加实施例包括一种形成多芯片封装的方法，进一步包括：当该TIM-1A层被沉积在该腔中时，固化或烘焙TIM-1A以将该TIM-1A层粘附至腔的壁。
附加实施例包括一种形成多芯片封装的方法，其中由聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个来形成该TIM-1A层。
附加实施例包括一种形成多芯片封装的方法，进一步包括：在该智能IHS盖上沉积第二热界面材料（TIM-2）层，以及将热沉热耦合至该智能IHS盖，该TIM-2层处于该热沉和该智能IHS盖之间。
附加实施例包括一种形成多芯片封装的方法，进一步包括：利用密封剂将该智能IHS盖的至少一个侧壁区域机械耦合至衬底。
本文中描述的实施例包括一种计算设备，包括：电路板；以及耦合至该电路板的半导体封装，该封装包括：衬底上的部件，该部件包括一个或多个半导体管芯；以及智能集成式散热器（IHS）解决方案，该智能IHS解决方案包括：智能IHS盖，该智能IHS盖包括在智能盖的中心区域中形成的腔，该智能IHS盖处于该部件上，并且该腔对应于该部件。
附加实施例包括一种计算设备，其中该智能集成式散热器（IHS）解决方案进一步包括：在该部件上的TIM-1层上的单独IHS盖（IHS块），其中该IHS块在该腔和该部件之间。
附加实施例包括一种计算设备，其中该腔的侧壁包围该IHS块的侧壁以使得该IHS块的至少一部分被插入该腔中。
附加实施例包括一种计算设备，其中该智能集成式散热器（IHS）解决方案进一步包括：在该IHS块和该腔之间的中间级热界面材料（TIM-1A）层。
附加实施例包括一种计算设备，其中在将该IHS块插入该腔中之前在该智能IHS盖的腔中形成该TIM-1A层。
附加实施例包括一种计算设备，其中在将该IHS块插入该腔中之前之前该TIM-1A层在该IHS块上。
附加实施例包括一种计算设备，其中该TIM-1A层包括聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个。
附加实施例包括一种计算设备，其中该智能IHS盖被耦合至该IHS块。
在所附权利要求中使用的术语不应该被解释为将结合前述说明书、摘要和/或图描述的实施例中的任一个限制于在前述说明书、摘要、图和/或权利要求中阐述的具体实施例。相反，要根据权利要求诠释的建立的原则来解释权利要求的范围。

Claims (25)

1.一种半导体封装，包括：
衬底上的部件，该部件包括一个或多个半导体管芯；以及
智能集成式散热器（IHS）解决方案，该智能IHS解决方案包括：
智能IHS盖，该智能IHS盖包括在智能盖的中心区域中形成的腔，该智能IHS盖处于该部件上，并且该腔对应于该部件。
2.根据权利要求1所述的封装，其中该智能集成式散热器（IHS）解决方案进一步包括：
在该部件上的TIM-1层上的单独IHS盖（IHS块），其中该IHS块在该腔和该部件之间。
3.根据权利要求2所述的封装，其中该腔的侧壁包围该IHS块的侧壁以使得该IHS块的至少一部分被插入该腔中。
4.根据权利要求2所述的封装，其中该智能集成式散热器（IHS）解决方案进一步包括：
在该IHS块和该腔之间的中间级热界面材料（TIM-1A）层。
5.根据权利要求4所述的封装，其中在将该IHS块插入该腔中之前在该智能IHS盖的腔中形成该TIM-1A层。
6.根据权利要求4所述的封装，其中在将该IHS块插入该腔中之前之前该TIM-1A层在该IHS块上。
7.根据权利要求4所述的封装，其中该TIM-1A层包括聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个。
8.根据权利要求2所述的封装，其中该智能IHS盖热耦合且机械耦合至该IHS块。
9.根据权利要求1所述的封装，其中利用密封剂将该智能IHS盖的至少一个侧壁区域机械耦合至衬底。
10.根据权利要求1所述的封装，进一步包括：
在该智能IHS盖上的热沉，该热沉被耦合至该智能IHS盖；以及
在该智能IHS盖上的第二热界面材料（TIM-2）层，该TIM-2层处于该热沉和该智能IHS盖之间。
11.一种形成多芯片封装的方法，包括：
在衬底上的半导体管芯上沉积第一热界面材料（TIM-1）层；
将单独的集成式散热器盖（IHS块）转移到管芯上，其中将该IHS块转移到管芯上包括：当该IHS块在该TIM-1层上时向该IHS块施加力以帮助促使该TIM-1层具有预定接合线厚度（BLT）；以及
将智能集成式散热器盖（智能IHS盖）热耦合至IHS块，其中该智能IHS盖具有腔，并且其中该腔对应于管芯。
12.根据权利要求11所述的方法，进一步包括：
将该IHS块插入该智能IHS盖的腔中，其中该腔的侧壁包围该IHS块的侧壁。
13.根据权利要求12所述的方法，进一步包括：
在该腔中或在该IHS块上沉积中间级热界面材料（TIM-1A）层，其中在将该IHS块插入腔中之前沉积该TIM-1A层。
14.根据权利要求13所述的方法，进一步包括：
当该TIM-1A层被沉积在该腔中时，固化或烘焙TIM-1A以将该TIM-1A层粘附至腔的壁。
15.根据权利要求13所述的方法，其中由聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个来形成该TIM-1A层。
16.根据权利要求11所述的方法，进一步包括：
在该智能IHS盖上沉积第二热界面材料（TIM-2）层，以及
将热沉热耦合至该智能IHS盖，该TIM-2层处于该热沉和该智能IHS盖之间。
17.根据权利要求11所述的方法，包括：
利用密封剂将该智能IHS盖的至少一个侧壁区域机械耦合至衬底。
18.一种计算设备，包括：
电路板；以及
耦合至该电路板的半导体封装，该封装包括：
衬底上的部件，该部件包括一个或多个半导体管芯；以及
智能集成式散热器（IHS）解决方案，该智能IHS解决方案包括：
智能IHS盖，该智能IHS盖包括在智能盖的中心区域中形成的腔，该智能IHS盖处于该部件上，并且该腔对应于该部件。
19.根据权利要求18所述的计算设备，其中该智能集成式散热器（IHS）解决方案进一步包括：
在该部件上的TIM-1层上的单独IHS盖（IHS块），其中该IHS块在该腔和该部件之间。
20.根据权利要求19所述的计算设备，其中该腔的侧壁包围该IHS块的侧壁以使得该IHS块的至少一部分被插入该腔中。
21.根据权利要求19所述的计算设备，其中该智能集成式散热器（IHS）解决方案进一步包括：
在该IHS块和该腔之间的中间级热界面材料（TIM-1A）层。
22.根据权利要求21所述的计算设备，其中在将该IHS块插入该腔中之前在该智能IHS盖的腔中形成该TIM-1A层。
23.根据权利要求21所述的计算设备，其中在将该IHS块插入该腔中之前之前该TIM-1A层在该IHS块上。
24.根据权利要求21所述的计算设备，其中该TIM-1A层包括聚合热界面材料（PTIM）、环氧树脂、液相烧结（LPS）膏、或焊膏中的至少一个。
25.根据权利要求19所述的计算设备，其中该智能IHS盖被耦合至该IHS块。
CN201680068468.1A 2015-12-23 2016-10-13 多基准集成式散热器（ihs）解决方案 Active CN108292637B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/757,845 US9806002B2 (en) 2015-12-23 2015-12-23 Multi-reference integrated heat spreader (IHS) solution
US14/757845 2015-12-23
PCT/US2016/056887 WO2017112047A1 (en) 2015-12-23 2016-10-13 Multi-reference integrated heat spreader (ihs) solution

Publications (2)

Publication Number Publication Date
CN108292637A true CN108292637A (zh) 2018-07-17
CN108292637B CN108292637B (zh) 2022-11-01

Family

ID=59086596

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680068468.1A Active CN108292637B (zh) 2015-12-23 2016-10-13 多基准集成式散热器（ihs）解决方案

Country Status (3)

Country Link
US (1) US9806002B2 (zh)
CN (1) CN108292637B (zh)
WO (1) WO2017112047A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112640586A (zh) * 2018-08-27 2021-04-09 塔克托科技有限公司 电节点、用于制造电节点的方法、电节点条或片和包括所述节点的多层结构

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016121801B4 (de) * 2016-11-14 2022-03-17 Infineon Technologies Ag Baugruppe mit Verbindungen, die verschiedene Schmelztemperaturen aufweisen, Fahrzeug mit der Baugruppe und Verfahren zum Herstellen derselben und Verwendung der Baugruppe für eine Automobilanwendung
WO2018200022A1 (en) * 2017-04-28 2018-11-01 Intel Corporation Coreless package architecture for multi-chip opto-electronics
US10515867B2 (en) * 2017-11-14 2019-12-24 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
US10515869B1 (en) * 2018-05-29 2019-12-24 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor package structure having a multi-thermal interface material structure
US10394292B1 (en) * 2018-06-11 2019-08-27 Microsoft Technology Licensing, Llc Cryogenic computing system with thermal management using a metal preform
WO2020103145A1 (zh) * 2018-11-23 2020-05-28 北京比特大陆科技有限公司 芯片散热结构、芯片结构、电路板和超算设备
WO2020103137A1 (zh) * 2018-11-23 2020-05-28 北京比特大陆科技有限公司 芯片散热结构、芯片结构、电路板和超算设备
US11062971B2 (en) 2019-01-08 2021-07-13 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method and equipment for forming the same
US11581239B2 (en) * 2019-01-18 2023-02-14 Indium Corporation Lead-free solder paste as thermal interface material
US11362079B2 (en) * 2019-06-13 2022-06-14 Sandisk Technologies Llc Bonded die assembly containing a manganese-containing oxide bonding layer and methods for making the same
US11894286B2 (en) * 2019-06-13 2024-02-06 Bae Systems Information And Electronic Systems Integration Inc. Hermetically sealed electronics module with enhanced cooling of core integrated circuit
US11101191B2 (en) 2019-11-22 2021-08-24 International Business Machines Corporation Laminated circuitry cooling for inter-chip bridges
US20210296716A1 (en) * 2020-03-23 2021-09-23 Global Graphene Group, Inc. Battery cooling system and method of operating same
US11769710B2 (en) 2020-03-27 2023-09-26 Xilinx, Inc. Heterogeneous integration module comprising thermal management apparatus
JP2024525568A (ja) * 2021-07-07 2024-07-12 テスラ，インコーポレイテッド 電子アセンブリおよびその製造方法
US11869877B2 (en) 2021-08-06 2024-01-09 Sandisk Technologies Llc Bonded assembly including inter-die via structures and methods for making the same
WO2023085607A1 (ko) * 2021-11-09 2023-05-19 삼성전자주식회사 열 전도성 계면 물질을 수용하는 인쇄 회로 기판 구조체를 포함하는 전자 장치
CN115527961A (zh) * 2022-10-19 2022-12-27 广东省科学院半导体研究所 带有散热板的多芯片互连封装结构及其制备方法
US20240203820A1 (en) * 2022-12-20 2024-06-20 Qualcomm Incorporated Package comprising a lid structure with a compartment

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396403A (en) * 1993-07-06 1995-03-07 Hewlett-Packard Company Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate
US20050018402A1 (en) * 2003-07-21 2005-01-27 Oman Todd P. Thermally enhanced electronic module
US20050146021A1 (en) * 2003-12-31 2005-07-07 Texas Instruments Incorporated System and method for high performance heat sink for multiple chip devices
CN103107142A (zh) * 2011-11-15 2013-05-15 台湾积体电路制造股份有限公司 具有盖结构的半导体器件及其制造方法
US20150035135A1 (en) * 2013-08-02 2015-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. 3DIC Packages with Heat Sinks Attached to Heat Dissipating Rings
CN104701287A (zh) * 2013-12-04 2015-06-10 台湾积体电路制造股份有限公司 具有热点热管理部件的3dic封装

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5604978A (en) * 1994-12-05 1997-02-25 International Business Machines Corporation Method for cooling of chips using a plurality of materials
US6275381B1 (en) * 1998-12-10 2001-08-14 International Business Machines Corporation Thermal paste preforms as a heat transfer media between a chip and a heat sink and method thereof
US7135769B2 (en) * 2005-03-29 2006-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of manufacturing thereof
US7476568B2 (en) * 2006-06-30 2009-01-13 Intel Corporation Wafer-level assembly of heat spreaders for dual IHS packages
US20080128897A1 (en) * 2006-12-05 2008-06-05 Tong Wa Chao Heat spreader for a multi-chip package
US8415809B2 (en) 2008-07-02 2013-04-09 Altera Corporation Flip chip overmold package
US9257364B2 (en) 2012-06-27 2016-02-09 Intel Corporation Integrated heat spreader that maximizes heat transfer from a multi-chip package
US20140239479A1 (en) 2013-02-26 2014-08-28 Paul R Start Microelectronic package including an encapsulated heat spreader
US8866290B2 (en) 2013-03-15 2014-10-21 Intel Corporation Molded heat spreaders
US20150115433A1 (en) * 2013-10-25 2015-04-30 Bridge Semiconductor Corporation Semiconducor device and method of manufacturing the same
KR20150091886A (ko) 2014-02-04 2015-08-12 삼성전자주식회사 방열부재를 구비하는 반도체 패키지
US9330999B2 (en) * 2014-06-05 2016-05-03 Intel Corporation Multi-component integrated heat spreader for multi-chip packages

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396403A (en) * 1993-07-06 1995-03-07 Hewlett-Packard Company Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate
US20050018402A1 (en) * 2003-07-21 2005-01-27 Oman Todd P. Thermally enhanced electronic module
US20050146021A1 (en) * 2003-12-31 2005-07-07 Texas Instruments Incorporated System and method for high performance heat sink for multiple chip devices
CN103107142A (zh) * 2011-11-15 2013-05-15 台湾积体电路制造股份有限公司 具有盖结构的半导体器件及其制造方法
US20150035135A1 (en) * 2013-08-02 2015-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. 3DIC Packages with Heat Sinks Attached to Heat Dissipating Rings
CN104701287A (zh) * 2013-12-04 2015-06-10 台湾积体电路制造股份有限公司 具有热点热管理部件的3dic封装

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112640586A (zh) * 2018-08-27 2021-04-09 塔克托科技有限公司 电节点、用于制造电节点的方法、电节点条或片和包括所述节点的多层结构

Also Published As

Publication number Publication date
WO2017112047A1 (en) 2017-06-29
CN108292637B (zh) 2022-11-01
US9806002B2 (en) 2017-10-31
US20170186665A1 (en) 2017-06-29

Similar Documents

Publication Publication Date Title
CN108292637A (zh) 多基准集成式散热器（ihs）解决方案
US11594462B2 (en) Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods
US11239095B2 (en) Stacked semiconductor die assemblies with high efficiency thermal paths and molded underfill
US9941251B2 (en) 3DIC packages with heat dissipation structures
EP3469628B1 (en) Semiconductor device assembly with through-mold cooling channel
US9076754B2 (en) 3DIC packages with heat sinks attached to heat dissipating rings
CN104701287B (zh) 具有热点热管理部件的3dic封装
JP6332439B2 (ja) 電力変換装置
US20150084181A1 (en) 3DIC Package Comprising Perforated Foil Sheet
TW200820401A (en) Chip package and manufacturing method thereof
WO2009111186A1 (en) Semiconductor stack assembly having reduced thermal spreading resistance and methods of making same
CN108766942A (zh) 热增强型堆叠封装（PoP）
CN108122862A (zh) 半导体装置封装及其制造方法
JP2014199829A (ja) 半導体モジュール及びそれを搭載したインバータ
US10607909B2 (en) Systems, methods, and apparatuses for implementing a thermal solution for 3D packaging
CN106684057A (zh) 芯片封装结构及其制造方法
CN109585396A (zh) 热耦合的层叠封装半导体封装
CN110246816A (zh) 一种晶圆级三维堆叠微流道散热结构及其制造方法
US10319700B1 (en) Stacked semiconductor architecture including semiconductor dies and thermal spreaders on a base die
TW201820468A (zh) 半導體裝置及其製造方法
CN103050454A (zh) 堆迭封装构造
CN113675093B (zh) 一种双面塑封的散热结构的封装设计及制备方法
US12035510B2 (en) Cold plate with embedded power device, driver circuit, and microcontroller with 3D printed circuit board
US20240339429A1 (en) Packaging systems and methods for semiconductor devices
CN118156158A (zh) 一种有效提高散热功能的封装结构及其制备工艺

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant