CN115527961A - 带有散热板的多芯片互连封装结构及其制备方法 - Google Patents
带有散热板的多芯片互连封装结构及其制备方法 Download PDFInfo
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Abstract
本发明提供了一种带有散热板的多芯片互连封装结构及其制备方法,涉及半导体先进封装技术领域,该带有散热板的多芯片互连封装结构包括精细线路层、封装芯片、散热板、塑封体和封装线路层,散热板设置在精细线路层上,并贴装在封装芯片远离精细线路层一侧,塑封体包覆在封装芯片和散热板外,封装线路层设置在塑封体上。相较于现有技术,本发明在使用精细线路封装的基础上,通过增设散热板,且散热板同时与精细线路层和封装芯片相接触,能够将封装芯片和精细线路层产生的热量迅速带走,并传递至外部,从而极大地提升了精细线路封装结构的散热能力,很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。
Description
技术领域
本发明涉及半导体先进封装技术领域,具体而言,涉及一种带有散热板的多芯片互连封装结构及其制备方法。
背景技术
系统级封装需要低功耗、高性能、多功能,体积小,需要将多颗芯片埋入封装体中,尤其是功耗大的芯片,相比单颗芯片封装功耗更大,需要及时将芯片产生的热量提取并散热掉。传统散热好的封装技术,尺寸粗大,线路粗大、互连线密度低,无法满足高密度精细互连要求;进一步地,传统高密度精细互连技术可以实现互连线路精细、密度大,满足高密度封装,但无法解决高功率密度产生的热量问题。
发明内容
本发明的目的包括,例如,提供了一种带有散热板的多芯片互连封装结构和带有散热板的多芯片互连封装结构的制备方法,其能够提升多芯片互连封装结构的散热效果,同时很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。
本发明的实施例可以这样实现:
第一方面,本发明提供一种带有散热板的多芯片互连封装结构,包括:
精细线路层;
贴装在所述精细线路层上的封装芯片;
设置在所述精细线路层上,并贴装在所述封装芯片远离所述精细线路层一侧的散热板;
包覆在所述封装芯片和所述散热板外的塑封体;
设置在所述塑封体上的封装线路层;
以及,设置在所述塑封体上或所述精细线路层远离所述封装芯片一侧的封装线路层;
其中,所述封装芯片非功能面贴装在所述散热板的贴装部,绝缘材料将所述封装芯片的功能面贴装在所述精细线路层上;且所述绝缘材料将所述散热板支撑部直接贴在精细线路上;所述封装芯片与所述精细线路层电连接,所述封装线路层与所述精细线路层电连接;
所述精细线路层上制备有第一导电孔,所述第一导电孔和其内导电材料与所述基底线路层和所述封装芯片的引脚焊盘直接电互连;
所述封装线路层上设置所述塑封体上,且所述带有散热板的多芯片互连封装结构还包括基底线路层,所述基底线路层设置在所述精细线路层远离所述封装芯片的一侧,所述基底线路层与所述精细线路层直接电连接。
在可选的实施方式中,所述散热板包括一体设置的支撑部和贴装部,所述贴装部具有一用于容置所述封装芯片的沉槽,且所述贴装部贴装在所述封装芯片远离所述精细线路层的一侧表面,所述支撑部贴装在所述精细线路层上,且所述贴装部和所述支撑部之间设置有用于供塑封料通过的流通孔。
在可选的实施方式中,所述贴装部与所述封装芯片之间设置有导热粘接层,所述封装芯片通过所述导热粘接层与所述贴装部粘接在一起。
在可选的实施方式中,所述封装芯片的功能面设置有引脚焊盘,所述引脚焊盘贴装在所述精细线路层上,所述精细线路层上制备有贯通至所述引脚焊盘或所述散热板的第一导电孔,所述第一导电孔中填充有导电材料,所述基底线路层覆盖在所述第一导电孔上,并通过所述第一导电孔与所述引脚焊盘或所述散热板电连接。
在可选的实施方式中,所述基底线路层包括基底布线层和基底绝缘层,所述基底布线层设置在所述精细线路层远离所述封装芯片的一侧表面,并同时与所述精细线路层和所述第一导电孔电连接,所述基底绝缘层设置在所述精细线路层远离所述封装芯片的一侧表面,并覆盖在所述基底布线层上。
在可选的实施方式中,所述精细线路层包括精细布线层和精细绝缘层,所述精细绝缘层包覆在所述精细布线层外,所述封装芯片贴装在所述精细绝缘层的一侧表面,且所述精细布线层外露于所述精细绝缘层远离所述封装芯片的一侧表面,所述基底线路层设置在所述精细绝缘层远离所述封装芯片的一侧,并与所述精细布线层电连接。
在可选的实施方式中,所述精细线路层还包括基材绝缘层,所述基材绝缘层设置在所述精细绝缘层远离所述封装芯片的一侧表面,并覆盖在所述精细布线层上,所述基底线路层设置在所述基材绝缘层远离所述封装芯片的一侧表面,且所述基材绝缘层上制备有贯通至所述精细布线层的第三导电孔,所述基底线路层通过所述第三导电孔与所述精细布线层电连接。
在可选的实施方式中,所述精细布线层具有外接焊盘,所述塑封体上制备有贯通至所述外接焊盘的第二导电孔,所述第二导电孔中填充有导电材料,所述封装线路层覆盖在所述第二导电孔,并通过所述第二导电孔与所述外接焊盘电连接。
在可选的实施方式中,所述封装线路层包括封装布线层和封装绝缘层,所述封装布线层设置在所述塑封体的表面,并与所述散热板接触,且所述封装布线层覆盖在所述第二导电孔上,并与所述第二导电孔电连接,所述封装绝缘层设置在所述塑封体的表面,并包覆在所述封装布线层上。
在可选的实施方式中,所述基底线路层或所述封装线路层上还设置有焊球。
在可选的实施方式中,所述带有散热板的多芯片互连封装结构还包括堆叠芯片,所述堆叠芯片贴装在所述散热板远离所述封装芯片的一侧,并包覆在所述塑封体内,且所述堆叠芯片与所述封装线路层或所述散热板电连接。
在可选的实施方式中,所述封装线路层设置在所述精细线路层远离所述封装芯片的一侧,所述带有散热板的多芯片互连封装结构还包括堆叠芯片,所述堆叠芯片贴装在所述精细线路层远离所述封装芯片的一侧,并包覆在所述封装线路层内,且所述堆叠芯片与所述精细线路层电连接。
第二方面,本发明提供一种带有散热板的多芯片互连封装结构的制备方法,用于制备如前述实施方式任一项所述的带有散热板的多芯片互连封装结构,所述制备方法包括:
制备精细线路层和散热板;
将封装芯片非功能面贴装在散热板上;
将芯片功能面和散热板一起贴装在精细线路层上;
在所述精细线路层上形成包覆在所述封装芯片和所述散热板外的塑封体;
在所述塑封体上形成封装线路层;
在所述精细线路层远离所述封装芯片一侧形成基底线路层;
沿切割道切割所述基底线路层、所述精细线路层、所述塑封体和所述封装线路层;
其中,所述基底线路层与所述精细线路层电连接,所述封装芯片与所述基底线路层电连接,所述封装线路层与所述精细线路层电连接。
在可选的实施方式中,在将封装芯片贴装在精细线路层上的步骤之前,所述制备方法还包括:
在基板上制备所述精细线路层。
在可选的实施方式中,在所述精细线路层远离所述封装芯片一侧形成基底线路层的步骤之前,所述制备方法还包括:
剥离或减薄所述基板。
在可选的实施方式中,在所述精细线路层上形成包覆在所述封装芯片和所述散热板外的塑封体的步骤之前,所述制备方法还包括:
在所述散热板远离所述封装芯片的一侧表面贴装堆叠芯片。
第三方面,本发明提供一种带有散热板的多芯片互连封装结构的制备方法,用于制备如前述实施方式任一项所述的带有散热板的多芯片互连封装结构,所述制备方法包括:
将封装芯片贴装在散热板上;
将散热板和封装芯片贴装在一基板上;
在所述基板上形成包覆在所述封装芯片和所述散热板外的塑封体;
去除所述基板并在所述封装芯片的一侧形成精细线路层;
在所述精细线路层远离所述封装芯片一侧贴装堆叠芯片;
在所述精细线路层远离所述封装芯片的一侧形成封装线路层,并植球;
其中,所述封装线路层与所述精细线路层电连接,所述封装芯片与所述精细线路层电连接,所述堆叠芯片与所述精细线路层电连接,所述堆叠芯片包覆在所述封装线路层中。
本发明实施例的有益效果包括,例如:
本发明实施例提供的带有散热板的多芯片互连封装结构及其制备方法,首先在精细线路层上贴装封装芯片,然后在精细线路层上设置散热板,散热板贴装在封装芯片远离精细线路层的一侧,再在精细线路层上塑封形成包覆在封装芯片和散热板外的塑封体,再在塑封体上设置封装线路层,其中,所述封装芯片与所述精细线路层电连接,所述封装线路层与所述精细线路层电连接。相较于现有技术,本发明在使用精细线路封装的基础上,通过增设散热板,且散热板同时与精细线路层和封装芯片相接触,能够将封装芯片和精细线路层产生的热量迅速带走,并传递至外部,从而极大地提升了精细线路封装结构的散热能力,很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,应当理解,以下附图仅示出了本发明的某些实施例,因此不应被看作是对范围的限定,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他相关的附图。
图1为本发明第一实施例提供的带有散热板的多芯片互连封装结构的示意图;
图2至图7为本发明第一实施例提供的带有散热板的多芯片互连封装结构的制备方法的工艺流程图;
图8为本发明第二实施例提供的带有散热板的多芯片互连封装结构的示意图;
图9为本发明第三实施例提供的带有散热板的多芯片互连封装结构的示意图。
图标:100-带有散热板的多芯片互连封装结构;110-精细线路层;111-精细布线层;113-精细绝缘层;115-第一导电孔;117-基材绝缘层;120-封装芯片;130-散热板;131-支撑部;133-贴装部;135-流通孔;137-导热粘接层;140-塑封体;150-封装线路层;151-封装布线层;153-封装绝缘层;155-第二导电孔;160-基底线路层;161-基底布线层;163-基底绝缘层;165-第三导电孔;170-焊球;180-堆叠芯片;200-基板。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。通常在此处附图中描述和示出的本发明实施例的组件可以以各种不同的配置来布置和设计。
因此,以下对在附图中提供的本发明的实施例的详细描述并非旨在限制要求保护的本发明的范围,而是仅仅表示本发明的选定实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
应注意到:相似的标号和字母在下面的附图中表示类似项,因此,一旦某一项在一个附图中被定义,则在随后的附图中不需要对其进行进一步定义和解释。
在本发明的描述中,需要说明的是,若出现术语“上”、“下”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,或者是该发明产品使用时惯常摆放的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
此外,若出现术语“第一”、“第二”等仅用于区分描述,而不能理解为指示或暗示相对重要性。
需要说明的是,在不冲突的情况下,本发明的实施例中的特征可以相互结合。
第一实施例
参见图1,本实施例提供了一种带有散热板的多芯片互连封装结构100,在使用精细线路封装的基础上,通过增设散热板130,且散热板130同时与精细线路层110和封装芯片120相接触,能够将封装芯片120和精细线路层110产生的热量迅速带走,并传递至外部,从而极大地提升了精细线路封装结构的散热能力,很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。
本实施例提供的带有散热板的多芯片互连封装结构100,包括精细线路层110、封装芯片120、堆叠芯片180、散热板130、塑封体140、封装线路层150和基底线路层160,封装芯片120贴装在精细线路层110上,散热板130设置在精细线路层110,并贴装在封装芯片120远离精细线路层110一侧,塑封体140包覆在封装芯片120和散热板130外,封装线路层150设置在塑封体140上,基底线路层160设置在精细线路层110远离封装芯片120一侧。其中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。堆叠芯片180贴装在散热板130远离封装芯片120的一侧,并包覆在塑封体140内,且堆叠芯片180与封装线路层150或散热板130电连接。
在本实施例中,封装芯片120和堆叠芯片180的数量相同,可以一一对应地贴装在散热板130的两侧表面,从而共同利用散热板130进行散热,同时堆叠芯片180可以与上部的封装线路层150实现电连接。
需要说明的是,本实施例中散热板130包括一体设置的支撑部131和贴装部133,贴装部133具有一用于容置封装芯片120的沉槽,且贴装部133贴装在封装芯片120远离精细线路层110的一侧表面,支撑部131贴装在精细线路层110上,且贴装部133和支撑部131之间设置有用于供塑封料通过的流通孔135。具体地,散热板130采用金属制板,在实际制备时可以在金属板的两侧表面开槽形成凹槽,两侧凹槽分别用于贴装封装芯片120和堆叠芯片180,凹槽部分即形成了贴装部133,用于容置封装芯片120或堆叠芯片180,未开槽部分即形成了支撑部131,且支撑部131和贴装部133之间还开设有在塑封时供塑封料通过的流通孔135,从而方便塑封时塑封体140将整个散热板130均包覆在内。
需要说明的是,此处散热板130在垂直方向上可以通过单面挖槽的方式实现分区,在其他较佳的实施例中,也可以通过双面挖槽形成分区,或者不进行挖槽直接进行贴装,对于散热板130的结构在此不做具体限定,只需要满足贴合在封装芯片120上以实现散热即可。
在制备该带有散热板的多芯片互连封装结构100时,首先可以提前制备封装芯片120、散热板130和精细线路层110,其中精细线路层110可以直接在载板上涂布胶膜层后布线形成,在形成精细线路层110后,将封装芯片120倒装在精细线路层110上,此时封装芯片120与精细线路层110之间通过绝缘胶粘合,并未直接进行电接触。
在本实施例中,贴装部133与封装芯片120之间设置有导热粘接层137,封装芯片120通过导热粘接层137与贴装部133粘接在一起。具体地,可以采用导热粘合材料将散热板130和贴装好封装芯片120的精细线路层110压合在一起,其中封装芯片120的非功能面精确对位贴合在贴装部133,其中,支撑部131可以支撑在精细线路层110的表面,从而起到支撑作用,从而使得整个封装结构的结构强度得以增强。
需要说明的是,本实施例中塑封体140内设置有两个封装芯片120,两个封装芯片120的尺寸、类型、功能都可以不同,且贴装部133能够同时贴合在两个封装芯片120的非功能面,两个封装芯片120间隔贴装在精细线路层110上。其中贴装部133上还开设有流通孔135,该流通孔135位于两个封装芯片120之间,从而方便塑封料流入到两个封装芯片120之间的空间。
在本实施例中,可以在塑封体140上开槽露出堆叠芯片180的焊盘,并在制备封装线路层150时直接将封装线路层150与堆叠芯片180连接,也可以在贴装芯片时即将堆叠芯片180通过打线方式与散热板130连接,后续封装线路层150与散热板130电连接,从而实现了堆叠芯片180的电气连接。
在本实施例中,第一导电孔115也可以导通至散热板130,从而使得散热板130与基底线路层160直接电连接,对于本实施例中散热板130、精细线路层110、基底线路层160、封装线路层150、封装芯片120和堆叠芯片180之间的电气连接方式,在此不作限定。
在本实施例中,每个封装芯片120的非功能面均设置有导热层,在导热层上涂布导热粘合材料,从而将封装芯片120贴合在散热板130上,通过设置导热层和导热粘接层137,能够使得热量迅速地传递至散热板130,进一步提升散热效果。
在本实施例中,在贴装完封装芯片120和散热板130后,可以进行塑封,通过传递模塑(transfer mold)、压铸模塑(compress mold)、喷射模塑(inject mold)、真空覆膜(Vacuum lamination)等工艺,使塑封料在散热板130上的流通孔135内流通并填充,从而完全包裹封装芯片120、精细线路层110和散热板130。需要说明的是,本实施例中塑封体140可完全覆盖散热板130,在其他较佳的实施例中,塑封体140也可以或露出散热板130的顶面,且塑封体140和散热板130同平面,可以在塑封时即露出散热板130,也可以在塑封完成后进行研磨,从而露出散热板130。
精细线路层110包括精细布线层111和精细绝缘层113,精细绝缘层113包覆在精细布线层111外,封装芯片120贴装在精细绝缘层113的一侧表面,且精细布线层111外露于精细绝缘层113远离封装芯片120的一侧表面,基底线路层160设置在精细绝缘层113远离封装芯片120的一侧,并与精细布线层111电连接。具体地,可以在载板上涂布胶膜层后完成精细布线,形成精细布线层111,其布线工艺与常规的精细布线工艺一致,然后在贴装封装芯片120时覆盖一层绝缘材料,从而形成了精细绝缘层113,起到隔离作用。
具体地,可以在完成塑封后去除或减薄载板,当采用去除载板工艺时,胶膜层可以采用可剥离的材料,例如UV胶层,方便后续进行载板剥离工艺。
在本实施例中,封装芯片120的功能面设置有引脚焊盘,引脚焊盘贴装在精细线路层110上,精细线路层110上制备有贯通至引脚焊盘或散热板130的第一导电孔115,第一导电孔115中填充有导电材料,基底线路层160覆盖在第一导电孔115上,并通过第一导电孔115与引脚焊盘或散热板130电连接。具体地,第一导电孔115可以直接在精细绝缘层113上利用光刻或者激光打孔,从而将引脚焊盘暴露在外,然后在开口内利用电镀或者印刷导电膏的方式填充导电材料,从而形成了第一导电孔115,其中,第一导电孔115内可以填充铜料,以实现良好的导电性能。
在本发明其他较佳的实施例中,第一导电孔115也可以开设在与散热板130对应的位置,例如将支撑部131露出,从而使得基底线路层160与散热板130电连接,从而也实现了电气连接。
在本实施例中,基底线路层160包括基底布线层161和基底绝缘层163,基底布线层161设置在精细线路层110远离封装芯片120的一侧表面,并同时与精细线路层110和第一导电孔115电连接,基底绝缘层163设置在精细线路层110远离封装芯片120的一侧表面,并覆盖在基底布线层161上。具体地,在形成第一导电孔115后,可以在精细绝缘层113的表面制备互连线路,从而形成基底布线层161,基底布线层161直接与第一导电孔115连接,从而实现了电气连接,然后再覆盖一层绝缘材料,并形成了基底绝缘层163。
在本实施例中,精细布线层111具有外接焊盘,塑封体140上制备有贯通至外接焊盘的第二导电孔155,第二导电孔155中填充有导电材料,封装线路层150覆盖在第二导电孔155,并通过第二导电孔155与外接焊盘电连接。具体地,在塑封完成后,可以在塑封体140的表面激光打孔制备互连孔,从而露出外接焊盘,然后填充导电材料。同时,本实施例中也可以额外激光打孔露出散热板130,并填充导电材料,方便封装线路层150与散热板130电接触。
在本实施例中,封装线路层150包括封装布线层151和封装绝缘层153,封装布线层151设置在塑封体140的表面,并与散热板130接触,且封装布线层151覆盖在第二导电孔155上,并与第二导电孔155电连接,封装绝缘层153设置在塑封体140的表面,并包覆在封装布线层151上。具体地,第二导电孔155贯穿整个塑封体140和部分精细绝缘层113,从而成功地将精细布线层111的外接焊盘暴露在外,填充导电材料后即实现了精细线路层110与封装布线层151的电连接。
在本实施例中,基底线路层160包括基底布线层161和基底绝缘层163,基底布线层161设置在精细线路层110远离封装芯片120的一侧表面,并同时与精细线路层110和第一导电孔115电连接,基底绝缘层163设置在精细线路层110远离封装芯片120的一侧表面,并覆盖在基底布线层161上。具体地,可以在完成第一导电孔115的制备后,在精细绝缘层113上完成布线,从而形成基底布线层161,完成底部互连布线,且基底布线层161通过第一导电孔115与封装芯片120电连接。
需要说明的是,由于本实施例中去除载板后,精细布线层111直接暴露在精细绝缘层113的表面,在制备基底布线层161时,基底布线层161可以直接与精细布线层111电接触,从而实现了精细布线层111、基底布线层161和封装芯片120电气连接为一体。当然,如若有残留的胶膜层,则可以通过激光开孔的方式将部分精细布线层111露出,从而在制备基底布线层161时同样能够实现与精细布线层111电连接。
还需要说明的是,本实施例中通过制备第一导电孔115和第二导电孔155,从而成功的将精细布线层111、基底布线层161、封装布线层151和散热板130电气连接为一体,从而实现了整个器件的电气连接。
在本实施例中,基底线路层160或封装线路层150上还设置有焊球170。具体地,本实施例中可以在封装线路层150上完成植球,即在封装绝缘层153上开槽露出封装布线层151,然后在封装绝缘层153的开口处进行镍金化镀、BGA植球,从而形成焊球170。其中,在其他较佳的实施例中,也可以在基底线路层160一侧完成植球,从而使得焊球170位于基底线路层160的底部。
在本发明其他较佳的实施例中,也可以选择不做BGA植球,可以在封装绝缘层153的开口处制备成表面贴装外接引脚,其同样能够实现电气外接功能。
本实施例还提供了一种带有散热板的多芯片互连封装结构100的制备方法,其用于制备如前述的带有散热板的多芯片互连封装结构100,该制备方法包括以下步骤:
S1:将封装芯片120贴装在精细线路层110上。
结合参见图2,具体地,可以将两个不同尺寸的封装芯片120通过绝缘材料贴装在精细线路层110上,贴装芯片之前,还需要提前制备精细线路层110、散热板130和封装芯片120,也可以利用采用其他产线上生产出的散热板130和封装芯片120。
在制备精细线路层110时,可以首先提供一基板200,该基板200可以是载板,也可以是基材衬底,然后在基板200上制备精细线路层110,即在基板200上完成精细布线形成精细布线层111,然后在贴封装芯片120前覆盖一层绝缘材料,形成精细绝缘层113,使得封装芯片120能够倒装贴合在精细线路层110上。其中,若后续步骤中需要剥离基板200,则可以在基板200上首先涂布一层UV胶层,然后再完成精细布线。其精细布线工艺与常规的精细布线工艺一致,然后在贴装封装芯片120时覆盖一层绝缘材料,从而形成了精细绝缘层113,起到隔离作用。
在制备散热板130时,可以首先根据预设的贴装位置在金属板上进行挖槽,从而对金属板进行分区,形成贴装部133和支撑部131,贴装部133为凹槽结构,用于容置并贴装封装芯片120,支撑部131用于支撑在精细线路层110上。然后再在贴装部133和支撑部131之间制备垂直方向的镂空孔,以形成在塑封时供塑封料通过的流通孔135。
在制备封装芯片120时,可以首先制备高功率密度晶圆,减薄后非功能面沉积金属,并在晶圆上制备焊盘凸块,然后进行晶圆简报,并在非功能面覆盖导热导电层,最后进行切割,得到单颗封装芯片120。其中封装芯片120可以是不同尺寸、不同制程、不同功能、不同材质的功率器件、射频芯片、数字芯片、逻辑芯片以及传感器等,对于封装芯片120的具体制程和类型尺寸等,在此不作具体限定。
S2:将散热板130贴装在精细线路层110的表面以及封装芯片120远离精细线路层110的一侧表面。
结合参见图3,具体地,用导热/导电粘合材料将贴装好封装芯片120的精细线路层110与散热板130压合在一起,每个封装芯片120的非功能面精确对位贴合在贴装部133,其中,支撑部131可以支撑在精细线路层110的表面,从而起到支撑作用,从而使得整个封装结构的结构强度得以增强。
在将散热板130贴装在精细线路层110上后,可以在贴装区背离封装芯片120的表面再次贴装堆叠芯片180,完成贴装区的双面贴装。
本实施例提供的带有散热板的多芯片互连封装结构100及其制备方法,首先在精细线路层110上贴装封装芯片120,然后在精细线路层110上设置散热板130,散热板130贴装在封装芯片120远离精细线路层110的一侧,然后再次贴装堆叠芯片180,再在精细线路层110上塑封形成包覆在封装芯片120和散热板130外的塑封体140,再在塑封体140上设置封装线路层150,最后在精细线路层110的底侧设置基底线路层160,其中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。相较于现有技术,本实施例在使用精细线路封装的基础上,通过增设散热板130,且散热板130同时与精细线路层110、封装芯片120和堆叠芯片180相接触,能够将封装芯片120、堆叠芯片180和精细线路层110产生的热量迅速带走,并传递至外部,从而极大地提升了精细线路封装结构的散热能力,很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。此外,通过垂直堆叠芯片180封装结构,能够增加堆叠数量,从而提升器件的集成度,有利于产品的小型化。
需要说明的是,在步骤S2中,需要将基板200翻转后进行压合,压合完成后再次翻转,方便执行步骤S3。
S3:在精细线路层110上形成包覆在封装芯片120和散热板130外的塑封体140。
结合参见图4,塑封体140同时包覆在堆叠芯片180外,在贴装完散热板130后,可以进行塑封工艺,通过传递模塑(transfer mold)、压铸模塑(compress mold)、喷射模塑(inject mold)、真空覆膜(Vacuum lamination)等工艺,使塑封料在散热板130上的流通孔135内流通并填充,从而完全包裹芯片、精细线路层110和散热板130。
需要说明的是,本实施例中塑封体140可完全覆盖散热板130,在其他较佳的实施例中,塑封体140也可以或露出散热板130的顶面,且塑封体140和散热板130同平面,可以在塑封时即露出散热板130,也可以在塑封完成后进行研磨,从而露出散热板130。
S4:在塑封体140上形成封装线路层150。
具体地结合参见图5,在塑封体140上利用激光打孔工艺制备互连孔,从而将散热板130暴露出来,同时在塑封体140上打孔,将精细线路层110上的外接焊盘暴露在外,形成第二导电孔155,在第二导电孔155之填充导电材料,从而使得第二导电孔155与精细线路层110电连接。在开孔完成后,可以在塑封体140的表面制备封装布线层151和封装引脚焊盘,然后再次覆盖一层绝缘材料,形成封装绝缘层153,完成封装线路层150的制备。
需要说明的是,后续需要在封装线路层150上植球,故在执行完步骤S4后,可以在封装绝缘层153上开口,使得封装布线层151外露,方便后续植球。
S5:在精细线路层110远离封装芯片120一侧形成基底线路层160。
结合参见图6,具体地,在完成上部的封装线路层150的制备后,可以去除基板200,利用UV光照射方式使得UV胶层剥离,从而完成基板200的剥离,剥离基板200后使得精细布线层111直接暴露在精细绝缘层113外,然后再在精细绝缘层113的表面制备互连线路,形成基底布线层161,再覆盖一层绝缘材料,形成基底绝缘层163,其中基底布线层161能够直接与精细布线层111连接,并与封装芯片120的引脚焊盘电连接,实现电气连接。
在本实施例中,在制备基底布线层161之前,还可以在精细绝缘层113上开槽,使得封装芯片120功能面的引脚焊盘暴露在外,形成第一导电孔115,然后在第一导电孔115内填充导电材料,使得第一导电孔115与封装芯片120之间电连接,然后制备基底布线层161,使得基底布线层161、精细布线层111以及封装芯片120能够电连接为一体。
在本发明其他较佳的实施例中,第一导电孔115也可以直接导通至散热板130,从而使得散热板130、精细布线层111以及基底布线层161电连接为一体。
S6:在封装线路层150上植球,以形成焊球170。
具体地,结合参见图7,在完成基底线路层160的制备后,可以在封装线路层150上进行植球,即在封装绝缘层153的开口处进行镍金化镀、BGA植球,从而形成焊球170。当然,此处也可以选择不做BGA植球,可以在封装绝缘层153的开口处制备成表面贴装外接引脚,其同样能够实现电气外接功能。
在本发明其他较佳的实施例中,也可以在基底线路层160上植球,以形成焊球170,具体可以在基底绝缘层163上开口,并进行镍金化镀、BGA植球,从而形成焊球170。
S7:沿切割道切割基底线路层160、精细线路层110、塑封体140和封装线路层150。
具体地,请继续参见图1,可以沿提前制备的切割道进行切割,从而得到单颗产品。
在本实施例中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。
综上所述,本实施例提供的带有散热板的多芯片互连封装结构100及其制备方法,首先在精细线路层110上贴装封装芯片120,然后在精细线路层110上设置散热板130,散热板130贴装在封装芯片120远离精细线路层110的一侧,再在精细线路层110上塑封形成包覆在封装芯片120和散热板130外的塑封体140,再在塑封体140上设置封装线路层150,最后在精细线路层110的底侧设置基底线路层160,其中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。相较于现有技术,本实施例在使用精细线路封装的基础上,通过增设散热板130,且散热板130同时与精细线路层110和封装芯片120相接触,能够将封装芯片120和精细线路层110产生的热量迅速带走,并传递至外部,从而极大地提升了精细线路封装结构的散热能力,很好的解决了系统封装同时要求精细互连、高密度封装、良好散热能力的要求。
第二实施例
参见图8,本实施例提供了一种带有散热板的多芯片互连封装结构100,其基本结构和原理及产生的技术效果和第一实施例相同,为简要描述,本实施例部分未提及之处,可参考第一实施例中相应内容。
在本实施例中,与第一实施例的不同之处,在于精细线路层110。
在本实施例中,带有散热板的多芯片互连封装结构100包括精细线路层110、封装芯片120、散热板130、塑封体140、封装线路层150和基底线路层160,封装芯片120贴装在精细线路层110上,散热板130设置在精细线路层110,并贴装在封装芯片120远离精细线路层110一侧,塑封体140包覆在封装芯片120和散热板130外,封装线路层150设置在塑封体140上,基底线路层160设置在精细线路层110远离封装芯片120一侧。其中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。
精细线路层110包括精细布线层111、精细绝缘层113和基材绝缘层117,精细绝缘层113包覆在精细布线层111外,封装芯片120贴装在精细绝缘层113的一侧表面,且精细布线层111外露于精细绝缘层113远离封装芯片120的一侧表面,基底线路层160设置在精细绝缘层113远离封装芯片120的一侧,并与精细布线层111电连接。基材绝缘层117设置在精细绝缘层113远离封装芯片120的一侧表面,并覆盖在精细布线层111上,基底线路层160设置在基材绝缘层117远离封装芯片120的一侧表面,且基材绝缘层117上制备有贯通至精细布线层111的第三导电孔165,基底线路层160通过第三导电孔165与精细布线层111电连接。具体地,可以在完成封装线路层150的制备后减薄载板,从而保留了部分载板和胶膜层,并构成了基材绝缘层117;或者,在去除载板后再次涂布一层绝缘材料,从而将精细布线层111包覆在内,形成了基材绝缘层117。
本实施例还提供了一种带有散热板的多芯片互连封装结构100的制备方法,用于制备前述的带有散热板的多芯片互连封装结构100,该制备方法的基本步骤和原理及产生的技术效果和第一实施例相同,为简要描述,本实施例部分未提及之处,可参考第一实施例中相应内容。
与第一实施例相比,本实施例提供的制备方法,不同之处在于步骤S5。其中步骤S1至步骤S4、S6和S7可以参考第一实施例。
S5:在精细线路层110远离封装芯片120一侧形成基底线路层160。
具体地,可以在完成封装线路层150的制备后减薄载板,从而保留了部分载板和胶膜层,并构成了基材绝缘层117;或者,在去除载板后再次涂布一层绝缘材料,从而将精细布线层111包覆在内,形成了基材绝缘层117。
在本发明其他较佳的实施例中,也可以直接贴装预先制备好的双面线路板,上侧为精细线路层110,下侧再进行布线,可以是精细线路,也可以是非精细线路,且线路板上可以预先制备互连孔。
相较于第一实施例,本实施例提供的带有散热板的多芯片互连封装结构100及其制备方法,通过保留部分基板200的方法,使得整个封装结构的结构强度得以增强,并且避免了剥离基板200时产生的残胶问题。
第三实施例
参见图9,本实施例提供了一种带有散热板的多芯片互连封装结构100,其基本结构和原理及产生的技术效果和第一实施例相同,为简要描述,本实施例部分未提及之处,可参考第一实施例中相应内容。
在本实施例中,带有散热板的多芯片互连封装结构100包括精细线路层110、封装芯片120、堆叠芯片180、散热板130、塑封体140、封装线路层150和基底线路层160,封装芯片120贴装在精细线路层110上,散热板130设置在精细线路层110,并贴装在封装芯片120远离精细线路层110一侧,塑封体140包覆在封装芯片120和散热板130外,封装线路层150设置在塑封体140上,基底线路层160设置在精细线路层110远离封装芯片120一侧。其中,基底线路层160与精细线路层110电连接,封装芯片120与基底线路层160电连接,基底线路层160与精细线路层110电连接,封装线路层150与精细线路层110电连接。封装线路层150设置在精细线路层110远离封装芯片120的一侧,堆叠芯片180贴装在精细线路层110远离封装芯片120的一侧,并包覆在封装线路层150内,且堆叠芯片180与精细线路层110电连接。
本实施例还提供了一种带有散热板的多芯片互连封装结构100的制备方法,具体包括:
S1:将封装芯片120贴装在散热板130上。
具体地,用粘合材料将封装芯片120贴装在散热板130上,精确对位。
S2:将散热板130和封装芯片120贴装在基板200上。
具体地,通过临时键合材料将贴有封装芯片120的散热板130与基板200压合在一起。
S3:在基板200上形成包覆在封装芯片120和散热板130外的塑封体140。
具体地,在贴装完散热板130后,可以进行塑封工艺,通过传递模塑(transfermold)、压铸模塑(compress mold)、喷射模塑(inject mold)、真空覆膜(Vacuumlamination)等工艺,使塑封料在散热板130上的流通孔135内流通并填充,从而完全包裹芯片、基板200和散热板130。
S4:去除基板200并在封装芯片120的一侧形成精细线路层110。
具体地,去除临时载板和临时键合材料,在封装芯片120功能面一侧覆盖绝缘材料并制备互连孔,露出封装芯片120的引脚或散热板,然后在互连孔内填充导电材料,并在绝缘层上制备完成精细线路层110。
S5:在精细线路层110远离封装芯片120的一侧贴装堆叠芯片180。
具体地,将堆叠芯片180倒装在精细线路层上,其中堆叠芯片可以是需要腔体保护的芯片,如滤波芯片、微流芯片等。
S6:在精细线路层110远离封装芯片120的一侧形成封装线路层150,并植球。
具体地,在完成堆叠芯片180的贴装后,可以利用塑封材料包覆堆叠芯片180,然后在塑封材料上完成布线和植球动作,形成封装线路层150和焊球170。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。
Claims (17)
1.一种带有散热板的多芯片互连封装结构,其特征在于,包括:
精细线路层;
贴装在所述精细线路层上的至少一颗封装芯片;
设置在所述精细线路层上,并贴装在所述封装芯片上远离所述精细线路层一侧的散热板;
包覆在所述封装芯片和所述散热板外的塑封体;
以及,设置在所述塑封体上或所述精细线路层远离所述封装芯片一侧的封装线路层;
其中,所述封装芯片非功能面贴装在所述散热板的贴装部,绝缘材料将所述封装芯片的功能面贴装在所述精细线路层上;且所述绝缘材料将所述散热板支撑部直接贴在精细线路上;所述封装芯片与所述精细线路层电连接,所述封装线路层与所述精细线路层电连接;
所述精细线路层上制备有第一导电孔,通过所述第一导电孔内导电材料实现所述精细线路和所述封装芯片的引脚焊盘直接电互连。
2.根据权利要求1所述的带有散热板的多芯片互连封装结构,其特征在于,所述散热板包括一体设置的支撑部和贴装部,所述贴装部具有一用于容置所述封装芯片的沉槽,且所述贴装部贴装在所述封装芯片远离所述精细线路层的一侧表面,所述支撑部贴装在所述精细线路层上,且所述贴装部和所述支撑部之间设置有用于供塑封料通过的流通孔。
3.根据权利要求2所述的带有散热板的多芯片互连封装结构,其特征在于,所述贴装部与所述封装芯片之间设置有导热粘接层,所述封装芯片通过所述导热粘接层与所述贴装部粘接在一起。
4.根据权利要求1所述的带有散热板的多芯片互连封装结构,其特征在于,所述封装芯片的功能面设置有芯片引脚焊盘,所述芯片引脚焊盘贴装在所述精细线路层上,所述精细线路层上制备有贯通至所述芯片引脚焊盘或所述散热板的第一导电孔,在所述第一导电孔中填充导电材料将所述芯片和所述精细线路层实现互连,所述带有散热板的多芯片互连封装结构还包括基底线路层,所述基底线路层覆盖在所述第一导电孔上,并通过所述第一导电孔与所述芯片引脚焊盘或所述散热板电连接。
5.根据权利要求4所述的带有散热板的多芯片互连封装结构,其特征在于,所述基底线路层包括基底布线层和基底绝缘层,所述基底布线层设置在所述精细线路层远离所述封装芯片的一侧表面,并同时与所述精细线路层和/或所述第一导电孔电连接,所述基底绝缘层设置在所述精细线路层远离所述封装芯片的一侧表面,并覆盖在所述基底布线层上。
6.根据权利要求4所述的带有散热板的多芯片互连封装结构,其特征在于,所述精细线路层包括精细布线层和精细绝缘层,所述精细绝缘层包覆在所述精细布线层外,所述封装芯片贴装在所述精细绝缘层的一侧表面,且所述精细布线层外露于所述精细绝缘层远离所述封装芯片的一侧表面,所述基底线路层设置在所述精细绝缘层远离所述封装芯片的一侧,并与所述精细布线层电连接。
7.根据权利要求6所述的带有散热板的多芯片互连封装结构,其特征在于,所述精细线路层还包括基材绝缘层,所述基材绝缘层设置在所述精细绝缘层远离所述封装芯片的一侧表面,并覆盖在所述精细布线层上,所述基底线路层设置在所述基材绝缘层远离所述封装芯片的一侧表面,且所述基材绝缘层上制备有贯通至所述精细布线层和/或所述基底线路层的第三导电孔,所述基底线路层通过所述第三导电孔与所述精细布线层电连接。
8.根据权利要求6所述的带有散热板的多芯片互连封装结构,其特征在于,所述精细布线层具有外接焊盘,所述塑封体上制备有贯通至所述外接焊盘的第二导电孔,所述第二导电孔中填充有导电材料,所述封装线路层覆盖在所述第二导电孔,并通过所述第二导电孔与所述外接焊盘电连接。
9.根据权利要求8所述的带有散热板的多芯片互连封装结构,其特征在于,所述封装线路层包括封装布线层和封装绝缘层,所述封装布线层设置在所述塑封体的表面,且所述封装布线层覆盖在所述第二导电孔上,并与所述第二导电孔电连接,或/和所述散热板电接触,所述封装绝缘层设置在所述塑封体的表面,并包覆在所述封装布线层上。
10.根据权利要求8所述的带有散热板的多芯片互连封装结构,其特征在于,所述带有散热板的多芯片互连封装结构还包括堆叠芯片,所述堆叠芯片非功能面贴装在所述散热板远离所述封装芯片的一侧,并包覆在所述塑封体内,且通过所述第二导电孔使所述堆叠芯片与所述封装线路层或所述散热板电连接。
11.根据权利要求4所述的带有散热板的多芯片互连封装结构,其特征在于,所述基底线路层或所述封装线路层上还设置有焊球。
12.根据权利要求1-9任一项所述的带有散热板的多芯片互连封装结构,其特征在于,所述封装线路层设置在所述精细线路层远离所述封装芯片的一侧,所述带有散热板的多芯片互连封装结构还包括堆叠芯片,所述堆叠芯片贴装在所述精细线路层远离所述封装芯片的一侧,并包覆在所述封装线路层内,且所述堆叠芯片与所述精细线路层电连接。
13.一种带有散热板的多芯片互连封装结构的制备方法,用于制备如权利要求1-12任一项所述的带有散热板的多芯片互连封装结构,其特征在于,所述制备方法包括:
制备精细线路层和散热板;
将封装芯片非功能面贴装在散热板上;
将芯片功能面和散热板一起贴装在精细线路层上;
在所述精细线路层上形成包覆在所述封装芯片和所述散热板外的塑封体;
在所述精细线路层的绝缘材料中制备第一互连孔,并填充导电材料;
在所述精细线路层和所述第一导电孔远离所述封装芯片一侧形成基底线路层或/和封装引脚焊盘;
在所述塑封体上制备贯穿所塑封体的第二导电孔和第三导电孔,并填充导电材料;
在所述塑封体和所述第二导电孔和第三导电孔上形成封装线路层或/和封装引脚焊盘,所述导电孔与所述封装线路层电连接;
制备封装外接凸块;
沿切割道切割所述基底线路层、所述精细线路层、所述塑封体和所述封装线路层;
其中,所述基底线路层与所述精细线路层电连接,所述封装芯片与所述精细线路层或/和所述基底线路层电连接,所述封装线路层与所述精细线路层电连接。
14.根据权利要求13所述的带有散热板的多芯片互连封装结构的制备方法,其特征在于,在将封装芯片贴装在精细线路层上的步骤之前,所述制备方法还包括:
在临时载板上涂覆可剥离粘合材料,在所述可剥离粘合材料上制备所述精细线路层;或在基底材料上制备所述精细线路层。
15.根据权利要求14所述的带有散热板的多芯片互连封装结构的制备方法,其特征在于,在所述精细线路层远离所述封装芯片一侧形成基底线路层的步骤之前,所述制备方法还包括:
剥离所述临时载板和所述可剥离粘合材料;或减薄所述基底材料。
16.根据权利要求13所述的带有散热板的多芯片互连封装结构的制备方法,其特征在于,在所述精细线路层上形成包覆在所述封装芯片和所述散热板外的塑封体的步骤之前,所述制备方法还包括:
在所述散热板远离所述封装芯片的一侧表面贴装堆叠芯片。
17.一种带有散热板的多芯片互连封装结构的制备方法,用于制备如权利要求1-12任一项所述的带有散热板的多芯片互连封装结构,其特征在于,所述制备方法包括:
制备精细线路层和散热板;
将封装芯片功能面贴装在散热板上;
将散热板和封装芯片功能面一起贴装在一基板上;
在所述基板上形成包覆在所述封装芯片和所述散热板外的塑封体;
去除所述基板并在所述封装芯片的一侧形成精细线路层;
在所述精细线路层远离所述封装芯片一侧贴装堆叠芯片;
在所述精细线路和堆叠芯片一层形成包封所述堆叠芯片和所述精细线路的第二塑封体;
制备贯穿第二塑封体的导电孔,露出精细互连线路或/和所述堆叠芯片引脚焊盘,所述导电孔内填充导电材料;
在所述精细线路层远离所述封装芯片的一侧形成封装线路层,并植球;
其中,所述封装线路层与所述精细线路层电连接,所述封装芯片与所述精细线路层电连接,所述堆叠芯片与所述精细线路层电连接,或/和堆叠芯片与封装线路层电连接。
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