CN108269546A - Gate driving circuit and its driving method, display panel, display device - Google Patents
Gate driving circuit and its driving method, display panel, display device Download PDFInfo
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- CN108269546A CN108269546A CN201810103697.3A CN201810103697A CN108269546A CN 108269546 A CN108269546 A CN 108269546A CN 201810103697 A CN201810103697 A CN 201810103697A CN 108269546 A CN108269546 A CN 108269546A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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Abstract
The disclosure provides a kind of gate driving circuit and its driving method, display panel and display device, is related to display technology field.The gate driving circuit includes multirow shift register cell, which includes multiple the first shift register cells positioned at odd-numbered line and multiple the second shift register cells positioned at even number line；First shift register cell cascades successively according to the first sequence, second shift register cell cascades successively according to the second sequence, the output terminal of first shift register cell of afterbody connects the input terminal of the second shift register cell of initial level-one, the reset terminal of the first shift register cell of the output terminal connection afterbody of the second shift register cell of initial level-one；Wherein, the first sequence and the second sequence are opposite sequence.The disclosure can eliminate the charge rate difference between parity rows, bad so as to improve showing.
Description
Technical field
This disclosure relates to display technology field more particularly to a kind of gate driving circuit and its driving method, display panel
And display device.
Background technology
With the development of optical technology and semiconductor technology, with LCD (Liquid Crystal Display, liquid crystal display
Device) for the flat-panel monitor of representative have the characteristics that frivolous, low energy consumption, reaction speed is fast, excitation purity is good and contrast is high,
Leading position is occupied in display field.Display device presents high integration in recent years and the development of low cost becomes
Gesture.With GOA (Gate Driver on Array, array substrate row driving) technology for representative, using GOA technologies by gate driving
Circuit is integrated in the neighboring area of array substrate, and the integrated of display device can be effectively improved while narrow frame design is realized
Degree.GOA circuits are actually the cascade circuit being made of the shift register of one group of enormous amount, and each shift register wraps
Include input module, reseting module and output module.Wherein, the output terminal of every level-one shift register of GOA circuits is corresponding connects
A grid line is connected to, for exporting gated sweep signal to the grid line, to realize its progressive scan function.
The displaying principle of LCD is mainly to be driven by applying different voltage to pixel electrode and public electrode with being formed
The driving electric field of dynamic liquid crystal molecule deflection realizes its display function so as to control light through intensity.If in view of to
Pixel electrode applies identical data voltage liquid crystal molecule to be driven to be rotated always, then increases over time liquid crystal point
Son will be gradually blunt to the reaction of driving electric field.Based on this, reverse drive method can be used to avoid this problem in the prior art
It generates, i.e., periodically-varied applies to the positive-negative polarity of the data voltage of pixel electrode, polarizes to avoid liquid crystal molecule.Wherein,
Dot inversion type of drive is inversion driving mode common at present, but its power consumption is relatively large, therefore Z counter-rotative type pixels occurs
Based on the structure, the driving effect of dot inversion can be realized using the type of drive of column inversion for structure.
But the Z counter-rotative types dot structure will appear fine pitch mura when using regular grid driving circuit
(microgroove is bad) is mainly reflected under double-colored colour mixture picture, and the signal waveform of data line has often row scanning saltus step and a frame
The constant two kinds of waveforms of voltage, therefore the charge rate of odd rows and even number line sub-pixel differs greatly.
It should be noted that information is only used for strengthening the reason to the background of the disclosure disclosed in above-mentioned background technology part
Solution, therefore can include not forming the information to the prior art known to persons of ordinary skill in the art.
Invention content
The disclosure is designed to provide a kind of gate driving circuit and its driving method, display panel and display dress
It puts, is drawn under double-colored dither pattern by data line signal variation pattern for solving the dot structure based on Z reversion frameworks
The problem of parity rows charge rate difference of hair is larger.
Other characteristics and advantages of the disclosure will be by the following detailed description apparent from or partially by the disclosure
Practice and acquistion.
According to one aspect of the disclosure, a kind of gate driving circuit is provided, it is described including multirow shift register cell
Multirow shift register cell includes multiple the first shift register cells positioned at odd-numbered line and multiple is located at the of even number line
Two shift register cells；
First shift register cell according to first sequence cascade successively, second shift register cell according to
Second sequence cascades successively, and the output terminal of first shift register cell of afterbody connects described the of initial level-one
The input terminal of two shift register cells, the output terminal connection afterbody of second shift register cell of initial level-one
First shift register cell reset terminal；
Wherein, first sequence and second sequence are opposite sequence.
In a kind of exemplary embodiment of the disclosure, first sequence is from the first row shift register cell to last
A line shift register cell, second sequence are from last column shift register cell to the first line shift register list
Member.
In a kind of exemplary embodiment of the disclosure, first sequence is from last column shift register cell to the
A line shift register cell, second sequence are from the first row shift register cell to last column shift register list
Member.
According to one aspect of the disclosure, a kind of driving method of gate driving circuit is provided, for driving above-mentioned grid
Pole driving circuit；The driving method includes：
Multiple the first shift register cells positioned at odd-numbered line is driven to open successively with the first sequence；
The second shift register cell for driving initial level-one by the first shift register cell of afterbody is opened；
Multiple the second shift register cells positioned at even number line is driven to open successively with the second sequence.
In a kind of exemplary embodiment of the disclosure, first sequence is from the first row shift register cell to last
A line shift register cell, second sequence are from last column shift register cell to the first line shift register list
Member.
In a kind of exemplary embodiment of the disclosure, first sequence is from last column shift register cell to the
A line shift register cell, second sequence are from the first row shift register cell to last column shift register list
Member.
In a kind of exemplary embodiment of the disclosure, the scanning sequency of the driving method includes forward scan and reversely sweeps
It retouches.
According to one aspect of the disclosure, a kind of display panel is provided, including multi-strip scanning line arranged in a crossed manner and a plurality of
Data line, the multiple sub-pixels and above-mentioned grid of the array arrangement limited by the scan line and the data line drive
Dynamic circuit；
Wherein, in same row sub-pixel, the sub-pixel positioned at odd-numbered line is connected to not with the sub-pixel positioned at even number line
The same data line.
In a kind of exemplary embodiment of the disclosure, the multiple sub-pixel include red sub-pixel, green sub-pixels and
Blue subpixels.
According to one aspect of the disclosure, a kind of display device is provided, including above-mentioned display panel or including above-mentioned
Gate driving circuit.
Gate driving circuit and its driving method, display panel and the display that disclosure illustrative embodiments are provided
Device, by changing the cascade structure of shift register cell, so that the scanning sequency of a frame picture is changed, in this way
It is primary that the original primary data-signal of often row saltus step of control becomes field saltus step so that frequently leads to charging not by signal saltus step
The sub-pixel of foot can obtain enough charging time, and the charge rate eliminated with this in double-colored colour mixture between each row sub-pixel is poor
It is different, it is bad so as to improve fine pitch mura.
It should be understood that above general description and following detailed description are only exemplary and explanatory, not
The disclosure can be limited.
Description of the drawings
Attached drawing herein is incorporated into specification and forms the part of this specification, shows the implementation for meeting the disclosure
Example, and for explaining the principle of the disclosure together with specification.It should be evident that the accompanying drawings in the following description is only the disclosure
Some embodiments, for those of ordinary skill in the art, without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 schematically shows the signal intensity schematic diagram of disclosure exemplary embodiment midpoint inversion driving mode；
Fig. 2 schematically shows the dot structure schematic diagram based on Z reversion frameworks in disclosure exemplary embodiment；
Fig. 3 schematically shows the cascade structure schematic diagram of gate driving circuit in disclosure exemplary embodiment；
Fig. 4 schematically shows the scanning sequency schematic diagram based on Z reversion frameworks in disclosure exemplary embodiment；
Fig. 5 schematically shows the driving method flow chart of gate driving circuit in disclosure exemplary embodiment.
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be with a variety of shapes
Formula is implemented, and is not understood as limited to example set forth herein；On the contrary, these embodiments are provided so that the disclosure will more
Fully and completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Described feature, knot
Structure or characteristic can be in any suitable manner incorporated in one or more embodiments.
In addition, attached drawing is only the schematic illustrations of the disclosure, it is not necessarily drawn to scale.Identical attached drawing mark in figure
Note represents same or similar part, thus will omit repetition thereof.Attached some block diagrams shown in figure are work(
Can entity, not necessarily must be corresponding with physically or logically independent entity.Software form may be used to realize these work(
Entity or these functional entitys can be realized in one or more hardware modules or integrated circuit or at heterogeneous networks and/or place
These functional entitys are realized in reason device device and/or microcontroller device.
In relevant inversion driving mode, dot inversion type of drive can obtain the effect for preventing liquid crystal polarization well
Fruit.By taking dot inversion type of drive shown in FIG. 1 as an example, the polarity of the data voltage of arbitrary neighborhood sub-pixel is equal in same frame picture
It differs, and the polarity of the data voltage of all sub-pixels changes in next frame picture.But using dot inversion driving side
Formula can have the following problems：Show in the time that low when applying high during voltage on the data line, this can cause to count in each frame
It is excessive according to the voltage swing of line, the problem of so as to cause power consumption larger.
Based on dot inversion type of drive there are the problem of, the relevant technologies also proposed a kind of Z counter-rotative types pixel shown in Fig. 2
Structure, i.e., the sub-pixel controlled by odd number horizontal scanning line are connected to the data line in its first time such as left side, are scanned by even number line
The sub-pixel of line traffic control is connected to the data line on its second side such as right side.Based on the structure, using the type of drive of column inversion
The driving effect of dot inversion can be realized.But the Z counter-rotative types dot structure will appear when using regular grid driving circuit
Fine pitch mura (microgroove is bad), are mainly reflected under double-colored colour mixture picture, and the signal waveform presence of data line is often gone
Scan saltus step and the constant two kinds of waveforms of a frame voltage, thus the charge rate difference of odd rows and even number line sub-pixel compared with
Greatly.
This example embodiment provides a kind of gate driving circuit, the dot structure applied to Z reversion frameworks.Such as Fig. 3
Shown, which can include multirow shift register cell 30, which can divide
For multiple the first shift register cells 301 positioned at odd-numbered line and multiple the second shift register cells positioned at even number line
302。
In multirow shift register cell 30, multiple first shift register cells 301 can according to the first sequence according to
Secondary cascade, multiple second shift register cells 302 can successively be cascaded according to the second sequence, and the first displacement of afterbody is posted
The output terminal of storage unit 301 can be connected to the input terminal of the second shift register cell 302 of initial level-one, initial level-one
The output terminal of the second shift register cell 302 can be connected to first shift register cell 301 of afterbody and answer
Position end；Wherein, the first sequence and the second sequence are opposite sequence, i.e., one from top to bottom, another from bottom to top.
It should be noted that：The present embodiment is related to " going " and " grade " two concepts.So-called row is according to shift register list
Member 30 position relationship and define, that is, the position correspondence with each row grid line, such as Nth row shift register cell
30 correspond to Nth row grid line；So-called grade is defined according to the waterfall sequence of shift register cell 30, that is, to each row grid
May be the 3rd row after the time sequencing of line output signal, such as the 1st line shift register unit 30 output gated sweep signal
Shift register cell 30 exports gated sweep signal.
The gate driving circuit that disclosure illustrative embodiments are provided, by the grade for changing shift register cell 30
It is coupled structure, so that the scanning sequency of a frame picture is changed, the primary data-signal of original often row saltus step can be controlled in this way
It is primary to become field saltus step so that by signal saltus step frequently and when causing the sub-pixel of undercharge that can obtain enough chargings
Between, charge rate difference in double-colored colour mixture between each row sub-pixel is eliminated with this, so as to improve fine pitch mura not
It is good.
Based on the cascade structure of conventional gate driving circuit, refering to what is shown in Fig. 2, carrying out the double-colored for example red sub- picture of colour mixture
When plain R and blue subpixels B colour mixtures, due to corresponding green sub-pixels G or so two column data lines also respectively with the red in left side
Sub-pixel R is connected with the blue subpixels B on right side, and green sub-pixels G is without display, it is therefore desirable to which often row change is primary
Data-signal, but the data line between red sub-pixel R and blue subpixels B can then keep within a frame data-signal not
Become, the signal waveform that will result in data line in this way has often row scanning saltus step and the constant two kinds of situations of a frame voltage, so as to lead
The charge rate of odd rows and even number line sub-pixel is caused to differ greatly.
Compared to the cascade structure of conventional gate driving circuit, refering to what is shown in Fig. 4, being provided using this example embodiment
Gate driving circuit, you can control is located at the data-signal of two column data lines of green sub-pixels G or so by every row saltus step one
Secondary such as R-G-R-G ... R-G becomes field saltus step once such as R-R-R ... R-G-G-G ...-G, can make in this way by signal saltus step
The sub-pixel of undercharge is frequently caused to obtain enough charging time, so as to eliminate the charge rate between parity rows sub-pixel
It is bad to improve fine pitch mura for difference.
In a kind of this exemplary embodiment, the first sequence can from top to bottom, i.e., from the first line shift register list
Member 30 is to last column shift register cell 30；Second sequence can from bottom to top, i.e., from last column shift register list
Member 30 is to the first row shift register cell 30.It in the case, can be first by odd-numbered line when gate driving circuit works
First shift register cell, 301 sequence is all turned on, then 302 backward of the second shift register cell of even number line is all opened
It opens.
By taking 1366 × 768 resolution ratio as an example, the first shift register cell 301 can for example include the displacement of the 1st row and post
Storage unit 30, the 3rd line shift register unit 30, the 5th line shift register unit 30 ..., the 767th line shift register
Unit 30, the second shift register cell 302 can for example include the 2nd line shift register unit 30, the 4th line shift register
Unit 30, the 6th line shift register unit 30 ..., the 768th line shift register unit 30.The gate driving circuit wraps altogether
768 shift register cells 30 are included, the cascade system of 768 shift register cells 30 is：1st line shift register list
The output terminal of member 30 connects the input terminal of the 3rd line shift register unit 30, and the output terminal of the 3rd line shift register unit 30 connects
Connect the input terminal ... ... of the 5th line shift register unit 30, the output terminal connection the 767th of the 765th line shift register unit 30
The input terminal of line shift register unit 30, the output terminal of the 767th line shift register unit 30 connect the 768th row shift LD
The input terminal of device unit 30, the output terminal of the 768th line shift register unit 30 connect the 766th line shift register unit 30
Input terminal, the output terminal of the 766th line shift register unit 30 connect the input of the 764th line shift register unit 30
End ... ..., the output terminal of the 4th line shift register unit 30 connect the input terminal of the 2nd line shift register unit 30.
In this exemplary another embodiment, the first sequence can from bottom to top, i.e., from last column shift LD
Device unit 30 is to the first row shift register cell 30；Second sequence can from top to bottom, i.e., from the first line shift register list
Member 30 is to last column shift register cell 30.It in the case, can be first by odd-numbered line when gate driving circuit works
301 backward of the first shift register cell be all turned on, then by the sequence of the second shift register cell 302 of even number line all
It opens.
By taking 1366 × 768 resolution ratio as an example, the first shift register cell 301 can for example include the displacement of the 1st row and post
Storage unit 30, the 3rd line shift register unit 30, the 5th line shift register unit 30 ..., the 767th line shift register
Unit 30, the second shift register cell 302 can for example include the 2nd line shift register unit 30, the 4th line shift register
Unit 30, the 6th line shift register unit 30 ..., the 768th line shift register unit 30.The gate driving circuit wraps altogether
768 shift register cells 30 are included, the cascade system of 768 shift register cells 30 is：767th line shift register
The output terminal of unit 30 connects the input terminal of the 765th line shift register unit 30, the 765th line shift register unit 30 it is defeated
Outlet connects the input terminal ... ... of the 763rd line shift register unit 30, and the output terminal of the 3rd line shift register unit 30 connects
The input terminal of the 1st line shift register unit 30 is connect, the output terminal of the 1st line shift register unit 30 connects the displacement of the 2nd row and posts
The input terminal of storage unit 30, the output terminal of the 2nd line shift register unit 30 connect the defeated of the 4th line shift register unit 30
Entering end, the output terminal of the 4th line shift register unit 30 connects the input terminal ... ... of the 6th line shift register unit 30, the
The output terminal of 766 line shift register units 30 connects the input terminal of the 768th line shift register unit 30.
Using the cascade structure of the gate driving circuit in this example embodiment, you can control the first of odd-numbered line to shift
The second shift register cell 302 difference intensive work of register cell 301 and even number line in a frame picture preceding field or
Field after person, so that become can be primary with field saltus step for the primary data-signal of often row saltus step originally, so as to be each row sub-pixel
Enough charging time are provided, charge rate difference in double-colored colour mixture between each row sub-pixel is eliminated with this, improves fine
Pitch mura are bad.
Based on above-mentioned gate driving circuit, this example embodiment additionally provides one kind for driving the gate driving electric
The driving method on road.As shown in figure 5, the driving method can include：
S1, multiple the first shift register cells 301 positioned at odd-numbered line is driven to open successively with the first sequence；
S2, the second shift register list that initial level-one is driven by the first shift register cell 301 of afterbody
Member 302 is opened；
S3, multiple the second shift register cells 302 positioned at even number line is driven to open successively with the second sequence.
Wherein, the first sequence and the second sequence are opposite sequence, i.e., one from top to bottom, another from bottom to top.
The driving method for the gate driving circuit that disclosure illustrative embodiments are provided, based on the gate driving circuit
Cascade structure, can be changed the scanning sequency of a frame picture, original primary data of often row saltus step can be controlled in this way
It is primary that signal becomes field saltus step so that frequently causes the sub-pixel of undercharge that can obtain enough fill by signal saltus step
The electric time eliminates charge rate difference in double-colored colour mixture between each row sub-pixel, so as to improve fine pitch mura with this
It is bad.
Optionally, the first sequence can shift that is, from the first row shift register cell 30 to last column from top to bottom
Register cell 30；Second sequence from last column shift register cell 30 to the first row can shift and post from bottom to top
Storage unit 30.In the case, the driving sequence of gate driving circuit can be first by the first shift register of odd-numbered line
301 sequence of unit is all turned on, then 302 backward of the second shift register cell of even number line is all turned on.
Optionally, the first sequence can shift that is, from last column shift register cell 30 to the first row from bottom to top
Register cell 30；Second sequence from the first row shift register cell 30 to last column can shift and post from top to bottom
Storage unit 30.In the case, the driving sequence of gate driving circuit can be first by the first shift register of odd-numbered line
301 backward of unit is all turned on, then 302 sequence of the second shift register cell of even number line is all turned on.
In this example embodiment, the driving sequence of the gate driving circuit is the scanning sequency of the grid drive method
It can be forward scan or be reverse scan.Wherein, forward scan refer to according to from first order shift register cell 30 to
The sequence of afterbody shift register cell 30 is scanned, and reverse scan refers to according to from afterbody shift register list
The sequence of member 30 to first order shift register cell 30 is scanned.
By taking gate driving circuit includes 6 line shift register units 30 as an example, refering to what is shown in Fig. 3, assuming that the displacement of the 1st row is posted
The output terminal of storage unit 30 connects the input terminal of the 3rd line shift register unit 30, the 3rd line shift register unit 30 it is defeated
Outlet connects the input terminal of the 5th line shift register unit 30, and the output terminal of the 5th line shift register unit 30 connects the 6th row
The input terminal of shift register cell 30, the output terminal of the 6th line shift register unit 30 connect the 4th line shift register unit
30 input terminal, the output terminal of the 4th line shift register unit 30 connect the input terminal of the 2nd line shift register unit 30, that
The waterfall sequence of gate driving circuit is the 5th rows of the 1st the 3rd line shift register unit 30- of line shift register unit 30-
The 2nd line shift registers of the 6th the 4th line shift register unit 30- of line shift register unit 30- of shift register cell 30-
Unit 30.In the case, the driving sequence of forward scan is identical with above-mentioned waterfall sequence, such as can be that the 1st row shifts
Register cell 30, the 3rd line shift register unit 30, the 5th line shift register unit 30, the 6th line shift register unit
30th, the 4th line shift register unit 30, the 2nd line shift register unit 30, and the driving of reverse scan sequence and above-mentioned grade
Connection sequence for the 2nd line shift register unit 30, the 4th line shift register unit 30, the displacement of the 6th row on the contrary, can for example post
Storage unit 30, the 5th line shift register unit 30, the 3rd line shift register unit 30, the 1st line shift register unit 30.
It should be noted that：The detail of the driving method has carried out in detail in corresponding gate driving circuit
Thin description, which is not described herein again.
This example embodiment additionally provides a kind of GOA display panels, refering to what is shown in Fig. 4, including arranged in a crossed manner a plurality of
Scan line 401 and multiple data lines 402, by the multiple sub-pixels for the array arrangement that scan line 401 and data line 402 limit
40 and above-mentioned gate driving circuit.Wherein, in same row sub-pixel 40, the sub-pixel 40 positioned at odd-numbered line is with being located at
The sub-pixel 40 of even number line is connected to different data lines 402, so as to form the dot structure of Z reversion frameworks.
It should be noted that：The multiple sub-pixel can include but is not limited to red sub-pixel R, green sub-pixels G and
Blue subpixels B.
The GOA display panels based on Z reversion frameworks that disclosure illustrative embodiments are provided, on the one hand can eliminate
Charge rate difference in double-colored colour mixture between each row sub-pixel, it is bad so as to improve fine pitch mura, on the other hand may be used
To improve the integrated level of display device, so as to fulfill narrow frame design.
This example embodiment additionally provides a kind of display device, including above-mentioned GOA display panels or including common
Display panel and above-mentioned gate driving circuit.It is bad that the display device can be good at improving fine pitch mura, from
And promote display quality.
Wherein, which can include mobile phone, tablet computer, television set, laptop, Digital Frame, navigation
Any product or component with display function such as instrument.
It should be noted that although several modules or list for acting the equipment performed are referred in above-detailed
Member, but this division is not enforceable.In fact, according to embodiment of the present disclosure, it is above-described two or more
The feature and function of module either unit can embody in a module or unit.A conversely, above-described mould
Either the feature and function of unit can be further divided into being embodied by multiple modules or unit block.
In addition, although describing each step of method in the disclosure with particular order in the accompanying drawings, this does not really want
Asking or implying must could realize according to the particular order come the step for performing these steps or having to carry out shown in whole
Desired result.It is additional or alternative, it is convenient to omit certain steps, by multiple steps merge into a step perform and/
Or a step is decomposed into execution of multiple steps etc..
Those skilled in the art will readily occur to the disclosure its after considering specification and putting into practice invention disclosed herein
His embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Adaptive change follow the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure or
Conventional techniques.Description and embodiments are considered only as illustratively, and the true scope and spirit of the disclosure are by claim
It points out.
It should be understood that the present disclosure is not limited to the precise structures that have been described above and shown in the drawings, and
And various modifications and changes may be made without departing from the scope thereof.The scope of the present disclosure is only limited by appended claim.
Claims (10)
1. a kind of gate driving circuit, which is characterized in that including multirow shift register cell, the multirow shift register list
Member includes multiple the first shift register cells positioned at odd-numbered line and multiple the second shift register cells positioned at even number line；
First shift register cell cascades successively according to the first sequence, and second shift register cell is according to second
Sequence cascades successively, and the output terminal of first shift register cell of afterbody connects described the second of initial level-one and moves
The input terminal of bit register unit, the institute of the output terminal connection afterbody of second shift register cell of initial level-one
State the reset terminal of the first shift register cell；
Wherein, first sequence and second sequence are opposite sequence.
2. gate driving circuit according to claim 1, which is characterized in that first sequence is to be posted from the first row displacement
For storage unit to last column shift register cell, second sequence is from last column shift register cell to first
Line shift register unit.
3. gate driving circuit according to claim 1, which is characterized in that first sequence is to be shifted from last column
Register cell to the first row shift register cell, second sequence be from the first row shift register cell to last
Line shift register unit.
4. a kind of driving method of gate driving circuit, for driving claim 1-3 any one of them gate driving circuits；
It is characterized in that, the driving method includes：
Multiple the first shift register cells positioned at odd-numbered line is driven to open successively with the first sequence；
The second shift register cell for driving initial level-one by the first shift register cell of afterbody is opened；
Multiple the second shift register cells positioned at even number line is driven to open successively with the second sequence.
5. driving method according to claim 4, which is characterized in that first sequence is from the first line shift register
For unit to last column shift register cell, second sequence is to be moved from last column shift register cell to the first row
Bit register unit.
6. driving method according to claim 4, which is characterized in that first sequence is from last column shift LD
For device unit to the first row shift register cell, second sequence is to be moved from the first row shift register cell to last column
Bit register unit.
7. according to claim 4-6 any one of them driving methods, which is characterized in that the scanning sequency packet of the driving method
Include forward scan and reverse scan.
8. a kind of display panel, which is characterized in that including multi-strip scanning line and multiple data lines arranged in a crossed manner, by the scanning
The multiple sub-pixels and claim 1-3 any one of them grid for the array arrangement that line and the data line limit drive
Dynamic circuit；
Wherein, in same row sub-pixel, the sub-pixel positioned at odd-numbered line is connected to different from the sub-pixel positioned at even number line
The data line.
9. display panel according to claim 8, which is characterized in that the multiple sub-pixel includes red sub-pixel, green
Sub-pixels and blue subpixels.
10. a kind of display device, which is characterized in that including claim 8-9 any one of them display panel or including power
Profit requires 1-3 any one of them gate driving circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810103697.3A CN108269546A (en) | 2018-02-01 | 2018-02-01 | Gate driving circuit and its driving method, display panel, display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810103697.3A CN108269546A (en) | 2018-02-01 | 2018-02-01 | Gate driving circuit and its driving method, display panel, display device |
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| CN109872675A (en) * | 2019-04-22 | 2019-06-11 | 京东方科技集团股份有限公司 | A kind of Serial Peripheral Interface (SPI) circuit, display panel and driving method |
| CN110517623A (en) * | 2019-09-24 | 2019-11-29 | 京东方科技集团股份有限公司 | The driving method and device of display show equipment and storage medium |
| CN110853595A (en) * | 2019-12-04 | 2020-02-28 | 厦门天马微电子有限公司 | Display panel and display device |
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| CN105632391A (en) * | 2015-12-30 | 2016-06-01 | 厦门天马微电子有限公司 | Display panel, display method, and display apparatus |
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| CN105632391A (en) * | 2015-12-30 | 2016-06-01 | 厦门天马微电子有限公司 | Display panel, display method, and display apparatus |
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| CN110517623A (en) * | 2019-09-24 | 2019-11-29 | 京东方科技集团股份有限公司 | The driving method and device of display show equipment and storage medium |
| CN110853595A (en) * | 2019-12-04 | 2020-02-28 | 厦门天马微电子有限公司 | Display panel and display device |
| CN110853595B (en) * | 2019-12-04 | 2022-03-29 | 厦门天马微电子有限公司 | Display panel and display device |
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Application publication date: 20180710 |