CN108242926B - Phase-locked loop capable of being locked quickly and locking method thereof - Google Patents
Phase-locked loop capable of being locked quickly and locking method thereof Download PDFInfo
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- CN108242926B CN108242926B CN201710983089.1A CN201710983089A CN108242926B CN 108242926 B CN108242926 B CN 108242926B CN 201710983089 A CN201710983089 A CN 201710983089A CN 108242926 B CN108242926 B CN 108242926B
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- 239000003990 capacitor Substances 0.000 claims description 59
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- 230000004075 alteration Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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Abstract
The invention discloses a phase-locked loop capable of being locked quickly and a locking method thereof, wherein the phase-locked loop capable of being locked quickly comprises a filter control unit and a loop filter with adjustable bandwidth, a voltage-controlled oscillator is connected with a digital phase frequency detector through the loop filter, the filter control unit is connected with the loop filter, and the filter control unit is used for changing a circuit of the loop filter to widen the loop bandwidth when the phase-locked loop works so as to improve the locking speed of the phase-locked loop and recovering the circuit of the loop filter after the phase-locked loop finishes locking so as to recover the loop bandwidth. The invention widens the loop bandwidth by changing the circuit of the loop filter, thereby further improving the locking speed of the phase-locked loop, reducing the locking time of the phase-locked loop and having lower cost.
Description
Technical Field
The invention relates to the technical field of phase-locked loop locking, in particular to a phase-locked loop capable of being locked quickly and a locking method thereof.
Background
In the conventional PLL locking process, the control voltage slides down due to the periodical change of the phase difference of the phase detection of the phase detector caused by the change of the locking frequency, so that the whole locking process is delayed, the locking time is too slow, and the application requirements in a plurality of communications cannot be met.
There are some methods to increase the locking speed of PLL, and even related patents, the general idea is to improve the time wasted by the slow ramp-up process of the loop control voltage caused by the frequency change by rapidly charging the loop filter, which undoubtedly brings faster locking speed to PLL and improves the locking performance of PLL, but this way circuit is more complex, and the extra power consumption brought to the circuit is higher in cost.
Thus, the prior art has yet to be improved and enhanced.
Disclosure of Invention
In view of the above-mentioned shortcomings in the prior art, an object of the present invention is to provide a phase-locked loop and a locking method thereof, which can significantly reduce the locking time of the phase-locked loop and have a low cost.
In order to achieve the purpose, the invention adopts the following technical scheme:
a phase-locked loop capable of being locked quickly comprises a voltage-controlled oscillator, a digital phase frequency detector, a filter control unit and a loop filter with adjustable bandwidth, wherein the voltage-controlled oscillator is connected with the digital phase frequency detector through the loop filter, the filter control unit is connected with the loop filter, and the filter control unit is used for changing a circuit of the loop filter to widen the loop bandwidth so as to improve the locking speed of the phase-locked loop when the phase-locked loop works and recovering the circuit of the loop filter after the phase-locked loop finishes locking so as to recover the loop bandwidth.
In the fast-lockable phase-locked loop, the filter control unit changes the circuit of the loop filter by changing a frequency control word.
In the phase-locked loop capable of being locked quickly, the loop filter comprises a first resistor, a second resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a first triode, one end of the first resistor is connected with one end of the first capacitor and the voltage-controlled oscillator, the other end of the first capacitor is grounded, the other end of the first resistor is grounded sequentially through the second resistor and the second capacitor, one end of the third capacitor, one end of the fourth capacitor and the C + end of the digital phase frequency detector are also connected, the other end of the third capacitor is grounded, the other end of the fourth capacitor is connected with the collector of the first triode, the emitter of the first triode is grounded, and the base of the first triode is connected with the filter control unit.
In the phase-locked loop capable of being locked quickly, the loop filter further comprises a second triode, a third resistor and a fifth capacitor, one end of the third resistor is connected with the other end of the first resistor, the other end of the third resistor is connected with a collector of the second triode through the fifth capacitor, an emitter of the second triode is grounded, and a base of the second triode is connected with the filter control unit.
In the phase-locked loop capable of being locked quickly, the loop filter further comprises a sixth capacitor and a third triode, one end of the sixth capacitor is connected with the voltage-controlled oscillator and one end of the first resistor, the other end of the sixth capacitor is connected with a collector of the third triode, an emitter of the third triode is grounded, and a base of the third triode is connected with the filter control unit.
In the phase-locked loop capable of being locked quickly, the first triode and the third triode are both NPN type triodes.
In the phase-locked loop capable of being locked quickly, the second triode is an NPN type triode.
A locking method of a fast-locking phase-locked loop as described above, comprising the steps of:
when the phase-locked loop works, the filter control unit controls the circuit of the loop filter to change so as to increase the loop bandwidth;
the digital phase frequency detector outputs a locking completion indicating signal to complete locking;
the filter control unit controls the circuit of the loop filter to be restored to its original state.
In the locking method of a fast-locking phase-locked loop, the filter control unit changes the circuit of the loop filter by changing a frequency control word.
Compared with the prior art, in the phase-locked loop and the locking method thereof, the phase-locked loop comprises a filter control unit and a loop filter with adjustable bandwidth, the voltage-controlled oscillator is connected with the digital phase frequency detector through the loop filter, the filter control unit is connected with the loop filter, and the filter control unit is used for changing a circuit of the loop filter to widen the loop bandwidth when the phase-locked loop works so as to improve the locking speed of the phase-locked loop and recovering the circuit of the loop filter to recover the loop bandwidth after the phase-locked loop finishes locking. The invention widens the loop bandwidth by changing the circuit of the loop filter, thereby further improving the locking speed of the phase-locked loop, reducing the locking time of the phase-locked loop and having lower cost.
Drawings
Fig. 1 is a block diagram of a phase-locked loop capable of fast locking according to the present invention.
Fig. 2 is a schematic diagram of a first embodiment of a fast-locking pll according to the present invention.
Fig. 3 is a schematic diagram of a second embodiment of a fast-locking pll according to the present invention.
Fig. 4 is a schematic diagram of a third embodiment of a fast-locking pll according to the present invention.
Fig. 5 is a schematic diagram of a fourth embodiment of a fast-locking pll according to the present invention.
Fig. 6 is a comparison diagram of locking time before and after widening in a fourth embodiment of a phase locked loop capable of locking rapidly according to the present invention.
Fig. 7 is a schematic diagram of a fifth embodiment of a fast-locking pll according to the present invention.
Fig. 8 is a flowchart of a locking method of a fast-locking pll according to the present invention.
Detailed Description
The present invention provides a phase-locked loop capable of fast locking and a locking method thereof, and in order to make the purpose, technical scheme and effect of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, the phase locked loop capable of fast locking provided by the present invention includes a voltage controlled oscillator 10 (VCO) and a digital phase frequency detector 20 (PFD), and further includes a filter control unit 30 and a loop filter 40 with adjustable bandwidth, where the voltage controlled oscillator 10 is connected to the digital phase frequency detector 20 through the loop filter 40, and the filter control unit 30 is connected to the loop filter 40.
Because the bandwidths of the loop filters are different, the locking speed of the phase-locked loop can deviate, so the invention is based on that the locking speed of the phase-locked loop is improved by changing the bandwidth of the loop filter, in particular, when the phase-locked loop works, the filter control unit 30 is used for changing the circuit of the loop filter 40 to widen the loop bandwidth so as to improve the locking speed of the phase-locked loop, and restoring the circuit of the loop filter 40 to restore the loop bandwidth after the phase-locked loop completes locking, so that the phase-locked loop has a faster locking speed in the locking process, and the loop filter can not generate extra power consumption after the locking is completed, the circuit structure is simple, and the cost is saved.
Further, the filter control unit 30 changes the circuit of the loop filter 40 by changing the frequency control word, and when the phase-locked loop needs to change the locking frequency, the filter control unit 30 performs a frequency control word change configuration on the phase-locked loop, for example, when the filter control unit 30 performs a frequency control word modification on the phase-locked loop, the MCU _ CTRL is simultaneously configured to "1", so that the circuit of the loop filter 40 is changed, the loop bandwidth is further widened, and after the phase-locked loop completes locking, the MCU _ CTRL is configured to "0", so that the circuit of the loop filter 40 is restored to its original state, thereby avoiding additional power consumption of the loop filter after locking is completed.
The present invention provides embodiments of a phase-locked loop that can lock quickly by changing the loop bandwidth to increase the locking speed of the phase-locked loop.
Referring to fig. 1 and 2, in a first embodiment of a fast-locking pll, the loop filter 40 includes a first resistor R1, a second resistor R2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a first transistor Q1, one end of the first resistor R1 is connected to one end of the first capacitor C1 and the voltage-controlled oscillator 10, the other end of the first capacitor C1 is grounded, the other end of the first resistor R1 is grounded through the second resistor R2 and the second capacitor C2 in turn, and is also connected with one end of the third capacitor C3, one end of the fourth capacitor C4 and the C + end of the digital phase frequency detector 20, the other end of the third capacitor C3 is grounded, the other end of the fourth capacitor C4 is connected with the collector of the first triode Q1, the emitter of the first transistor Q1 is grounded, and the base of the first transistor Q1 is connected to the filter control unit 30.
Specifically, when the filter control unit 30 performs the frequency control word modification on the phase-locked loop, the MCU _ CTRL is configured to be "1", that is, the first transistor Q1 is turned on (default MCU _ CTRL = '0', and the first transistor Q1 is turned off), the fourth capacitor C4 is connected to the circuit, the circuit of the loop filter 40 changes, the bandwidth is widened, the loop state changes, the locking speed of the phase-locked loop is increased, and when the LD terminal (lock state indication) of the digital phase-frequency detector 20 outputs '1', the filter control unit 30 controls to recover the loop bandwidth (that is, MCU _ CTRL = '0') to complete the whole locking process, thereby achieving the purpose of increasing the locking time of the phase-locked loop.
Referring to fig. 1 and 3, in a second embodiment of the phase locked loop with fast lock, the loop filter 40 further includes a second transistor Q2, a third resistor R3 and a fifth capacitor C5 on the basis of the first embodiment, one end of the third resistor R3 is connected to the other end of the first resistor R1, the other end of the third resistor R3 is connected to a collector of the second transistor Q2 through a fifth capacitor C5, an emitter of the second transistor Q2 is grounded, and a base of the second transistor Q2 is connected to the filter control unit 30.
Specifically, when the filter control unit 30 performs the frequency control word modification on the phase-locked loop, the MCU _ CTRL is configured to be "1" at the same time, that is, the first transistor Q1 and the second transistor Q2 are opened (default MCU _ CTRL = '0', the first transistor Q1 and the second transistor Q2 are closed), the fourth capacitor C4, the third resistor R3 and the fifth capacitor C5 are connected to the circuit, the circuit of the loop filter 40 is changed, the bandwidth is widened, the loop state is changed, the locking speed of the phase-locked loop is controlled, and when the LD terminal (locking state indication) of the digital phase frequency detector 20 outputs '1', the filter control unit 30 controls to recover the loop bandwidth (i.e., MCU _ CTRL = '0') to complete the entire locking process, thereby achieving the purpose of increasing the locking time of the phase-locked loop.
Referring to fig. 1 and 4, in a third embodiment of the fast-locking pll, the loop filter 40 further includes a sixth capacitor C6 and a third transistor Q3 based on the first embodiment, one end of the sixth capacitor C6 is connected to the voltage-controlled oscillator 10 and one end of the first resistor R1, the other end of the sixth capacitor C6 is connected to the collector of the third transistor Q3, the emitter of the third transistor Q3 is grounded, and the base of the third transistor Q3 is connected to the filter control unit 30.
Specifically, when the filter control unit 30 performs the frequency control word modification on the phase-locked loop, the MCU _ CTRL is configured to be "1" at the same time, that is, the first transistor Q1 and the third transistor Q3 are opened (default MCU _ CTRL = '0', the first transistor Q1 and the third transistor Q3 are closed), the fourth capacitor C4 and the sixth capacitor C6 are connected to the circuit, the circuit of the loop filter 40 changes, the bandwidth is widened, the loop state changes, the locking speed of the phase-locked loop is increased, and when the LD terminal (lock state indication) of the digital phase frequency detector 20 outputs '1', the filter control unit 30 controls to recover the loop bandwidth (i.e., MCU _ CTRL = '0') to complete the whole locking process, thereby achieving the purpose of increasing the locking time of the phase-locked loop.
Referring to fig. 1 and 5, in a fourth embodiment of the phase locked loop with fast lock, the loop filter 40 further includes a sixth capacitor C6 and a third transistor Q3 on the basis of the second embodiment, one end of the sixth capacitor C6 is connected to the voltage controlled oscillator 10 and one end of the first resistor R1, the other end of the sixth capacitor C6 is connected to a collector of the third transistor Q3, an emitter of the third transistor Q3 is grounded, and a base of the third transistor Q3 is connected to the filter control unit 30.
Specifically, when the filter control unit 30 performs the frequency control word modification on the phase-locked loop, the MCU _ CTRL is configured to be "1" at the same time, that is, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are turned on (default MCU _ CTRL = '0', the first transistor Q1, the second transistor Q2, and the third transistor Q3 are turned off), the fourth capacitor C4, the third resistor R3, the fifth capacitor C5, and the sixth capacitor C6 are connected to the circuit, the circuit of the loop filter 40 is changed, the bandwidth is widened, the loop state is changed, the locking speed of the phase-locked loop is increased, and when the LD terminal (locking state indication) of the digital phase frequency detector 20 outputs '1', the filter control unit 30 controls to recover the loop bandwidth (that is, the MCU _ CTRL = '0') to complete the entire locking process, thereby achieving the purpose of increasing the locking time of the phase-locked loop.
Referring to fig. 6, the locking time of the pll with the widened loop bandwidth is t1, and the locking time of the pll with the unchanged loop bandwidth is t1+ t2, which shows that the locking time of the pll with the widened loop bandwidth is obviously shortened and the locking speed is obviously increased.
Of course, the present invention may also adopt other design circuits of the loop filter 40, such as the second transistor Q2 and the third transistor Q3, or the second transistor Q2 or the third transistor Q3 may be adopted to connect the loop filter 40 separately, which will not be described in detail herein.
In addition, the present invention can also use two identical loop filters to implement the change of the loop bandwidth in a switching manner, as shown in fig. 7, in a fifth embodiment of a phase-locked loop capable of fast locking, the loop filter 20 uses two identical loop filtering units, and the filter control unit 30 controls different conducting states of the two switches to implement the change of the loop bandwidth, thereby further increasing the locking speed.
The invention widens the loop bandwidth by changing the circuit of the loop filter, thereby further improving the locking speed of the phase-locked loop, reducing the locking time of the phase-locked loop and having lower cost.
Based on the phase-locked loop capable of being locked quickly, the present invention further provides a locking method of a phase-locked loop capable of being locked quickly, referring to fig. 8, where the locking method includes the following steps:
s100, when the phase-locked loop works, the filter control unit controls the circuit of the loop filter to change so as to increase the loop bandwidth;
s200, outputting a locking completion indicating signal by the digital phase frequency detector to complete locking;
s300, the filter control unit controls the circuit of the loop filter to be recovered.
Wherein the filter control unit changes the circuit of the loop filter by changing a frequency control word.
Since the above has described the technical solution of the phase locked loop capable of fast locking in detail, it is not described herein again.
In summary, the invention widens the loop bandwidth by changing the circuit of the loop filter, thereby further improving the locking speed of the phase-locked loop, reducing the locking time of the phase-locked loop, and having lower cost.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.
Claims (6)
1. A phase-locked loop capable of being locked quickly comprises a voltage-controlled oscillator, a digital phase frequency detector, a filter control unit and a loop filter with adjustable bandwidth, wherein the voltage-controlled oscillator is connected with the digital phase frequency detector through the loop filter;
the filter control unit changes the circuit of the loop filter by changing a frequency control word;
the loop filter comprises a first resistor, a second resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a first triode, one end of the first resistor is connected with one end of the first capacitor and the voltage-controlled oscillator, the other end of the first capacitor is grounded, the other end of the first resistor is grounded sequentially through the second resistor and the second capacitor, and is also connected with one end of the third capacitor, one end of the fourth capacitor and the C + end of the digital phase frequency detector, the other end of the third capacitor is grounded, the other end of the fourth capacitor is connected with the collector electrode of the first triode, the emitter electrode of the first triode is grounded, and the base electrode of the first triode is connected with the filter control unit;
the loop filter further comprises a second triode, a third resistor and a fifth capacitor, one end of the third resistor is connected with the other end of the first resistor, the other end of the third resistor is connected with a collector of the second triode through the fifth capacitor, an emitter of the second triode is grounded, and a base of the second triode is connected with the filter control unit.
2. The phase-locked loop of claim 1, wherein the loop filter further comprises a sixth capacitor and a third transistor, one end of the sixth capacitor is connected to the voltage-controlled oscillator and one end of the first resistor, the other end of the sixth capacitor is connected to a collector of the third transistor, an emitter of the third transistor is grounded, and a base of the third transistor is connected to the filter control unit.
3. A phase locked loop that can be locked quickly as claimed in claim 2, wherein the first transistor and the third transistor are NPN transistors.
4. A phase locked loop that can be locked quickly as claimed in claim 1, wherein the second transistor is an NPN transistor.
5. A locking method for a fast lockable phase locked loop according to any of claims 1-4, comprising the steps of: when the phase-locked loop works, the filter control unit controls the circuit of the loop filter to change so as to increase the loop bandwidth; the digital phase frequency detector outputs a locking completion indicating signal to complete locking; the filter control unit controls the circuit of the loop filter to be restored to its original state.
6. A method of locking a fast lockable phase locked loop according to claim 5, characterized in that the filter control unit changes the circuitry of the loop filter by changing a frequency control word.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710983089.1A CN108242926B (en) | 2017-10-20 | 2017-10-20 | Phase-locked loop capable of being locked quickly and locking method thereof |
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| CN201710983089.1A CN108242926B (en) | 2017-10-20 | 2017-10-20 | Phase-locked loop capable of being locked quickly and locking method thereof |
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| CN108242926B true CN108242926B (en) | 2021-12-21 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1829094A (en) * | 2005-02-28 | 2006-09-06 | 鼎芯半导体（上海）有限公司 | PLL loop bandwidth switching circuit and method for wireless communication system |
| CN202282774U (en) * | 2011-11-09 | 2012-06-20 | 成都创新达微波电子有限公司 | Rapid digital phase locking synthesizer |
| CN105141309A (en) * | 2015-09-24 | 2015-12-09 | 山东大学 | Phase-locked loop rapid locking circuit used for frequency hopping communication and operation method thereof |
| CN107040257A (en) * | 2017-03-17 | 2017-08-11 | 上海东软载波微电子有限公司 | Bandwidth of phase lock loop controls circuit and method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8456207B1 (en) * | 2011-11-16 | 2013-06-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lock detector and method of detecting lock status for phase lock loop |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1829094A (en) * | 2005-02-28 | 2006-09-06 | 鼎芯半导体（上海）有限公司 | PLL loop bandwidth switching circuit and method for wireless communication system |
| CN202282774U (en) * | 2011-11-09 | 2012-06-20 | 成都创新达微波电子有限公司 | Rapid digital phase locking synthesizer |
| CN105141309A (en) * | 2015-09-24 | 2015-12-09 | 山东大学 | Phase-locked loop rapid locking circuit used for frequency hopping communication and operation method thereof |
| CN107040257A (en) * | 2017-03-17 | 2017-08-11 | 上海东软载波微电子有限公司 | Bandwidth of phase lock loop controls circuit and method |
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