CN108198778A - A kind of determining method of single-chip parallel position - Google Patents

A kind of determining method of single-chip parallel position Download PDF

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Publication number
CN108198778A
CN108198778A CN201711442714.8A CN201711442714A CN108198778A CN 108198778 A CN108198778 A CN 108198778A CN 201711442714 A CN201711442714 A CN 201711442714A CN 108198778 A CN108198778 A CN 108198778A
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China
Prior art keywords
chip
image
alignment point
coordinate
parallel position
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CN201711442714.8A
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CN108198778B (en
Inventor
孙彬
周文静
夏志伟
刘婷婷
侯佳丽
颜剡
孟庆嵩
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CETC Beijing Electronic Equipment Co
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CETC Beijing Electronic Equipment Co
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682—Mask-wafer alignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/70—Determining position or orientation of objects or cameras
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30148—Semiconductor; IC; Wafer

Abstract

The present invention provides a kind of determining method of single-chip parallel position, includes the following steps：Step 1, image template and the coordinate of image template alignment point are determined；Step 2, the chip image of corresponding position is found by image template；Step 3, the angu-lar deviation of chip image and image template is obtained according to the coordinate pair of the coordinate of image template alignment point and chip image alignment point ratio and chip image alignment point is directed at image template the deviation of point coordinates, to obtain the angle beta of the coordinate A (m, n) and alignment point A of chip image alignment point A in a coordinate system；Step 4, it is worth chip image alignment point to rotate to chip image alignment point coordinates B (x, y) during parallel position according to the grid deviation of angu-lar deviation and chip image alignment point A.According to an embodiment of the invention can an alignment point in office carry out stretching calculating, conveniently determine chip parallel position, reduce alignment the time, improve alignment precision.

Description

A kind of determining method of single-chip parallel position
Technical field
The present invention relates to scribing machine field, more particularly, to a kind of determining method of single-chip parallel position.
Background technology
In semi-automatic cutting-up technical field, generally use semi-automation cutting-up equipment carries out chip by way of vision Position correction, finds out chip head cutter positions and angle, and this method is fast easy to operate.But since chip is placed on workbench When need manual operation so that placement location, angle cause during identification needs to be found on a large scale and align there are a certain range deviation Point increases the alignment time, reduces production efficiency.Meanwhile the determining of traditional chip position uses first trip straightened algorithm, it should Method needs two chips of first and last, when the angle that chip is placed is bigger than normal, is easy to cause at left and right sides of chip and seeks a little not in same a line, Chip is caused to stretch rear angle mistake, reduces alignment precision and reliability.
Invention content
In view of this, the present invention provides a kind of determining method of single-chip parallel position.
In order to solve the above technical problems, present invention employs following technical schemes：
The determining method of the single-chip parallel position of embodiment includes the following steps according to a first aspect of the present invention：
Step 1, image template and the coordinate of image template alignment point are determined；
Step 2, the chip image of corresponding position is found by described image template；
Step 3, it is obtained according to the coordinate pair ratio of the coordinate of described image template alignment point and the chip image alignment point The chip image is sat with the angu-lar deviation of described image template and the chip image alignment point with image template alignment point Target deviation, to obtain the angle of the coordinate A (m, n) and alignment point A of the chip image alignment point A in the coordinate system β；
Step 4, the chip image pair is obtained according to the coordinate of the angu-lar deviation and the chip image alignment point A The coordinate B (x, y) of chip image alignment point B when rotating to parallel position on schedule.
Preferably, the described image template alignment point coordinates in the step 1 is placed by chip size and the chip It is obtained to the fixed position of workbench.
Further, described image template alignment point is the geometric center of image template, and the chip image alignment point is The geometric center of chip image.
Further, the angu-lar deviation include self-view difference α of the chip image compared with the parallel position and The revolution angle deviation α that the chip image and the parallel position compare in coordinate.
Further, the chip image is rotated from corresponding points A to the rotation center point seat of the parallel position corresponding points B It is designated as O (a, b), the angle of radius of circle r, vectorial OB and X-coordinate axle is θ, then when the chip image is rotated to parallel position The x coordinate and y-coordinate of alignment point B be respectively：
X=r cos θ, y=r sin θs,
Wherein,
Preferably, when the chip image alignment point A is in one, four-quadrant, the coordinate of the chip image alignment point B is expired Foot：
X=r cos θ=r cos (alpha+beta)=(n-b) cos α+(m-a) sin α,
Y=r sin θs=r sin (alpha+beta)=- (n-b) sin α+(m-a) cos α.
Preferably, when the chip image alignment point A is in two, three quadrant, the coordinate of the chip image alignment point B is expired Foot：
X=r cos θ=r cos (alpha+beta)=(b-n) cos α+(a-m) sin α,
Y=r sin θs=r sin (alpha+beta)=- (b-n) sin α+(a-m) cos α.
The above-mentioned technical proposal of the present invention has the beneficial effect that：
The determining method of single-chip parallel position according to embodiments of the present invention, can an alignment point in office carry out stretching meter It calculates, conveniently determines the parallel position of chip, reduce the alignment time, improve alignment precision.
Description of the drawings
Fig. 1 is the flow diagram of the determining method of the single-chip parallel position of the embodiment of the present invention；
Fig. 2 is algorithm effect schematic diagram in the determining method of the single-chip parallel position of the embodiment of the present invention.
Specific embodiment
Purpose, technical scheme and advantage to make the embodiment of the present invention are clearer, below in conjunction with the embodiment of the present invention Attached drawing, the technical solution of the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is this hair Bright part of the embodiment, instead of all the embodiments.Based on described the embodiment of the present invention, ordinary skill Personnel's all other embodiments obtained, shall fall within the protection scope of the present invention.
The determining method of single-chip parallel position according to embodiments of the present invention is specifically described with reference to attached drawing first below.
As shown in Figure 1 to Figure 2, the determining method of single-chip parallel position according to embodiments of the present invention includes following step Suddenly：
Step 1, image template and the coordinate of image template alignment point are determined.
Specifically, image template is placed into the fixed position of workbench by chip size and the chip and obtained.
Preferably, image template alignment point is the geometric center of image template, and chip image alignment point is chip image Geometric center.
Step 2, the chip image of corresponding position is found by described image template.
That is, by image template alignment point, manual or automatic startup image alignment function allows machine automatic The relative position of chip is run to, image template is core according to centainly seeking a rule and finding with the most similar image of image template Picture.
Step 3, it is obtained according to the coordinate pair ratio of the coordinate of described image template alignment point and the chip image alignment point The chip image is sat with the angu-lar deviation of described image template and the chip image alignment point with image template alignment point Target deviation, to obtain the angle of the coordinate A (m, n) and alignment point A of the chip image alignment point A in the coordinate system β。
Since image template is known, chip image and image template are compared and can obtain chip image pair Angle betas of the coordinate A (m, n) and alignment point A of coordinate A in the coordinate system on schedule.
Further, angu-lar deviation includes the self-view difference α and chip image chip image compared with parallel position And the revolution angle deviation α that parallel position alignment point compares in coordinate.Wherein self-view difference for chip image center line with The differential seat angle of coordinate X-axis, can automatic identification angular deviation by machine.And revolution angle deviation α passes through rotation for chip image Self-view difference α can reach parallel position, therefore self-view deviation is equal with revolution angle misalignment angle.
Step 4, the chip image pair is obtained according to the coordinate of the angu-lar deviation and the chip image alignment point A The coordinate B (x, y) of chip image alignment point B when rotating to parallel position on schedule.
As shown in Fig. 2, the rotation center point coordinates after chip image is rotated to parallel position is O (a, b), due to chip Coordinate and the angular deviation of image are it has been determined that therefore coordinate O is also it is known that it is also it is known that vector OB and X-coordinate that radius of circle, which is r, The angle of axis is θ, then the x coordinate of chip image alignment point B and y-coordinate computational methods are：
∠ θ=∠ β-∠ α,
It can be obtained by range formula
X=r cos θ, y=r sin θs.
It can be obtained by sine and cosine formula
Cos (β-α)=cos α cos β+sin α sin β,
Sin (β-α)=- sin α cos β+sin β cos α.
Wherein, when chip image alignment point coordinates A (m, n) is in one, four-quadrant, according to following equation
The coordinate value x coordinate and y-coordinate for acquiring chip image corresponding points B be：
X=r cos θ=r cos (alpha+beta)=(n-b) cos α+(m-a) sin α,
Y=r sin θs=r sin (alpha+beta)=- (n-b) sin α+(m-a) cos α.
When chip image alignment point A (m, n) is in two, three quadrants, then acquire chip image corresponding points B's according to following equation Coordinate formula is：
The coordinate value for acquiring chip image corresponding points B is：
X=r cos θ=r cos (alpha+beta)=(b-n) cos α+(a-m) sin α,
Y=r sin θs=r sin (alpha+beta)=- (b-n) sin α+(a-m) cos α.
The determining method of single-chip parallel position according to the present invention, can an alignment point in office carry out stretching calculating, side Just it efficiently determines the parallel position of chip, reduces the alignment time, improve alignment precision.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art For, without departing from the principles of the present invention, several improvements and modifications can also be made, these improvements and modifications It should be regarded as protection scope of the present invention.

Claims (7)

  1. A kind of 1. determining method of single-chip parallel position, which is characterized in that include the following steps：
    Step 1, image template and the coordinate of image template alignment point are determined；
    Step 2, the chip image of corresponding position is found by described image template；
    Step 3, according to obtaining the coordinate pair ratio of the coordinate of described image template alignment point and the chip image alignment point Chip image is directed at point coordinates with the angu-lar deviation of described image template and the chip image alignment point with image template Deviation, to obtain the angle beta of the coordinate A (m, n) and alignment point A of the chip image alignment point A in the coordinate system；
    Step 4, the chip image alignment point is obtained according to the coordinate of the angu-lar deviation and the chip image alignment point A Rotate the coordinate B (x, y) of chip image alignment point B during to parallel position.
  2. 2. the determining method of single-chip parallel position according to claim 1, which is characterized in that the institute in the step 1 It states image template alignment point coordinates the fixed position of workbench is placed by chip size and the chip and obtain.
  3. 3. the determining method of single-chip parallel position according to claim 1 or 2, which is characterized in that described image template Alignment point is the geometric center of image template, and the chip image alignment point is the geometric center of chip image.
  4. 4. the determining method of single-chip parallel position according to claim 1, which is characterized in that the angu-lar deviation packet Self-view difference α and the chip image and the parallel position of the chip image compared with the parallel position are included in coordinate The revolution angle deviation α compared.
  5. 5. the determining method of single-chip parallel position according to claim 4, which is characterized in that the chip image is from right Should rotation center point coordinates of point A when rotating to the parallel position corresponding points B be O (a, b), radius of circle r, vectorial OB and X The angle of reference axis is θ, then the chip image, which is rotated to the x coordinate of alignment point B and y-coordinate during parallel position, is respectively：
    X=rcos θ, y=rsin θ,
    Wherein,
    ∠ θ=∠ β-∠ α,
  6. 6. the determining method of single-chip parallel position according to claim 5, which is characterized in that when the chip image pair In one, four-quadrant, the coordinate of the chip image alignment point B meets A on schedule：
    X=rcos θ=rcos (alpha+beta)=(n-b) cos α+(m-a) sin α,
    Y=rsin θ=rsin (alpha+beta)=- (n-b) sin α+(m-a) cos α.
  7. 7. the determining method of single-chip parallel position according to claim 5, which is characterized in that when the chip image pair In two, three quadrant, the coordinate of the chip image alignment point B meets A on schedule：
    X=rcos θ=rcos (alpha+beta)=(b-n) cos α+(a-m) sin α,
    Y=rsin θ=rsin (alpha+beta)=- (b-n) sin α+(a-m) cos α.
CN201711442714.8A 2017-12-26 2017-12-26 Method for determining parallel position of single chip Active CN108198778B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109816729A (en) * 2019-04-02 2019-05-28 英特尔产品（成都）有限公司 Reference alignment pattern for vision alignment determines method and apparatus
CN110739257A (en) * 2019-11-20 2020-01-31 西北电子装备技术研究所(中国电子科技集团公司第二研究所) Operation method of micro laser system for aligning chip and substrate and fine leveling

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060041775A1 (en) * 2004-08-23 2006-02-23 Fuji Machine Mfg. Co., Ltd. Method and device for producing component data
CN101777610A (en) * 2010-01-21 2010-07-14 东莞华中科技大学制造工程研究院 Method for fast tuning angle of LED chip
CN106683138A (en) * 2016-12-28 2017-05-17 华中科技大学 Calibration method of solder paste printing machine camera

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060041775A1 (en) * 2004-08-23 2006-02-23 Fuji Machine Mfg. Co., Ltd. Method and device for producing component data
CN101777610A (en) * 2010-01-21 2010-07-14 东莞华中科技大学制造工程研究院 Method for fast tuning angle of LED chip
CN106683138A (en) * 2016-12-28 2017-05-17 华中科技大学 Calibration method of solder paste printing machine camera

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109816729A (en) * 2019-04-02 2019-05-28 英特尔产品（成都）有限公司 Reference alignment pattern for vision alignment determines method and apparatus
CN109816729B (en) * 2019-04-02 2020-12-29 英特尔产品（成都）有限公司 Reference alignment pattern determination method and apparatus for visual alignment
CN110739257A (en) * 2019-11-20 2020-01-31 西北电子装备技术研究所(中国电子科技集团公司第二研究所) Operation method of micro laser system for aligning chip and substrate and fine leveling
CN110739257B (en) * 2019-11-20 2021-12-21 西北电子装备技术研究所(中国电子科技集团公司第二研究所) Operation method of micro laser system for aligning chip and substrate and fine leveling

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